1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33 #include <linux/kernel.h> 34 #include <linux/moduleparam.h> 35 #include <linux/pwm.h> 36 37 #include "intel_connector.h" 38 #include "intel_de.h" 39 #include "intel_display_types.h" 40 #include "intel_dp_aux_backlight.h" 41 #include "intel_dsi_dcs_backlight.h" 42 #include "intel_panel.h" 43 44 void 45 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 46 struct drm_display_mode *adjusted_mode) 47 { 48 drm_mode_copy(adjusted_mode, fixed_mode); 49 50 drm_mode_set_crtcinfo(adjusted_mode, 0); 51 } 52 53 static bool is_downclock_mode(const struct drm_display_mode *downclock_mode, 54 const struct drm_display_mode *fixed_mode) 55 { 56 return drm_mode_match(downclock_mode, fixed_mode, 57 DRM_MODE_MATCH_TIMINGS | 58 DRM_MODE_MATCH_FLAGS | 59 DRM_MODE_MATCH_3D_FLAGS) && 60 downclock_mode->clock < fixed_mode->clock; 61 } 62 63 struct drm_display_mode * 64 intel_panel_edid_downclock_mode(struct intel_connector *connector, 65 const struct drm_display_mode *fixed_mode) 66 { 67 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 68 const struct drm_display_mode *scan, *best_mode = NULL; 69 struct drm_display_mode *downclock_mode; 70 int best_clock = fixed_mode->clock; 71 72 list_for_each_entry(scan, &connector->base.probed_modes, head) { 73 /* 74 * If one mode has the same resolution with the fixed_panel 75 * mode while they have the different refresh rate, it means 76 * that the reduced downclock is found. In such 77 * case we can set the different FPx0/1 to dynamically select 78 * between low and high frequency. 79 */ 80 if (is_downclock_mode(scan, fixed_mode) && 81 scan->clock < best_clock) { 82 /* 83 * The downclock is already found. But we 84 * expect to find the lower downclock. 85 */ 86 best_clock = scan->clock; 87 best_mode = scan; 88 } 89 } 90 91 if (!best_mode) 92 return NULL; 93 94 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode); 95 if (!downclock_mode) 96 return NULL; 97 98 drm_dbg_kms(&dev_priv->drm, 99 "[CONNECTOR:%d:%s] using downclock mode from EDID: ", 100 connector->base.base.id, connector->base.name); 101 drm_mode_debug_printmodeline(downclock_mode); 102 103 return downclock_mode; 104 } 105 106 struct drm_display_mode * 107 intel_panel_edid_fixed_mode(struct intel_connector *connector) 108 { 109 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 110 const struct drm_display_mode *scan; 111 struct drm_display_mode *fixed_mode; 112 113 if (list_empty(&connector->base.probed_modes)) 114 return NULL; 115 116 /* prefer fixed mode from EDID if available */ 117 list_for_each_entry(scan, &connector->base.probed_modes, head) { 118 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0) 119 continue; 120 121 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 122 if (!fixed_mode) 123 return NULL; 124 125 drm_dbg_kms(&dev_priv->drm, 126 "[CONNECTOR:%d:%s] using preferred mode from EDID: ", 127 connector->base.base.id, connector->base.name); 128 drm_mode_debug_printmodeline(fixed_mode); 129 130 return fixed_mode; 131 } 132 133 scan = list_first_entry(&connector->base.probed_modes, 134 typeof(*scan), head); 135 136 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 137 if (!fixed_mode) 138 return NULL; 139 140 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 141 142 drm_dbg_kms(&dev_priv->drm, 143 "[CONNECTOR:%d:%s] using first mode from EDID: ", 144 connector->base.base.id, connector->base.name); 145 drm_mode_debug_printmodeline(fixed_mode); 146 147 return fixed_mode; 148 } 149 150 struct drm_display_mode * 151 intel_panel_vbt_fixed_mode(struct intel_connector *connector) 152 { 153 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 154 struct drm_display_info *info = &connector->base.display_info; 155 struct drm_display_mode *fixed_mode; 156 157 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 158 return NULL; 159 160 fixed_mode = drm_mode_duplicate(&dev_priv->drm, 161 dev_priv->vbt.lfp_lvds_vbt_mode); 162 if (!fixed_mode) 163 return NULL; 164 165 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 166 167 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", 168 connector->base.base.id, connector->base.name); 169 drm_mode_debug_printmodeline(fixed_mode); 170 171 info->width_mm = fixed_mode->width_mm; 172 info->height_mm = fixed_mode->height_mm; 173 174 return fixed_mode; 175 } 176 177 /* adjusted_mode has been preset to be the panel's fixed mode */ 178 int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, 179 const struct drm_connector_state *conn_state) 180 { 181 const struct drm_display_mode *adjusted_mode = 182 &crtc_state->hw.adjusted_mode; 183 int x, y, width, height; 184 185 /* Native modes don't need fitting */ 186 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 187 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h && 188 crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) 189 return 0; 190 191 switch (conn_state->scaling_mode) { 192 case DRM_MODE_SCALE_CENTER: 193 width = crtc_state->pipe_src_w; 194 height = crtc_state->pipe_src_h; 195 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 196 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 197 break; 198 199 case DRM_MODE_SCALE_ASPECT: 200 /* Scale but preserve the aspect ratio */ 201 { 202 u32 scaled_width = adjusted_mode->crtc_hdisplay 203 * crtc_state->pipe_src_h; 204 u32 scaled_height = crtc_state->pipe_src_w 205 * adjusted_mode->crtc_vdisplay; 206 if (scaled_width > scaled_height) { /* pillar */ 207 width = scaled_height / crtc_state->pipe_src_h; 208 if (width & 1) 209 width++; 210 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 211 y = 0; 212 height = adjusted_mode->crtc_vdisplay; 213 } else if (scaled_width < scaled_height) { /* letter */ 214 height = scaled_width / crtc_state->pipe_src_w; 215 if (height & 1) 216 height++; 217 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 218 x = 0; 219 width = adjusted_mode->crtc_hdisplay; 220 } else { 221 x = y = 0; 222 width = adjusted_mode->crtc_hdisplay; 223 height = adjusted_mode->crtc_vdisplay; 224 } 225 } 226 break; 227 228 case DRM_MODE_SCALE_NONE: 229 WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w); 230 WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h); 231 fallthrough; 232 case DRM_MODE_SCALE_FULLSCREEN: 233 x = y = 0; 234 width = adjusted_mode->crtc_hdisplay; 235 height = adjusted_mode->crtc_vdisplay; 236 break; 237 238 default: 239 MISSING_CASE(conn_state->scaling_mode); 240 return -EINVAL; 241 } 242 243 drm_rect_init(&crtc_state->pch_pfit.dst, 244 x, y, width, height); 245 crtc_state->pch_pfit.enabled = true; 246 247 return 0; 248 } 249 250 static void 251 centre_horizontally(struct drm_display_mode *adjusted_mode, 252 int width) 253 { 254 u32 border, sync_pos, blank_width, sync_width; 255 256 /* keep the hsync and hblank widths constant */ 257 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 258 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 259 sync_pos = (blank_width - sync_width + 1) / 2; 260 261 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 262 border += border & 1; /* make the border even */ 263 264 adjusted_mode->crtc_hdisplay = width; 265 adjusted_mode->crtc_hblank_start = width + border; 266 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 267 268 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 269 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 270 } 271 272 static void 273 centre_vertically(struct drm_display_mode *adjusted_mode, 274 int height) 275 { 276 u32 border, sync_pos, blank_width, sync_width; 277 278 /* keep the vsync and vblank widths constant */ 279 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 280 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 281 sync_pos = (blank_width - sync_width + 1) / 2; 282 283 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 284 285 adjusted_mode->crtc_vdisplay = height; 286 adjusted_mode->crtc_vblank_start = height + border; 287 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 288 289 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 290 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 291 } 292 293 static u32 panel_fitter_scaling(u32 source, u32 target) 294 { 295 /* 296 * Floating point operation is not supported. So the FACTOR 297 * is defined, which can avoid the floating point computation 298 * when calculating the panel ratio. 299 */ 300 #define ACCURACY 12 301 #define FACTOR (1 << ACCURACY) 302 u32 ratio = source * FACTOR / target; 303 return (FACTOR * ratio + FACTOR/2) / FACTOR; 304 } 305 306 static void i965_scale_aspect(struct intel_crtc_state *crtc_state, 307 u32 *pfit_control) 308 { 309 const struct drm_display_mode *adjusted_mode = 310 &crtc_state->hw.adjusted_mode; 311 u32 scaled_width = adjusted_mode->crtc_hdisplay * 312 crtc_state->pipe_src_h; 313 u32 scaled_height = crtc_state->pipe_src_w * 314 adjusted_mode->crtc_vdisplay; 315 316 /* 965+ is easy, it does everything in hw */ 317 if (scaled_width > scaled_height) 318 *pfit_control |= PFIT_ENABLE | 319 PFIT_SCALING_PILLAR; 320 else if (scaled_width < scaled_height) 321 *pfit_control |= PFIT_ENABLE | 322 PFIT_SCALING_LETTER; 323 else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w) 324 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 325 } 326 327 static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state, 328 u32 *pfit_control, u32 *pfit_pgm_ratios, 329 u32 *border) 330 { 331 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 332 u32 scaled_width = adjusted_mode->crtc_hdisplay * 333 crtc_state->pipe_src_h; 334 u32 scaled_height = crtc_state->pipe_src_w * 335 adjusted_mode->crtc_vdisplay; 336 u32 bits; 337 338 /* 339 * For earlier chips we have to calculate the scaling 340 * ratio by hand and program it into the 341 * PFIT_PGM_RATIO register 342 */ 343 if (scaled_width > scaled_height) { /* pillar */ 344 centre_horizontally(adjusted_mode, 345 scaled_height / 346 crtc_state->pipe_src_h); 347 348 *border = LVDS_BORDER_ENABLE; 349 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) { 350 bits = panel_fitter_scaling(crtc_state->pipe_src_h, 351 adjusted_mode->crtc_vdisplay); 352 353 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 354 bits << PFIT_VERT_SCALE_SHIFT); 355 *pfit_control |= (PFIT_ENABLE | 356 VERT_INTERP_BILINEAR | 357 HORIZ_INTERP_BILINEAR); 358 } 359 } else if (scaled_width < scaled_height) { /* letter */ 360 centre_vertically(adjusted_mode, 361 scaled_width / 362 crtc_state->pipe_src_w); 363 364 *border = LVDS_BORDER_ENABLE; 365 if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 366 bits = panel_fitter_scaling(crtc_state->pipe_src_w, 367 adjusted_mode->crtc_hdisplay); 368 369 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 370 bits << PFIT_VERT_SCALE_SHIFT); 371 *pfit_control |= (PFIT_ENABLE | 372 VERT_INTERP_BILINEAR | 373 HORIZ_INTERP_BILINEAR); 374 } 375 } else { 376 /* Aspects match, Let hw scale both directions */ 377 *pfit_control |= (PFIT_ENABLE | 378 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 379 VERT_INTERP_BILINEAR | 380 HORIZ_INTERP_BILINEAR); 381 } 382 } 383 384 int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state, 385 const struct drm_connector_state *conn_state) 386 { 387 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 388 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 389 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 390 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 391 392 /* Native modes don't need fitting */ 393 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 394 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h) 395 goto out; 396 397 switch (conn_state->scaling_mode) { 398 case DRM_MODE_SCALE_CENTER: 399 /* 400 * For centered modes, we have to calculate border widths & 401 * heights and modify the values programmed into the CRTC. 402 */ 403 centre_horizontally(adjusted_mode, crtc_state->pipe_src_w); 404 centre_vertically(adjusted_mode, crtc_state->pipe_src_h); 405 border = LVDS_BORDER_ENABLE; 406 break; 407 case DRM_MODE_SCALE_ASPECT: 408 /* Scale but preserve the aspect ratio */ 409 if (DISPLAY_VER(dev_priv) >= 4) 410 i965_scale_aspect(crtc_state, &pfit_control); 411 else 412 i9xx_scale_aspect(crtc_state, &pfit_control, 413 &pfit_pgm_ratios, &border); 414 break; 415 case DRM_MODE_SCALE_FULLSCREEN: 416 /* 417 * Full scaling, even if it changes the aspect ratio. 418 * Fortunately this is all done for us in hw. 419 */ 420 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay || 421 crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 422 pfit_control |= PFIT_ENABLE; 423 if (DISPLAY_VER(dev_priv) >= 4) 424 pfit_control |= PFIT_SCALING_AUTO; 425 else 426 pfit_control |= (VERT_AUTO_SCALE | 427 VERT_INTERP_BILINEAR | 428 HORIZ_AUTO_SCALE | 429 HORIZ_INTERP_BILINEAR); 430 } 431 break; 432 default: 433 MISSING_CASE(conn_state->scaling_mode); 434 return -EINVAL; 435 } 436 437 /* 965+ wants fuzzy fitting */ 438 /* FIXME: handle multiple panels by failing gracefully */ 439 if (DISPLAY_VER(dev_priv) >= 4) 440 pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY; 441 442 out: 443 if ((pfit_control & PFIT_ENABLE) == 0) { 444 pfit_control = 0; 445 pfit_pgm_ratios = 0; 446 } 447 448 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 449 if (DISPLAY_VER(dev_priv) < 4 && crtc_state->pipe_bpp == 18) 450 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 451 452 crtc_state->gmch_pfit.control = pfit_control; 453 crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 454 crtc_state->gmch_pfit.lvds_border_bits = border; 455 456 return 0; 457 } 458 459 /** 460 * scale - scale values from one range to another 461 * @source_val: value in range [@source_min..@source_max] 462 * @source_min: minimum legal value for @source_val 463 * @source_max: maximum legal value for @source_val 464 * @target_min: corresponding target value for @source_min 465 * @target_max: corresponding target value for @source_max 466 * 467 * Return @source_val in range [@source_min..@source_max] scaled to range 468 * [@target_min..@target_max]. 469 */ 470 static u32 scale(u32 source_val, 471 u32 source_min, u32 source_max, 472 u32 target_min, u32 target_max) 473 { 474 u64 target_val; 475 476 WARN_ON(source_min > source_max); 477 WARN_ON(target_min > target_max); 478 479 /* defensive */ 480 source_val = clamp(source_val, source_min, source_max); 481 482 /* avoid overflows */ 483 target_val = mul_u32_u32(source_val - source_min, 484 target_max - target_min); 485 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); 486 target_val += target_min; 487 488 return target_val; 489 } 490 491 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 492 * to [hw_min..hw_max]. */ 493 static u32 clamp_user_to_hw(struct intel_connector *connector, 494 u32 user_level, u32 user_max) 495 { 496 struct intel_panel *panel = &connector->panel; 497 u32 hw_level; 498 499 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 500 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 501 502 return hw_level; 503 } 504 505 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 506 static u32 scale_hw_to_user(struct intel_connector *connector, 507 u32 hw_level, u32 user_max) 508 { 509 struct intel_panel *panel = &connector->panel; 510 511 return scale(hw_level, panel->backlight.min, panel->backlight.max, 512 0, user_max); 513 } 514 515 u32 intel_panel_invert_pwm_level(struct intel_connector *connector, u32 val) 516 { 517 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 518 struct intel_panel *panel = &connector->panel; 519 520 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 521 522 if (dev_priv->params.invert_brightness < 0) 523 return val; 524 525 if (dev_priv->params.invert_brightness > 0 || 526 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 527 return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min; 528 } 529 530 return val; 531 } 532 533 void intel_panel_set_pwm_level(const struct drm_connector_state *conn_state, u32 val) 534 { 535 struct intel_connector *connector = to_intel_connector(conn_state->connector); 536 struct drm_i915_private *i915 = to_i915(connector->base.dev); 537 struct intel_panel *panel = &connector->panel; 538 539 drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", val); 540 panel->backlight.pwm_funcs->set(conn_state, val); 541 } 542 543 u32 intel_panel_backlight_level_to_pwm(struct intel_connector *connector, u32 val) 544 { 545 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 546 struct intel_panel *panel = &connector->panel; 547 548 drm_WARN_ON_ONCE(&dev_priv->drm, 549 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); 550 551 val = scale(val, panel->backlight.min, panel->backlight.max, 552 panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); 553 554 return intel_panel_invert_pwm_level(connector, val); 555 } 556 557 u32 intel_panel_backlight_level_from_pwm(struct intel_connector *connector, u32 val) 558 { 559 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 560 struct intel_panel *panel = &connector->panel; 561 562 drm_WARN_ON_ONCE(&dev_priv->drm, 563 panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0); 564 565 if (dev_priv->params.invert_brightness > 0 || 566 (dev_priv->params.invert_brightness == 0 && dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)) 567 val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min); 568 569 return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max, 570 panel->backlight.min, panel->backlight.max); 571 } 572 573 static u32 lpt_get_backlight(struct intel_connector *connector, enum pipe unused) 574 { 575 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 576 577 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 578 } 579 580 static u32 pch_get_backlight(struct intel_connector *connector, enum pipe unused) 581 { 582 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 583 584 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 585 } 586 587 static u32 i9xx_get_backlight(struct intel_connector *connector, enum pipe unused) 588 { 589 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 590 struct intel_panel *panel = &connector->panel; 591 u32 val; 592 593 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 594 if (DISPLAY_VER(dev_priv) < 4) 595 val >>= 1; 596 597 if (panel->backlight.combination_mode) { 598 u8 lbpc; 599 600 pci_read_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, &lbpc); 601 val *= lbpc; 602 } 603 604 return val; 605 } 606 607 static u32 vlv_get_backlight(struct intel_connector *connector, enum pipe pipe) 608 { 609 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 610 611 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 612 return 0; 613 614 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 615 } 616 617 static u32 bxt_get_backlight(struct intel_connector *connector, enum pipe unused) 618 { 619 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 620 struct intel_panel *panel = &connector->panel; 621 622 return intel_de_read(dev_priv, 623 BXT_BLC_PWM_DUTY(panel->backlight.controller)); 624 } 625 626 static u32 ext_pwm_get_backlight(struct intel_connector *connector, enum pipe unused) 627 { 628 struct intel_panel *panel = &connector->panel; 629 struct pwm_state state; 630 631 pwm_get_state(panel->backlight.pwm, &state); 632 return pwm_get_relative_duty_cycle(&state, 100); 633 } 634 635 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 636 { 637 struct intel_connector *connector = to_intel_connector(conn_state->connector); 638 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 639 640 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 641 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); 642 } 643 644 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 645 { 646 struct intel_connector *connector = to_intel_connector(conn_state->connector); 647 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 648 u32 tmp; 649 650 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 651 intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); 652 } 653 654 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 655 { 656 struct intel_connector *connector = to_intel_connector(conn_state->connector); 657 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 658 struct intel_panel *panel = &connector->panel; 659 u32 tmp, mask; 660 661 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 662 663 if (panel->backlight.combination_mode) { 664 u8 lbpc; 665 666 lbpc = level * 0xfe / panel->backlight.pwm_level_max + 1; 667 level /= lbpc; 668 pci_write_config_byte(to_pci_dev(dev_priv->drm.dev), LBPC, lbpc); 669 } 670 671 if (DISPLAY_VER(dev_priv) == 4) { 672 mask = BACKLIGHT_DUTY_CYCLE_MASK; 673 } else { 674 level <<= 1; 675 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 676 } 677 678 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; 679 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); 680 } 681 682 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 683 { 684 struct intel_connector *connector = to_intel_connector(conn_state->connector); 685 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 686 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 687 u32 tmp; 688 689 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 690 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); 691 } 692 693 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 694 { 695 struct intel_connector *connector = to_intel_connector(conn_state->connector); 696 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 697 struct intel_panel *panel = &connector->panel; 698 699 intel_de_write(dev_priv, 700 BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 701 } 702 703 static void ext_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 704 { 705 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 706 707 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 708 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 709 } 710 711 static void 712 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 713 { 714 struct intel_connector *connector = to_intel_connector(conn_state->connector); 715 struct drm_i915_private *i915 = to_i915(connector->base.dev); 716 struct intel_panel *panel = &connector->panel; 717 718 drm_dbg_kms(&i915->drm, "set backlight level = %d\n", level); 719 720 panel->backlight.funcs->set(conn_state, level); 721 } 722 723 /* set backlight brightness to level in range [0..max], assuming hw min is 724 * respected. 725 */ 726 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 727 u32 user_level, u32 user_max) 728 { 729 struct intel_connector *connector = to_intel_connector(conn_state->connector); 730 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 731 struct intel_panel *panel = &connector->panel; 732 u32 hw_level; 733 734 /* 735 * Lack of crtc may occur during driver init because 736 * connection_mutex isn't held across the entire backlight 737 * setup + modeset readout, and the BIOS can issue the 738 * requests at any time. 739 */ 740 if (!panel->backlight.present || !conn_state->crtc) 741 return; 742 743 mutex_lock(&dev_priv->backlight_lock); 744 745 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 746 747 hw_level = clamp_user_to_hw(connector, user_level, user_max); 748 panel->backlight.level = hw_level; 749 750 if (panel->backlight.device) 751 panel->backlight.device->props.brightness = 752 scale_hw_to_user(connector, 753 panel->backlight.level, 754 panel->backlight.device->props.max_brightness); 755 756 if (panel->backlight.enabled) 757 intel_panel_actually_set_backlight(conn_state, hw_level); 758 759 mutex_unlock(&dev_priv->backlight_lock); 760 } 761 762 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) 763 { 764 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 765 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 766 u32 tmp; 767 768 intel_panel_set_pwm_level(old_conn_state, level); 769 770 /* 771 * Although we don't support or enable CPU PWM with LPT/SPT based 772 * systems, it may have been enabled prior to loading the 773 * driver. Disable to avoid warnings on LCPLL disable. 774 * 775 * This needs rework if we need to add support for CPU PWM on PCH split 776 * platforms. 777 */ 778 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 779 if (tmp & BLM_PWM_ENABLE) { 780 drm_dbg_kms(&dev_priv->drm, 781 "cpu backlight was enabled, disabling\n"); 782 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 783 tmp & ~BLM_PWM_ENABLE); 784 } 785 786 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 787 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 788 } 789 790 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 791 { 792 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 793 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 794 u32 tmp; 795 796 intel_panel_set_pwm_level(old_conn_state, val); 797 798 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 799 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 800 801 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 802 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 803 } 804 805 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 806 { 807 intel_panel_set_pwm_level(old_conn_state, val); 808 } 809 810 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 811 { 812 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 813 u32 tmp; 814 815 intel_panel_set_pwm_level(old_conn_state, val); 816 817 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); 818 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 819 } 820 821 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 822 { 823 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 824 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 825 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 826 u32 tmp; 827 828 intel_panel_set_pwm_level(old_conn_state, val); 829 830 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 831 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 832 tmp & ~BLM_PWM_ENABLE); 833 } 834 835 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 836 { 837 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 838 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 839 struct intel_panel *panel = &connector->panel; 840 u32 tmp; 841 842 intel_panel_set_pwm_level(old_conn_state, val); 843 844 tmp = intel_de_read(dev_priv, 845 BXT_BLC_PWM_CTL(panel->backlight.controller)); 846 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 847 tmp & ~BXT_BLC_PWM_ENABLE); 848 849 if (panel->backlight.controller == 1) { 850 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 851 val &= ~UTIL_PIN_ENABLE; 852 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 853 } 854 } 855 856 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state, u32 val) 857 { 858 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 859 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 860 struct intel_panel *panel = &connector->panel; 861 u32 tmp; 862 863 intel_panel_set_pwm_level(old_conn_state, val); 864 865 tmp = intel_de_read(dev_priv, 866 BXT_BLC_PWM_CTL(panel->backlight.controller)); 867 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 868 tmp & ~BXT_BLC_PWM_ENABLE); 869 } 870 871 static void ext_pwm_disable_backlight(const struct drm_connector_state *old_conn_state, u32 level) 872 { 873 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 874 struct intel_panel *panel = &connector->panel; 875 876 panel->backlight.pwm_state.enabled = false; 877 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 878 } 879 880 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 881 { 882 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 883 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 884 struct intel_panel *panel = &connector->panel; 885 886 if (!panel->backlight.present) 887 return; 888 889 /* 890 * Do not disable backlight on the vga_switcheroo path. When switching 891 * away from i915, the other client may depend on i915 to handle the 892 * backlight. This will leave the backlight on unnecessarily when 893 * another client is not activated. 894 */ 895 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 896 drm_dbg_kms(&dev_priv->drm, 897 "Skipping backlight disable on vga switch\n"); 898 return; 899 } 900 901 mutex_lock(&dev_priv->backlight_lock); 902 903 if (panel->backlight.device) 904 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 905 panel->backlight.enabled = false; 906 panel->backlight.funcs->disable(old_conn_state, 0); 907 908 mutex_unlock(&dev_priv->backlight_lock); 909 } 910 911 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 912 const struct drm_connector_state *conn_state, u32 level) 913 { 914 struct intel_connector *connector = to_intel_connector(conn_state->connector); 915 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 916 struct intel_panel *panel = &connector->panel; 917 u32 pch_ctl1, pch_ctl2, schicken; 918 919 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 920 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 921 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 922 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 923 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 924 } 925 926 if (HAS_PCH_LPT(dev_priv)) { 927 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); 928 if (panel->backlight.alternate_pwm_increment) 929 schicken |= LPT_PWM_GRANULARITY; 930 else 931 schicken &= ~LPT_PWM_GRANULARITY; 932 intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); 933 } else { 934 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); 935 if (panel->backlight.alternate_pwm_increment) 936 schicken |= SPT_PWM_GRANULARITY; 937 else 938 schicken &= ~SPT_PWM_GRANULARITY; 939 intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); 940 } 941 942 pch_ctl2 = panel->backlight.pwm_level_max << 16; 943 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 944 945 pch_ctl1 = 0; 946 if (panel->backlight.active_low_pwm) 947 pch_ctl1 |= BLM_PCH_POLARITY; 948 949 /* After LPT, override is the default. */ 950 if (HAS_PCH_LPT(dev_priv)) 951 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 952 953 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 954 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 955 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 956 pch_ctl1 | BLM_PCH_PWM_ENABLE); 957 958 /* This won't stick until the above enable. */ 959 intel_panel_set_pwm_level(conn_state, level); 960 } 961 962 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 963 const struct drm_connector_state *conn_state, u32 level) 964 { 965 struct intel_connector *connector = to_intel_connector(conn_state->connector); 966 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 967 struct intel_panel *panel = &connector->panel; 968 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 969 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 970 971 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 972 if (cpu_ctl2 & BLM_PWM_ENABLE) { 973 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); 974 cpu_ctl2 &= ~BLM_PWM_ENABLE; 975 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 976 } 977 978 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 979 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 980 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 981 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 982 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 983 } 984 985 if (cpu_transcoder == TRANSCODER_EDP) 986 cpu_ctl2 = BLM_TRANSCODER_EDP; 987 else 988 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 989 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 990 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); 991 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 992 993 /* This won't stick until the above enable. */ 994 intel_panel_set_pwm_level(conn_state, level); 995 996 pch_ctl2 = panel->backlight.pwm_level_max << 16; 997 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 998 999 pch_ctl1 = 0; 1000 if (panel->backlight.active_low_pwm) 1001 pch_ctl1 |= BLM_PCH_POLARITY; 1002 1003 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 1004 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 1005 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1006 pch_ctl1 | BLM_PCH_PWM_ENABLE); 1007 } 1008 1009 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 1010 const struct drm_connector_state *conn_state, u32 level) 1011 { 1012 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1013 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1014 struct intel_panel *panel = &connector->panel; 1015 u32 ctl, freq; 1016 1017 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1018 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 1019 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1020 intel_de_write(dev_priv, BLC_PWM_CTL, 0); 1021 } 1022 1023 freq = panel->backlight.pwm_level_max; 1024 if (panel->backlight.combination_mode) 1025 freq /= 0xff; 1026 1027 ctl = freq << 17; 1028 if (panel->backlight.combination_mode) 1029 ctl |= BLM_LEGACY_MODE; 1030 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 1031 ctl |= BLM_POLARITY_PNV; 1032 1033 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1034 intel_de_posting_read(dev_priv, BLC_PWM_CTL); 1035 1036 /* XXX: combine this into above write? */ 1037 intel_panel_set_pwm_level(conn_state, level); 1038 1039 /* 1040 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 1041 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 1042 * that has backlight. 1043 */ 1044 if (DISPLAY_VER(dev_priv) == 2) 1045 intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 1046 } 1047 1048 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 1049 const struct drm_connector_state *conn_state, u32 level) 1050 { 1051 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1052 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1053 struct intel_panel *panel = &connector->panel; 1054 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1055 u32 ctl, ctl2, freq; 1056 1057 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1058 if (ctl2 & BLM_PWM_ENABLE) { 1059 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1060 ctl2 &= ~BLM_PWM_ENABLE; 1061 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1062 } 1063 1064 freq = panel->backlight.pwm_level_max; 1065 if (panel->backlight.combination_mode) 1066 freq /= 0xff; 1067 1068 ctl = freq << 16; 1069 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1070 1071 ctl2 = BLM_PIPE(pipe); 1072 if (panel->backlight.combination_mode) 1073 ctl2 |= BLM_COMBINATION_MODE; 1074 if (panel->backlight.active_low_pwm) 1075 ctl2 |= BLM_POLARITY_I965; 1076 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1077 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); 1078 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1079 1080 intel_panel_set_pwm_level(conn_state, level); 1081 } 1082 1083 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1084 const struct drm_connector_state *conn_state, u32 level) 1085 { 1086 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1087 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1088 struct intel_panel *panel = &connector->panel; 1089 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1090 u32 ctl, ctl2; 1091 1092 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1093 if (ctl2 & BLM_PWM_ENABLE) { 1094 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1095 ctl2 &= ~BLM_PWM_ENABLE; 1096 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1097 } 1098 1099 ctl = panel->backlight.pwm_level_max << 16; 1100 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); 1101 1102 /* XXX: combine this into above write? */ 1103 intel_panel_set_pwm_level(conn_state, level); 1104 1105 ctl2 = 0; 1106 if (panel->backlight.active_low_pwm) 1107 ctl2 |= BLM_POLARITY_I965; 1108 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1109 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1110 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 1111 ctl2 | BLM_PWM_ENABLE); 1112 } 1113 1114 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1115 const struct drm_connector_state *conn_state, u32 level) 1116 { 1117 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1118 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1119 struct intel_panel *panel = &connector->panel; 1120 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1121 u32 pwm_ctl, val; 1122 1123 /* Controller 1 uses the utility pin. */ 1124 if (panel->backlight.controller == 1) { 1125 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1126 if (val & UTIL_PIN_ENABLE) { 1127 drm_dbg_kms(&dev_priv->drm, 1128 "util pin already enabled\n"); 1129 val &= ~UTIL_PIN_ENABLE; 1130 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 1131 } 1132 1133 val = 0; 1134 if (panel->backlight.util_pin_active_low) 1135 val |= UTIL_PIN_POLARITY; 1136 intel_de_write(dev_priv, UTIL_PIN_CTL, 1137 val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1138 } 1139 1140 pwm_ctl = intel_de_read(dev_priv, 1141 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1142 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1143 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1144 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1145 intel_de_write(dev_priv, 1146 BXT_BLC_PWM_CTL(panel->backlight.controller), 1147 pwm_ctl); 1148 } 1149 1150 intel_de_write(dev_priv, 1151 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1152 panel->backlight.pwm_level_max); 1153 1154 intel_panel_set_pwm_level(conn_state, level); 1155 1156 pwm_ctl = 0; 1157 if (panel->backlight.active_low_pwm) 1158 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1159 1160 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1161 pwm_ctl); 1162 intel_de_posting_read(dev_priv, 1163 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1164 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1165 pwm_ctl | BXT_BLC_PWM_ENABLE); 1166 } 1167 1168 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1169 const struct drm_connector_state *conn_state, u32 level) 1170 { 1171 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1172 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1173 struct intel_panel *panel = &connector->panel; 1174 u32 pwm_ctl; 1175 1176 pwm_ctl = intel_de_read(dev_priv, 1177 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1178 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1179 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1180 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1181 intel_de_write(dev_priv, 1182 BXT_BLC_PWM_CTL(panel->backlight.controller), 1183 pwm_ctl); 1184 } 1185 1186 intel_de_write(dev_priv, 1187 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1188 panel->backlight.pwm_level_max); 1189 1190 intel_panel_set_pwm_level(conn_state, level); 1191 1192 pwm_ctl = 0; 1193 if (panel->backlight.active_low_pwm) 1194 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1195 1196 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1197 pwm_ctl); 1198 intel_de_posting_read(dev_priv, 1199 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1200 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1201 pwm_ctl | BXT_BLC_PWM_ENABLE); 1202 } 1203 1204 static void ext_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1205 const struct drm_connector_state *conn_state, u32 level) 1206 { 1207 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1208 struct intel_panel *panel = &connector->panel; 1209 1210 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 1211 panel->backlight.pwm_state.enabled = true; 1212 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1213 } 1214 1215 static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1216 const struct drm_connector_state *conn_state) 1217 { 1218 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1219 struct intel_panel *panel = &connector->panel; 1220 1221 WARN_ON(panel->backlight.max == 0); 1222 1223 if (panel->backlight.level <= panel->backlight.min) { 1224 panel->backlight.level = panel->backlight.max; 1225 if (panel->backlight.device) 1226 panel->backlight.device->props.brightness = 1227 scale_hw_to_user(connector, 1228 panel->backlight.level, 1229 panel->backlight.device->props.max_brightness); 1230 } 1231 1232 panel->backlight.funcs->enable(crtc_state, conn_state, panel->backlight.level); 1233 panel->backlight.enabled = true; 1234 if (panel->backlight.device) 1235 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1236 } 1237 1238 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1239 const struct drm_connector_state *conn_state) 1240 { 1241 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1242 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1243 struct intel_panel *panel = &connector->panel; 1244 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1245 1246 if (!panel->backlight.present) 1247 return; 1248 1249 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); 1250 1251 mutex_lock(&dev_priv->backlight_lock); 1252 1253 __intel_panel_enable_backlight(crtc_state, conn_state); 1254 1255 mutex_unlock(&dev_priv->backlight_lock); 1256 } 1257 1258 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1259 static u32 intel_panel_get_backlight(struct intel_connector *connector) 1260 { 1261 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1262 struct intel_panel *panel = &connector->panel; 1263 u32 val = 0; 1264 1265 mutex_lock(&dev_priv->backlight_lock); 1266 1267 if (panel->backlight.enabled) 1268 val = panel->backlight.funcs->get(connector, intel_connector_get_pipe(connector)); 1269 1270 mutex_unlock(&dev_priv->backlight_lock); 1271 1272 drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val); 1273 return val; 1274 } 1275 1276 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 1277 static u32 scale_user_to_hw(struct intel_connector *connector, 1278 u32 user_level, u32 user_max) 1279 { 1280 struct intel_panel *panel = &connector->panel; 1281 1282 return scale(user_level, 0, user_max, 1283 panel->backlight.min, panel->backlight.max); 1284 } 1285 1286 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 1287 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 1288 u32 user_level, u32 user_max) 1289 { 1290 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1291 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1292 struct intel_panel *panel = &connector->panel; 1293 u32 hw_level; 1294 1295 if (!panel->backlight.present) 1296 return; 1297 1298 mutex_lock(&dev_priv->backlight_lock); 1299 1300 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1301 1302 hw_level = scale_user_to_hw(connector, user_level, user_max); 1303 panel->backlight.level = hw_level; 1304 1305 if (panel->backlight.enabled) 1306 intel_panel_actually_set_backlight(conn_state, hw_level); 1307 1308 mutex_unlock(&dev_priv->backlight_lock); 1309 } 1310 1311 static int intel_backlight_device_update_status(struct backlight_device *bd) 1312 { 1313 struct intel_connector *connector = bl_get_data(bd); 1314 struct intel_panel *panel = &connector->panel; 1315 struct drm_device *dev = connector->base.dev; 1316 1317 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1318 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1319 bd->props.brightness, bd->props.max_brightness); 1320 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1321 bd->props.max_brightness); 1322 1323 /* 1324 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1325 * backlight class device does not make it easy to to differentiate 1326 * between callbacks for brightness and bl_power, so our backlight_power 1327 * callback needs to take this into account. 1328 */ 1329 if (panel->backlight.enabled) { 1330 if (panel->backlight.power) { 1331 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1332 bd->props.brightness != 0; 1333 panel->backlight.power(connector, enable); 1334 } 1335 } else { 1336 bd->props.power = FB_BLANK_POWERDOWN; 1337 } 1338 1339 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1340 return 0; 1341 } 1342 1343 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1344 { 1345 struct intel_connector *connector = bl_get_data(bd); 1346 struct drm_device *dev = connector->base.dev; 1347 struct drm_i915_private *dev_priv = to_i915(dev); 1348 intel_wakeref_t wakeref; 1349 int ret = 0; 1350 1351 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { 1352 u32 hw_level; 1353 1354 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1355 1356 hw_level = intel_panel_get_backlight(connector); 1357 ret = scale_hw_to_user(connector, 1358 hw_level, bd->props.max_brightness); 1359 1360 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1361 } 1362 1363 return ret; 1364 } 1365 1366 static const struct backlight_ops intel_backlight_device_ops = { 1367 .update_status = intel_backlight_device_update_status, 1368 .get_brightness = intel_backlight_device_get_brightness, 1369 }; 1370 1371 int intel_backlight_device_register(struct intel_connector *connector) 1372 { 1373 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1374 struct intel_panel *panel = &connector->panel; 1375 struct backlight_properties props; 1376 struct backlight_device *bd; 1377 const char *name; 1378 int ret = 0; 1379 1380 if (WARN_ON(panel->backlight.device)) 1381 return -ENODEV; 1382 1383 if (!panel->backlight.present) 1384 return 0; 1385 1386 WARN_ON(panel->backlight.max == 0); 1387 1388 memset(&props, 0, sizeof(props)); 1389 props.type = BACKLIGHT_RAW; 1390 1391 /* 1392 * Note: Everything should work even if the backlight device max 1393 * presented to the userspace is arbitrarily chosen. 1394 */ 1395 props.max_brightness = panel->backlight.max; 1396 props.brightness = scale_hw_to_user(connector, 1397 panel->backlight.level, 1398 props.max_brightness); 1399 1400 if (panel->backlight.enabled) 1401 props.power = FB_BLANK_UNBLANK; 1402 else 1403 props.power = FB_BLANK_POWERDOWN; 1404 1405 name = kstrdup("intel_backlight", GFP_KERNEL); 1406 if (!name) 1407 return -ENOMEM; 1408 1409 bd = backlight_device_register(name, connector->base.kdev, connector, 1410 &intel_backlight_device_ops, &props); 1411 1412 /* 1413 * Using the same name independent of the drm device or connector 1414 * prevents registration of multiple backlight devices in the 1415 * driver. However, we need to use the default name for backward 1416 * compatibility. Use unique names for subsequent backlight devices as a 1417 * fallback when the default name already exists. 1418 */ 1419 if (IS_ERR(bd) && PTR_ERR(bd) == -EEXIST) { 1420 kfree(name); 1421 name = kasprintf(GFP_KERNEL, "card%d-%s-backlight", 1422 i915->drm.primary->index, connector->base.name); 1423 if (!name) 1424 return -ENOMEM; 1425 1426 bd = backlight_device_register(name, connector->base.kdev, connector, 1427 &intel_backlight_device_ops, &props); 1428 } 1429 1430 if (IS_ERR(bd)) { 1431 drm_err(&i915->drm, 1432 "[CONNECTOR:%d:%s] backlight device %s register failed: %ld\n", 1433 connector->base.base.id, connector->base.name, name, PTR_ERR(bd)); 1434 ret = PTR_ERR(bd); 1435 goto out; 1436 } 1437 1438 panel->backlight.device = bd; 1439 1440 drm_dbg_kms(&i915->drm, 1441 "[CONNECTOR:%d:%s] backlight device %s registered\n", 1442 connector->base.base.id, connector->base.name, name); 1443 1444 out: 1445 kfree(name); 1446 1447 return ret; 1448 } 1449 1450 void intel_backlight_device_unregister(struct intel_connector *connector) 1451 { 1452 struct intel_panel *panel = &connector->panel; 1453 1454 if (panel->backlight.device) { 1455 backlight_device_unregister(panel->backlight.device); 1456 panel->backlight.device = NULL; 1457 } 1458 } 1459 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1460 1461 /* 1462 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1463 * PWM increment = 1 1464 */ 1465 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1466 { 1467 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1468 1469 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1470 pwm_freq_hz); 1471 } 1472 1473 /* 1474 * BXT: PWM clock frequency = 19.2 MHz. 1475 */ 1476 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1477 { 1478 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1479 } 1480 1481 /* 1482 * SPT: This value represents the period of the PWM stream in clock periods 1483 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1484 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1485 */ 1486 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1487 { 1488 struct intel_panel *panel = &connector->panel; 1489 u32 mul; 1490 1491 if (panel->backlight.alternate_pwm_increment) 1492 mul = 128; 1493 else 1494 mul = 16; 1495 1496 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1497 } 1498 1499 /* 1500 * LPT: This value represents the period of the PWM stream in clock periods 1501 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1502 * LPT SOUTH_CHICKEN2 register bit 5). 1503 */ 1504 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1505 { 1506 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1507 struct intel_panel *panel = &connector->panel; 1508 u32 mul, clock; 1509 1510 if (panel->backlight.alternate_pwm_increment) 1511 mul = 16; 1512 else 1513 mul = 128; 1514 1515 if (HAS_PCH_LPT_H(dev_priv)) 1516 clock = MHz(135); /* LPT:H */ 1517 else 1518 clock = MHz(24); /* LPT:LP */ 1519 1520 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1521 } 1522 1523 /* 1524 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1525 * display raw clocks multiplied by 128. 1526 */ 1527 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1528 { 1529 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1530 1531 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1532 pwm_freq_hz * 128); 1533 } 1534 1535 /* 1536 * Gen2: This field determines the number of time base events (display core 1537 * clock frequency/32) in total for a complete cycle of modulated backlight 1538 * control. 1539 * 1540 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1541 * divided by 32. 1542 */ 1543 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1544 { 1545 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1546 int clock; 1547 1548 if (IS_PINEVIEW(dev_priv)) 1549 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1550 else 1551 clock = KHz(dev_priv->cdclk.hw.cdclk); 1552 1553 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1554 } 1555 1556 /* 1557 * Gen4: This value represents the period of the PWM stream in display core 1558 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1559 * 1560 */ 1561 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1562 { 1563 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1564 int clock; 1565 1566 if (IS_G4X(dev_priv)) 1567 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1568 else 1569 clock = KHz(dev_priv->cdclk.hw.cdclk); 1570 1571 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1572 } 1573 1574 /* 1575 * VLV: This value represents the period of the PWM stream in display core 1576 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1577 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1578 */ 1579 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1580 { 1581 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1582 int mul, clock; 1583 1584 if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1585 if (IS_CHERRYVIEW(dev_priv)) 1586 clock = KHz(19200); 1587 else 1588 clock = MHz(25); 1589 mul = 16; 1590 } else { 1591 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1592 mul = 128; 1593 } 1594 1595 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1596 } 1597 1598 static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv) 1599 { 1600 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1601 1602 if (pwm_freq_hz) { 1603 drm_dbg_kms(&dev_priv->drm, 1604 "VBT defined backlight frequency %u Hz\n", 1605 pwm_freq_hz); 1606 } else { 1607 pwm_freq_hz = 200; 1608 drm_dbg_kms(&dev_priv->drm, 1609 "default backlight frequency %u Hz\n", 1610 pwm_freq_hz); 1611 } 1612 1613 return pwm_freq_hz; 1614 } 1615 1616 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1617 { 1618 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1619 struct intel_panel *panel = &connector->panel; 1620 u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv); 1621 u32 pwm; 1622 1623 if (!panel->backlight.pwm_funcs->hz_to_pwm) { 1624 drm_dbg_kms(&dev_priv->drm, 1625 "backlight frequency conversion not supported\n"); 1626 return 0; 1627 } 1628 1629 pwm = panel->backlight.pwm_funcs->hz_to_pwm(connector, pwm_freq_hz); 1630 if (!pwm) { 1631 drm_dbg_kms(&dev_priv->drm, 1632 "backlight frequency conversion failed\n"); 1633 return 0; 1634 } 1635 1636 return pwm; 1637 } 1638 1639 /* 1640 * Note: The setup hooks can't assume pipe is set! 1641 */ 1642 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1643 { 1644 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1645 struct intel_panel *panel = &connector->panel; 1646 int min; 1647 1648 drm_WARN_ON(&dev_priv->drm, panel->backlight.pwm_level_max == 0); 1649 1650 /* 1651 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1652 * to problems. There are such machines out there. Either our 1653 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1654 * against this by letting the minimum be at most (arbitrarily chosen) 1655 * 25% of the max. 1656 */ 1657 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1658 if (min != dev_priv->vbt.backlight.min_brightness) { 1659 drm_dbg_kms(&dev_priv->drm, 1660 "clamping VBT min backlight %d/255 to %d/255\n", 1661 dev_priv->vbt.backlight.min_brightness, min); 1662 } 1663 1664 /* vbt value is a coefficient in range [0..255] */ 1665 return scale(min, 0, 255, 0, panel->backlight.pwm_level_max); 1666 } 1667 1668 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1669 { 1670 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1671 struct intel_panel *panel = &connector->panel; 1672 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1673 bool alt, cpu_mode; 1674 1675 if (HAS_PCH_LPT(dev_priv)) 1676 alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1677 else 1678 alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1679 panel->backlight.alternate_pwm_increment = alt; 1680 1681 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1682 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1683 1684 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1685 panel->backlight.pwm_level_max = pch_ctl2 >> 16; 1686 1687 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1688 1689 if (!panel->backlight.pwm_level_max) 1690 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1691 1692 if (!panel->backlight.pwm_level_max) 1693 return -ENODEV; 1694 1695 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1696 1697 panel->backlight.pwm_enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1698 1699 cpu_mode = panel->backlight.pwm_enabled && HAS_PCH_LPT(dev_priv) && 1700 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && 1701 (cpu_ctl2 & BLM_PWM_ENABLE); 1702 1703 if (cpu_mode) { 1704 val = pch_get_backlight(connector, unused); 1705 1706 drm_dbg_kms(&dev_priv->drm, 1707 "CPU backlight register was enabled, switching to PCH override\n"); 1708 1709 /* Write converted CPU PWM value to PCH override register */ 1710 lpt_set_backlight(connector->base.state, val); 1711 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1712 pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); 1713 1714 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 1715 cpu_ctl2 & ~BLM_PWM_ENABLE); 1716 } 1717 1718 return 0; 1719 } 1720 1721 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) 1722 { 1723 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1724 struct intel_panel *panel = &connector->panel; 1725 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 1726 1727 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1728 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1729 1730 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1731 panel->backlight.pwm_level_max = pch_ctl2 >> 16; 1732 1733 if (!panel->backlight.pwm_level_max) 1734 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1735 1736 if (!panel->backlight.pwm_level_max) 1737 return -ENODEV; 1738 1739 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1740 1741 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1742 panel->backlight.pwm_enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1743 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1744 1745 return 0; 1746 } 1747 1748 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) 1749 { 1750 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1751 struct intel_panel *panel = &connector->panel; 1752 u32 ctl, val; 1753 1754 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1755 1756 if (DISPLAY_VER(dev_priv) == 2 || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1757 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1758 1759 if (IS_PINEVIEW(dev_priv)) 1760 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1761 1762 panel->backlight.pwm_level_max = ctl >> 17; 1763 1764 if (!panel->backlight.pwm_level_max) { 1765 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1766 panel->backlight.pwm_level_max >>= 1; 1767 } 1768 1769 if (!panel->backlight.pwm_level_max) 1770 return -ENODEV; 1771 1772 if (panel->backlight.combination_mode) 1773 panel->backlight.pwm_level_max *= 0xff; 1774 1775 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1776 1777 val = i9xx_get_backlight(connector, unused); 1778 val = intel_panel_invert_pwm_level(connector, val); 1779 val = clamp(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max); 1780 1781 panel->backlight.pwm_enabled = val != 0; 1782 1783 return 0; 1784 } 1785 1786 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) 1787 { 1788 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1789 struct intel_panel *panel = &connector->panel; 1790 u32 ctl, ctl2; 1791 1792 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1793 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1794 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1795 1796 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1797 panel->backlight.pwm_level_max = ctl >> 16; 1798 1799 if (!panel->backlight.pwm_level_max) 1800 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1801 1802 if (!panel->backlight.pwm_level_max) 1803 return -ENODEV; 1804 1805 if (panel->backlight.combination_mode) 1806 panel->backlight.pwm_level_max *= 0xff; 1807 1808 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1809 1810 panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; 1811 1812 return 0; 1813 } 1814 1815 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1816 { 1817 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1818 struct intel_panel *panel = &connector->panel; 1819 u32 ctl, ctl2; 1820 1821 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 1822 return -ENODEV; 1823 1824 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1825 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1826 1827 ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); 1828 panel->backlight.pwm_level_max = ctl >> 16; 1829 1830 if (!panel->backlight.pwm_level_max) 1831 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1832 1833 if (!panel->backlight.pwm_level_max) 1834 return -ENODEV; 1835 1836 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1837 1838 panel->backlight.pwm_enabled = ctl2 & BLM_PWM_ENABLE; 1839 1840 return 0; 1841 } 1842 1843 static int 1844 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1845 { 1846 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1847 struct intel_panel *panel = &connector->panel; 1848 u32 pwm_ctl, val; 1849 1850 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1851 1852 pwm_ctl = intel_de_read(dev_priv, 1853 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1854 1855 /* Controller 1 uses the utility pin. */ 1856 if (panel->backlight.controller == 1) { 1857 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1858 panel->backlight.util_pin_active_low = 1859 val & UTIL_PIN_POLARITY; 1860 } 1861 1862 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1863 panel->backlight.pwm_level_max = 1864 intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1865 1866 if (!panel->backlight.pwm_level_max) 1867 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1868 1869 if (!panel->backlight.pwm_level_max) 1870 return -ENODEV; 1871 1872 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1873 1874 panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1875 1876 return 0; 1877 } 1878 1879 static int 1880 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 1881 { 1882 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1883 struct intel_panel *panel = &connector->panel; 1884 u32 pwm_ctl; 1885 1886 /* 1887 * CNP has the BXT implementation of backlight, but with only one 1888 * controller. TODO: ICP has multiple controllers but we only use 1889 * controller 0 for now. 1890 */ 1891 panel->backlight.controller = 0; 1892 1893 pwm_ctl = intel_de_read(dev_priv, 1894 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1895 1896 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1897 panel->backlight.pwm_level_max = 1898 intel_de_read(dev_priv, BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1899 1900 if (!panel->backlight.pwm_level_max) 1901 panel->backlight.pwm_level_max = get_backlight_max_vbt(connector); 1902 1903 if (!panel->backlight.pwm_level_max) 1904 return -ENODEV; 1905 1906 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1907 1908 panel->backlight.pwm_enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1909 1910 return 0; 1911 } 1912 1913 static int ext_pwm_setup_backlight(struct intel_connector *connector, 1914 enum pipe pipe) 1915 { 1916 struct drm_device *dev = connector->base.dev; 1917 struct drm_i915_private *dev_priv = to_i915(dev); 1918 struct intel_panel *panel = &connector->panel; 1919 const char *desc; 1920 u32 level; 1921 1922 /* Get the right PWM chip for DSI backlight according to VBT */ 1923 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { 1924 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); 1925 desc = "PMIC"; 1926 } else { 1927 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); 1928 desc = "SoC"; 1929 } 1930 1931 if (IS_ERR(panel->backlight.pwm)) { 1932 drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", 1933 desc); 1934 panel->backlight.pwm = NULL; 1935 return -ENODEV; 1936 } 1937 1938 panel->backlight.pwm_level_max = 100; /* 100% */ 1939 panel->backlight.pwm_level_min = get_backlight_min_vbt(connector); 1940 1941 if (pwm_is_enabled(panel->backlight.pwm)) { 1942 /* PWM is already enabled, use existing settings */ 1943 pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1944 1945 level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state, 1946 100); 1947 level = intel_panel_invert_pwm_level(connector, level); 1948 panel->backlight.pwm_enabled = true; 1949 1950 drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n", 1951 NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, 1952 get_vbt_pwm_freq(dev_priv), level); 1953 } else { 1954 /* Set period from VBT frequency, leave other settings at 0. */ 1955 panel->backlight.pwm_state.period = 1956 NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv); 1957 } 1958 1959 drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", 1960 desc); 1961 return 0; 1962 } 1963 1964 static void intel_pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 1965 { 1966 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1967 struct intel_panel *panel = &connector->panel; 1968 1969 panel->backlight.pwm_funcs->set(conn_state, 1970 intel_panel_invert_pwm_level(connector, level)); 1971 } 1972 1973 static u32 intel_pwm_get_backlight(struct intel_connector *connector, enum pipe pipe) 1974 { 1975 struct intel_panel *panel = &connector->panel; 1976 1977 return intel_panel_invert_pwm_level(connector, 1978 panel->backlight.pwm_funcs->get(connector, pipe)); 1979 } 1980 1981 static void intel_pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1982 const struct drm_connector_state *conn_state, u32 level) 1983 { 1984 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1985 struct intel_panel *panel = &connector->panel; 1986 1987 panel->backlight.pwm_funcs->enable(crtc_state, conn_state, 1988 intel_panel_invert_pwm_level(connector, level)); 1989 } 1990 1991 static void intel_pwm_disable_backlight(const struct drm_connector_state *conn_state, u32 level) 1992 { 1993 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1994 struct intel_panel *panel = &connector->panel; 1995 1996 panel->backlight.pwm_funcs->disable(conn_state, 1997 intel_panel_invert_pwm_level(connector, level)); 1998 } 1999 2000 static int intel_pwm_setup_backlight(struct intel_connector *connector, enum pipe pipe) 2001 { 2002 struct intel_panel *panel = &connector->panel; 2003 int ret = panel->backlight.pwm_funcs->setup(connector, pipe); 2004 2005 if (ret < 0) 2006 return ret; 2007 2008 panel->backlight.min = panel->backlight.pwm_level_min; 2009 panel->backlight.max = panel->backlight.pwm_level_max; 2010 panel->backlight.level = intel_pwm_get_backlight(connector, pipe); 2011 panel->backlight.enabled = panel->backlight.pwm_enabled; 2012 2013 return 0; 2014 } 2015 2016 void intel_panel_update_backlight(struct intel_atomic_state *state, 2017 struct intel_encoder *encoder, 2018 const struct intel_crtc_state *crtc_state, 2019 const struct drm_connector_state *conn_state) 2020 { 2021 struct intel_connector *connector = to_intel_connector(conn_state->connector); 2022 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2023 struct intel_panel *panel = &connector->panel; 2024 2025 if (!panel->backlight.present) 2026 return; 2027 2028 mutex_lock(&dev_priv->backlight_lock); 2029 if (!panel->backlight.enabled) 2030 __intel_panel_enable_backlight(crtc_state, conn_state); 2031 2032 mutex_unlock(&dev_priv->backlight_lock); 2033 } 2034 2035 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) 2036 { 2037 struct drm_i915_private *dev_priv = to_i915(connector->dev); 2038 struct intel_connector *intel_connector = to_intel_connector(connector); 2039 struct intel_panel *panel = &intel_connector->panel; 2040 int ret; 2041 2042 if (!dev_priv->vbt.backlight.present) { 2043 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 2044 drm_dbg_kms(&dev_priv->drm, 2045 "no backlight present per VBT, but present per quirk\n"); 2046 } else { 2047 drm_dbg_kms(&dev_priv->drm, 2048 "no backlight present per VBT\n"); 2049 return 0; 2050 } 2051 } 2052 2053 /* ensure intel_panel has been initialized first */ 2054 if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.funcs)) 2055 return -ENODEV; 2056 2057 /* set level and max in panel struct */ 2058 mutex_lock(&dev_priv->backlight_lock); 2059 ret = panel->backlight.funcs->setup(intel_connector, pipe); 2060 mutex_unlock(&dev_priv->backlight_lock); 2061 2062 if (ret) { 2063 drm_dbg_kms(&dev_priv->drm, 2064 "failed to setup backlight for connector %s\n", 2065 connector->name); 2066 return ret; 2067 } 2068 2069 panel->backlight.present = true; 2070 2071 drm_dbg_kms(&dev_priv->drm, 2072 "Connector %s backlight initialized, %s, brightness %u/%u\n", 2073 connector->name, 2074 enableddisabled(panel->backlight.enabled), 2075 panel->backlight.level, panel->backlight.max); 2076 2077 return 0; 2078 } 2079 2080 static void intel_panel_destroy_backlight(struct intel_panel *panel) 2081 { 2082 /* dispose of the pwm */ 2083 if (panel->backlight.pwm) 2084 pwm_put(panel->backlight.pwm); 2085 2086 panel->backlight.present = false; 2087 } 2088 2089 static const struct intel_panel_bl_funcs bxt_pwm_funcs = { 2090 .setup = bxt_setup_backlight, 2091 .enable = bxt_enable_backlight, 2092 .disable = bxt_disable_backlight, 2093 .set = bxt_set_backlight, 2094 .get = bxt_get_backlight, 2095 .hz_to_pwm = bxt_hz_to_pwm, 2096 }; 2097 2098 static const struct intel_panel_bl_funcs cnp_pwm_funcs = { 2099 .setup = cnp_setup_backlight, 2100 .enable = cnp_enable_backlight, 2101 .disable = cnp_disable_backlight, 2102 .set = bxt_set_backlight, 2103 .get = bxt_get_backlight, 2104 .hz_to_pwm = cnp_hz_to_pwm, 2105 }; 2106 2107 static const struct intel_panel_bl_funcs lpt_pwm_funcs = { 2108 .setup = lpt_setup_backlight, 2109 .enable = lpt_enable_backlight, 2110 .disable = lpt_disable_backlight, 2111 .set = lpt_set_backlight, 2112 .get = lpt_get_backlight, 2113 .hz_to_pwm = lpt_hz_to_pwm, 2114 }; 2115 2116 static const struct intel_panel_bl_funcs spt_pwm_funcs = { 2117 .setup = lpt_setup_backlight, 2118 .enable = lpt_enable_backlight, 2119 .disable = lpt_disable_backlight, 2120 .set = lpt_set_backlight, 2121 .get = lpt_get_backlight, 2122 .hz_to_pwm = spt_hz_to_pwm, 2123 }; 2124 2125 static const struct intel_panel_bl_funcs pch_pwm_funcs = { 2126 .setup = pch_setup_backlight, 2127 .enable = pch_enable_backlight, 2128 .disable = pch_disable_backlight, 2129 .set = pch_set_backlight, 2130 .get = pch_get_backlight, 2131 .hz_to_pwm = pch_hz_to_pwm, 2132 }; 2133 2134 static const struct intel_panel_bl_funcs ext_pwm_funcs = { 2135 .setup = ext_pwm_setup_backlight, 2136 .enable = ext_pwm_enable_backlight, 2137 .disable = ext_pwm_disable_backlight, 2138 .set = ext_pwm_set_backlight, 2139 .get = ext_pwm_get_backlight, 2140 }; 2141 2142 static const struct intel_panel_bl_funcs vlv_pwm_funcs = { 2143 .setup = vlv_setup_backlight, 2144 .enable = vlv_enable_backlight, 2145 .disable = vlv_disable_backlight, 2146 .set = vlv_set_backlight, 2147 .get = vlv_get_backlight, 2148 .hz_to_pwm = vlv_hz_to_pwm, 2149 }; 2150 2151 static const struct intel_panel_bl_funcs i965_pwm_funcs = { 2152 .setup = i965_setup_backlight, 2153 .enable = i965_enable_backlight, 2154 .disable = i965_disable_backlight, 2155 .set = i9xx_set_backlight, 2156 .get = i9xx_get_backlight, 2157 .hz_to_pwm = i965_hz_to_pwm, 2158 }; 2159 2160 static const struct intel_panel_bl_funcs i9xx_pwm_funcs = { 2161 .setup = i9xx_setup_backlight, 2162 .enable = i9xx_enable_backlight, 2163 .disable = i9xx_disable_backlight, 2164 .set = i9xx_set_backlight, 2165 .get = i9xx_get_backlight, 2166 .hz_to_pwm = i9xx_hz_to_pwm, 2167 }; 2168 2169 static const struct intel_panel_bl_funcs pwm_bl_funcs = { 2170 .setup = intel_pwm_setup_backlight, 2171 .enable = intel_pwm_enable_backlight, 2172 .disable = intel_pwm_disable_backlight, 2173 .set = intel_pwm_set_backlight, 2174 .get = intel_pwm_get_backlight, 2175 }; 2176 2177 /* Set up chip specific backlight functions */ 2178 static void 2179 intel_panel_init_backlight_funcs(struct intel_panel *panel) 2180 { 2181 struct intel_connector *connector = 2182 container_of(panel, struct intel_connector, panel); 2183 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2184 2185 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 2186 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 2187 return; 2188 2189 if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) { 2190 panel->backlight.pwm_funcs = &bxt_pwm_funcs; 2191 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { 2192 panel->backlight.pwm_funcs = &cnp_pwm_funcs; 2193 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { 2194 if (HAS_PCH_LPT(dev_priv)) 2195 panel->backlight.pwm_funcs = &lpt_pwm_funcs; 2196 else 2197 panel->backlight.pwm_funcs = &spt_pwm_funcs; 2198 } else if (HAS_PCH_SPLIT(dev_priv)) { 2199 panel->backlight.pwm_funcs = &pch_pwm_funcs; 2200 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 2201 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 2202 panel->backlight.pwm_funcs = &ext_pwm_funcs; 2203 } else { 2204 panel->backlight.pwm_funcs = &vlv_pwm_funcs; 2205 } 2206 } else if (DISPLAY_VER(dev_priv) == 4) { 2207 panel->backlight.pwm_funcs = &i965_pwm_funcs; 2208 } else { 2209 panel->backlight.pwm_funcs = &i9xx_pwm_funcs; 2210 } 2211 2212 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 2213 intel_dp_aux_init_backlight_funcs(connector) == 0) 2214 return; 2215 2216 /* We're using a standard PWM backlight interface */ 2217 panel->backlight.funcs = &pwm_bl_funcs; 2218 } 2219 2220 enum drm_connector_status 2221 intel_panel_detect(struct drm_connector *connector, bool force) 2222 { 2223 struct drm_i915_private *i915 = to_i915(connector->dev); 2224 2225 if (!INTEL_DISPLAY_ENABLED(i915)) 2226 return connector_status_disconnected; 2227 2228 return connector_status_connected; 2229 } 2230 2231 int intel_panel_init(struct intel_panel *panel, 2232 struct drm_display_mode *fixed_mode, 2233 struct drm_display_mode *downclock_mode) 2234 { 2235 intel_panel_init_backlight_funcs(panel); 2236 2237 panel->fixed_mode = fixed_mode; 2238 panel->downclock_mode = downclock_mode; 2239 2240 return 0; 2241 } 2242 2243 void intel_panel_fini(struct intel_panel *panel) 2244 { 2245 struct intel_connector *intel_connector = 2246 container_of(panel, struct intel_connector, panel); 2247 2248 intel_panel_destroy_backlight(panel); 2249 2250 if (panel->fixed_mode) 2251 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2252 2253 if (panel->downclock_mode) 2254 drm_mode_destroy(intel_connector->base.dev, 2255 panel->downclock_mode); 2256 } 2257