xref: /linux/drivers/gpu/drm/i915/display/intel_fbc.h (revision da1d9caf95def6f0320819cf941c9fd1069ba9e1)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_FBC_H__
7 #define __INTEL_FBC_H__
8 
9 #include <linux/types.h>
10 
11 enum fb_op_origin;
12 struct drm_i915_private;
13 struct intel_atomic_state;
14 struct intel_crtc;
15 struct intel_crtc_state;
16 struct intel_fbc;
17 struct intel_plane;
18 struct intel_plane_state;
19 
20 enum intel_fbc_id {
21 	INTEL_FBC_A,
22 
23 	I915_MAX_FBCS,
24 };
25 
26 int intel_fbc_atomic_check(struct intel_atomic_state *state);
27 bool intel_fbc_pre_update(struct intel_atomic_state *state,
28 			  struct intel_crtc *crtc);
29 void intel_fbc_post_update(struct intel_atomic_state *state,
30 			   struct intel_crtc *crtc);
31 void intel_fbc_init(struct drm_i915_private *dev_priv);
32 void intel_fbc_cleanup(struct drm_i915_private *dev_priv);
33 void intel_fbc_sanitize(struct drm_i915_private *dev_priv);
34 void intel_fbc_update(struct intel_atomic_state *state,
35 		      struct intel_crtc *crtc);
36 void intel_fbc_disable(struct intel_crtc *crtc);
37 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
38 			  unsigned int frontbuffer_bits,
39 			  enum fb_op_origin origin);
40 void intel_fbc_flush(struct drm_i915_private *dev_priv,
41 		     unsigned int frontbuffer_bits, enum fb_op_origin origin);
42 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
43 void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
44 void intel_fbc_reset_underrun(struct drm_i915_private *i915);
45 void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
46 void intel_fbc_debugfs_register(struct drm_i915_private *i915);
47 
48 #endif /* __INTEL_FBC_H__ */
49