1 /* SPDX-License-Identifier: MIT 2 * 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef _INTEL_DSB_H 7 #define _INTEL_DSB_H 8 9 #include <linux/types.h> 10 11 #include "i915_reg.h" 12 13 struct intel_crtc; 14 struct i915_vma; 15 16 enum dsb_id { 17 INVALID_DSB = -1, 18 DSB1, 19 DSB2, 20 DSB3, 21 MAX_DSB_PER_PIPE 22 }; 23 24 struct intel_dsb { 25 atomic_t refcount; 26 enum dsb_id id; 27 u32 *cmd_buf; 28 struct i915_vma *vma; 29 30 /* 31 * free_pos will point the first free entry position 32 * and help in calculating tail of command buffer. 33 */ 34 int free_pos; 35 36 /* 37 * ins_start_offset will help to store start address of the dsb 38 * instuction and help in identifying the batch of auto-increment 39 * register. 40 */ 41 u32 ins_start_offset; 42 }; 43 44 struct intel_dsb * 45 intel_dsb_get(struct intel_crtc *crtc); 46 void intel_dsb_put(struct intel_dsb *dsb); 47 void intel_dsb_reg_write(struct intel_dsb *dsb, i915_reg_t reg, u32 val); 48 void intel_dsb_indexed_reg_write(struct intel_dsb *dsb, i915_reg_t reg, 49 u32 val); 50 void intel_dsb_commit(struct intel_dsb *dsb); 51 52 #endif 53