1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 #include <linux/debugfs.h> 7 8 #include "i915_drv.h" 9 #include "i915_reg.h" 10 #include "intel_atomic.h" 11 #include "intel_de.h" 12 #include "intel_display_types.h" 13 #include "intel_drrs.h" 14 #include "intel_frontbuffer.h" 15 #include "intel_panel.h" 16 17 /** 18 * DOC: Display Refresh Rate Switching (DRRS) 19 * 20 * Display Refresh Rate Switching (DRRS) is a power conservation feature 21 * which enables swtching between low and high refresh rates, 22 * dynamically, based on the usage scenario. This feature is applicable 23 * for internal panels. 24 * 25 * Indication that the panel supports DRRS is given by the panel EDID, which 26 * would list multiple refresh rates for one resolution. 27 * 28 * DRRS is of 2 types - static and seamless. 29 * Static DRRS involves changing refresh rate (RR) by doing a full modeset 30 * (may appear as a blink on screen) and is used in dock-undock scenario. 31 * Seamless DRRS involves changing RR without any visual effect to the user 32 * and can be used during normal system usage. This is done by programming 33 * certain registers. 34 * 35 * Support for static/seamless DRRS may be indicated in the VBT based on 36 * inputs from the panel spec. 37 * 38 * DRRS saves power by switching to low RR based on usage scenarios. 39 * 40 * The implementation is based on frontbuffer tracking implementation. When 41 * there is a disturbance on the screen triggered by user activity or a periodic 42 * system activity, DRRS is disabled (RR is changed to high RR). When there is 43 * no movement on screen, after a timeout of 1 second, a switch to low RR is 44 * made. 45 * 46 * For integration with frontbuffer tracking code, intel_drrs_invalidate() 47 * and intel_drrs_flush() are called. 48 * 49 * DRRS can be further extended to support other internal panels and also 50 * the scenario of video playback wherein RR is set based on the rate 51 * requested by userspace. 52 */ 53 54 const char *intel_drrs_type_str(enum drrs_type drrs_type) 55 { 56 static const char * const str[] = { 57 [DRRS_TYPE_NONE] = "none", 58 [DRRS_TYPE_STATIC] = "static", 59 [DRRS_TYPE_SEAMLESS] = "seamless", 60 }; 61 62 if (drrs_type >= ARRAY_SIZE(str)) 63 return "<invalid>"; 64 65 return str[drrs_type]; 66 } 67 68 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915, 69 enum transcoder cpu_transcoder) 70 { 71 if (HAS_DOUBLE_BUFFERED_M_N(i915)) 72 return true; 73 74 return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder); 75 } 76 77 static void 78 intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc, 79 enum drrs_refresh_rate refresh_rate) 80 { 81 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 82 enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder; 83 u32 bit; 84 85 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 86 bit = TRANSCONF_REFRESH_RATE_ALT_VLV; 87 else 88 bit = TRANSCONF_REFRESH_RATE_ALT_ILK; 89 90 intel_de_rmw(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), 91 bit, refresh_rate == DRRS_REFRESH_RATE_LOW ? bit : 0); 92 } 93 94 static void 95 intel_drrs_set_refresh_rate_m_n(struct intel_crtc *crtc, 96 enum drrs_refresh_rate refresh_rate) 97 { 98 intel_cpu_transcoder_set_m1_n1(crtc, crtc->drrs.cpu_transcoder, 99 refresh_rate == DRRS_REFRESH_RATE_LOW ? 100 &crtc->drrs.m2_n2 : &crtc->drrs.m_n); 101 } 102 103 bool intel_drrs_is_active(struct intel_crtc *crtc) 104 { 105 return crtc->drrs.cpu_transcoder != INVALID_TRANSCODER; 106 } 107 108 static void intel_drrs_set_state(struct intel_crtc *crtc, 109 enum drrs_refresh_rate refresh_rate) 110 { 111 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 112 113 if (refresh_rate == crtc->drrs.refresh_rate) 114 return; 115 116 if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder)) 117 intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate); 118 else 119 intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate); 120 121 crtc->drrs.refresh_rate = refresh_rate; 122 } 123 124 static void intel_drrs_schedule_work(struct intel_crtc *crtc) 125 { 126 struct drm_i915_private *i915 = to_i915(crtc->base.dev); 127 128 mod_delayed_work(i915->unordered_wq, &crtc->drrs.work, msecs_to_jiffies(1000)); 129 } 130 131 static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state) 132 { 133 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 134 struct drm_i915_private *i915 = to_i915(crtc->base.dev); 135 unsigned int frontbuffer_bits; 136 137 frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe); 138 139 for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc, 140 crtc_state->joiner_pipes) 141 frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe); 142 143 return frontbuffer_bits; 144 } 145 146 /** 147 * intel_drrs_activate - activate DRRS 148 * @crtc_state: the crtc state 149 * 150 * Activates DRRS on the crtc. 151 */ 152 void intel_drrs_activate(const struct intel_crtc_state *crtc_state) 153 { 154 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 155 156 if (!crtc_state->has_drrs) 157 return; 158 159 if (!crtc_state->hw.active) 160 return; 161 162 if (intel_crtc_is_joiner_secondary(crtc_state)) 163 return; 164 165 mutex_lock(&crtc->drrs.mutex); 166 167 crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder; 168 crtc->drrs.m_n = crtc_state->dp_m_n; 169 crtc->drrs.m2_n2 = crtc_state->dp_m2_n2; 170 crtc->drrs.frontbuffer_bits = intel_drrs_frontbuffer_bits(crtc_state); 171 crtc->drrs.busy_frontbuffer_bits = 0; 172 173 intel_drrs_schedule_work(crtc); 174 175 mutex_unlock(&crtc->drrs.mutex); 176 } 177 178 /** 179 * intel_drrs_deactivate - deactivate DRRS 180 * @old_crtc_state: the old crtc state 181 * 182 * Deactivates DRRS on the crtc. 183 */ 184 void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state) 185 { 186 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); 187 188 if (!old_crtc_state->has_drrs) 189 return; 190 191 if (!old_crtc_state->hw.active) 192 return; 193 194 if (intel_crtc_is_joiner_secondary(old_crtc_state)) 195 return; 196 197 mutex_lock(&crtc->drrs.mutex); 198 199 if (intel_drrs_is_active(crtc)) 200 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH); 201 202 crtc->drrs.cpu_transcoder = INVALID_TRANSCODER; 203 crtc->drrs.frontbuffer_bits = 0; 204 crtc->drrs.busy_frontbuffer_bits = 0; 205 206 mutex_unlock(&crtc->drrs.mutex); 207 208 cancel_delayed_work_sync(&crtc->drrs.work); 209 } 210 211 static void intel_drrs_downclock_work(struct work_struct *work) 212 { 213 struct intel_crtc *crtc = container_of(work, typeof(*crtc), drrs.work.work); 214 215 mutex_lock(&crtc->drrs.mutex); 216 217 if (intel_drrs_is_active(crtc) && !crtc->drrs.busy_frontbuffer_bits) 218 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_LOW); 219 220 mutex_unlock(&crtc->drrs.mutex); 221 } 222 223 static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv, 224 unsigned int all_frontbuffer_bits, 225 bool invalidate) 226 { 227 struct intel_crtc *crtc; 228 229 for_each_intel_crtc(&dev_priv->drm, crtc) { 230 unsigned int frontbuffer_bits; 231 232 mutex_lock(&crtc->drrs.mutex); 233 234 frontbuffer_bits = all_frontbuffer_bits & crtc->drrs.frontbuffer_bits; 235 if (!frontbuffer_bits) { 236 mutex_unlock(&crtc->drrs.mutex); 237 continue; 238 } 239 240 if (invalidate) 241 crtc->drrs.busy_frontbuffer_bits |= frontbuffer_bits; 242 else 243 crtc->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits; 244 245 /* flush/invalidate means busy screen hence upclock */ 246 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH); 247 248 /* 249 * flush also means no more activity hence schedule downclock, if all 250 * other fbs are quiescent too 251 */ 252 if (!crtc->drrs.busy_frontbuffer_bits) 253 intel_drrs_schedule_work(crtc); 254 else 255 cancel_delayed_work(&crtc->drrs.work); 256 257 mutex_unlock(&crtc->drrs.mutex); 258 } 259 } 260 261 /** 262 * intel_drrs_invalidate - Disable Idleness DRRS 263 * @dev_priv: i915 device 264 * @frontbuffer_bits: frontbuffer plane tracking bits 265 * 266 * This function gets called everytime rendering on the given planes start. 267 * Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR). 268 * 269 * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits. 270 */ 271 void intel_drrs_invalidate(struct drm_i915_private *dev_priv, 272 unsigned int frontbuffer_bits) 273 { 274 intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, true); 275 } 276 277 /** 278 * intel_drrs_flush - Restart Idleness DRRS 279 * @dev_priv: i915 device 280 * @frontbuffer_bits: frontbuffer plane tracking bits 281 * 282 * This function gets called every time rendering on the given planes has 283 * completed or flip on a crtc is completed. So DRRS should be upclocked 284 * (LOW_RR -> HIGH_RR). And also Idleness detection should be started again, 285 * if no other planes are dirty. 286 * 287 * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits. 288 */ 289 void intel_drrs_flush(struct drm_i915_private *dev_priv, 290 unsigned int frontbuffer_bits) 291 { 292 intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, false); 293 } 294 295 /** 296 * intel_drrs_crtc_init - Init DRRS for CRTC 297 * @crtc: crtc 298 * 299 * This function is called only once at driver load to initialize basic 300 * DRRS stuff. 301 * 302 */ 303 void intel_drrs_crtc_init(struct intel_crtc *crtc) 304 { 305 INIT_DELAYED_WORK(&crtc->drrs.work, intel_drrs_downclock_work); 306 mutex_init(&crtc->drrs.mutex); 307 crtc->drrs.cpu_transcoder = INVALID_TRANSCODER; 308 } 309 310 static int intel_drrs_debugfs_status_show(struct seq_file *m, void *unused) 311 { 312 struct intel_crtc *crtc = m->private; 313 struct drm_i915_private *i915 = to_i915(crtc->base.dev); 314 const struct intel_crtc_state *crtc_state; 315 int ret; 316 317 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 318 if (ret) 319 return ret; 320 321 crtc_state = to_intel_crtc_state(crtc->base.state); 322 323 mutex_lock(&crtc->drrs.mutex); 324 325 seq_printf(m, "DRRS capable: %s\n", 326 str_yes_no(intel_cpu_transcoder_has_drrs(i915, 327 crtc_state->cpu_transcoder))); 328 329 seq_printf(m, "DRRS enabled: %s\n", 330 str_yes_no(crtc_state->has_drrs)); 331 332 seq_printf(m, "DRRS active: %s\n", 333 str_yes_no(intel_drrs_is_active(crtc))); 334 335 seq_printf(m, "DRRS refresh rate: %s\n", 336 crtc->drrs.refresh_rate == DRRS_REFRESH_RATE_LOW ? 337 "low" : "high"); 338 339 seq_printf(m, "DRRS busy frontbuffer bits: 0x%x\n", 340 crtc->drrs.busy_frontbuffer_bits); 341 342 mutex_unlock(&crtc->drrs.mutex); 343 344 drm_modeset_unlock(&crtc->base.mutex); 345 346 return 0; 347 } 348 349 DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_status); 350 351 static int intel_drrs_debugfs_ctl_set(void *data, u64 val) 352 { 353 struct intel_crtc *crtc = data; 354 struct drm_i915_private *i915 = to_i915(crtc->base.dev); 355 struct intel_crtc_state *crtc_state; 356 struct drm_crtc_commit *commit; 357 int ret; 358 359 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 360 if (ret) 361 return ret; 362 363 crtc_state = to_intel_crtc_state(crtc->base.state); 364 365 if (!crtc_state->hw.active || 366 !crtc_state->has_drrs) 367 goto out; 368 369 commit = crtc_state->uapi.commit; 370 if (commit) { 371 ret = wait_for_completion_interruptible(&commit->hw_done); 372 if (ret) 373 goto out; 374 } 375 376 drm_dbg(&i915->drm, 377 "Manually %sactivating DRRS\n", val ? "" : "de"); 378 379 if (val) 380 intel_drrs_activate(crtc_state); 381 else 382 intel_drrs_deactivate(crtc_state); 383 384 out: 385 drm_modeset_unlock(&crtc->base.mutex); 386 387 return ret; 388 } 389 390 DEFINE_DEBUGFS_ATTRIBUTE(intel_drrs_debugfs_ctl_fops, 391 NULL, intel_drrs_debugfs_ctl_set, "%llu\n"); 392 393 void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc) 394 { 395 debugfs_create_file("i915_drrs_status", 0444, crtc->base.debugfs_entry, 396 crtc, &intel_drrs_debugfs_status_fops); 397 398 debugfs_create_file_unsafe("i915_drrs_ctl", 0644, crtc->base.debugfs_entry, 399 crtc, &intel_drrs_debugfs_ctl_fops); 400 } 401 402 static int intel_drrs_debugfs_type_show(struct seq_file *m, void *unused) 403 { 404 struct intel_connector *connector = m->private; 405 406 seq_printf(m, "DRRS type: %s\n", 407 intel_drrs_type_str(intel_panel_drrs_type(connector))); 408 409 return 0; 410 } 411 412 DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_type); 413 414 void intel_drrs_connector_debugfs_add(struct intel_connector *connector) 415 { 416 if (intel_panel_drrs_type(connector) == DRRS_TYPE_NONE) 417 return; 418 419 debugfs_create_file("i915_drrs_type", 0444, connector->base.debugfs_entry, 420 connector, &intel_drrs_debugfs_type_fops); 421 } 422