xref: /linux/drivers/gpu/drm/i915/display/intel_dpll.h (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2020 Intel Corporation
4  */
5 
6 #ifndef _INTEL_DPLL_H_
7 #define _INTEL_DPLL_H_
8 
9 #include <linux/types.h>
10 
11 struct dpll;
12 struct drm_i915_private;
13 struct intel_crtc;
14 struct intel_crtc_state;
15 enum pipe;
16 
17 void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
18 int vlv_calc_dpll_params(int refclk, struct dpll *clock);
19 int pnv_calc_dpll_params(int refclk, struct dpll *clock);
20 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
21 u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
22 void vlv_compute_dpll(struct intel_crtc_state *crtc_state);
23 void chv_compute_dpll(struct intel_crtc_state *crtc_state);
24 
25 int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
26 		     const struct dpll *dpll);
27 void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
28 
29 void chv_enable_pll(const struct intel_crtc_state *crtc_state);
30 void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
31 void vlv_enable_pll(const struct intel_crtc_state *crtc_state);
32 void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
33 void i9xx_enable_pll(const struct intel_crtc_state *crtc_state);
34 void i9xx_disable_pll(const struct intel_crtc_state *crtc_state);
35 bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
36 			struct dpll *best_clock);
37 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
38 
39 void assert_pll_enabled(struct drm_i915_private *i915, enum pipe pipe);
40 void assert_pll_disabled(struct drm_i915_private *i915, enum pipe pipe);
41 
42 #endif
43