xref: /linux/drivers/gpu/drm/i915/display/intel_dpll.h (revision 9dbbc3b9d09d6deba9f3b9e1d5b355032ed46a75)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2020 Intel Corporation
4  */
5 
6 #ifndef _INTEL_DPLL_H_
7 #define _INTEL_DPLL_H_
8 
9 #include <linux/types.h>
10 
11 struct dpll;
12 struct drm_i915_private;
13 struct intel_crtc;
14 struct intel_crtc_state;
15 enum pipe;
16 
17 void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
18 int vlv_calc_dpll_params(int refclk, struct dpll *clock);
19 int pnv_calc_dpll_params(int refclk, struct dpll *clock);
20 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
21 void vlv_compute_dpll(struct intel_crtc *crtc,
22 		      struct intel_crtc_state *pipe_config);
23 void chv_compute_dpll(struct intel_crtc *crtc,
24 		      struct intel_crtc_state *pipe_config);
25 
26 int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
27 		     const struct dpll *dpll);
28 void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
29 void i9xx_enable_pll(struct intel_crtc *crtc,
30 		     const struct intel_crtc_state *crtc_state);
31 void vlv_enable_pll(struct intel_crtc *crtc,
32 		    const struct intel_crtc_state *pipe_config);
33 void chv_enable_pll(struct intel_crtc *crtc,
34 		    const struct intel_crtc_state *pipe_config);
35 void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
36 void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
37 void i9xx_disable_pll(const struct intel_crtc_state *crtc_state);
38 void vlv_prepare_pll(struct intel_crtc *crtc,
39 		     const struct intel_crtc_state *pipe_config);
40 void chv_prepare_pll(struct intel_crtc *crtc,
41 		     const struct intel_crtc_state *pipe_config);
42 bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
43 			struct dpll *best_clock);
44 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
45 
46 #endif
47