1 /* 2 * Copyright © 2015 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 /* 26 * Laptops with Intel GPUs which have panels that support controlling the 27 * backlight through DP AUX can actually use two different interfaces: Intel's 28 * proprietary DP AUX backlight interface, and the standard VESA backlight 29 * interface. Unfortunately, at the time of writing this a lot of laptops will 30 * advertise support for the standard VESA backlight interface when they 31 * don't properly support it. However, on these systems the Intel backlight 32 * interface generally does work properly. Additionally, these systems will 33 * usually just indicate that they use PWM backlight controls in their VBIOS 34 * for some reason. 35 */ 36 37 #include <drm/drm_print.h> 38 39 #include "intel_backlight.h" 40 #include "intel_display_core.h" 41 #include "intel_display_types.h" 42 #include "intel_dp.h" 43 #include "intel_dp_aux_backlight.h" 44 45 /* 46 * DP AUX registers for Intel's proprietary HDR backlight interface. We define 47 * them here since we'll likely be the only driver to ever use these. 48 */ 49 #define INTEL_EDP_HDR_TCON_CAP0 0x340 50 51 #define INTEL_EDP_HDR_TCON_CAP1 0x341 52 # define INTEL_EDP_HDR_TCON_2084_DECODE_CAP BIT(0) 53 # define INTEL_EDP_HDR_TCON_2020_GAMUT_CAP BIT(1) 54 # define INTEL_EDP_HDR_TCON_TONE_MAPPING_CAP BIT(2) 55 # define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_CAP BIT(3) 56 # define INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP BIT(4) 57 # define INTEL_EDP_HDR_TCON_OPTIMIZATION_CAP BIT(5) 58 # define INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_CAP BIT(6) 59 # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_CONVERSION_CAP BIT(7) 60 61 #define INTEL_EDP_HDR_TCON_CAP2 0x342 62 # define INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP BIT(0) 63 64 #define INTEL_EDP_HDR_TCON_CAP3 0x343 65 66 #define INTEL_EDP_HDR_GETSET_CTRL_PARAMS 0x344 67 # define INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE BIT(0) 68 # define INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE BIT(1) 69 # define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE BIT(2) 70 # define INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE BIT(3) 71 # define INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE BIT(4) 72 # define INTEL_EDP_HDR_TCON_SRGB_TO_PANEL_GAMUT_ENABLE BIT(5) 73 /* Bit 6 is reserved */ 74 # define INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX BIT(7) 75 76 #define INTEL_EDP_HDR_CONTENT_LUMINANCE 0x346 77 #define INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE 0x34A 78 #define INTEL_EDP_SDR_LUMINANCE_LEVEL 0x352 79 #define INTEL_EDP_BRIGHTNESS_NITS_LSB 0x354 80 #define INTEL_EDP_BRIGHTNESS_NITS_MSB 0x355 81 #define INTEL_EDP_BRIGHTNESS_DELAY_FRAMES 0x356 82 #define INTEL_EDP_BRIGHTNESS_PER_FRAME_STEPS 0x357 83 84 #define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_0 0x358 85 # define INTEL_EDP_TCON_USAGE_MASK GENMASK(0, 3) 86 # define INTEL_EDP_TCON_USAGE_UNKNOWN 0x0 87 # define INTEL_EDP_TCON_USAGE_DESKTOP 0x1 88 # define INTEL_EDP_TCON_USAGE_FULL_SCREEN_MEDIA 0x2 89 # define INTEL_EDP_TCON_USAGE_FULL_SCREEN_GAMING 0x3 90 # define INTEL_EDP_TCON_POWER_MASK BIT(4) 91 # define INTEL_EDP_TCON_POWER_DC (0 << 4) 92 # define INTEL_EDP_TCON_POWER_AC (1 << 4) 93 # define INTEL_EDP_TCON_OPTIMIZATION_STRENGTH_MASK GENMASK(5, 7) 94 95 #define INTEL_EDP_BRIGHTNESS_OPTIMIZATION_1 0x359 96 97 enum intel_dp_aux_backlight_modparam { 98 INTEL_DP_AUX_BACKLIGHT_AUTO = -1, 99 INTEL_DP_AUX_BACKLIGHT_OFF = 0, 100 INTEL_DP_AUX_BACKLIGHT_ON = 1, 101 INTEL_DP_AUX_BACKLIGHT_FORCE_VESA = 2, 102 INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL = 3, 103 }; 104 105 static bool is_intel_tcon_cap(const u8 tcon_cap[4]) 106 { 107 return tcon_cap[0] >= 1; 108 } 109 110 /* Intel EDP backlight callbacks */ 111 static bool 112 intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) 113 { 114 struct intel_display *display = to_intel_display(connector); 115 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 116 struct drm_dp_aux *aux = &intel_dp->aux; 117 struct intel_panel *panel = &connector->panel; 118 int ret; 119 u8 tcon_cap[4]; 120 121 intel_dp_wait_source_oui(intel_dp); 122 123 ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap)); 124 if (ret != sizeof(tcon_cap)) 125 return false; 126 127 drm_dbg_kms(display->drm, 128 "[CONNECTOR:%d:%s] Detected %s HDR backlight interface version %d\n", 129 connector->base.base.id, connector->base.name, 130 is_intel_tcon_cap(tcon_cap) ? "Intel" : "unsupported", tcon_cap[0]); 131 132 if (!is_intel_tcon_cap(tcon_cap)) 133 return false; 134 135 if (!(tcon_cap[1] & INTEL_EDP_HDR_TCON_BRIGHTNESS_NITS_CAP)) 136 return false; 137 138 /* 139 * If we don't have HDR static metadata there is no way to 140 * runtime detect used range for nits based control. For now 141 * do not use Intel proprietary eDP backlight control if we 142 * don't have this data in panel EDID. In case we find panel 143 * which supports only nits based control, but doesn't provide 144 * HDR static metadata we need to start maintaining table of 145 * ranges for such panels. 146 */ 147 if (display->params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL && 148 !(connector->base.display_info.hdr_sink_metadata.hdmi_type1.metadata_type & 149 BIT(HDMI_STATIC_METADATA_TYPE1))) { 150 drm_info(display->drm, 151 "[CONNECTOR:%d:%s] Panel is missing HDR static metadata. Possible support for Intel HDR backlight interface is not used. If your backlight controls don't work try booting with i915.enable_dpcd_backlight=%d.\n", 152 connector->base.base.id, connector->base.name, 153 INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL); 154 return false; 155 } 156 157 panel->backlight.edp.intel_cap.sdr_uses_aux = 158 tcon_cap[2] & INTEL_EDP_SDR_TCON_BRIGHTNESS_AUX_CAP; 159 panel->backlight.edp.intel_cap.supports_2084_decode = 160 tcon_cap[1] & INTEL_EDP_HDR_TCON_2084_DECODE_CAP; 161 panel->backlight.edp.intel_cap.supports_2020_gamut = 162 tcon_cap[1] & INTEL_EDP_HDR_TCON_2020_GAMUT_CAP; 163 panel->backlight.edp.intel_cap.supports_segmented_backlight = 164 tcon_cap[1] & INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_CAP; 165 panel->backlight.edp.intel_cap.supports_sdp_colorimetry = 166 tcon_cap[1] & INTEL_EDP_HDR_TCON_SDP_COLORIMETRY_CAP; 167 panel->backlight.edp.intel_cap.supports_tone_mapping = 168 tcon_cap[1] & INTEL_EDP_HDR_TCON_TONE_MAPPING_CAP; 169 170 return true; 171 } 172 173 static u32 174 intel_dp_aux_hdr_get_backlight(struct intel_connector *connector, enum pipe pipe) 175 { 176 struct intel_display *display = to_intel_display(connector); 177 struct intel_panel *panel = &connector->panel; 178 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 179 u8 tmp; 180 u8 buf[2] = {}; 181 182 if (drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &tmp) != 1) { 183 drm_err(display->drm, 184 "[CONNECTOR:%d:%s] Failed to read current backlight mode from DPCD\n", 185 connector->base.base.id, connector->base.name); 186 return 0; 187 } 188 189 if (!(tmp & INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE)) { 190 if (!panel->backlight.edp.intel_cap.sdr_uses_aux) { 191 u32 pwm_level = panel->backlight.pwm_funcs->get(connector, pipe); 192 193 return intel_backlight_level_from_pwm(connector, pwm_level); 194 } 195 196 /* Assume 100% brightness if backlight controls aren't enabled yet */ 197 return panel->backlight.max; 198 } 199 200 if (drm_dp_dpcd_read(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf, 201 sizeof(buf)) != sizeof(buf)) { 202 drm_err(display->drm, 203 "[CONNECTOR:%d:%s] Failed to read brightness from DPCD\n", 204 connector->base.base.id, connector->base.name); 205 return 0; 206 } 207 208 return (buf[1] << 8 | buf[0]); 209 } 210 211 static void 212 intel_dp_aux_hdr_set_aux_backlight(const struct drm_connector_state *conn_state, u32 level) 213 { 214 struct intel_connector *connector = to_intel_connector(conn_state->connector); 215 struct drm_device *dev = connector->base.dev; 216 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 217 u8 buf[4] = {}; 218 219 buf[0] = level & 0xFF; 220 buf[1] = (level & 0xFF00) >> 8; 221 222 if (drm_dp_dpcd_write(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf, 223 sizeof(buf)) != sizeof(buf)) 224 drm_err(dev, "[CONNECTOR:%d:%s] Failed to write brightness level to DPCD\n", 225 connector->base.base.id, connector->base.name); 226 } 227 228 static bool 229 intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state) 230 { 231 struct hdr_output_metadata *hdr_metadata; 232 233 if (!conn_state->hdr_output_metadata) 234 return false; 235 236 hdr_metadata = conn_state->hdr_output_metadata->data; 237 238 return hdr_metadata->hdmi_metadata_type1.eotf == HDMI_EOTF_SMPTE_ST2084; 239 } 240 241 static void 242 intel_dp_aux_hdr_set_backlight(const struct drm_connector_state *conn_state, u32 level) 243 { 244 struct intel_connector *connector = to_intel_connector(conn_state->connector); 245 struct intel_panel *panel = &connector->panel; 246 247 if (intel_dp_in_hdr_mode(conn_state) || 248 panel->backlight.edp.intel_cap.sdr_uses_aux) { 249 intel_dp_aux_hdr_set_aux_backlight(conn_state, level); 250 } else { 251 const u32 pwm_level = intel_backlight_level_to_pwm(connector, level); 252 253 intel_backlight_set_pwm_level(conn_state, pwm_level); 254 } 255 } 256 257 static void 258 intel_dp_aux_write_content_luminance(struct intel_connector *connector, 259 struct hdr_output_metadata *hdr_metadata) 260 { 261 struct intel_display *display = to_intel_display(connector); 262 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 263 int ret; 264 u8 buf[4]; 265 266 if (!intel_dp_has_gamut_metadata_dip(connector->encoder)) 267 return; 268 269 buf[0] = hdr_metadata->hdmi_metadata_type1.max_cll & 0xFF; 270 buf[1] = (hdr_metadata->hdmi_metadata_type1.max_cll & 0xFF00) >> 8; 271 buf[2] = hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF; 272 buf[3] = (hdr_metadata->hdmi_metadata_type1.max_fall & 0xFF00) >> 8; 273 274 ret = drm_dp_dpcd_write(&intel_dp->aux, 275 INTEL_EDP_HDR_CONTENT_LUMINANCE, 276 buf, sizeof(buf)); 277 if (ret < 0) 278 drm_dbg_kms(display->drm, 279 "Content Luminance DPCD reg write failed, err:-%d\n", 280 ret); 281 } 282 283 static void 284 intel_dp_aux_fill_hdr_tcon_params(const struct drm_connector_state *conn_state, u8 *ctrl) 285 { 286 struct intel_connector *connector = to_intel_connector(conn_state->connector); 287 struct intel_panel *panel = &connector->panel; 288 struct intel_display *display = to_intel_display(connector); 289 290 /* 291 * According to spec segmented backlight needs to be set whenever panel is in 292 * HDR mode. 293 */ 294 if (intel_dp_in_hdr_mode(conn_state)) { 295 *ctrl |= INTEL_EDP_HDR_TCON_SEGMENTED_BACKLIGHT_ENABLE; 296 *ctrl |= INTEL_EDP_HDR_TCON_2084_DECODE_ENABLE; 297 } 298 299 if (DISPLAY_VER(display) < 11) 300 *ctrl &= ~INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE; 301 302 if (panel->backlight.edp.intel_cap.supports_2020_gamut && 303 (conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_RGB || 304 conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_YCC || 305 conn_state->colorspace == DRM_MODE_COLORIMETRY_BT2020_CYCC)) 306 *ctrl |= INTEL_EDP_HDR_TCON_2020_GAMUT_ENABLE; 307 308 if (panel->backlight.edp.intel_cap.supports_sdp_colorimetry && 309 intel_dp_has_gamut_metadata_dip(connector->encoder)) 310 *ctrl |= INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX; 311 else 312 *ctrl &= ~INTEL_EDP_HDR_TCON_SDP_OVERRIDE_AUX; 313 } 314 315 static void 316 intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, 317 const struct drm_connector_state *conn_state, u32 level) 318 { 319 struct intel_display *display = to_intel_display(crtc_state); 320 struct intel_connector *connector = to_intel_connector(conn_state->connector); 321 struct intel_panel *panel = &connector->panel; 322 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 323 struct hdr_output_metadata *hdr_metadata; 324 int ret; 325 u8 old_ctrl, ctrl; 326 327 intel_dp_wait_source_oui(intel_dp); 328 329 ret = drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl); 330 if (ret != 1) { 331 drm_err(display->drm, 332 "[CONNECTOR:%d:%s] Failed to read current backlight control mode: %d\n", 333 connector->base.base.id, connector->base.name, ret); 334 return; 335 } 336 337 ctrl = old_ctrl; 338 if (intel_dp_in_hdr_mode(conn_state) || 339 panel->backlight.edp.intel_cap.sdr_uses_aux) { 340 ctrl |= INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE; 341 342 intel_dp_aux_hdr_set_aux_backlight(conn_state, level); 343 } else { 344 u32 pwm_level = intel_backlight_level_to_pwm(connector, level); 345 346 panel->backlight.pwm_funcs->enable(crtc_state, conn_state, pwm_level); 347 348 ctrl &= ~INTEL_EDP_HDR_TCON_BRIGHTNESS_AUX_ENABLE; 349 } 350 351 intel_dp_aux_fill_hdr_tcon_params(conn_state, &ctrl); 352 353 if (ctrl != old_ctrl && 354 drm_dp_dpcd_writeb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) != 1) 355 drm_err(display->drm, 356 "[CONNECTOR:%d:%s] Failed to configure DPCD brightness controls\n", 357 connector->base.base.id, connector->base.name); 358 359 if (intel_dp_in_hdr_mode(conn_state)) { 360 hdr_metadata = conn_state->hdr_output_metadata->data; 361 intel_dp_aux_write_content_luminance(connector, hdr_metadata); 362 } 363 } 364 365 static void 366 intel_dp_aux_hdr_disable_backlight(const struct drm_connector_state *conn_state, u32 level) 367 { 368 struct intel_connector *connector = to_intel_connector(conn_state->connector); 369 struct intel_panel *panel = &connector->panel; 370 371 /* Nothing to do for AUX based backlight controls */ 372 if (panel->backlight.edp.intel_cap.sdr_uses_aux) 373 return; 374 375 /* Note we want the actual pwm_level to be 0, regardless of pwm_min */ 376 panel->backlight.pwm_funcs->disable(conn_state, intel_backlight_invert_pwm_level(connector, 0)); 377 } 378 379 static const char *dpcd_vs_pwm_str(bool aux) 380 { 381 return aux ? "DPCD" : "PWM"; 382 } 383 384 static void 385 intel_dp_aux_write_panel_luminance_override(struct intel_connector *connector) 386 { 387 struct intel_display *display = to_intel_display(connector); 388 struct intel_panel *panel = &connector->panel; 389 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 390 int ret; 391 u8 buf[4] = {}; 392 393 buf[0] = panel->backlight.min & 0xFF; 394 buf[1] = (panel->backlight.min & 0xFF00) >> 8; 395 buf[2] = panel->backlight.max & 0xFF; 396 buf[3] = (panel->backlight.max & 0xFF00) >> 8; 397 398 ret = drm_dp_dpcd_write(&intel_dp->aux, 399 INTEL_EDP_HDR_PANEL_LUMINANCE_OVERRIDE, 400 buf, sizeof(buf)); 401 if (ret < 0) 402 drm_dbg_kms(display->drm, 403 "Panel Luminance DPCD reg write failed, err:-%d\n", 404 ret); 405 } 406 407 static int 408 intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pipe) 409 { 410 struct intel_display *display = to_intel_display(connector); 411 struct intel_panel *panel = &connector->panel; 412 struct drm_luminance_range_info *luminance_range = 413 &connector->base.display_info.luminance_range; 414 int ret; 415 416 drm_dbg_kms(display->drm, 417 "[CONNECTOR:%d:%s] SDR backlight is controlled through %s\n", 418 connector->base.base.id, connector->base.name, 419 dpcd_vs_pwm_str(panel->backlight.edp.intel_cap.sdr_uses_aux)); 420 421 if (!panel->backlight.edp.intel_cap.sdr_uses_aux) { 422 ret = panel->backlight.pwm_funcs->setup(connector, pipe); 423 if (ret < 0) { 424 drm_err(display->drm, 425 "[CONNECTOR:%d:%s] Failed to setup SDR backlight controls through PWM: %d\n", 426 connector->base.base.id, connector->base.name, ret); 427 return ret; 428 } 429 } 430 431 if (luminance_range->max_luminance) { 432 panel->backlight.max = luminance_range->max_luminance; 433 panel->backlight.min = luminance_range->min_luminance; 434 } else { 435 panel->backlight.max = 512; 436 panel->backlight.min = 0; 437 } 438 439 intel_dp_aux_write_panel_luminance_override(connector); 440 441 drm_dbg_kms(display->drm, 442 "[CONNECTOR:%d:%s] Using AUX HDR interface for backlight control (range %d..%d)\n", 443 connector->base.base.id, connector->base.name, 444 panel->backlight.min, panel->backlight.max); 445 446 panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector, pipe); 447 panel->backlight.enabled = panel->backlight.level != 0; 448 449 return 0; 450 } 451 452 /* VESA backlight callbacks */ 453 static u32 intel_dp_aux_vesa_get_backlight(struct intel_connector *connector, enum pipe unused) 454 { 455 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 456 struct intel_panel *panel = &connector->panel; 457 u8 buf[3]; 458 u32 val = 0; 459 int ret; 460 461 if (panel->backlight.edp.vesa.luminance_control_support) { 462 ret = drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, buf, 463 sizeof(buf)); 464 if (ret < 0) { 465 drm_err(intel_dp->aux.drm_dev, 466 "[CONNECTOR:%d:%s] Failed to read Luminance from DPCD\n", 467 connector->base.base.id, connector->base.name); 468 return 0; 469 } 470 471 val |= buf[0] | buf[1] << 8 | buf[2] << 16; 472 return val / 1000; 473 } 474 475 return connector->panel.backlight.level; 476 } 477 478 static void 479 intel_dp_aux_vesa_set_backlight(const struct drm_connector_state *conn_state, u32 level) 480 { 481 struct intel_connector *connector = to_intel_connector(conn_state->connector); 482 struct intel_panel *panel = &connector->panel; 483 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 484 485 if (!panel->backlight.edp.vesa.info.aux_set) { 486 const u32 pwm_level = intel_backlight_level_to_pwm(connector, level); 487 488 intel_backlight_set_pwm_level(conn_state, pwm_level); 489 } 490 491 drm_edp_backlight_set_level(&intel_dp->aux, &panel->backlight.edp.vesa.info, level); 492 } 493 494 static void 495 intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state, 496 const struct drm_connector_state *conn_state, u32 level) 497 { 498 struct intel_connector *connector = to_intel_connector(conn_state->connector); 499 struct intel_panel *panel = &connector->panel; 500 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 501 502 if (!panel->backlight.edp.vesa.info.aux_enable) { 503 u32 pwm_level; 504 505 if (!panel->backlight.edp.vesa.info.aux_set) 506 pwm_level = intel_backlight_level_to_pwm(connector, level); 507 else 508 pwm_level = intel_backlight_invert_pwm_level(connector, 509 panel->backlight.pwm_level_max); 510 511 panel->backlight.pwm_funcs->enable(crtc_state, conn_state, pwm_level); 512 } 513 514 drm_edp_backlight_enable(&intel_dp->aux, &panel->backlight.edp.vesa.info, level); 515 } 516 517 static void intel_dp_aux_vesa_disable_backlight(const struct drm_connector_state *old_conn_state, 518 u32 level) 519 { 520 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 521 struct intel_panel *panel = &connector->panel; 522 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); 523 524 if (panel->backlight.edp.vesa.luminance_control_support) 525 return; 526 527 drm_edp_backlight_disable(&intel_dp->aux, &panel->backlight.edp.vesa.info); 528 529 if (!panel->backlight.edp.vesa.info.aux_enable) 530 panel->backlight.pwm_funcs->disable(old_conn_state, 531 intel_backlight_invert_pwm_level(connector, 0)); 532 } 533 534 static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe) 535 { 536 struct intel_display *display = to_intel_display(connector); 537 struct drm_luminance_range_info *luminance_range = 538 &connector->base.display_info.luminance_range; 539 struct intel_dp *intel_dp = intel_attached_dp(connector); 540 struct intel_panel *panel = &connector->panel; 541 u32 current_level; 542 u8 current_mode; 543 int ret; 544 545 ret = drm_edp_backlight_init(&intel_dp->aux, &panel->backlight.edp.vesa.info, 546 luminance_range->max_luminance, 547 panel->vbt.backlight.pwm_freq_hz, 548 intel_dp->edp_dpcd, ¤t_level, ¤t_mode, 549 false); 550 if (ret < 0) 551 return ret; 552 553 drm_dbg_kms(display->drm, 554 "[CONNECTOR:%d:%s] AUX VESA backlight enable is controlled through %s\n", 555 connector->base.base.id, connector->base.name, 556 dpcd_vs_pwm_str(panel->backlight.edp.vesa.info.aux_enable)); 557 drm_dbg_kms(display->drm, 558 "[CONNECTOR:%d:%s] AUX VESA backlight level is controlled through %s\n", 559 connector->base.base.id, connector->base.name, 560 dpcd_vs_pwm_str(panel->backlight.edp.vesa.info.aux_set)); 561 562 if (!panel->backlight.edp.vesa.info.aux_set || 563 !panel->backlight.edp.vesa.info.aux_enable) { 564 ret = panel->backlight.pwm_funcs->setup(connector, pipe); 565 if (ret < 0) { 566 drm_err(display->drm, 567 "[CONNECTOR:%d:%s] Failed to setup PWM backlight controls for eDP backlight: %d\n", 568 connector->base.base.id, connector->base.name, ret); 569 return ret; 570 } 571 } 572 573 if (panel->backlight.edp.vesa.info.luminance_set) { 574 if (luminance_range->max_luminance) { 575 panel->backlight.max = panel->backlight.edp.vesa.info.max; 576 panel->backlight.min = luminance_range->min_luminance; 577 } else { 578 panel->backlight.max = 512; 579 panel->backlight.min = 0; 580 } 581 panel->backlight.level = intel_dp_aux_vesa_get_backlight(connector, 0); 582 panel->backlight.enabled = panel->backlight.level != 0; 583 drm_dbg_kms(display->drm, 584 "[CONNECTOR:%d:%s] AUX VESA Nits backlight level is controlled through DPCD\n", 585 connector->base.base.id, connector->base.name); 586 } else if (panel->backlight.edp.vesa.info.aux_set) { 587 panel->backlight.max = panel->backlight.edp.vesa.info.max; 588 panel->backlight.min = 0; 589 if (current_mode == DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) { 590 panel->backlight.level = current_level; 591 panel->backlight.enabled = panel->backlight.level != 0; 592 } else { 593 panel->backlight.level = panel->backlight.max; 594 panel->backlight.enabled = false; 595 } 596 } else { 597 panel->backlight.max = panel->backlight.pwm_level_max; 598 panel->backlight.min = panel->backlight.pwm_level_min; 599 if (current_mode == DP_EDP_BACKLIGHT_CONTROL_MODE_PWM) { 600 panel->backlight.level = 601 panel->backlight.pwm_funcs->get(connector, pipe); 602 panel->backlight.enabled = panel->backlight.pwm_enabled; 603 } else { 604 panel->backlight.level = panel->backlight.max; 605 panel->backlight.enabled = false; 606 } 607 } 608 609 drm_dbg_kms(display->drm, 610 "[CONNECTOR:%d:%s] Using AUX VESA interface for backlight control\n", 611 connector->base.base.id, connector->base.name); 612 613 return 0; 614 } 615 616 static bool 617 intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector) 618 { 619 struct intel_display *display = to_intel_display(connector); 620 struct intel_dp *intel_dp = intel_attached_dp(connector); 621 struct intel_panel *panel = &connector->panel; 622 623 if ((intel_dp->edp_dpcd[3] & DP_EDP_PANEL_LUMINANCE_CONTROL_CAPABLE) && 624 (intel_dp->edp_dpcd[3] & DP_EDP_SMOOTH_BRIGHTNESS_CAPABLE)) { 625 drm_dbg_kms(display->drm, 626 "[CONNECTOR:%d:%s] AUX Luminance Based Backlight Control Supported!\n", 627 connector->base.base.id, connector->base.name); 628 panel->backlight.edp.vesa.luminance_control_support = true; 629 return true; 630 } 631 632 if (drm_edp_backlight_supported(intel_dp->edp_dpcd)) { 633 drm_dbg_kms(display->drm, 634 "[CONNECTOR:%d:%s] AUX Backlight Control Supported!\n", 635 connector->base.base.id, connector->base.name); 636 return true; 637 } 638 return false; 639 } 640 641 static const struct intel_panel_bl_funcs intel_dp_hdr_bl_funcs = { 642 .setup = intel_dp_aux_hdr_setup_backlight, 643 .enable = intel_dp_aux_hdr_enable_backlight, 644 .disable = intel_dp_aux_hdr_disable_backlight, 645 .set = intel_dp_aux_hdr_set_backlight, 646 .get = intel_dp_aux_hdr_get_backlight, 647 }; 648 649 static const struct intel_panel_bl_funcs intel_dp_vesa_bl_funcs = { 650 .setup = intel_dp_aux_vesa_setup_backlight, 651 .enable = intel_dp_aux_vesa_enable_backlight, 652 .disable = intel_dp_aux_vesa_disable_backlight, 653 .set = intel_dp_aux_vesa_set_backlight, 654 .get = intel_dp_aux_vesa_get_backlight, 655 }; 656 657 int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector) 658 { 659 struct intel_display *display = to_intel_display(connector); 660 struct intel_dp *intel_dp = intel_attached_dp(connector); 661 struct drm_device *dev = connector->base.dev; 662 struct intel_panel *panel = &connector->panel; 663 bool try_intel_interface = false, try_vesa_interface = false; 664 665 /* Check the VBT and user's module parameters to figure out which 666 * interfaces to probe 667 */ 668 switch (display->params.enable_dpcd_backlight) { 669 case INTEL_DP_AUX_BACKLIGHT_OFF: 670 return -ENODEV; 671 case INTEL_DP_AUX_BACKLIGHT_AUTO: 672 switch (panel->vbt.backlight.type) { 673 case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE: 674 try_vesa_interface = true; 675 break; 676 case INTEL_BACKLIGHT_DISPLAY_DDI: 677 try_intel_interface = true; 678 break; 679 default: 680 return -ENODEV; 681 } 682 break; 683 case INTEL_DP_AUX_BACKLIGHT_ON: 684 if (panel->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE) 685 try_intel_interface = true; 686 687 try_vesa_interface = true; 688 break; 689 case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA: 690 try_vesa_interface = true; 691 break; 692 case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL: 693 try_intel_interface = true; 694 break; 695 } 696 697 /* For eDP 1.5 and above we are supposed to use VESA interface for brightness control */ 698 if (intel_dp->edp_dpcd[0] >= DP_EDP_15) 699 try_vesa_interface = true; 700 701 /* 702 * Since Intel has their own backlight control interface, the majority of machines out there 703 * using DPCD backlight controls with Intel GPUs will be using this interface as opposed to 704 * the VESA interface. However, other GPUs (such as Nvidia's) will always use the VESA 705 * interface. This means that there's quite a number of panels out there that will advertise 706 * support for both interfaces, primarily systems with Intel/Nvidia hybrid GPU setups. 707 * 708 * There's a catch to this though: on many panels that advertise support for both 709 * interfaces, the VESA backlight interface will stop working once we've programmed the 710 * panel with Intel's OUI - which is also required for us to be able to detect Intel's 711 * backlight interface at all. This means that the only sensible way for us to detect both 712 * interfaces is to probe for Intel's first, and VESA's second. 713 */ 714 if (try_intel_interface && intel_dp_aux_supports_hdr_backlight(connector) && 715 intel_dp->edp_dpcd[0] <= DP_EDP_14b) { 716 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using Intel proprietary eDP backlight controls\n", 717 connector->base.base.id, connector->base.name); 718 panel->backlight.funcs = &intel_dp_hdr_bl_funcs; 719 return 0; 720 } 721 722 if (try_vesa_interface && intel_dp_aux_supports_vesa_backlight(connector)) { 723 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using VESA eDP backlight controls\n", 724 connector->base.base.id, connector->base.name); 725 panel->backlight.funcs = &intel_dp_vesa_bl_funcs; 726 return 0; 727 } 728 729 return -ENODEV; 730 } 731