1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_DP_H__ 7 #define __INTEL_DP_H__ 8 9 #include <linux/types.h> 10 11 enum intel_output_format; 12 enum pipe; 13 enum port; 14 struct drm_connector_state; 15 struct drm_encoder; 16 struct drm_i915_private; 17 struct drm_modeset_acquire_ctx; 18 struct drm_dp_vsc_sdp; 19 struct intel_atomic_state; 20 struct intel_connector; 21 struct intel_crtc_state; 22 struct intel_digital_port; 23 struct intel_dp; 24 struct intel_encoder; 25 26 struct link_config_limits { 27 int min_rate, max_rate; 28 int min_lane_count, max_lane_count; 29 struct { 30 /* Uncompressed DSC input or link output bpp in 1 bpp units */ 31 int min_bpp, max_bpp; 32 } pipe; 33 struct { 34 /* Compressed or uncompressed link output bpp in 1/16 bpp units */ 35 int min_bpp_x16, max_bpp_x16; 36 } link; 37 }; 38 39 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 40 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, 41 struct intel_crtc_state *pipe_config, 42 struct link_config_limits *limits); 43 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state, 44 const struct drm_connector_state *conn_state); 45 int intel_dp_min_bpp(enum intel_output_format output_format); 46 bool intel_dp_init_connector(struct intel_digital_port *dig_port, 47 struct intel_connector *intel_connector); 48 void intel_dp_connector_sync_state(struct intel_connector *connector, 49 const struct intel_crtc_state *crtc_state); 50 void intel_dp_set_link_params(struct intel_dp *intel_dp, 51 int link_rate, int lane_count); 52 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, 53 int link_rate, u8 lane_count); 54 int intel_dp_get_active_pipes(struct intel_dp *intel_dp, 55 struct drm_modeset_acquire_ctx *ctx, 56 u8 *pipe_mask); 57 int intel_dp_retrain_link(struct intel_encoder *encoder, 58 struct drm_modeset_acquire_ctx *ctx); 59 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode); 60 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, 61 const struct intel_crtc_state *crtc_state); 62 void intel_dp_sink_enable_decompression(struct intel_atomic_state *state, 63 struct intel_connector *connector, 64 const struct intel_crtc_state *new_crtc_state); 65 void intel_dp_sink_disable_decompression(struct intel_atomic_state *state, 66 struct intel_connector *connector, 67 const struct intel_crtc_state *old_crtc_state); 68 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); 69 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder); 70 void intel_dp_encoder_flush_work(struct drm_encoder *encoder); 71 int intel_dp_compute_config(struct intel_encoder *encoder, 72 struct intel_crtc_state *pipe_config, 73 struct drm_connector_state *conn_state); 74 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, 75 struct intel_crtc_state *pipe_config, 76 struct drm_connector_state *conn_state, 77 struct link_config_limits *limits, 78 int timeslots, 79 bool recompute_pipe_bpp); 80 void intel_dp_audio_compute_config(struct intel_encoder *encoder, 81 struct intel_crtc_state *pipe_config, 82 struct drm_connector_state *conn_state); 83 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp); 84 bool intel_dp_is_edp(struct intel_dp *intel_dp); 85 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state); 86 int intel_dp_link_symbol_size(int rate); 87 int intel_dp_link_symbol_clock(int rate); 88 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port); 89 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port, 90 bool long_hpd); 91 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state, 92 const struct drm_connector_state *conn_state); 93 void intel_edp_backlight_off(const struct drm_connector_state *conn_state); 94 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 95 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv); 96 void intel_dp_mst_resume(struct drm_i915_private *dev_priv); 97 int intel_dp_max_link_rate(struct intel_dp *intel_dp); 98 int intel_dp_max_lane_count(struct intel_dp *intel_dp); 99 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); 100 101 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, 102 u8 *link_bw, u8 *rate_select); 103 bool intel_dp_source_supports_tps3(struct drm_i915_private *i915); 104 bool intel_dp_source_supports_tps4(struct drm_i915_private *i915); 105 106 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); 107 int intel_dp_link_required(int pixel_clock, int bpp); 108 int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, 109 int bw_overhead); 110 int intel_dp_max_data_rate(int max_link_rate, int max_lanes); 111 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp); 112 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, 113 const struct drm_connector_state *conn_state); 114 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp, 115 const struct intel_crtc_state *crtc_state, 116 const struct drm_connector_state *conn_state, 117 struct drm_dp_vsc_sdp *vsc); 118 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder, 119 const struct intel_crtc_state *crtc_state, 120 const struct drm_dp_vsc_sdp *vsc); 121 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, 122 const struct intel_crtc_state *crtc_state, 123 const struct drm_connector_state *conn_state); 124 void intel_read_dp_sdp(struct intel_encoder *encoder, 125 struct intel_crtc_state *crtc_state, 126 unsigned int type); 127 bool intel_digital_port_connected(struct intel_encoder *encoder); 128 int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, 129 u8 dsc_max_bpc); 130 u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, 131 u32 link_clock, u32 lane_count, 132 u32 mode_clock, u32 mode_hdisplay, 133 bool bigjoiner, 134 enum intel_output_format output_format, 135 u32 pipe_bpp, 136 u32 timeslots); 137 int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config); 138 int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector, 139 struct intel_crtc_state *pipe_config, 140 int bpc); 141 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, 142 int mode_clock, int mode_hdisplay, 143 bool bigjoiner); 144 bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, 145 int hdisplay, int clock); 146 147 static inline unsigned int intel_dp_unused_lane_mask(int lane_count) 148 { 149 return ~((1 << lane_count) - 1) & 0xf; 150 } 151 152 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 153 const struct intel_connector *connector, 154 const struct intel_crtc_state *pipe_config); 155 u32 intel_dp_mode_to_fec_clock(u32 mode_clock); 156 int intel_dp_bw_fec_overhead(bool fec_enabled); 157 158 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 159 const struct intel_connector *connector, 160 const struct intel_crtc_state *pipe_config); 161 162 u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp); 163 164 void intel_ddi_update_pipe(struct intel_atomic_state *state, 165 struct intel_encoder *encoder, 166 const struct intel_crtc_state *crtc_state, 167 const struct drm_connector_state *conn_state); 168 169 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder, 170 struct intel_crtc_state *crtc_state); 171 void intel_dp_sync_state(struct intel_encoder *encoder, 172 const struct intel_crtc_state *crtc_state); 173 174 void intel_dp_check_frl_training(struct intel_dp *intel_dp); 175 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, 176 const struct intel_crtc_state *crtc_state); 177 void intel_dp_phy_test(struct intel_encoder *encoder); 178 179 void intel_dp_wait_source_oui(struct intel_dp *intel_dp); 180 int intel_dp_output_bpp(enum intel_output_format output_format, int bpp); 181 182 bool 183 intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, 184 const struct intel_crtc_state *crtc_state, 185 bool dsc, 186 struct link_config_limits *limits); 187 188 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector); 189 190 #endif /* __INTEL_DP_H__ */ 191