1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_DP_H__ 7 #define __INTEL_DP_H__ 8 9 #include <linux/types.h> 10 11 enum intel_output_format; 12 enum pipe; 13 enum port; 14 struct drm_connector_state; 15 struct drm_encoder; 16 struct drm_i915_private; 17 struct drm_modeset_acquire_ctx; 18 struct drm_dp_vsc_sdp; 19 struct intel_atomic_state; 20 struct intel_connector; 21 struct intel_crtc_state; 22 struct intel_digital_port; 23 struct intel_dp; 24 struct intel_encoder; 25 26 struct link_config_limits { 27 int min_rate, max_rate; 28 int min_lane_count, max_lane_count; 29 struct { 30 /* Uncompressed DSC input or link output bpp in 1 bpp units */ 31 int min_bpp, max_bpp; 32 } pipe; 33 struct { 34 /* Compressed or uncompressed link output bpp in 1/16 bpp units */ 35 int min_bpp_x16, max_bpp_x16; 36 } link; 37 }; 38 39 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 40 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, 41 struct intel_crtc_state *pipe_config, 42 struct link_config_limits *limits); 43 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state, 44 const struct drm_connector_state *conn_state); 45 int intel_dp_min_bpp(enum intel_output_format output_format); 46 void intel_dp_init_modeset_retry_work(struct intel_connector *connector); 47 void intel_dp_queue_modeset_retry_work(struct intel_connector *connector); 48 void 49 intel_dp_queue_modeset_retry_for_link(struct intel_atomic_state *state, 50 struct intel_encoder *encoder, 51 const struct intel_crtc_state *crtc_state); 52 bool intel_dp_init_connector(struct intel_digital_port *dig_port, 53 struct intel_connector *intel_connector); 54 void intel_dp_connector_sync_state(struct intel_connector *connector, 55 const struct intel_crtc_state *crtc_state); 56 void intel_dp_set_link_params(struct intel_dp *intel_dp, 57 int link_rate, int lane_count); 58 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, 59 int link_rate, u8 lane_count); 60 int intel_dp_get_active_pipes(struct intel_dp *intel_dp, 61 struct drm_modeset_acquire_ctx *ctx, 62 u8 *pipe_mask); 63 int intel_dp_retrain_link(struct intel_encoder *encoder, 64 struct drm_modeset_acquire_ctx *ctx); 65 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode); 66 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, 67 const struct intel_crtc_state *crtc_state); 68 void intel_dp_sink_enable_decompression(struct intel_atomic_state *state, 69 struct intel_connector *connector, 70 const struct intel_crtc_state *new_crtc_state); 71 void intel_dp_sink_disable_decompression(struct intel_atomic_state *state, 72 struct intel_connector *connector, 73 const struct intel_crtc_state *old_crtc_state); 74 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); 75 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder); 76 void intel_dp_encoder_flush_work(struct drm_encoder *encoder); 77 int intel_dp_compute_config(struct intel_encoder *encoder, 78 struct intel_crtc_state *pipe_config, 79 struct drm_connector_state *conn_state); 80 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, 81 struct intel_crtc_state *pipe_config, 82 struct drm_connector_state *conn_state, 83 struct link_config_limits *limits, 84 int timeslots, 85 bool recompute_pipe_bpp); 86 void intel_dp_audio_compute_config(struct intel_encoder *encoder, 87 struct intel_crtc_state *pipe_config, 88 struct drm_connector_state *conn_state); 89 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp); 90 bool intel_dp_is_edp(struct intel_dp *intel_dp); 91 bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp); 92 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state); 93 int intel_dp_link_symbol_size(int rate); 94 int intel_dp_link_symbol_clock(int rate); 95 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port); 96 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port, 97 bool long_hpd); 98 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state, 99 const struct drm_connector_state *conn_state); 100 void intel_edp_backlight_off(const struct drm_connector_state *conn_state); 101 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp); 102 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv); 103 void intel_dp_mst_resume(struct drm_i915_private *dev_priv); 104 int intel_dp_max_link_rate(struct intel_dp *intel_dp); 105 int intel_dp_max_lane_count(struct intel_dp *intel_dp); 106 int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state); 107 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); 108 int intel_dp_max_common_rate(struct intel_dp *intel_dp); 109 int intel_dp_max_common_lane_count(struct intel_dp *intel_dp); 110 void intel_dp_update_sink_caps(struct intel_dp *intel_dp); 111 112 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, 113 u8 *link_bw, u8 *rate_select); 114 bool intel_dp_source_supports_tps3(struct drm_i915_private *i915); 115 bool intel_dp_source_supports_tps4(struct drm_i915_private *i915); 116 117 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); 118 int intel_dp_link_required(int pixel_clock, int bpp); 119 int intel_dp_effective_data_rate(int pixel_clock, int bpp_x16, 120 int bw_overhead); 121 int intel_dp_max_link_data_rate(struct intel_dp *intel_dp, 122 int max_dprx_rate, int max_dprx_lanes); 123 bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915, bool use_joiner); 124 bool intel_dp_has_bigjoiner(struct intel_dp *intel_dp); 125 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, 126 const struct drm_connector_state *conn_state); 127 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, 128 const struct intel_crtc_state *crtc_state, 129 const struct drm_connector_state *conn_state); 130 void intel_read_dp_sdp(struct intel_encoder *encoder, 131 struct intel_crtc_state *crtc_state, 132 unsigned int type); 133 void intel_digital_port_lock(struct intel_encoder *encoder); 134 void intel_digital_port_unlock(struct intel_encoder *encoder); 135 bool intel_digital_port_connected(struct intel_encoder *encoder); 136 bool intel_digital_port_connected_locked(struct intel_encoder *encoder); 137 int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector, 138 u8 dsc_max_bpc); 139 u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, 140 u32 link_clock, u32 lane_count, 141 u32 mode_clock, u32 mode_hdisplay, 142 bool bigjoiner, 143 enum intel_output_format output_format, 144 u32 pipe_bpp, 145 u32 timeslots); 146 int intel_dp_dsc_sink_min_compressed_bpp(struct intel_crtc_state *pipe_config); 147 int intel_dp_dsc_sink_max_compressed_bpp(const struct intel_connector *connector, 148 struct intel_crtc_state *pipe_config, 149 int bpc); 150 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector, 151 int mode_clock, int mode_hdisplay, 152 bool bigjoiner); 153 bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp, 154 struct intel_connector *connector, 155 int hdisplay, int clock); 156 157 static inline unsigned int intel_dp_unused_lane_mask(int lane_count) 158 { 159 return ~((1 << lane_count) - 1) & 0xf; 160 } 161 162 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 163 const struct intel_connector *connector, 164 const struct intel_crtc_state *pipe_config); 165 u32 intel_dp_mode_to_fec_clock(u32 mode_clock); 166 int intel_dp_bw_fec_overhead(bool fec_enabled); 167 168 bool intel_dp_supports_fec(struct intel_dp *intel_dp, 169 const struct intel_connector *connector, 170 const struct intel_crtc_state *pipe_config); 171 172 u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp); 173 174 void intel_ddi_update_pipe(struct intel_atomic_state *state, 175 struct intel_encoder *encoder, 176 const struct intel_crtc_state *crtc_state, 177 const struct drm_connector_state *conn_state); 178 179 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder, 180 struct intel_crtc_state *crtc_state); 181 void intel_dp_sync_state(struct intel_encoder *encoder, 182 const struct intel_crtc_state *crtc_state); 183 184 void intel_dp_check_frl_training(struct intel_dp *intel_dp); 185 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, 186 const struct intel_crtc_state *crtc_state); 187 void intel_dp_phy_test(struct intel_encoder *encoder); 188 189 void intel_dp_wait_source_oui(struct intel_dp *intel_dp); 190 int intel_dp_output_bpp(enum intel_output_format output_format, int bpp); 191 192 bool 193 intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp, 194 const struct intel_crtc_state *crtc_state, 195 bool dsc, 196 struct link_config_limits *limits); 197 198 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector); 199 200 #endif /* __INTEL_DP_H__ */ 201