xref: /linux/drivers/gpu/drm/i915/display/intel_dp.h (revision a1c3be890440a1769ed6f822376a3e3ab0d42994)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_DP_H__
7 #define __INTEL_DP_H__
8 
9 #include <linux/types.h>
10 
11 #include "i915_reg.h"
12 
13 enum intel_output_format;
14 enum pipe;
15 enum port;
16 struct drm_connector_state;
17 struct drm_encoder;
18 struct drm_i915_private;
19 struct drm_modeset_acquire_ctx;
20 struct drm_dp_vsc_sdp;
21 struct intel_atomic_state;
22 struct intel_connector;
23 struct intel_crtc_state;
24 struct intel_digital_port;
25 struct intel_dp;
26 struct intel_encoder;
27 
28 struct link_config_limits {
29 	int min_clock, max_clock;
30 	int min_lane_count, max_lane_count;
31 	int min_bpp, max_bpp;
32 };
33 
34 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
35 				       struct intel_crtc_state *pipe_config,
36 				       struct link_config_limits *limits);
37 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
38 				  const struct drm_connector_state *conn_state);
39 int intel_dp_min_bpp(enum intel_output_format output_format);
40 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
41 			   i915_reg_t dp_reg, enum port port,
42 			   enum pipe *pipe);
43 bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
44 		   enum port port);
45 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
46 			     struct intel_connector *intel_connector);
47 void intel_dp_set_link_params(struct intel_dp *intel_dp,
48 			      int link_rate, int lane_count);
49 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
50 					    int link_rate, u8 lane_count);
51 int intel_dp_retrain_link(struct intel_encoder *encoder,
52 			  struct drm_modeset_acquire_ctx *ctx);
53 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
54 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
55 					   const struct intel_crtc_state *crtc_state);
56 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
57 					   const struct intel_crtc_state *crtc_state,
58 					   bool enable);
59 void intel_dp_encoder_reset(struct drm_encoder *encoder);
60 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
61 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
62 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
63 int intel_dp_compute_config(struct intel_encoder *encoder,
64 			    struct intel_crtc_state *pipe_config,
65 			    struct drm_connector_state *conn_state);
66 bool intel_dp_is_edp(struct intel_dp *intel_dp);
67 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
68 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
69 				  bool long_hpd);
70 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
71 			    const struct drm_connector_state *conn_state);
72 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
73 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
74 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
75 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
76 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
77 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
78 
79 void intel_edp_drrs_enable(struct intel_dp *intel_dp,
80 			   const struct intel_crtc_state *crtc_state);
81 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
82 			    const struct intel_crtc_state *crtc_state);
83 void intel_edp_drrs_update(struct intel_dp *intel_dp,
84 			   const struct intel_crtc_state *crtc_state);
85 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
86 			       unsigned int frontbuffer_bits);
87 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
88 			  unsigned int frontbuffer_bits);
89 
90 void
91 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
92 				       const struct intel_crtc_state *crtc_state,
93 				       u8 dp_train_pat);
94 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
95 			   u8 *link_bw, u8 *rate_select);
96 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
97 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
98 
99 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
100 int intel_dp_link_required(int pixel_clock, int bpp);
101 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
102 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
103 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
104 			    const struct drm_connector_state *conn_state);
105 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
106 				  const struct intel_crtc_state *crtc_state,
107 				  const struct drm_connector_state *conn_state,
108 				  struct drm_dp_vsc_sdp *vsc);
109 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
110 			    const struct intel_crtc_state *crtc_state,
111 			    struct drm_dp_vsc_sdp *vsc);
112 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
113 			     const struct intel_crtc_state *crtc_state,
114 			     const struct drm_connector_state *conn_state);
115 void intel_read_dp_sdp(struct intel_encoder *encoder,
116 		       struct intel_crtc_state *crtc_state,
117 		       unsigned int type);
118 bool intel_digital_port_connected(struct intel_encoder *encoder);
119 
120 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
121 {
122 	return ~((1 << lane_count) - 1) & 0xf;
123 }
124 
125 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
126 
127 void intel_ddi_update_pipe(struct intel_atomic_state *state,
128 			   struct intel_encoder *encoder,
129 			   const struct intel_crtc_state *crtc_state,
130 			   const struct drm_connector_state *conn_state);
131 
132 int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
133 		       struct intel_connector *intel_connector);
134 
135 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
136 				    struct intel_crtc_state *crtc_state);
137 void intel_dp_sync_state(struct intel_encoder *encoder,
138 			 const struct intel_crtc_state *crtc_state);
139 const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
140 
141 void intel_dp_check_frl_training(struct intel_dp *intel_dp);
142 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
143 				 const struct intel_crtc_state *crtc_state);
144 void intel_dp_phy_test(struct intel_encoder *encoder);
145 
146 #endif /* __INTEL_DP_H__ */
147