xref: /linux/drivers/gpu/drm/i915/display/intel_display_wa.c (revision 260f6f4fda93c8485c8037865c941b42b9cba5d2)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2023 Intel Corporation
4  */
5 
6 #include "i915_reg.h"
7 #include "intel_de.h"
8 #include "intel_display_core.h"
9 #include "intel_display_regs.h"
10 #include "intel_display_wa.h"
11 
12 static void gen11_display_wa_apply(struct intel_display *display)
13 {
14 	/* Wa_14010594013 */
15 	intel_de_rmw(display, GEN8_CHICKEN_DCPR_1, 0, ICL_DELAY_PMRSP);
16 }
17 
18 static void xe_d_display_wa_apply(struct intel_display *display)
19 {
20 	/* Wa_14013723622 */
21 	intel_de_rmw(display, CLKREQ_POLICY, CLKREQ_POLICY_MEM_UP_OVRD, 0);
22 }
23 
24 static void adlp_display_wa_apply(struct intel_display *display)
25 {
26 	/* Wa_22011091694:adlp */
27 	intel_de_rmw(display, GEN9_CLKGATE_DIS_5, 0, DPCE_GATING_DIS);
28 
29 	/* Bspec/49189 Initialize Sequence */
30 	intel_de_rmw(display, GEN8_CHICKEN_DCPR_1, DDI_CLOCK_REG_ACCESS, 0);
31 }
32 
33 void intel_display_wa_apply(struct intel_display *display)
34 {
35 	if (display->platform.alderlake_p)
36 		adlp_display_wa_apply(display);
37 	else if (DISPLAY_VER(display) == 12)
38 		xe_d_display_wa_apply(display);
39 	else if (DISPLAY_VER(display) == 11)
40 		gen11_display_wa_apply(display);
41 }
42