xref: /linux/drivers/gpu/drm/i915/display/intel_display_debugfs.c (revision f6e8dc9edf963dbc99085e54f6ced6da9daa6100)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2020 Intel Corporation
4  */
5 
6 #include <linux/debugfs.h>
7 #include <linux/string_choices.h>
8 #include <linux/string_helpers.h>
9 
10 #include <drm/drm_debugfs.h>
11 #include <drm/drm_drv.h>
12 #include <drm/drm_edid.h>
13 #include <drm/drm_file.h>
14 #include <drm/drm_fourcc.h>
15 #include <drm/drm_print.h>
16 
17 #include "hsw_ips.h"
18 #include "i915_reg.h"
19 #include "i9xx_wm_regs.h"
20 #include "intel_alpm.h"
21 #include "intel_bo.h"
22 #include "intel_crtc.h"
23 #include "intel_crtc_state_dump.h"
24 #include "intel_de.h"
25 #include "intel_display_debugfs.h"
26 #include "intel_display_debugfs_params.h"
27 #include "intel_display_power.h"
28 #include "intel_display_power_well.h"
29 #include "intel_display_regs.h"
30 #include "intel_display_rpm.h"
31 #include "intel_display_types.h"
32 #include "intel_dmc.h"
33 #include "intel_dp.h"
34 #include "intel_dp_link_training.h"
35 #include "intel_dp_mst.h"
36 #include "intel_dp_test.h"
37 #include "intel_drrs.h"
38 #include "intel_fb.h"
39 #include "intel_fbc.h"
40 #include "intel_fbdev.h"
41 #include "intel_hdcp.h"
42 #include "intel_hdmi.h"
43 #include "intel_hotplug.h"
44 #include "intel_link_bw.h"
45 #include "intel_panel.h"
46 #include "intel_pps.h"
47 #include "intel_psr.h"
48 #include "intel_psr_regs.h"
49 #include "intel_vdsc.h"
50 #include "intel_wm.h"
51 
52 static struct intel_display *node_to_intel_display(struct drm_info_node *node)
53 {
54 	return to_intel_display(node->minor->dev);
55 }
56 
57 static int intel_display_caps(struct seq_file *m, void *data)
58 {
59 	struct intel_display *display = node_to_intel_display(m->private);
60 	struct drm_printer p = drm_seq_file_printer(m);
61 
62 	drm_printf(&p, "PCH type: %d\n", INTEL_PCH_TYPE(display));
63 
64 	intel_display_device_info_print(DISPLAY_INFO(display),
65 					DISPLAY_RUNTIME_INFO(display), &p);
66 	intel_display_params_dump(&display->params, display->drm->driver->name, &p);
67 
68 	return 0;
69 }
70 
71 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
72 {
73 	struct intel_display *display = node_to_intel_display(m->private);
74 
75 	spin_lock(&display->fb_tracking.lock);
76 
77 	seq_printf(m, "FB tracking busy bits: 0x%08x\n",
78 		   display->fb_tracking.busy_bits);
79 
80 	seq_printf(m, "FB tracking flip bits: 0x%08x\n",
81 		   display->fb_tracking.flip_bits);
82 
83 	spin_unlock(&display->fb_tracking.lock);
84 
85 	return 0;
86 }
87 
88 static int i915_sr_status(struct seq_file *m, void *unused)
89 {
90 	struct intel_display *display = node_to_intel_display(m->private);
91 	intel_wakeref_t wakeref;
92 	bool sr_enabled = false;
93 
94 	wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT);
95 
96 	if (DISPLAY_VER(display) >= 9)
97 		/* no global SR status; inspect per-plane WM */;
98 	else if (HAS_PCH_SPLIT(display))
99 		sr_enabled = intel_de_read(display, WM1_LP_ILK) & WM_LP_ENABLE;
100 	else if (display->platform.i965gm || display->platform.g4x ||
101 		 display->platform.i945g || display->platform.i945gm)
102 		sr_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN;
103 	else if (display->platform.i915gm)
104 		sr_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN;
105 	else if (display->platform.pineview)
106 		sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN;
107 	else if (display->platform.valleyview || display->platform.cherryview)
108 		sr_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
109 
110 	intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref);
111 
112 	seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
113 
114 	return 0;
115 }
116 
117 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
118 {
119 	struct intel_display *display = node_to_intel_display(m->private);
120 	struct intel_framebuffer *fbdev_fb = NULL;
121 	struct drm_framebuffer *drm_fb;
122 
123 	fbdev_fb = intel_fbdev_framebuffer(display->fbdev.fbdev);
124 	if (fbdev_fb) {
125 		seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
126 			   fbdev_fb->base.width,
127 			   fbdev_fb->base.height,
128 			   fbdev_fb->base.format->depth,
129 			   fbdev_fb->base.format->cpp[0] * 8,
130 			   fbdev_fb->base.modifier,
131 			   drm_framebuffer_read_refcount(&fbdev_fb->base));
132 		intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base));
133 		seq_putc(m, '\n');
134 	}
135 
136 	mutex_lock(&display->drm->mode_config.fb_lock);
137 	drm_for_each_fb(drm_fb, display->drm) {
138 		struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
139 		if (fb == fbdev_fb)
140 			continue;
141 
142 		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
143 			   fb->base.width,
144 			   fb->base.height,
145 			   fb->base.format->depth,
146 			   fb->base.format->cpp[0] * 8,
147 			   fb->base.modifier,
148 			   drm_framebuffer_read_refcount(&fb->base));
149 		intel_bo_describe(m, intel_fb_bo(&fb->base));
150 		seq_putc(m, '\n');
151 	}
152 	mutex_unlock(&display->drm->mode_config.fb_lock);
153 
154 	return 0;
155 }
156 
157 static int i915_power_domain_info(struct seq_file *m, void *unused)
158 {
159 	struct intel_display *display = node_to_intel_display(m->private);
160 
161 	intel_display_power_debug(display, m);
162 
163 	return 0;
164 }
165 
166 static void intel_seq_print_mode(struct seq_file *m, int tabs,
167 				 const struct drm_display_mode *mode)
168 {
169 	int i;
170 
171 	for (i = 0; i < tabs; i++)
172 		seq_putc(m, '\t');
173 
174 	seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
175 }
176 
177 static void intel_encoder_info(struct seq_file *m,
178 			       struct intel_crtc *crtc,
179 			       struct intel_encoder *encoder)
180 {
181 	struct intel_display *display = node_to_intel_display(m->private);
182 	struct drm_connector_list_iter conn_iter;
183 	struct drm_connector *connector;
184 
185 	seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
186 		   encoder->base.base.id, encoder->base.name);
187 
188 	drm_connector_list_iter_begin(display->drm, &conn_iter);
189 	drm_for_each_connector_iter(connector, &conn_iter) {
190 		const struct drm_connector_state *conn_state =
191 			connector->state;
192 
193 		if (conn_state->best_encoder != &encoder->base)
194 			continue;
195 
196 		seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
197 			   connector->base.id, connector->name);
198 	}
199 	drm_connector_list_iter_end(&conn_iter);
200 }
201 
202 static void intel_panel_info(struct seq_file *m,
203 			     struct intel_connector *connector)
204 {
205 	const struct drm_display_mode *fixed_mode;
206 
207 	if (list_empty(&connector->panel.fixed_modes))
208 		return;
209 
210 	seq_puts(m, "\tfixed modes:\n");
211 
212 	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
213 		intel_seq_print_mode(m, 2, fixed_mode);
214 }
215 
216 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
217 {
218 	struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
219 	struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
220 
221 	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
222 	seq_printf(m, "\taudio support: %s\n",
223 		   str_yes_no(connector->base.display_info.has_audio));
224 
225 	drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
226 				connector->detect_edid, &intel_dp->aux);
227 }
228 
229 static void intel_dp_mst_info(struct seq_file *m,
230 			      struct intel_connector *connector)
231 {
232 	bool has_audio = connector->base.display_info.has_audio;
233 
234 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
235 }
236 
237 static void intel_hdmi_info(struct seq_file *m,
238 			    struct intel_connector *connector)
239 {
240 	bool has_audio = connector->base.display_info.has_audio;
241 
242 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
243 }
244 
245 static void intel_connector_info(struct seq_file *m,
246 				 struct drm_connector *connector)
247 {
248 	struct intel_connector *intel_connector = to_intel_connector(connector);
249 	const struct drm_display_mode *mode;
250 
251 	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
252 		   connector->base.id, connector->name,
253 		   drm_get_connector_status_name(connector->status));
254 
255 	if (connector->status == connector_status_disconnected)
256 		return;
257 
258 	seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
259 		   connector->display_info.width_mm,
260 		   connector->display_info.height_mm);
261 	seq_printf(m, "\tsubpixel order: %s\n",
262 		   drm_get_subpixel_order_name(connector->display_info.subpixel_order));
263 	seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
264 
265 	switch (connector->connector_type) {
266 	case DRM_MODE_CONNECTOR_DisplayPort:
267 	case DRM_MODE_CONNECTOR_eDP:
268 		if (intel_connector->mst.dp)
269 			intel_dp_mst_info(m, intel_connector);
270 		else
271 			intel_dp_info(m, intel_connector);
272 		break;
273 	case DRM_MODE_CONNECTOR_HDMIA:
274 		intel_hdmi_info(m, intel_connector);
275 		break;
276 	default:
277 		break;
278 	}
279 
280 	intel_hdcp_info(m, intel_connector);
281 
282 	seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
283 
284 	intel_panel_info(m, intel_connector);
285 
286 	seq_printf(m, "\tmodes:\n");
287 	list_for_each_entry(mode, &connector->modes, head)
288 		intel_seq_print_mode(m, 2, mode);
289 }
290 
291 static const char *plane_type(enum drm_plane_type type)
292 {
293 	switch (type) {
294 	case DRM_PLANE_TYPE_OVERLAY:
295 		return "OVL";
296 	case DRM_PLANE_TYPE_PRIMARY:
297 		return "PRI";
298 	case DRM_PLANE_TYPE_CURSOR:
299 		return "CUR";
300 	/*
301 	 * Deliberately omitting default: to generate compiler warnings
302 	 * when a new drm_plane_type gets added.
303 	 */
304 	}
305 
306 	return "unknown";
307 }
308 
309 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
310 {
311 	/*
312 	 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
313 	 * will print them all to visualize if the values are misused
314 	 */
315 	snprintf(buf, bufsize,
316 		 "%s%s%s%s%s%s(0x%08x)",
317 		 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
318 		 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
319 		 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
320 		 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
321 		 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
322 		 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
323 		 rotation);
324 }
325 
326 static const char *plane_visibility(const struct intel_plane_state *plane_state)
327 {
328 	if (plane_state->uapi.visible)
329 		return "visible";
330 
331 	if (plane_state->is_y_plane)
332 		return "Y plane";
333 
334 	return "hidden";
335 }
336 
337 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
338 {
339 	const struct intel_plane_state *plane_state =
340 		to_intel_plane_state(plane->base.state);
341 	const struct drm_framebuffer *fb = plane_state->uapi.fb;
342 	struct drm_rect src, dst;
343 	char rot_str[48];
344 
345 	src = drm_plane_state_src(&plane_state->uapi);
346 	dst = drm_plane_state_dest(&plane_state->uapi);
347 
348 	plane_rotation(rot_str, sizeof(rot_str),
349 		       plane_state->uapi.rotation);
350 
351 	seq_puts(m, "\t\tuapi: [FB:");
352 	if (fb)
353 		seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
354 			   &fb->format->format, fb->modifier, fb->width,
355 			   fb->height);
356 	else
357 		seq_puts(m, "0] n/a,0x0,0x0,");
358 	seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
359 		   ", rotation=%s\n", plane_visibility(plane_state),
360 		   DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
361 
362 	if (plane_state->planar_linked_plane)
363 		seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
364 			   plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
365 			   plane_state->is_y_plane ? "Y plane" : "UV plane");
366 }
367 
368 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
369 {
370 	const struct intel_plane_state *plane_state =
371 		to_intel_plane_state(plane->base.state);
372 	const struct drm_framebuffer *fb = plane_state->hw.fb;
373 	char rot_str[48];
374 
375 	if (!fb)
376 		return;
377 
378 	plane_rotation(rot_str, sizeof(rot_str),
379 		       plane_state->hw.rotation);
380 
381 	seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
382 		   DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
383 		   fb->base.id, &fb->format->format,
384 		   fb->modifier, fb->width, fb->height,
385 		   str_yes_no(plane_state->uapi.visible),
386 		   DRM_RECT_FP_ARG(&plane_state->uapi.src),
387 		   DRM_RECT_ARG(&plane_state->uapi.dst),
388 		   rot_str);
389 }
390 
391 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
392 {
393 	struct intel_display *display = node_to_intel_display(m->private);
394 	struct intel_plane *plane;
395 
396 	for_each_intel_plane_on_crtc(display->drm, crtc, plane) {
397 		seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
398 			   plane->base.base.id, plane->base.name,
399 			   plane_type(plane->base.type));
400 		intel_plane_uapi_info(m, plane);
401 		intel_plane_hw_info(m, plane);
402 	}
403 }
404 
405 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
406 {
407 	const struct intel_crtc_state *crtc_state =
408 		to_intel_crtc_state(crtc->base.state);
409 	int num_scalers = crtc->num_scalers;
410 	int i;
411 
412 	/* Not all platforms have a scaler */
413 	if (num_scalers) {
414 		seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
415 			   num_scalers,
416 			   crtc_state->scaler_state.scaler_users,
417 			   crtc_state->scaler_state.scaler_id,
418 			   crtc_state->hw.scaling_filter);
419 
420 		for (i = 0; i < num_scalers; i++) {
421 			const struct intel_scaler *sc =
422 				&crtc_state->scaler_state.scalers[i];
423 
424 			seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
425 				   i, str_yes_no(sc->in_use), sc->mode);
426 		}
427 		seq_puts(m, "\n");
428 	} else {
429 		seq_puts(m, "\tNo scalers available on this platform\n");
430 	}
431 }
432 
433 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
434 static void crtc_updates_info(struct seq_file *m,
435 			      struct intel_crtc *crtc,
436 			      const char *hdr)
437 {
438 	u64 count;
439 	int row;
440 
441 	count = 0;
442 	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
443 		count += crtc->debug.vbl.times[row];
444 	seq_printf(m, "%sUpdates: %llu\n", hdr, count);
445 	if (!count)
446 		return;
447 
448 	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
449 		char columns[80] = "       |";
450 		unsigned int x;
451 
452 		if (row & 1) {
453 			const char *units;
454 
455 			if (row > 10) {
456 				x = 1000000;
457 				units = "ms";
458 			} else {
459 				x = 1000;
460 				units = "us";
461 			}
462 
463 			snprintf(columns, sizeof(columns), "%4ld%s |",
464 				 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
465 		}
466 
467 		if (crtc->debug.vbl.times[row]) {
468 			x = ilog2(crtc->debug.vbl.times[row]);
469 			memset(columns + 8, '*', x);
470 			columns[8 + x] = '\0';
471 		}
472 
473 		seq_printf(m, "%s%s\n", hdr, columns);
474 	}
475 
476 	seq_printf(m, "%sMin update: %lluns\n",
477 		   hdr, crtc->debug.vbl.min);
478 	seq_printf(m, "%sMax update: %lluns\n",
479 		   hdr, crtc->debug.vbl.max);
480 	seq_printf(m, "%sAverage update: %lluns\n",
481 		   hdr, div64_u64(crtc->debug.vbl.sum, count));
482 	seq_printf(m, "%sOverruns > %uus: %u\n",
483 		   hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
484 }
485 
486 static int crtc_updates_show(struct seq_file *m, void *data)
487 {
488 	crtc_updates_info(m, m->private, "");
489 	return 0;
490 }
491 
492 static int crtc_updates_open(struct inode *inode, struct file *file)
493 {
494 	return single_open(file, crtc_updates_show, inode->i_private);
495 }
496 
497 static ssize_t crtc_updates_write(struct file *file,
498 				  const char __user *ubuf,
499 				  size_t len, loff_t *offp)
500 {
501 	struct seq_file *m = file->private_data;
502 	struct intel_crtc *crtc = m->private;
503 
504 	/* May race with an update. Meh. */
505 	memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
506 
507 	return len;
508 }
509 
510 static const struct file_operations crtc_updates_fops = {
511 	.owner = THIS_MODULE,
512 	.open = crtc_updates_open,
513 	.read = seq_read,
514 	.llseek = seq_lseek,
515 	.release = single_release,
516 	.write = crtc_updates_write
517 };
518 
519 static void crtc_updates_add(struct intel_crtc *crtc)
520 {
521 	debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
522 			    crtc, &crtc_updates_fops);
523 }
524 
525 #else
526 static void crtc_updates_info(struct seq_file *m,
527 			      struct intel_crtc *crtc,
528 			      const char *hdr)
529 {
530 }
531 
532 static void crtc_updates_add(struct intel_crtc *crtc)
533 {
534 }
535 #endif
536 
537 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
538 {
539 	struct intel_display *display = node_to_intel_display(m->private);
540 	struct drm_printer p = drm_seq_file_printer(m);
541 	const struct intel_crtc_state *crtc_state =
542 		to_intel_crtc_state(crtc->base.state);
543 	struct intel_encoder *encoder;
544 
545 	seq_printf(m, "[CRTC:%d:%s]:\n",
546 		   crtc->base.base.id, crtc->base.name);
547 
548 	seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
549 		   str_yes_no(crtc_state->uapi.enable),
550 		   str_yes_no(crtc_state->uapi.active),
551 		   DRM_MODE_ARG(&crtc_state->uapi.mode));
552 
553 	seq_printf(m, "\thw: enable=%s, active=%s\n",
554 		   str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
555 	seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
556 		   DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
557 	seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
558 		   DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
559 
560 	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
561 		   DRM_RECT_ARG(&crtc_state->pipe_src),
562 		   str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
563 	seq_printf(m, "\tport_clock=%d, lane_count=%d\n",
564 		   crtc_state->port_clock, crtc_state->lane_count);
565 
566 	intel_scaler_info(m, crtc);
567 
568 	if (crtc_state->joiner_pipes)
569 		seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
570 			   crtc_state->joiner_pipes,
571 			   intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master");
572 
573 	intel_vdsc_state_dump(&p, 1, crtc_state);
574 
575 	for_each_intel_encoder_mask(display->drm, encoder,
576 				    crtc_state->uapi.encoder_mask)
577 		intel_encoder_info(m, crtc, encoder);
578 
579 	intel_plane_info(m, crtc);
580 
581 	seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
582 		   str_yes_no(!crtc->cpu_fifo_underrun_disabled),
583 		   str_yes_no(!crtc->pch_fifo_underrun_disabled));
584 
585 	crtc_updates_info(m, crtc, "\t");
586 }
587 
588 static int i915_display_info(struct seq_file *m, void *unused)
589 {
590 	struct intel_display *display = node_to_intel_display(m->private);
591 	struct intel_crtc *crtc;
592 	struct drm_connector *connector;
593 	struct drm_connector_list_iter conn_iter;
594 	struct ref_tracker *wakeref;
595 
596 	wakeref = intel_display_rpm_get(display);
597 
598 	drm_modeset_lock_all(display->drm);
599 
600 	seq_printf(m, "CRTC info\n");
601 	seq_printf(m, "---------\n");
602 	for_each_intel_crtc(display->drm, crtc)
603 		intel_crtc_info(m, crtc);
604 
605 	seq_printf(m, "\n");
606 	seq_printf(m, "Connector info\n");
607 	seq_printf(m, "--------------\n");
608 	drm_connector_list_iter_begin(display->drm, &conn_iter);
609 	drm_for_each_connector_iter(connector, &conn_iter)
610 		intel_connector_info(m, connector);
611 	drm_connector_list_iter_end(&conn_iter);
612 
613 	drm_modeset_unlock_all(display->drm);
614 
615 	intel_display_rpm_put(display, wakeref);
616 
617 	return 0;
618 }
619 
620 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
621 {
622 	struct intel_display *display = node_to_intel_display(m->private);
623 	struct drm_printer p = drm_seq_file_printer(m);
624 	struct intel_dpll *pll;
625 	int i;
626 
627 	drm_modeset_lock_all(display->drm);
628 
629 	drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
630 		   display->dpll.ref_clks.nssc,
631 		   display->dpll.ref_clks.ssc);
632 
633 	for_each_dpll(display, pll, i) {
634 		drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
635 			   pll->info->name, pll->info->id);
636 		drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
637 			   pll->state.pipe_mask, pll->active_mask,
638 			   str_yes_no(pll->on));
639 		drm_printf(&p, " tracked hardware state:\n");
640 		intel_dpll_dump_hw_state(display, &p, &pll->state.hw_state);
641 	}
642 	drm_modeset_unlock_all(display->drm);
643 
644 	return 0;
645 }
646 
647 static int i915_ddb_info(struct seq_file *m, void *unused)
648 {
649 	struct intel_display *display = node_to_intel_display(m->private);
650 	struct skl_ddb_entry *entry;
651 	struct intel_crtc *crtc;
652 
653 	if (DISPLAY_VER(display) < 9)
654 		return -ENODEV;
655 
656 	drm_modeset_lock_all(display->drm);
657 
658 	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
659 
660 	for_each_intel_crtc(display->drm, crtc) {
661 		struct intel_crtc_state *crtc_state =
662 			to_intel_crtc_state(crtc->base.state);
663 		enum pipe pipe = crtc->pipe;
664 		enum plane_id plane_id;
665 
666 		seq_printf(m, "Pipe %c\n", pipe_name(pipe));
667 
668 		for_each_plane_id_on_crtc(crtc, plane_id) {
669 			entry = &crtc_state->wm.skl.plane_ddb[plane_id];
670 			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane_id + 1,
671 				   entry->start, entry->end,
672 				   skl_ddb_entry_size(entry));
673 		}
674 
675 		entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
676 		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,
677 			   entry->end, skl_ddb_entry_size(entry));
678 	}
679 
680 	drm_modeset_unlock_all(display->drm);
681 
682 	return 0;
683 }
684 
685 static bool
686 intel_lpsp_power_well_enabled(struct intel_display *display,
687 			      enum i915_power_well_id power_well_id)
688 {
689 	bool is_enabled;
690 
691 	with_intel_display_rpm(display)
692 		is_enabled = intel_display_power_well_is_enabled(display,
693 								 power_well_id);
694 
695 	return is_enabled;
696 }
697 
698 static int i915_lpsp_status(struct seq_file *m, void *unused)
699 {
700 	struct intel_display *display = node_to_intel_display(m->private);
701 	bool lpsp_enabled = false;
702 
703 	if (DISPLAY_VER(display) >= 13 || IS_DISPLAY_VER(display, 9, 10)) {
704 		lpsp_enabled = !intel_lpsp_power_well_enabled(display, SKL_DISP_PW_2);
705 	} else if (IS_DISPLAY_VER(display, 11, 12)) {
706 		lpsp_enabled = !intel_lpsp_power_well_enabled(display, ICL_DISP_PW_3);
707 	} else if (display->platform.haswell || display->platform.broadwell) {
708 		lpsp_enabled = !intel_lpsp_power_well_enabled(display, HSW_DISP_PW_GLOBAL);
709 	} else {
710 		seq_puts(m, "LPSP: not supported\n");
711 		return 0;
712 	}
713 
714 	seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
715 
716 	return 0;
717 }
718 
719 static int i915_dp_mst_info(struct seq_file *m, void *unused)
720 {
721 	struct intel_display *display = node_to_intel_display(m->private);
722 	struct intel_encoder *intel_encoder;
723 	struct intel_digital_port *dig_port;
724 	struct drm_connector *connector;
725 	struct drm_connector_list_iter conn_iter;
726 
727 	drm_connector_list_iter_begin(display->drm, &conn_iter);
728 	drm_for_each_connector_iter(connector, &conn_iter) {
729 		if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
730 			continue;
731 
732 		intel_encoder = intel_attached_encoder(to_intel_connector(connector));
733 		if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
734 			continue;
735 
736 		dig_port = enc_to_dig_port(intel_encoder);
737 		if (!intel_dp_mst_source_support(&dig_port->dp))
738 			continue;
739 
740 		seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
741 			   dig_port->base.base.base.id,
742 			   dig_port->base.base.name);
743 		drm_dp_mst_dump_topology(m, &dig_port->dp.mst.mgr);
744 	}
745 	drm_connector_list_iter_end(&conn_iter);
746 
747 	return 0;
748 }
749 
750 static ssize_t
751 i915_fifo_underrun_reset_write(struct file *filp,
752 			       const char __user *ubuf,
753 			       size_t cnt, loff_t *ppos)
754 {
755 	struct intel_display *display = filp->private_data;
756 	struct intel_crtc *crtc;
757 	int ret;
758 	bool reset;
759 
760 	ret = kstrtobool_from_user(ubuf, cnt, &reset);
761 	if (ret)
762 		return ret;
763 
764 	if (!reset)
765 		return cnt;
766 
767 	for_each_intel_crtc(display->drm, crtc) {
768 		struct drm_crtc_commit *commit;
769 		struct intel_crtc_state *crtc_state;
770 
771 		ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
772 		if (ret)
773 			return ret;
774 
775 		crtc_state = to_intel_crtc_state(crtc->base.state);
776 		commit = crtc_state->uapi.commit;
777 		if (commit) {
778 			ret = wait_for_completion_interruptible(&commit->hw_done);
779 			if (!ret)
780 				ret = wait_for_completion_interruptible(&commit->flip_done);
781 		}
782 
783 		if (!ret && crtc_state->hw.active) {
784 			drm_dbg_kms(display->drm,
785 				    "Re-arming FIFO underruns on pipe %c\n",
786 				    pipe_name(crtc->pipe));
787 
788 			intel_crtc_arm_fifo_underrun(crtc, crtc_state);
789 		}
790 
791 		drm_modeset_unlock(&crtc->base.mutex);
792 
793 		if (ret)
794 			return ret;
795 	}
796 
797 	intel_fbc_reset_underrun(display);
798 
799 	return cnt;
800 }
801 
802 static const struct file_operations i915_fifo_underrun_reset_ops = {
803 	.owner = THIS_MODULE,
804 	.open = simple_open,
805 	.write = i915_fifo_underrun_reset_write,
806 	.llseek = default_llseek,
807 };
808 
809 static const struct drm_info_list intel_display_debugfs_list[] = {
810 	{"intel_display_caps", intel_display_caps, 0},
811 	{"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
812 	{"i915_sr_status", i915_sr_status, 0},
813 	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
814 	{"i915_power_domain_info", i915_power_domain_info, 0},
815 	{"i915_display_info", i915_display_info, 0},
816 	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
817 	{"i915_dp_mst_info", i915_dp_mst_info, 0},
818 	{"i915_ddb_info", i915_ddb_info, 0},
819 	{"i915_lpsp_status", i915_lpsp_status, 0},
820 };
821 
822 void intel_display_debugfs_register(struct intel_display *display)
823 {
824 	struct dentry *debugfs_root = display->drm->debugfs_root;
825 
826 	debugfs_create_file("i915_fifo_underrun_reset", 0644, debugfs_root,
827 			    display, &i915_fifo_underrun_reset_ops);
828 
829 	drm_debugfs_create_files(intel_display_debugfs_list,
830 				 ARRAY_SIZE(intel_display_debugfs_list),
831 				 debugfs_root, display->drm->primary);
832 
833 	intel_bios_debugfs_register(display);
834 	intel_cdclk_debugfs_register(display);
835 	intel_dmc_debugfs_register(display);
836 	intel_dp_test_debugfs_register(display);
837 	intel_fbc_debugfs_register(display);
838 	intel_hpd_debugfs_register(display);
839 	intel_opregion_debugfs_register(display);
840 	intel_psr_debugfs_register(display);
841 	intel_wm_debugfs_register(display);
842 	intel_display_debugfs_params(display);
843 }
844 
845 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
846 {
847 	struct intel_connector *connector = m->private;
848 	struct intel_display *display = to_intel_display(connector);
849 	struct intel_encoder *encoder = intel_attached_encoder(connector);
850 	int connector_type = connector->base.connector_type;
851 	bool lpsp_capable = false;
852 
853 	if (!encoder)
854 		return -ENODEV;
855 
856 	if (connector->base.status != connector_status_connected)
857 		return -ENODEV;
858 
859 	if (DISPLAY_VER(display) >= 13)
860 		lpsp_capable = encoder->port <= PORT_B;
861 	else if (DISPLAY_VER(display) >= 12)
862 		/*
863 		 * Actually TGL can drive LPSP on port till DDI_C
864 		 * but there is no physical connected DDI_C on TGL sku's,
865 		 * even driver is not initializing DDI_C port for gen12.
866 		 */
867 		lpsp_capable = encoder->port <= PORT_B;
868 	else if (DISPLAY_VER(display) == 11)
869 		lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
870 				connector_type == DRM_MODE_CONNECTOR_eDP);
871 	else if (IS_DISPLAY_VER(display, 9, 10))
872 		lpsp_capable = (encoder->port == PORT_A &&
873 				(connector_type == DRM_MODE_CONNECTOR_DSI ||
874 				 connector_type == DRM_MODE_CONNECTOR_eDP ||
875 				 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
876 	else if (display->platform.haswell || display->platform.broadwell)
877 		lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
878 
879 	seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
880 
881 	return 0;
882 }
883 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
884 
885 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
886 {
887 	struct intel_connector *connector = m->private;
888 	struct intel_display *display = to_intel_display(connector);
889 	struct drm_crtc *crtc;
890 	struct intel_dp *intel_dp;
891 	struct drm_modeset_acquire_ctx ctx;
892 	struct intel_crtc_state *crtc_state = NULL;
893 	int ret = 0;
894 	bool try_again = false;
895 
896 	drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
897 
898 	do {
899 		try_again = false;
900 		ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex,
901 				       &ctx);
902 		if (ret) {
903 			if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
904 				try_again = true;
905 				continue;
906 			}
907 			break;
908 		}
909 		crtc = connector->base.state->crtc;
910 		if (connector->base.status != connector_status_connected || !crtc) {
911 			ret = -ENODEV;
912 			break;
913 		}
914 		ret = drm_modeset_lock(&crtc->mutex, &ctx);
915 		if (ret == -EDEADLK) {
916 			ret = drm_modeset_backoff(&ctx);
917 			if (!ret) {
918 				try_again = true;
919 				continue;
920 			}
921 			break;
922 		} else if (ret) {
923 			break;
924 		}
925 		intel_dp = intel_attached_dp(connector);
926 		crtc_state = to_intel_crtc_state(crtc->state);
927 		seq_printf(m, "DSC_Enabled: %s\n",
928 			   str_yes_no(crtc_state->dsc.compression_enable));
929 		seq_printf(m, "DSC_Sink_Support: %s\n",
930 			   str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
931 		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
932 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
933 								      DP_DSC_RGB)),
934 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
935 								      DP_DSC_YCbCr420_Native)),
936 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
937 								      DP_DSC_YCbCr444)));
938 		seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
939 			   drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
940 		seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n",
941 			   drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), intel_dp_is_edp(intel_dp)));
942 		seq_printf(m, "Force_DSC_Enable: %s\n",
943 			   str_yes_no(intel_dp->force_dsc_en));
944 		if (!intel_dp_is_edp(intel_dp))
945 			seq_printf(m, "FEC_Sink_Support: %s\n",
946 				   str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
947 	} while (try_again);
948 
949 	drm_modeset_drop_locks(&ctx);
950 	drm_modeset_acquire_fini(&ctx);
951 
952 	return ret;
953 }
954 
955 static ssize_t i915_dsc_fec_support_write(struct file *file,
956 					  const char __user *ubuf,
957 					  size_t len, loff_t *offp)
958 {
959 	struct seq_file *m = file->private_data;
960 	struct intel_connector *connector = m->private;
961 	struct intel_display *display = to_intel_display(connector);
962 	struct intel_encoder *encoder = intel_attached_encoder(connector);
963 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
964 	bool dsc_enable = false;
965 	int ret;
966 
967 	if (len == 0)
968 		return 0;
969 
970 	drm_dbg(display->drm,
971 		"Copied %zu bytes from user to force DSC\n", len);
972 
973 	ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
974 	if (ret < 0)
975 		return ret;
976 
977 	drm_dbg(display->drm, "Got %s for DSC Enable\n",
978 		str_true_false(dsc_enable));
979 	intel_dp->force_dsc_en = dsc_enable;
980 
981 	*offp += len;
982 	return len;
983 }
984 
985 static int i915_dsc_fec_support_open(struct inode *inode,
986 				     struct file *file)
987 {
988 	return single_open(file, i915_dsc_fec_support_show,
989 			   inode->i_private);
990 }
991 
992 static const struct file_operations i915_dsc_fec_support_fops = {
993 	.owner = THIS_MODULE,
994 	.open = i915_dsc_fec_support_open,
995 	.read = seq_read,
996 	.llseek = seq_lseek,
997 	.release = single_release,
998 	.write = i915_dsc_fec_support_write
999 };
1000 
1001 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1002 {
1003 	struct intel_connector *connector = m->private;
1004 	struct intel_display *display = to_intel_display(connector);
1005 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1006 	struct drm_crtc *crtc;
1007 	struct intel_crtc_state *crtc_state;
1008 	int ret;
1009 
1010 	if (!encoder)
1011 		return -ENODEV;
1012 
1013 	ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex);
1014 	if (ret)
1015 		return ret;
1016 
1017 	crtc = connector->base.state->crtc;
1018 	if (connector->base.status != connector_status_connected || !crtc) {
1019 		ret = -ENODEV;
1020 		goto out;
1021 	}
1022 
1023 	crtc_state = to_intel_crtc_state(crtc->state);
1024 	seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1025 
1026 out:	drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
1027 
1028 	return ret;
1029 }
1030 
1031 static ssize_t i915_dsc_bpc_write(struct file *file,
1032 				  const char __user *ubuf,
1033 				  size_t len, loff_t *offp)
1034 {
1035 	struct seq_file *m = file->private_data;
1036 	struct intel_connector *connector = m->private;
1037 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1038 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1039 	int dsc_bpc = 0;
1040 	int ret;
1041 
1042 	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1043 	if (ret < 0)
1044 		return ret;
1045 
1046 	intel_dp->force_dsc_bpc = dsc_bpc;
1047 	*offp += len;
1048 
1049 	return len;
1050 }
1051 
1052 static int i915_dsc_bpc_open(struct inode *inode,
1053 			     struct file *file)
1054 {
1055 	return single_open(file, i915_dsc_bpc_show, inode->i_private);
1056 }
1057 
1058 static const struct file_operations i915_dsc_bpc_fops = {
1059 	.owner = THIS_MODULE,
1060 	.open = i915_dsc_bpc_open,
1061 	.read = seq_read,
1062 	.llseek = seq_lseek,
1063 	.release = single_release,
1064 	.write = i915_dsc_bpc_write
1065 };
1066 
1067 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1068 {
1069 	struct intel_connector *connector = m->private;
1070 	struct intel_display *display = to_intel_display(connector);
1071 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1072 	struct drm_crtc *crtc;
1073 	struct intel_crtc_state *crtc_state;
1074 	int ret;
1075 
1076 	if (!encoder)
1077 		return -ENODEV;
1078 
1079 	ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex);
1080 	if (ret)
1081 		return ret;
1082 
1083 	crtc = connector->base.state->crtc;
1084 	if (connector->base.status != connector_status_connected || !crtc) {
1085 		ret = -ENODEV;
1086 		goto out;
1087 	}
1088 
1089 	crtc_state = to_intel_crtc_state(crtc->state);
1090 	seq_printf(m, "DSC_Output_Format: %s\n",
1091 		   intel_output_format_name(crtc_state->output_format));
1092 
1093 out:	drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
1094 
1095 	return ret;
1096 }
1097 
1098 static ssize_t i915_dsc_output_format_write(struct file *file,
1099 					    const char __user *ubuf,
1100 					    size_t len, loff_t *offp)
1101 {
1102 	struct seq_file *m = file->private_data;
1103 	struct intel_connector *connector = m->private;
1104 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1105 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1106 	int dsc_output_format = 0;
1107 	int ret;
1108 
1109 	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1110 	if (ret < 0)
1111 		return ret;
1112 
1113 	intel_dp->force_dsc_output_format = dsc_output_format;
1114 	*offp += len;
1115 
1116 	return len;
1117 }
1118 
1119 static int i915_dsc_output_format_open(struct inode *inode,
1120 				       struct file *file)
1121 {
1122 	return single_open(file, i915_dsc_output_format_show, inode->i_private);
1123 }
1124 
1125 static const struct file_operations i915_dsc_output_format_fops = {
1126 	.owner = THIS_MODULE,
1127 	.open = i915_dsc_output_format_open,
1128 	.read = seq_read,
1129 	.llseek = seq_lseek,
1130 	.release = single_release,
1131 	.write = i915_dsc_output_format_write
1132 };
1133 
1134 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1135 {
1136 	struct intel_connector *connector = m->private;
1137 	struct intel_display *display = to_intel_display(connector);
1138 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1139 	struct drm_crtc *crtc;
1140 	struct intel_dp *intel_dp;
1141 	int ret;
1142 
1143 	if (!encoder)
1144 		return -ENODEV;
1145 
1146 	ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex);
1147 	if (ret)
1148 		return ret;
1149 
1150 	crtc = connector->base.state->crtc;
1151 	if (connector->base.status != connector_status_connected || !crtc) {
1152 		ret = -ENODEV;
1153 		goto out;
1154 	}
1155 
1156 	intel_dp = intel_attached_dp(connector);
1157 	seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1158 		   str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1159 
1160 out:
1161 	drm_modeset_unlock(&display->drm->mode_config.connection_mutex);
1162 
1163 	return ret;
1164 }
1165 
1166 static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1167 					     const char __user *ubuf,
1168 					     size_t len, loff_t *offp)
1169 {
1170 	struct seq_file *m = file->private_data;
1171 	struct intel_connector *connector = m->private;
1172 	struct intel_display *display = to_intel_display(connector);
1173 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1174 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1175 	bool dsc_fractional_bpp_enable = false;
1176 	int ret;
1177 
1178 	if (len == 0)
1179 		return 0;
1180 
1181 	drm_dbg(display->drm,
1182 		"Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1183 
1184 	ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1185 	if (ret < 0)
1186 		return ret;
1187 
1188 	drm_dbg(display->drm, "Got %s for DSC Fractional BPP Enable\n",
1189 		str_true_false(dsc_fractional_bpp_enable));
1190 	intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1191 
1192 	*offp += len;
1193 
1194 	return len;
1195 }
1196 
1197 static int i915_dsc_fractional_bpp_open(struct inode *inode,
1198 					struct file *file)
1199 {
1200 	return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1201 }
1202 
1203 static const struct file_operations i915_dsc_fractional_bpp_fops = {
1204 	.owner = THIS_MODULE,
1205 	.open = i915_dsc_fractional_bpp_open,
1206 	.read = seq_read,
1207 	.llseek = seq_lseek,
1208 	.release = single_release,
1209 	.write = i915_dsc_fractional_bpp_write
1210 };
1211 
1212 /*
1213  * Returns the Current CRTC's bpc.
1214  * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1215  */
1216 static int i915_current_bpc_show(struct seq_file *m, void *data)
1217 {
1218 	struct intel_crtc *crtc = m->private;
1219 	struct intel_crtc_state *crtc_state;
1220 	int ret;
1221 
1222 	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1223 	if (ret)
1224 		return ret;
1225 
1226 	crtc_state = to_intel_crtc_state(crtc->base.state);
1227 	seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1228 
1229 	drm_modeset_unlock(&crtc->base.mutex);
1230 
1231 	return ret;
1232 }
1233 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1234 
1235 /* Pipe may differ from crtc index if pipes are fused off */
1236 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1237 {
1238 	struct intel_crtc *crtc = m->private;
1239 
1240 	seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1241 
1242 	return 0;
1243 }
1244 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1245 
1246 static int i915_joiner_show(struct seq_file *m, void *data)
1247 {
1248 	struct intel_connector *connector = m->private;
1249 
1250 	seq_printf(m, "%d\n", connector->force_joined_pipes);
1251 
1252 	return 0;
1253 }
1254 
1255 static ssize_t i915_joiner_write(struct file *file,
1256 				 const char __user *ubuf,
1257 				 size_t len, loff_t *offp)
1258 {
1259 	struct seq_file *m = file->private_data;
1260 	struct intel_connector *connector = m->private;
1261 	struct intel_display *display = to_intel_display(connector);
1262 	int force_joined_pipes = 0;
1263 	int ret;
1264 
1265 	if (len == 0)
1266 		return 0;
1267 
1268 	ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes);
1269 	if (ret < 0)
1270 		return ret;
1271 
1272 	switch (force_joined_pipes) {
1273 	case 0:
1274 	case 1:
1275 	case 2:
1276 		connector->force_joined_pipes = force_joined_pipes;
1277 		break;
1278 	case 4:
1279 		if (HAS_ULTRAJOINER(display)) {
1280 			connector->force_joined_pipes = force_joined_pipes;
1281 			break;
1282 		}
1283 
1284 		fallthrough;
1285 	default:
1286 		return -EINVAL;
1287 	}
1288 
1289 	*offp += len;
1290 
1291 	return len;
1292 }
1293 
1294 static int i915_joiner_open(struct inode *inode, struct file *file)
1295 {
1296 	return single_open(file, i915_joiner_show, inode->i_private);
1297 }
1298 
1299 static const struct file_operations i915_joiner_fops = {
1300 	.owner = THIS_MODULE,
1301 	.open = i915_joiner_open,
1302 	.read = seq_read,
1303 	.llseek = seq_lseek,
1304 	.release = single_release,
1305 	.write = i915_joiner_write
1306 };
1307 
1308 /**
1309  * intel_connector_debugfs_add - add i915 specific connector debugfs files
1310  * @connector: pointer to a registered intel_connector
1311  *
1312  * Cleanup will be done by drm_connector_unregister() through a call to
1313  * drm_debugfs_connector_remove().
1314  */
1315 void intel_connector_debugfs_add(struct intel_connector *connector)
1316 {
1317 	struct intel_display *display = to_intel_display(connector);
1318 	struct dentry *root = connector->base.debugfs_entry;
1319 	int connector_type = connector->base.connector_type;
1320 
1321 	/* The connector must have been registered beforehands. */
1322 	if (!root)
1323 		return;
1324 
1325 	intel_drrs_connector_debugfs_add(connector);
1326 	intel_hdcp_connector_debugfs_add(connector);
1327 	intel_pps_connector_debugfs_add(connector);
1328 	intel_psr_connector_debugfs_add(connector);
1329 	intel_alpm_lobf_debugfs_add(connector);
1330 	intel_dp_link_training_debugfs_add(connector);
1331 	intel_link_bw_connector_debugfs_add(connector);
1332 
1333 	if (DISPLAY_VER(display) >= 11 &&
1334 	    ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst.dp) ||
1335 	     connector_type == DRM_MODE_CONNECTOR_eDP)) {
1336 		debugfs_create_file("i915_dsc_fec_support", 0644, root,
1337 				    connector, &i915_dsc_fec_support_fops);
1338 
1339 		debugfs_create_file("i915_dsc_bpc", 0644, root,
1340 				    connector, &i915_dsc_bpc_fops);
1341 
1342 		debugfs_create_file("i915_dsc_output_format", 0644, root,
1343 				    connector, &i915_dsc_output_format_fops);
1344 
1345 		debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1346 				    connector, &i915_dsc_fractional_bpp_fops);
1347 	}
1348 
1349 	if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1350 	     connector_type == DRM_MODE_CONNECTOR_eDP) &&
1351 	    intel_dp_has_joiner(intel_attached_dp(connector))) {
1352 		debugfs_create_file("i915_joiner_force_enable", 0644, root,
1353 				    connector, &i915_joiner_fops);
1354 	}
1355 
1356 	if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1357 	    connector_type == DRM_MODE_CONNECTOR_eDP ||
1358 	    connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1359 	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1360 	    connector_type == DRM_MODE_CONNECTOR_HDMIB)
1361 		debugfs_create_file("i915_lpsp_capability", 0444, root,
1362 				    connector, &i915_lpsp_capability_fops);
1363 }
1364 
1365 /**
1366  * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1367  * @crtc: pointer to a drm_crtc
1368  *
1369  * Failure to add debugfs entries should generally be ignored.
1370  */
1371 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1372 {
1373 	struct dentry *root = crtc->base.debugfs_entry;
1374 
1375 	if (!root)
1376 		return;
1377 
1378 	crtc_updates_add(crtc);
1379 	intel_drrs_crtc_debugfs_add(crtc);
1380 	intel_fbc_crtc_debugfs_add(crtc);
1381 	hsw_ips_crtc_debugfs_add(crtc);
1382 
1383 	debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1384 			    &i915_current_bpc_fops);
1385 	debugfs_create_file("i915_pipe", 0444, root, crtc,
1386 			    &intel_crtc_pipe_fops);
1387 }
1388