xref: /linux/drivers/gpu/drm/i915/display/intel_display_debugfs.c (revision da5b2ad1c2f18834cb1ce429e2e5a5cf5cbdf21b)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2020 Intel Corporation
4  */
5 
6 #include <linux/string_helpers.h>
7 
8 #include <drm/drm_debugfs.h>
9 #include <drm/drm_edid.h>
10 #include <drm/drm_fourcc.h>
11 
12 #include "hsw_ips.h"
13 #include "i915_debugfs.h"
14 #include "i915_irq.h"
15 #include "i915_reg.h"
16 #include "intel_alpm.h"
17 #include "intel_crtc.h"
18 #include "intel_de.h"
19 #include "intel_crtc_state_dump.h"
20 #include "intel_display_debugfs.h"
21 #include "intel_display_debugfs_params.h"
22 #include "intel_display_power.h"
23 #include "intel_display_power_well.h"
24 #include "intel_display_types.h"
25 #include "intel_dmc.h"
26 #include "intel_dp.h"
27 #include "intel_dp_link_training.h"
28 #include "intel_dp_mst.h"
29 #include "intel_drrs.h"
30 #include "intel_fbc.h"
31 #include "intel_fbdev.h"
32 #include "intel_hdcp.h"
33 #include "intel_hdmi.h"
34 #include "intel_hotplug.h"
35 #include "intel_panel.h"
36 #include "intel_pps.h"
37 #include "intel_psr.h"
38 #include "intel_psr_regs.h"
39 #include "intel_wm.h"
40 
41 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
42 {
43 	return to_i915(node->minor->dev);
44 }
45 
46 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
47 {
48 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
49 
50 	spin_lock(&dev_priv->display.fb_tracking.lock);
51 
52 	seq_printf(m, "FB tracking busy bits: 0x%08x\n",
53 		   dev_priv->display.fb_tracking.busy_bits);
54 
55 	seq_printf(m, "FB tracking flip bits: 0x%08x\n",
56 		   dev_priv->display.fb_tracking.flip_bits);
57 
58 	spin_unlock(&dev_priv->display.fb_tracking.lock);
59 
60 	return 0;
61 }
62 
63 static int i915_sr_status(struct seq_file *m, void *unused)
64 {
65 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
66 	intel_wakeref_t wakeref;
67 	bool sr_enabled = false;
68 
69 	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
70 
71 	if (DISPLAY_VER(dev_priv) >= 9)
72 		/* no global SR status; inspect per-plane WM */;
73 	else if (HAS_PCH_SPLIT(dev_priv))
74 		sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
75 	else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
76 		 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
77 		sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
78 	else if (IS_I915GM(dev_priv))
79 		sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
80 	else if (IS_PINEVIEW(dev_priv))
81 		sr_enabled = intel_de_read(dev_priv, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN;
82 	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
83 		sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
84 
85 	intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
86 
87 	seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
88 
89 	return 0;
90 }
91 
92 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
93 {
94 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
95 	struct intel_framebuffer *fbdev_fb = NULL;
96 	struct drm_framebuffer *drm_fb;
97 
98 #ifdef CONFIG_DRM_FBDEV_EMULATION
99 	fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
100 	if (fbdev_fb) {
101 		seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
102 			   fbdev_fb->base.width,
103 			   fbdev_fb->base.height,
104 			   fbdev_fb->base.format->depth,
105 			   fbdev_fb->base.format->cpp[0] * 8,
106 			   fbdev_fb->base.modifier,
107 			   drm_framebuffer_read_refcount(&fbdev_fb->base));
108 		i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
109 		seq_putc(m, '\n');
110 	}
111 #endif
112 
113 	mutex_lock(&dev_priv->drm.mode_config.fb_lock);
114 	drm_for_each_fb(drm_fb, &dev_priv->drm) {
115 		struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
116 		if (fb == fbdev_fb)
117 			continue;
118 
119 		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
120 			   fb->base.width,
121 			   fb->base.height,
122 			   fb->base.format->depth,
123 			   fb->base.format->cpp[0] * 8,
124 			   fb->base.modifier,
125 			   drm_framebuffer_read_refcount(&fb->base));
126 		i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
127 		seq_putc(m, '\n');
128 	}
129 	mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
130 
131 	return 0;
132 }
133 
134 static int i915_power_domain_info(struct seq_file *m, void *unused)
135 {
136 	struct drm_i915_private *i915 = node_to_i915(m->private);
137 
138 	intel_display_power_debug(i915, m);
139 
140 	return 0;
141 }
142 
143 static void intel_seq_print_mode(struct seq_file *m, int tabs,
144 				 const struct drm_display_mode *mode)
145 {
146 	int i;
147 
148 	for (i = 0; i < tabs; i++)
149 		seq_putc(m, '\t');
150 
151 	seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
152 }
153 
154 static void intel_encoder_info(struct seq_file *m,
155 			       struct intel_crtc *crtc,
156 			       struct intel_encoder *encoder)
157 {
158 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
159 	struct drm_connector_list_iter conn_iter;
160 	struct drm_connector *connector;
161 
162 	seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
163 		   encoder->base.base.id, encoder->base.name);
164 
165 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
166 	drm_for_each_connector_iter(connector, &conn_iter) {
167 		const struct drm_connector_state *conn_state =
168 			connector->state;
169 
170 		if (conn_state->best_encoder != &encoder->base)
171 			continue;
172 
173 		seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
174 			   connector->base.id, connector->name);
175 	}
176 	drm_connector_list_iter_end(&conn_iter);
177 }
178 
179 static void intel_panel_info(struct seq_file *m,
180 			     struct intel_connector *connector)
181 {
182 	const struct drm_display_mode *fixed_mode;
183 
184 	if (list_empty(&connector->panel.fixed_modes))
185 		return;
186 
187 	seq_puts(m, "\tfixed modes:\n");
188 
189 	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
190 		intel_seq_print_mode(m, 2, fixed_mode);
191 }
192 
193 static void intel_hdcp_info(struct seq_file *m,
194 			    struct intel_connector *intel_connector,
195 			    bool remote_req)
196 {
197 	bool hdcp_cap = false, hdcp2_cap = false;
198 
199 	if (!intel_connector->hdcp.shim) {
200 		seq_puts(m, "No Connector Support");
201 		goto out;
202 	}
203 
204 	if (remote_req) {
205 		intel_hdcp_get_remote_capability(intel_connector,
206 						 &hdcp_cap,
207 						 &hdcp2_cap);
208 	} else {
209 		hdcp_cap = intel_hdcp_get_capability(intel_connector);
210 		hdcp2_cap = intel_hdcp2_get_capability(intel_connector);
211 	}
212 
213 	if (hdcp_cap)
214 		seq_puts(m, "HDCP1.4 ");
215 	if (hdcp2_cap)
216 		seq_puts(m, "HDCP2.2 ");
217 
218 	if (!hdcp_cap && !hdcp2_cap)
219 		seq_puts(m, "None");
220 
221 out:
222 	seq_puts(m, "\n");
223 }
224 
225 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
226 {
227 	struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
228 	struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
229 
230 	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
231 	seq_printf(m, "\taudio support: %s\n",
232 		   str_yes_no(connector->base.display_info.has_audio));
233 
234 	drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
235 				connector->detect_edid, &intel_dp->aux);
236 }
237 
238 static void intel_dp_mst_info(struct seq_file *m,
239 			      struct intel_connector *connector)
240 {
241 	bool has_audio = connector->base.display_info.has_audio;
242 
243 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
244 }
245 
246 static void intel_hdmi_info(struct seq_file *m,
247 			    struct intel_connector *connector)
248 {
249 	bool has_audio = connector->base.display_info.has_audio;
250 
251 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
252 }
253 
254 static void intel_connector_info(struct seq_file *m,
255 				 struct drm_connector *connector)
256 {
257 	struct intel_connector *intel_connector = to_intel_connector(connector);
258 	const struct drm_display_mode *mode;
259 
260 	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
261 		   connector->base.id, connector->name,
262 		   drm_get_connector_status_name(connector->status));
263 
264 	if (connector->status == connector_status_disconnected)
265 		return;
266 
267 	seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
268 		   connector->display_info.width_mm,
269 		   connector->display_info.height_mm);
270 	seq_printf(m, "\tsubpixel order: %s\n",
271 		   drm_get_subpixel_order_name(connector->display_info.subpixel_order));
272 	seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
273 
274 	switch (connector->connector_type) {
275 	case DRM_MODE_CONNECTOR_DisplayPort:
276 	case DRM_MODE_CONNECTOR_eDP:
277 		if (intel_connector->mst_port)
278 			intel_dp_mst_info(m, intel_connector);
279 		else
280 			intel_dp_info(m, intel_connector);
281 		break;
282 	case DRM_MODE_CONNECTOR_HDMIA:
283 		intel_hdmi_info(m, intel_connector);
284 		break;
285 	default:
286 		break;
287 	}
288 
289 	seq_puts(m, "\tHDCP version: ");
290 	if (intel_connector->mst_port) {
291 		intel_hdcp_info(m, intel_connector, true);
292 		seq_puts(m, "\tMST Hub HDCP version: ");
293 	}
294 	intel_hdcp_info(m, intel_connector, false);
295 
296 	seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
297 
298 	intel_panel_info(m, intel_connector);
299 
300 	seq_printf(m, "\tmodes:\n");
301 	list_for_each_entry(mode, &connector->modes, head)
302 		intel_seq_print_mode(m, 2, mode);
303 }
304 
305 static const char *plane_type(enum drm_plane_type type)
306 {
307 	switch (type) {
308 	case DRM_PLANE_TYPE_OVERLAY:
309 		return "OVL";
310 	case DRM_PLANE_TYPE_PRIMARY:
311 		return "PRI";
312 	case DRM_PLANE_TYPE_CURSOR:
313 		return "CUR";
314 	/*
315 	 * Deliberately omitting default: to generate compiler warnings
316 	 * when a new drm_plane_type gets added.
317 	 */
318 	}
319 
320 	return "unknown";
321 }
322 
323 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
324 {
325 	/*
326 	 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
327 	 * will print them all to visualize if the values are misused
328 	 */
329 	snprintf(buf, bufsize,
330 		 "%s%s%s%s%s%s(0x%08x)",
331 		 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
332 		 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
333 		 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
334 		 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
335 		 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
336 		 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
337 		 rotation);
338 }
339 
340 static const char *plane_visibility(const struct intel_plane_state *plane_state)
341 {
342 	if (plane_state->uapi.visible)
343 		return "visible";
344 
345 	if (plane_state->planar_slave)
346 		return "planar-slave";
347 
348 	return "hidden";
349 }
350 
351 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
352 {
353 	const struct intel_plane_state *plane_state =
354 		to_intel_plane_state(plane->base.state);
355 	const struct drm_framebuffer *fb = plane_state->uapi.fb;
356 	struct drm_rect src, dst;
357 	char rot_str[48];
358 
359 	src = drm_plane_state_src(&plane_state->uapi);
360 	dst = drm_plane_state_dest(&plane_state->uapi);
361 
362 	plane_rotation(rot_str, sizeof(rot_str),
363 		       plane_state->uapi.rotation);
364 
365 	seq_puts(m, "\t\tuapi: [FB:");
366 	if (fb)
367 		seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
368 			   &fb->format->format, fb->modifier, fb->width,
369 			   fb->height);
370 	else
371 		seq_puts(m, "0] n/a,0x0,0x0,");
372 	seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
373 		   ", rotation=%s\n", plane_visibility(plane_state),
374 		   DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
375 
376 	if (plane_state->planar_linked_plane)
377 		seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
378 			   plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
379 			   plane_state->planar_slave ? "slave" : "master");
380 }
381 
382 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
383 {
384 	const struct intel_plane_state *plane_state =
385 		to_intel_plane_state(plane->base.state);
386 	const struct drm_framebuffer *fb = plane_state->hw.fb;
387 	char rot_str[48];
388 
389 	if (!fb)
390 		return;
391 
392 	plane_rotation(rot_str, sizeof(rot_str),
393 		       plane_state->hw.rotation);
394 
395 	seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
396 		   DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
397 		   fb->base.id, &fb->format->format,
398 		   fb->modifier, fb->width, fb->height,
399 		   str_yes_no(plane_state->uapi.visible),
400 		   DRM_RECT_FP_ARG(&plane_state->uapi.src),
401 		   DRM_RECT_ARG(&plane_state->uapi.dst),
402 		   rot_str);
403 }
404 
405 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
406 {
407 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
408 	struct intel_plane *plane;
409 
410 	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
411 		seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
412 			   plane->base.base.id, plane->base.name,
413 			   plane_type(plane->base.type));
414 		intel_plane_uapi_info(m, plane);
415 		intel_plane_hw_info(m, plane);
416 	}
417 }
418 
419 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
420 {
421 	const struct intel_crtc_state *crtc_state =
422 		to_intel_crtc_state(crtc->base.state);
423 	int num_scalers = crtc->num_scalers;
424 	int i;
425 
426 	/* Not all platformas have a scaler */
427 	if (num_scalers) {
428 		seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
429 			   num_scalers,
430 			   crtc_state->scaler_state.scaler_users,
431 			   crtc_state->scaler_state.scaler_id,
432 			   crtc_state->hw.scaling_filter);
433 
434 		for (i = 0; i < num_scalers; i++) {
435 			const struct intel_scaler *sc =
436 				&crtc_state->scaler_state.scalers[i];
437 
438 			seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
439 				   i, str_yes_no(sc->in_use), sc->mode);
440 		}
441 		seq_puts(m, "\n");
442 	} else {
443 		seq_puts(m, "\tNo scalers available on this platform\n");
444 	}
445 }
446 
447 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
448 static void crtc_updates_info(struct seq_file *m,
449 			      struct intel_crtc *crtc,
450 			      const char *hdr)
451 {
452 	u64 count;
453 	int row;
454 
455 	count = 0;
456 	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
457 		count += crtc->debug.vbl.times[row];
458 	seq_printf(m, "%sUpdates: %llu\n", hdr, count);
459 	if (!count)
460 		return;
461 
462 	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
463 		char columns[80] = "       |";
464 		unsigned int x;
465 
466 		if (row & 1) {
467 			const char *units;
468 
469 			if (row > 10) {
470 				x = 1000000;
471 				units = "ms";
472 			} else {
473 				x = 1000;
474 				units = "us";
475 			}
476 
477 			snprintf(columns, sizeof(columns), "%4ld%s |",
478 				 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
479 		}
480 
481 		if (crtc->debug.vbl.times[row]) {
482 			x = ilog2(crtc->debug.vbl.times[row]);
483 			memset(columns + 8, '*', x);
484 			columns[8 + x] = '\0';
485 		}
486 
487 		seq_printf(m, "%s%s\n", hdr, columns);
488 	}
489 
490 	seq_printf(m, "%sMin update: %lluns\n",
491 		   hdr, crtc->debug.vbl.min);
492 	seq_printf(m, "%sMax update: %lluns\n",
493 		   hdr, crtc->debug.vbl.max);
494 	seq_printf(m, "%sAverage update: %lluns\n",
495 		   hdr, div64_u64(crtc->debug.vbl.sum,  count));
496 	seq_printf(m, "%sOverruns > %uus: %u\n",
497 		   hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
498 }
499 
500 static int crtc_updates_show(struct seq_file *m, void *data)
501 {
502 	crtc_updates_info(m, m->private, "");
503 	return 0;
504 }
505 
506 static int crtc_updates_open(struct inode *inode, struct file *file)
507 {
508 	return single_open(file, crtc_updates_show, inode->i_private);
509 }
510 
511 static ssize_t crtc_updates_write(struct file *file,
512 				  const char __user *ubuf,
513 				  size_t len, loff_t *offp)
514 {
515 	struct seq_file *m = file->private_data;
516 	struct intel_crtc *crtc = m->private;
517 
518 	/* May race with an update. Meh. */
519 	memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
520 
521 	return len;
522 }
523 
524 static const struct file_operations crtc_updates_fops = {
525 	.owner = THIS_MODULE,
526 	.open = crtc_updates_open,
527 	.read = seq_read,
528 	.llseek = seq_lseek,
529 	.release = single_release,
530 	.write = crtc_updates_write
531 };
532 
533 static void crtc_updates_add(struct intel_crtc *crtc)
534 {
535 	debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
536 			    crtc, &crtc_updates_fops);
537 }
538 
539 #else
540 static void crtc_updates_info(struct seq_file *m,
541 			      struct intel_crtc *crtc,
542 			      const char *hdr)
543 {
544 }
545 
546 static void crtc_updates_add(struct intel_crtc *crtc)
547 {
548 }
549 #endif
550 
551 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
552 {
553 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
554 	const struct intel_crtc_state *crtc_state =
555 		to_intel_crtc_state(crtc->base.state);
556 	struct intel_encoder *encoder;
557 
558 	seq_printf(m, "[CRTC:%d:%s]:\n",
559 		   crtc->base.base.id, crtc->base.name);
560 
561 	seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
562 		   str_yes_no(crtc_state->uapi.enable),
563 		   str_yes_no(crtc_state->uapi.active),
564 		   DRM_MODE_ARG(&crtc_state->uapi.mode));
565 
566 	seq_printf(m, "\thw: enable=%s, active=%s\n",
567 		   str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
568 	seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
569 		   DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
570 	seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
571 		   DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
572 
573 	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
574 		   DRM_RECT_ARG(&crtc_state->pipe_src),
575 		   str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
576 
577 	intel_scaler_info(m, crtc);
578 
579 	if (crtc_state->joiner_pipes)
580 		seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
581 			   crtc_state->joiner_pipes,
582 			   intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master");
583 
584 	for_each_intel_encoder_mask(&dev_priv->drm, encoder,
585 				    crtc_state->uapi.encoder_mask)
586 		intel_encoder_info(m, crtc, encoder);
587 
588 	intel_plane_info(m, crtc);
589 
590 	seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
591 		   str_yes_no(!crtc->cpu_fifo_underrun_disabled),
592 		   str_yes_no(!crtc->pch_fifo_underrun_disabled));
593 
594 	crtc_updates_info(m, crtc, "\t");
595 }
596 
597 static int i915_display_info(struct seq_file *m, void *unused)
598 {
599 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
600 	struct intel_crtc *crtc;
601 	struct drm_connector *connector;
602 	struct drm_connector_list_iter conn_iter;
603 	intel_wakeref_t wakeref;
604 
605 	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
606 
607 	drm_modeset_lock_all(&dev_priv->drm);
608 
609 	seq_printf(m, "CRTC info\n");
610 	seq_printf(m, "---------\n");
611 	for_each_intel_crtc(&dev_priv->drm, crtc)
612 		intel_crtc_info(m, crtc);
613 
614 	seq_printf(m, "\n");
615 	seq_printf(m, "Connector info\n");
616 	seq_printf(m, "--------------\n");
617 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
618 	drm_for_each_connector_iter(connector, &conn_iter)
619 		intel_connector_info(m, connector);
620 	drm_connector_list_iter_end(&conn_iter);
621 
622 	drm_modeset_unlock_all(&dev_priv->drm);
623 
624 	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
625 
626 	return 0;
627 }
628 
629 static int i915_display_capabilities(struct seq_file *m, void *unused)
630 {
631 	struct drm_i915_private *i915 = node_to_i915(m->private);
632 	struct drm_printer p = drm_seq_file_printer(m);
633 
634 	intel_display_device_info_print(DISPLAY_INFO(i915),
635 					DISPLAY_RUNTIME_INFO(i915), &p);
636 
637 	return 0;
638 }
639 
640 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
641 {
642 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
643 	struct drm_printer p = drm_seq_file_printer(m);
644 	struct intel_shared_dpll *pll;
645 	int i;
646 
647 	drm_modeset_lock_all(&dev_priv->drm);
648 
649 	drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
650 		   dev_priv->display.dpll.ref_clks.nssc,
651 		   dev_priv->display.dpll.ref_clks.ssc);
652 
653 	for_each_shared_dpll(dev_priv, pll, i) {
654 		drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
655 			   pll->info->name, pll->info->id);
656 		drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
657 			   pll->state.pipe_mask, pll->active_mask,
658 			   str_yes_no(pll->on));
659 		drm_printf(&p, " tracked hardware state:\n");
660 		intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state);
661 	}
662 	drm_modeset_unlock_all(&dev_priv->drm);
663 
664 	return 0;
665 }
666 
667 static int i915_ddb_info(struct seq_file *m, void *unused)
668 {
669 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
670 	struct skl_ddb_entry *entry;
671 	struct intel_crtc *crtc;
672 
673 	if (DISPLAY_VER(dev_priv) < 9)
674 		return -ENODEV;
675 
676 	drm_modeset_lock_all(&dev_priv->drm);
677 
678 	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
679 
680 	for_each_intel_crtc(&dev_priv->drm, crtc) {
681 		struct intel_crtc_state *crtc_state =
682 			to_intel_crtc_state(crtc->base.state);
683 		enum pipe pipe = crtc->pipe;
684 		enum plane_id plane_id;
685 
686 		seq_printf(m, "Pipe %c\n", pipe_name(pipe));
687 
688 		for_each_plane_id_on_crtc(crtc, plane_id) {
689 			entry = &crtc_state->wm.skl.plane_ddb[plane_id];
690 			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane_id + 1,
691 				   entry->start, entry->end,
692 				   skl_ddb_entry_size(entry));
693 		}
694 
695 		entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
696 		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,
697 			   entry->end, skl_ddb_entry_size(entry));
698 	}
699 
700 	drm_modeset_unlock_all(&dev_priv->drm);
701 
702 	return 0;
703 }
704 
705 static bool
706 intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
707 			      enum i915_power_well_id power_well_id)
708 {
709 	intel_wakeref_t wakeref;
710 	bool is_enabled;
711 
712 	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
713 	is_enabled = intel_display_power_well_is_enabled(i915,
714 							 power_well_id);
715 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
716 
717 	return is_enabled;
718 }
719 
720 static int i915_lpsp_status(struct seq_file *m, void *unused)
721 {
722 	struct drm_i915_private *i915 = node_to_i915(m->private);
723 	bool lpsp_enabled = false;
724 
725 	if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
726 		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
727 	} else if (IS_DISPLAY_VER(i915, 11, 12)) {
728 		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
729 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
730 		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
731 	} else {
732 		seq_puts(m, "LPSP: not supported\n");
733 		return 0;
734 	}
735 
736 	seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
737 
738 	return 0;
739 }
740 
741 static int i915_dp_mst_info(struct seq_file *m, void *unused)
742 {
743 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
744 	struct intel_encoder *intel_encoder;
745 	struct intel_digital_port *dig_port;
746 	struct drm_connector *connector;
747 	struct drm_connector_list_iter conn_iter;
748 
749 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
750 	drm_for_each_connector_iter(connector, &conn_iter) {
751 		if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
752 			continue;
753 
754 		intel_encoder = intel_attached_encoder(to_intel_connector(connector));
755 		if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
756 			continue;
757 
758 		dig_port = enc_to_dig_port(intel_encoder);
759 		if (!intel_dp_mst_source_support(&dig_port->dp))
760 			continue;
761 
762 		seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
763 			   dig_port->base.base.base.id,
764 			   dig_port->base.base.name);
765 		drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
766 	}
767 	drm_connector_list_iter_end(&conn_iter);
768 
769 	return 0;
770 }
771 
772 static ssize_t i915_displayport_test_active_write(struct file *file,
773 						  const char __user *ubuf,
774 						  size_t len, loff_t *offp)
775 {
776 	char *input_buffer;
777 	int status = 0;
778 	struct drm_device *dev;
779 	struct drm_connector *connector;
780 	struct drm_connector_list_iter conn_iter;
781 	struct intel_dp *intel_dp;
782 	int val = 0;
783 
784 	dev = ((struct seq_file *)file->private_data)->private;
785 
786 	if (len == 0)
787 		return 0;
788 
789 	input_buffer = memdup_user_nul(ubuf, len);
790 	if (IS_ERR(input_buffer))
791 		return PTR_ERR(input_buffer);
792 
793 	drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len);
794 
795 	drm_connector_list_iter_begin(dev, &conn_iter);
796 	drm_for_each_connector_iter(connector, &conn_iter) {
797 		struct intel_encoder *encoder;
798 
799 		if (connector->connector_type !=
800 		    DRM_MODE_CONNECTOR_DisplayPort)
801 			continue;
802 
803 		encoder = to_intel_encoder(connector->encoder);
804 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
805 			continue;
806 
807 		if (encoder && connector->status == connector_status_connected) {
808 			intel_dp = enc_to_intel_dp(encoder);
809 			status = kstrtoint(input_buffer, 10, &val);
810 			if (status < 0)
811 				break;
812 			drm_dbg(dev, "Got %d for test active\n", val);
813 			/* To prevent erroneous activation of the compliance
814 			 * testing code, only accept an actual value of 1 here
815 			 */
816 			if (val == 1)
817 				intel_dp->compliance.test_active = true;
818 			else
819 				intel_dp->compliance.test_active = false;
820 		}
821 	}
822 	drm_connector_list_iter_end(&conn_iter);
823 	kfree(input_buffer);
824 	if (status < 0)
825 		return status;
826 
827 	*offp += len;
828 	return len;
829 }
830 
831 static int i915_displayport_test_active_show(struct seq_file *m, void *data)
832 {
833 	struct drm_i915_private *dev_priv = m->private;
834 	struct drm_connector *connector;
835 	struct drm_connector_list_iter conn_iter;
836 	struct intel_dp *intel_dp;
837 
838 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
839 	drm_for_each_connector_iter(connector, &conn_iter) {
840 		struct intel_encoder *encoder;
841 
842 		if (connector->connector_type !=
843 		    DRM_MODE_CONNECTOR_DisplayPort)
844 			continue;
845 
846 		encoder = to_intel_encoder(connector->encoder);
847 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
848 			continue;
849 
850 		if (encoder && connector->status == connector_status_connected) {
851 			intel_dp = enc_to_intel_dp(encoder);
852 			if (intel_dp->compliance.test_active)
853 				seq_puts(m, "1");
854 			else
855 				seq_puts(m, "0");
856 		} else
857 			seq_puts(m, "0");
858 	}
859 	drm_connector_list_iter_end(&conn_iter);
860 
861 	return 0;
862 }
863 
864 static int i915_displayport_test_active_open(struct inode *inode,
865 					     struct file *file)
866 {
867 	return single_open(file, i915_displayport_test_active_show,
868 			   inode->i_private);
869 }
870 
871 static const struct file_operations i915_displayport_test_active_fops = {
872 	.owner = THIS_MODULE,
873 	.open = i915_displayport_test_active_open,
874 	.read = seq_read,
875 	.llseek = seq_lseek,
876 	.release = single_release,
877 	.write = i915_displayport_test_active_write
878 };
879 
880 static int i915_displayport_test_data_show(struct seq_file *m, void *data)
881 {
882 	struct drm_i915_private *dev_priv = m->private;
883 	struct drm_connector *connector;
884 	struct drm_connector_list_iter conn_iter;
885 	struct intel_dp *intel_dp;
886 
887 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
888 	drm_for_each_connector_iter(connector, &conn_iter) {
889 		struct intel_encoder *encoder;
890 
891 		if (connector->connector_type !=
892 		    DRM_MODE_CONNECTOR_DisplayPort)
893 			continue;
894 
895 		encoder = to_intel_encoder(connector->encoder);
896 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
897 			continue;
898 
899 		if (encoder && connector->status == connector_status_connected) {
900 			intel_dp = enc_to_intel_dp(encoder);
901 			if (intel_dp->compliance.test_type ==
902 			    DP_TEST_LINK_EDID_READ)
903 				seq_printf(m, "%lx",
904 					   intel_dp->compliance.test_data.edid);
905 			else if (intel_dp->compliance.test_type ==
906 				 DP_TEST_LINK_VIDEO_PATTERN) {
907 				seq_printf(m, "hdisplay: %d\n",
908 					   intel_dp->compliance.test_data.hdisplay);
909 				seq_printf(m, "vdisplay: %d\n",
910 					   intel_dp->compliance.test_data.vdisplay);
911 				seq_printf(m, "bpc: %u\n",
912 					   intel_dp->compliance.test_data.bpc);
913 			} else if (intel_dp->compliance.test_type ==
914 				   DP_TEST_LINK_PHY_TEST_PATTERN) {
915 				seq_printf(m, "pattern: %d\n",
916 					   intel_dp->compliance.test_data.phytest.phy_pattern);
917 				seq_printf(m, "Number of lanes: %d\n",
918 					   intel_dp->compliance.test_data.phytest.num_lanes);
919 				seq_printf(m, "Link Rate: %d\n",
920 					   intel_dp->compliance.test_data.phytest.link_rate);
921 				seq_printf(m, "level: %02x\n",
922 					   intel_dp->train_set[0]);
923 			}
924 		} else
925 			seq_puts(m, "0");
926 	}
927 	drm_connector_list_iter_end(&conn_iter);
928 
929 	return 0;
930 }
931 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
932 
933 static int i915_displayport_test_type_show(struct seq_file *m, void *data)
934 {
935 	struct drm_i915_private *dev_priv = m->private;
936 	struct drm_connector *connector;
937 	struct drm_connector_list_iter conn_iter;
938 	struct intel_dp *intel_dp;
939 
940 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
941 	drm_for_each_connector_iter(connector, &conn_iter) {
942 		struct intel_encoder *encoder;
943 
944 		if (connector->connector_type !=
945 		    DRM_MODE_CONNECTOR_DisplayPort)
946 			continue;
947 
948 		encoder = to_intel_encoder(connector->encoder);
949 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
950 			continue;
951 
952 		if (encoder && connector->status == connector_status_connected) {
953 			intel_dp = enc_to_intel_dp(encoder);
954 			seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
955 		} else
956 			seq_puts(m, "0");
957 	}
958 	drm_connector_list_iter_end(&conn_iter);
959 
960 	return 0;
961 }
962 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
963 
964 static ssize_t
965 i915_fifo_underrun_reset_write(struct file *filp,
966 			       const char __user *ubuf,
967 			       size_t cnt, loff_t *ppos)
968 {
969 	struct drm_i915_private *dev_priv = filp->private_data;
970 	struct intel_crtc *crtc;
971 	int ret;
972 	bool reset;
973 
974 	ret = kstrtobool_from_user(ubuf, cnt, &reset);
975 	if (ret)
976 		return ret;
977 
978 	if (!reset)
979 		return cnt;
980 
981 	for_each_intel_crtc(&dev_priv->drm, crtc) {
982 		struct drm_crtc_commit *commit;
983 		struct intel_crtc_state *crtc_state;
984 
985 		ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
986 		if (ret)
987 			return ret;
988 
989 		crtc_state = to_intel_crtc_state(crtc->base.state);
990 		commit = crtc_state->uapi.commit;
991 		if (commit) {
992 			ret = wait_for_completion_interruptible(&commit->hw_done);
993 			if (!ret)
994 				ret = wait_for_completion_interruptible(&commit->flip_done);
995 		}
996 
997 		if (!ret && crtc_state->hw.active) {
998 			drm_dbg_kms(&dev_priv->drm,
999 				    "Re-arming FIFO underruns on pipe %c\n",
1000 				    pipe_name(crtc->pipe));
1001 
1002 			intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1003 		}
1004 
1005 		drm_modeset_unlock(&crtc->base.mutex);
1006 
1007 		if (ret)
1008 			return ret;
1009 	}
1010 
1011 	intel_fbc_reset_underrun(dev_priv);
1012 
1013 	return cnt;
1014 }
1015 
1016 static const struct file_operations i915_fifo_underrun_reset_ops = {
1017 	.owner = THIS_MODULE,
1018 	.open = simple_open,
1019 	.write = i915_fifo_underrun_reset_write,
1020 	.llseek = default_llseek,
1021 };
1022 
1023 static const struct drm_info_list intel_display_debugfs_list[] = {
1024 	{"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1025 	{"i915_sr_status", i915_sr_status, 0},
1026 	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1027 	{"i915_power_domain_info", i915_power_domain_info, 0},
1028 	{"i915_display_info", i915_display_info, 0},
1029 	{"i915_display_capabilities", i915_display_capabilities, 0},
1030 	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1031 	{"i915_dp_mst_info", i915_dp_mst_info, 0},
1032 	{"i915_ddb_info", i915_ddb_info, 0},
1033 	{"i915_lpsp_status", i915_lpsp_status, 0},
1034 };
1035 
1036 static const struct {
1037 	const char *name;
1038 	const struct file_operations *fops;
1039 } intel_display_debugfs_files[] = {
1040 	{"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1041 	{"i915_dp_test_data", &i915_displayport_test_data_fops},
1042 	{"i915_dp_test_type", &i915_displayport_test_type_fops},
1043 	{"i915_dp_test_active", &i915_displayport_test_active_fops},
1044 };
1045 
1046 void intel_display_debugfs_register(struct drm_i915_private *i915)
1047 {
1048 	struct drm_minor *minor = i915->drm.primary;
1049 	int i;
1050 
1051 	for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1052 		debugfs_create_file(intel_display_debugfs_files[i].name,
1053 				    0644,
1054 				    minor->debugfs_root,
1055 				    to_i915(minor->dev),
1056 				    intel_display_debugfs_files[i].fops);
1057 	}
1058 
1059 	drm_debugfs_create_files(intel_display_debugfs_list,
1060 				 ARRAY_SIZE(intel_display_debugfs_list),
1061 				 minor->debugfs_root, minor);
1062 
1063 	intel_bios_debugfs_register(i915);
1064 	intel_cdclk_debugfs_register(i915);
1065 	intel_dmc_debugfs_register(i915);
1066 	intel_fbc_debugfs_register(i915);
1067 	intel_hpd_debugfs_register(i915);
1068 	intel_opregion_debugfs_register(i915);
1069 	intel_psr_debugfs_register(i915);
1070 	intel_wm_debugfs_register(i915);
1071 	intel_display_debugfs_params(i915);
1072 }
1073 
1074 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1075 {
1076 	struct intel_connector *connector = m->private;
1077 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1078 	int ret;
1079 
1080 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1081 	if (ret)
1082 		return ret;
1083 
1084 	if (!connector->base.encoder ||
1085 	    connector->base.status != connector_status_connected) {
1086 		ret = -ENODEV;
1087 		goto out;
1088 	}
1089 
1090 	seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
1091 		   connector->base.base.id);
1092 	intel_hdcp_info(m, connector, false);
1093 
1094 out:
1095 	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1096 
1097 	return ret;
1098 }
1099 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1100 
1101 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1102 {
1103 	struct intel_connector *connector = m->private;
1104 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1105 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1106 	int connector_type = connector->base.connector_type;
1107 	bool lpsp_capable = false;
1108 
1109 	if (!encoder)
1110 		return -ENODEV;
1111 
1112 	if (connector->base.status != connector_status_connected)
1113 		return -ENODEV;
1114 
1115 	if (DISPLAY_VER(i915) >= 13)
1116 		lpsp_capable = encoder->port <= PORT_B;
1117 	else if (DISPLAY_VER(i915) >= 12)
1118 		/*
1119 		 * Actually TGL can drive LPSP on port till DDI_C
1120 		 * but there is no physical connected DDI_C on TGL sku's,
1121 		 * even driver is not initilizing DDI_C port for gen12.
1122 		 */
1123 		lpsp_capable = encoder->port <= PORT_B;
1124 	else if (DISPLAY_VER(i915) == 11)
1125 		lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
1126 				connector_type == DRM_MODE_CONNECTOR_eDP);
1127 	else if (IS_DISPLAY_VER(i915, 9, 10))
1128 		lpsp_capable = (encoder->port == PORT_A &&
1129 				(connector_type == DRM_MODE_CONNECTOR_DSI ||
1130 				 connector_type == DRM_MODE_CONNECTOR_eDP ||
1131 				 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1132 	else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1133 		lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
1134 
1135 	seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1136 
1137 	return 0;
1138 }
1139 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1140 
1141 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1142 {
1143 	struct intel_connector *connector = m->private;
1144 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1145 	struct drm_crtc *crtc;
1146 	struct intel_dp *intel_dp;
1147 	struct drm_modeset_acquire_ctx ctx;
1148 	struct intel_crtc_state *crtc_state = NULL;
1149 	int ret = 0;
1150 	bool try_again = false;
1151 
1152 	drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1153 
1154 	do {
1155 		try_again = false;
1156 		ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
1157 				       &ctx);
1158 		if (ret) {
1159 			if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1160 				try_again = true;
1161 				continue;
1162 			}
1163 			break;
1164 		}
1165 		crtc = connector->base.state->crtc;
1166 		if (connector->base.status != connector_status_connected || !crtc) {
1167 			ret = -ENODEV;
1168 			break;
1169 		}
1170 		ret = drm_modeset_lock(&crtc->mutex, &ctx);
1171 		if (ret == -EDEADLK) {
1172 			ret = drm_modeset_backoff(&ctx);
1173 			if (!ret) {
1174 				try_again = true;
1175 				continue;
1176 			}
1177 			break;
1178 		} else if (ret) {
1179 			break;
1180 		}
1181 		intel_dp = intel_attached_dp(connector);
1182 		crtc_state = to_intel_crtc_state(crtc->state);
1183 		seq_printf(m, "DSC_Enabled: %s\n",
1184 			   str_yes_no(crtc_state->dsc.compression_enable));
1185 		seq_printf(m, "DSC_Sink_Support: %s\n",
1186 			   str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
1187 		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1188 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1189 								      DP_DSC_RGB)),
1190 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1191 								      DP_DSC_YCbCr420_Native)),
1192 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1193 								      DP_DSC_YCbCr444)));
1194 		seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1195 			   drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
1196 		seq_printf(m, "Force_DSC_Enable: %s\n",
1197 			   str_yes_no(intel_dp->force_dsc_en));
1198 		if (!intel_dp_is_edp(intel_dp))
1199 			seq_printf(m, "FEC_Sink_Support: %s\n",
1200 				   str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
1201 	} while (try_again);
1202 
1203 	drm_modeset_drop_locks(&ctx);
1204 	drm_modeset_acquire_fini(&ctx);
1205 
1206 	return ret;
1207 }
1208 
1209 static ssize_t i915_dsc_fec_support_write(struct file *file,
1210 					  const char __user *ubuf,
1211 					  size_t len, loff_t *offp)
1212 {
1213 	struct seq_file *m = file->private_data;
1214 	struct intel_connector *connector = m->private;
1215 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1216 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1217 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1218 	bool dsc_enable = false;
1219 	int ret;
1220 
1221 	if (len == 0)
1222 		return 0;
1223 
1224 	drm_dbg(&i915->drm,
1225 		"Copied %zu bytes from user to force DSC\n", len);
1226 
1227 	ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1228 	if (ret < 0)
1229 		return ret;
1230 
1231 	drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1232 		(dsc_enable) ? "true" : "false");
1233 	intel_dp->force_dsc_en = dsc_enable;
1234 
1235 	*offp += len;
1236 	return len;
1237 }
1238 
1239 static int i915_dsc_fec_support_open(struct inode *inode,
1240 				     struct file *file)
1241 {
1242 	return single_open(file, i915_dsc_fec_support_show,
1243 			   inode->i_private);
1244 }
1245 
1246 static const struct file_operations i915_dsc_fec_support_fops = {
1247 	.owner = THIS_MODULE,
1248 	.open = i915_dsc_fec_support_open,
1249 	.read = seq_read,
1250 	.llseek = seq_lseek,
1251 	.release = single_release,
1252 	.write = i915_dsc_fec_support_write
1253 };
1254 
1255 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1256 {
1257 	struct intel_connector *connector = m->private;
1258 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1259 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1260 	struct drm_crtc *crtc;
1261 	struct intel_crtc_state *crtc_state;
1262 	int ret;
1263 
1264 	if (!encoder)
1265 		return -ENODEV;
1266 
1267 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1268 	if (ret)
1269 		return ret;
1270 
1271 	crtc = connector->base.state->crtc;
1272 	if (connector->base.status != connector_status_connected || !crtc) {
1273 		ret = -ENODEV;
1274 		goto out;
1275 	}
1276 
1277 	crtc_state = to_intel_crtc_state(crtc->state);
1278 	seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1279 
1280 out:	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1281 
1282 	return ret;
1283 }
1284 
1285 static ssize_t i915_dsc_bpc_write(struct file *file,
1286 				  const char __user *ubuf,
1287 				  size_t len, loff_t *offp)
1288 {
1289 	struct seq_file *m = file->private_data;
1290 	struct intel_connector *connector = m->private;
1291 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1292 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1293 	int dsc_bpc = 0;
1294 	int ret;
1295 
1296 	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1297 	if (ret < 0)
1298 		return ret;
1299 
1300 	intel_dp->force_dsc_bpc = dsc_bpc;
1301 	*offp += len;
1302 
1303 	return len;
1304 }
1305 
1306 static int i915_dsc_bpc_open(struct inode *inode,
1307 			     struct file *file)
1308 {
1309 	return single_open(file, i915_dsc_bpc_show, inode->i_private);
1310 }
1311 
1312 static const struct file_operations i915_dsc_bpc_fops = {
1313 	.owner = THIS_MODULE,
1314 	.open = i915_dsc_bpc_open,
1315 	.read = seq_read,
1316 	.llseek = seq_lseek,
1317 	.release = single_release,
1318 	.write = i915_dsc_bpc_write
1319 };
1320 
1321 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1322 {
1323 	struct intel_connector *connector = m->private;
1324 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1325 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1326 	struct drm_crtc *crtc;
1327 	struct intel_crtc_state *crtc_state;
1328 	int ret;
1329 
1330 	if (!encoder)
1331 		return -ENODEV;
1332 
1333 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1334 	if (ret)
1335 		return ret;
1336 
1337 	crtc = connector->base.state->crtc;
1338 	if (connector->base.status != connector_status_connected || !crtc) {
1339 		ret = -ENODEV;
1340 		goto out;
1341 	}
1342 
1343 	crtc_state = to_intel_crtc_state(crtc->state);
1344 	seq_printf(m, "DSC_Output_Format: %s\n",
1345 		   intel_output_format_name(crtc_state->output_format));
1346 
1347 out:	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1348 
1349 	return ret;
1350 }
1351 
1352 static ssize_t i915_dsc_output_format_write(struct file *file,
1353 					    const char __user *ubuf,
1354 					    size_t len, loff_t *offp)
1355 {
1356 	struct seq_file *m = file->private_data;
1357 	struct intel_connector *connector = m->private;
1358 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1359 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1360 	int dsc_output_format = 0;
1361 	int ret;
1362 
1363 	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1364 	if (ret < 0)
1365 		return ret;
1366 
1367 	intel_dp->force_dsc_output_format = dsc_output_format;
1368 	*offp += len;
1369 
1370 	return len;
1371 }
1372 
1373 static int i915_dsc_output_format_open(struct inode *inode,
1374 				       struct file *file)
1375 {
1376 	return single_open(file, i915_dsc_output_format_show, inode->i_private);
1377 }
1378 
1379 static const struct file_operations i915_dsc_output_format_fops = {
1380 	.owner = THIS_MODULE,
1381 	.open = i915_dsc_output_format_open,
1382 	.read = seq_read,
1383 	.llseek = seq_lseek,
1384 	.release = single_release,
1385 	.write = i915_dsc_output_format_write
1386 };
1387 
1388 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1389 {
1390 	struct intel_connector *connector = m->private;
1391 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1392 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1393 	struct drm_crtc *crtc;
1394 	struct intel_dp *intel_dp;
1395 	int ret;
1396 
1397 	if (!encoder)
1398 		return -ENODEV;
1399 
1400 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1401 	if (ret)
1402 		return ret;
1403 
1404 	crtc = connector->base.state->crtc;
1405 	if (connector->base.status != connector_status_connected || !crtc) {
1406 		ret = -ENODEV;
1407 		goto out;
1408 	}
1409 
1410 	intel_dp = intel_attached_dp(connector);
1411 	seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1412 		   str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1413 
1414 out:
1415 	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1416 
1417 	return ret;
1418 }
1419 
1420 static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1421 					     const char __user *ubuf,
1422 					     size_t len, loff_t *offp)
1423 {
1424 	struct seq_file *m = file->private_data;
1425 	struct intel_connector *connector = m->private;
1426 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1427 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1428 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1429 	bool dsc_fractional_bpp_enable = false;
1430 	int ret;
1431 
1432 	if (len == 0)
1433 		return 0;
1434 
1435 	drm_dbg(&i915->drm,
1436 		"Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1437 
1438 	ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1439 	if (ret < 0)
1440 		return ret;
1441 
1442 	drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
1443 		(dsc_fractional_bpp_enable) ? "true" : "false");
1444 	intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1445 
1446 	*offp += len;
1447 
1448 	return len;
1449 }
1450 
1451 static int i915_dsc_fractional_bpp_open(struct inode *inode,
1452 					struct file *file)
1453 {
1454 	return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1455 }
1456 
1457 static const struct file_operations i915_dsc_fractional_bpp_fops = {
1458 	.owner = THIS_MODULE,
1459 	.open = i915_dsc_fractional_bpp_open,
1460 	.read = seq_read,
1461 	.llseek = seq_lseek,
1462 	.release = single_release,
1463 	.write = i915_dsc_fractional_bpp_write
1464 };
1465 
1466 /*
1467  * Returns the Current CRTC's bpc.
1468  * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1469  */
1470 static int i915_current_bpc_show(struct seq_file *m, void *data)
1471 {
1472 	struct intel_crtc *crtc = m->private;
1473 	struct intel_crtc_state *crtc_state;
1474 	int ret;
1475 
1476 	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1477 	if (ret)
1478 		return ret;
1479 
1480 	crtc_state = to_intel_crtc_state(crtc->base.state);
1481 	seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1482 
1483 	drm_modeset_unlock(&crtc->base.mutex);
1484 
1485 	return ret;
1486 }
1487 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1488 
1489 /* Pipe may differ from crtc index if pipes are fused off */
1490 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1491 {
1492 	struct intel_crtc *crtc = m->private;
1493 
1494 	seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1495 
1496 	return 0;
1497 }
1498 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1499 
1500 /**
1501  * intel_connector_debugfs_add - add i915 specific connector debugfs files
1502  * @connector: pointer to a registered intel_connector
1503  *
1504  * Cleanup will be done by drm_connector_unregister() through a call to
1505  * drm_debugfs_connector_remove().
1506  */
1507 void intel_connector_debugfs_add(struct intel_connector *connector)
1508 {
1509 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1510 	struct dentry *root = connector->base.debugfs_entry;
1511 	int connector_type = connector->base.connector_type;
1512 
1513 	/* The connector must have been registered beforehands. */
1514 	if (!root)
1515 		return;
1516 
1517 	intel_drrs_connector_debugfs_add(connector);
1518 	intel_pps_connector_debugfs_add(connector);
1519 	intel_psr_connector_debugfs_add(connector);
1520 	intel_alpm_lobf_debugfs_add(connector);
1521 	intel_dp_link_training_debugfs_add(connector);
1522 
1523 	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1524 	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1525 	    connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1526 		debugfs_create_file("i915_hdcp_sink_capability", 0444, root,
1527 				    connector, &i915_hdcp_sink_capability_fops);
1528 	}
1529 
1530 	if (DISPLAY_VER(i915) >= 11 &&
1531 	    ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) ||
1532 	     connector_type == DRM_MODE_CONNECTOR_eDP)) {
1533 		debugfs_create_file("i915_dsc_fec_support", 0644, root,
1534 				    connector, &i915_dsc_fec_support_fops);
1535 
1536 		debugfs_create_file("i915_dsc_bpc", 0644, root,
1537 				    connector, &i915_dsc_bpc_fops);
1538 
1539 		debugfs_create_file("i915_dsc_output_format", 0644, root,
1540 				    connector, &i915_dsc_output_format_fops);
1541 
1542 		debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1543 				    connector, &i915_dsc_fractional_bpp_fops);
1544 	}
1545 
1546 	if (DISPLAY_VER(i915) >= 11 &&
1547 	    (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1548 	     connector_type == DRM_MODE_CONNECTOR_eDP)) {
1549 		debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,
1550 				    &connector->force_bigjoiner_enable);
1551 	}
1552 
1553 	if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1554 	    connector_type == DRM_MODE_CONNECTOR_eDP ||
1555 	    connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1556 	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1557 	    connector_type == DRM_MODE_CONNECTOR_HDMIB)
1558 		debugfs_create_file("i915_lpsp_capability", 0444, root,
1559 				    connector, &i915_lpsp_capability_fops);
1560 }
1561 
1562 /**
1563  * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1564  * @crtc: pointer to a drm_crtc
1565  *
1566  * Failure to add debugfs entries should generally be ignored.
1567  */
1568 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1569 {
1570 	struct dentry *root = crtc->base.debugfs_entry;
1571 
1572 	if (!root)
1573 		return;
1574 
1575 	crtc_updates_add(crtc);
1576 	intel_drrs_crtc_debugfs_add(crtc);
1577 	intel_fbc_crtc_debugfs_add(crtc);
1578 	hsw_ips_crtc_debugfs_add(crtc);
1579 
1580 	debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1581 			    &i915_current_bpc_fops);
1582 	debugfs_create_file("i915_pipe", 0444, root, crtc,
1583 			    &intel_crtc_pipe_fops);
1584 }
1585