1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/debugfs.h> 7 #include <linux/string_choices.h> 8 #include <linux/string_helpers.h> 9 10 #include <drm/drm_debugfs.h> 11 #include <drm/drm_drv.h> 12 #include <drm/drm_edid.h> 13 #include <drm/drm_file.h> 14 #include <drm/drm_fourcc.h> 15 #include <drm/drm_print.h> 16 #include <drm/intel/intel_gmd_misc_regs.h> 17 18 #include "hsw_ips.h" 19 #include "i9xx_wm_regs.h" 20 #include "intel_alpm.h" 21 #include "intel_bo.h" 22 #include "intel_crtc.h" 23 #include "intel_crtc_state_dump.h" 24 #include "intel_de.h" 25 #include "intel_display_debugfs.h" 26 #include "intel_display_debugfs_params.h" 27 #include "intel_display_power.h" 28 #include "intel_display_power_well.h" 29 #include "intel_display_regs.h" 30 #include "intel_display_reset.h" 31 #include "intel_display_rpm.h" 32 #include "intel_display_types.h" 33 #include "intel_dmc.h" 34 #include "intel_dp.h" 35 #include "intel_dp_link_training.h" 36 #include "intel_dp_mst.h" 37 #include "intel_dp_test.h" 38 #include "intel_drrs.h" 39 #include "intel_fb.h" 40 #include "intel_fbc.h" 41 #include "intel_fbdev.h" 42 #include "intel_hdcp.h" 43 #include "intel_hdmi.h" 44 #include "intel_hotplug.h" 45 #include "intel_link_bw.h" 46 #include "intel_panel.h" 47 #include "intel_pps.h" 48 #include "intel_psr.h" 49 #include "intel_psr_regs.h" 50 #include "intel_vdsc.h" 51 #include "intel_wm.h" 52 #include "intel_tc.h" 53 54 static struct intel_display *node_to_intel_display(struct drm_info_node *node) 55 { 56 return to_intel_display(node->minor->dev); 57 } 58 59 static int intel_display_caps(struct seq_file *m, void *data) 60 { 61 struct intel_display *display = node_to_intel_display(m->private); 62 struct drm_printer p = drm_seq_file_printer(m); 63 64 drm_printf(&p, "PCH type: %d\n", INTEL_PCH_TYPE(display)); 65 66 intel_display_device_info_print(DISPLAY_INFO(display), 67 DISPLAY_RUNTIME_INFO(display), &p); 68 intel_display_params_dump(&display->params, display->drm->driver->name, &p); 69 70 return 0; 71 } 72 73 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 74 { 75 struct intel_display *display = node_to_intel_display(m->private); 76 77 spin_lock(&display->fb_tracking.lock); 78 79 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 80 display->fb_tracking.busy_bits); 81 82 spin_unlock(&display->fb_tracking.lock); 83 84 return 0; 85 } 86 87 static int i915_sr_status(struct seq_file *m, void *unused) 88 { 89 struct intel_display *display = node_to_intel_display(m->private); 90 struct ref_tracker *wakeref; 91 bool sr_enabled = false; 92 93 wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT); 94 95 if (DISPLAY_VER(display) >= 9) 96 /* no global SR status; inspect per-plane WM */; 97 else if (HAS_PCH_SPLIT(display)) 98 sr_enabled = intel_de_read(display, WM1_LP_ILK) & WM_LP_ENABLE; 99 else if (display->platform.i965gm || display->platform.g4x || 100 display->platform.i945g || display->platform.i945gm) 101 sr_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN; 102 else if (display->platform.i915gm) 103 sr_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN; 104 else if (display->platform.pineview) 105 sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN; 106 else if (display->platform.valleyview || display->platform.cherryview) 107 sr_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 108 109 intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref); 110 111 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 112 113 return 0; 114 } 115 116 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 117 { 118 struct intel_display *display = node_to_intel_display(m->private); 119 struct intel_framebuffer *fbdev_fb = NULL; 120 struct drm_framebuffer *drm_fb; 121 122 fbdev_fb = intel_fbdev_framebuffer(display->fbdev.fbdev); 123 if (fbdev_fb) { 124 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 125 fbdev_fb->base.width, 126 fbdev_fb->base.height, 127 fbdev_fb->base.format->depth, 128 fbdev_fb->base.format->cpp[0] * 8, 129 fbdev_fb->base.modifier, 130 drm_framebuffer_read_refcount(&fbdev_fb->base)); 131 intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base)); 132 seq_putc(m, '\n'); 133 } 134 135 mutex_lock(&display->drm->mode_config.fb_lock); 136 drm_for_each_fb(drm_fb, display->drm) { 137 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 138 if (fb == fbdev_fb) 139 continue; 140 141 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 142 fb->base.width, 143 fb->base.height, 144 fb->base.format->depth, 145 fb->base.format->cpp[0] * 8, 146 fb->base.modifier, 147 drm_framebuffer_read_refcount(&fb->base)); 148 intel_bo_describe(m, intel_fb_bo(&fb->base)); 149 seq_putc(m, '\n'); 150 } 151 mutex_unlock(&display->drm->mode_config.fb_lock); 152 153 return 0; 154 } 155 156 static int i915_power_domain_info(struct seq_file *m, void *unused) 157 { 158 struct intel_display *display = node_to_intel_display(m->private); 159 160 intel_display_power_debug(display, m); 161 162 return 0; 163 } 164 165 static void intel_seq_print_mode(struct seq_file *m, int tabs, 166 const struct drm_display_mode *mode) 167 { 168 int i; 169 170 for (i = 0; i < tabs; i++) 171 seq_putc(m, '\t'); 172 173 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 174 } 175 176 static void intel_encoder_info(struct seq_file *m, 177 struct intel_crtc *crtc, 178 struct intel_encoder *encoder) 179 { 180 struct intel_display *display = node_to_intel_display(m->private); 181 struct drm_connector_list_iter conn_iter; 182 struct drm_connector *connector; 183 184 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 185 encoder->base.base.id, encoder->base.name); 186 187 drm_connector_list_iter_begin(display->drm, &conn_iter); 188 drm_for_each_connector_iter(connector, &conn_iter) { 189 const struct drm_connector_state *conn_state = 190 connector->state; 191 192 if (conn_state->best_encoder != &encoder->base) 193 continue; 194 195 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 196 connector->base.id, connector->name); 197 } 198 drm_connector_list_iter_end(&conn_iter); 199 } 200 201 static void intel_panel_info(struct seq_file *m, 202 struct intel_connector *connector) 203 { 204 const struct drm_display_mode *fixed_mode; 205 206 if (list_empty(&connector->panel.fixed_modes)) 207 return; 208 209 seq_puts(m, "\tfixed modes:\n"); 210 211 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 212 intel_seq_print_mode(m, 2, fixed_mode); 213 } 214 215 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 216 { 217 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 218 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 219 220 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 221 seq_printf(m, "\taudio support: %s\n", 222 str_yes_no(connector->base.display_info.has_audio)); 223 224 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 225 connector->detect_edid, &intel_dp->aux); 226 } 227 228 static void intel_dp_mst_info(struct seq_file *m, 229 struct intel_connector *connector) 230 { 231 bool has_audio = connector->base.display_info.has_audio; 232 233 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 234 } 235 236 static void intel_hdmi_info(struct seq_file *m, 237 struct intel_connector *connector) 238 { 239 bool has_audio = connector->base.display_info.has_audio; 240 241 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 242 } 243 244 static void intel_connector_info(struct seq_file *m, 245 struct drm_connector *connector) 246 { 247 struct intel_connector *intel_connector = to_intel_connector(connector); 248 const struct drm_display_mode *mode; 249 struct drm_printer p = drm_seq_file_printer(m); 250 struct intel_digital_port *dig_port = NULL; 251 252 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 253 connector->base.id, connector->name, 254 drm_get_connector_status_name(connector->status)); 255 256 if (connector->status == connector_status_disconnected) 257 return; 258 259 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 260 connector->display_info.width_mm, 261 connector->display_info.height_mm); 262 seq_printf(m, "\tsubpixel order: %s\n", 263 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 264 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 265 266 switch (connector->connector_type) { 267 case DRM_MODE_CONNECTOR_DisplayPort: 268 case DRM_MODE_CONNECTOR_eDP: 269 if (intel_connector->mst.dp) 270 intel_dp_mst_info(m, intel_connector); 271 else 272 intel_dp_info(m, intel_connector); 273 dig_port = dp_to_dig_port(intel_attached_dp(intel_connector)); 274 break; 275 case DRM_MODE_CONNECTOR_HDMIA: 276 intel_hdmi_info(m, intel_connector); 277 dig_port = hdmi_to_dig_port(intel_attached_hdmi(intel_connector)); 278 break; 279 default: 280 break; 281 } 282 283 if (dig_port != NULL && intel_encoder_is_tc(&dig_port->base)) 284 intel_tc_info(&p, dig_port); 285 286 intel_hdcp_info(m, intel_connector); 287 288 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 289 290 intel_panel_info(m, intel_connector); 291 292 seq_printf(m, "\tmodes:\n"); 293 list_for_each_entry(mode, &connector->modes, head) 294 intel_seq_print_mode(m, 2, mode); 295 } 296 297 static const char *plane_type(enum drm_plane_type type) 298 { 299 switch (type) { 300 case DRM_PLANE_TYPE_OVERLAY: 301 return "OVL"; 302 case DRM_PLANE_TYPE_PRIMARY: 303 return "PRI"; 304 case DRM_PLANE_TYPE_CURSOR: 305 return "CUR"; 306 /* 307 * Deliberately omitting default: to generate compiler warnings 308 * when a new drm_plane_type gets added. 309 */ 310 } 311 312 return "unknown"; 313 } 314 315 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 316 { 317 /* 318 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 319 * will print them all to visualize if the values are misused 320 */ 321 snprintf(buf, bufsize, 322 "%s%s%s%s%s%s(0x%08x)", 323 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 324 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 325 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 326 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 327 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 328 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 329 rotation); 330 } 331 332 static const char *plane_visibility(const struct intel_plane_state *plane_state) 333 { 334 if (plane_state->uapi.visible) 335 return "visible"; 336 337 if (plane_state->is_y_plane) 338 return "Y plane"; 339 340 return "hidden"; 341 } 342 343 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 344 { 345 const struct intel_plane_state *plane_state = 346 to_intel_plane_state(plane->base.state); 347 const struct drm_framebuffer *fb = plane_state->uapi.fb; 348 struct drm_rect src, dst; 349 char rot_str[48]; 350 351 src = drm_plane_state_src(&plane_state->uapi); 352 dst = drm_plane_state_dest(&plane_state->uapi); 353 354 plane_rotation(rot_str, sizeof(rot_str), 355 plane_state->uapi.rotation); 356 357 seq_puts(m, "\t\tuapi: [FB:"); 358 if (fb) 359 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 360 &fb->format->format, fb->modifier, fb->width, 361 fb->height); 362 else 363 seq_puts(m, "0] n/a,0x0,0x0,"); 364 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 365 ", rotation=%s\n", plane_visibility(plane_state), 366 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 367 368 if (plane_state->planar_linked_plane) 369 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 370 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 371 plane_state->is_y_plane ? "Y plane" : "UV plane"); 372 } 373 374 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 375 { 376 const struct intel_plane_state *plane_state = 377 to_intel_plane_state(plane->base.state); 378 const struct drm_framebuffer *fb = plane_state->hw.fb; 379 char rot_str[48]; 380 381 if (!fb) 382 return; 383 384 plane_rotation(rot_str, sizeof(rot_str), 385 plane_state->hw.rotation); 386 387 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 388 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 389 fb->base.id, &fb->format->format, 390 fb->modifier, fb->width, fb->height, 391 str_yes_no(plane_state->uapi.visible), 392 DRM_RECT_FP_ARG(&plane_state->uapi.src), 393 DRM_RECT_ARG(&plane_state->uapi.dst), 394 rot_str); 395 } 396 397 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 398 { 399 struct intel_display *display = node_to_intel_display(m->private); 400 struct intel_plane *plane; 401 402 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { 403 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 404 plane->base.base.id, plane->base.name, 405 plane_type(plane->base.type)); 406 intel_plane_uapi_info(m, plane); 407 intel_plane_hw_info(m, plane); 408 } 409 } 410 411 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 412 { 413 const struct intel_crtc_state *crtc_state = 414 to_intel_crtc_state(crtc->base.state); 415 int num_scalers = crtc->num_scalers; 416 int i; 417 418 /* Not all platforms have a scaler */ 419 if (num_scalers) { 420 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d sharpness_strength=%d", 421 num_scalers, 422 crtc_state->scaler_state.scaler_users, 423 crtc_state->scaler_state.scaler_id, 424 crtc_state->hw.scaling_filter, 425 crtc_state->hw.sharpness_strength); 426 427 for (i = 0; i < num_scalers; i++) { 428 const struct intel_scaler *sc = 429 &crtc_state->scaler_state.scalers[i]; 430 431 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 432 i, str_yes_no(sc->in_use), sc->mode); 433 } 434 seq_puts(m, "\n"); 435 } else { 436 seq_puts(m, "\tNo scalers available on this platform\n"); 437 } 438 } 439 440 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 441 static void crtc_updates_info(struct seq_file *m, 442 struct intel_crtc *crtc, 443 const char *hdr) 444 { 445 u64 count; 446 int row; 447 448 count = 0; 449 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 450 count += crtc->debug.vbl.times[row]; 451 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 452 if (!count) 453 return; 454 455 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 456 char columns[80] = " |"; 457 unsigned int x; 458 459 if (row & 1) { 460 const char *units; 461 462 if (row > 10) { 463 x = 1000000; 464 units = "ms"; 465 } else { 466 x = 1000; 467 units = "us"; 468 } 469 470 snprintf(columns, sizeof(columns), "%4ld%s |", 471 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 472 } 473 474 if (crtc->debug.vbl.times[row]) { 475 x = ilog2(crtc->debug.vbl.times[row]); 476 memset(columns + 8, '*', x); 477 columns[8 + x] = '\0'; 478 } 479 480 seq_printf(m, "%s%s\n", hdr, columns); 481 } 482 483 seq_printf(m, "%sMin update: %lluns\n", 484 hdr, crtc->debug.vbl.min); 485 seq_printf(m, "%sMax update: %lluns\n", 486 hdr, crtc->debug.vbl.max); 487 seq_printf(m, "%sAverage update: %lluns\n", 488 hdr, div64_u64(crtc->debug.vbl.sum, count)); 489 seq_printf(m, "%sOverruns > %uus: %u\n", 490 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 491 } 492 493 static int crtc_updates_show(struct seq_file *m, void *data) 494 { 495 crtc_updates_info(m, m->private, ""); 496 return 0; 497 } 498 499 static int crtc_updates_open(struct inode *inode, struct file *file) 500 { 501 return single_open(file, crtc_updates_show, inode->i_private); 502 } 503 504 static ssize_t crtc_updates_write(struct file *file, 505 const char __user *ubuf, 506 size_t len, loff_t *offp) 507 { 508 struct seq_file *m = file->private_data; 509 struct intel_crtc *crtc = m->private; 510 511 /* May race with an update. Meh. */ 512 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 513 514 return len; 515 } 516 517 static const struct file_operations crtc_updates_fops = { 518 .owner = THIS_MODULE, 519 .open = crtc_updates_open, 520 .read = seq_read, 521 .llseek = seq_lseek, 522 .release = single_release, 523 .write = crtc_updates_write 524 }; 525 526 static void crtc_updates_add(struct intel_crtc *crtc) 527 { 528 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 529 crtc, &crtc_updates_fops); 530 } 531 532 #else 533 static void crtc_updates_info(struct seq_file *m, 534 struct intel_crtc *crtc, 535 const char *hdr) 536 { 537 } 538 539 static void crtc_updates_add(struct intel_crtc *crtc) 540 { 541 } 542 #endif 543 544 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 545 { 546 struct intel_display *display = node_to_intel_display(m->private); 547 struct drm_printer p = drm_seq_file_printer(m); 548 const struct intel_crtc_state *crtc_state = 549 to_intel_crtc_state(crtc->base.state); 550 struct intel_encoder *encoder; 551 552 seq_printf(m, "[CRTC:%d:%s]:\n", 553 crtc->base.base.id, crtc->base.name); 554 555 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 556 str_yes_no(crtc_state->uapi.enable), 557 str_yes_no(crtc_state->uapi.active), 558 DRM_MODE_ARG(&crtc_state->uapi.mode)); 559 560 seq_printf(m, "\thw: enable=%s, active=%s\n", 561 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 562 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 563 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 564 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 565 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 566 567 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 568 DRM_RECT_ARG(&crtc_state->pipe_src), 569 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 570 seq_printf(m, "\tport_clock=%d, lane_count=%d\n", 571 crtc_state->port_clock, crtc_state->lane_count); 572 573 intel_scaler_info(m, crtc); 574 575 if (crtc_state->joiner_pipes) 576 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 577 crtc_state->joiner_pipes, 578 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); 579 580 intel_vdsc_state_dump(&p, 1, crtc_state); 581 582 for_each_intel_encoder_mask(display->drm, encoder, 583 crtc_state->uapi.encoder_mask) 584 intel_encoder_info(m, crtc, encoder); 585 586 intel_plane_info(m, crtc); 587 588 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 589 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 590 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 591 592 crtc_updates_info(m, crtc, "\t"); 593 } 594 595 static int i915_display_info(struct seq_file *m, void *unused) 596 { 597 struct intel_display *display = node_to_intel_display(m->private); 598 struct intel_crtc *crtc; 599 struct drm_connector *connector; 600 struct drm_connector_list_iter conn_iter; 601 struct ref_tracker *wakeref; 602 603 wakeref = intel_display_rpm_get(display); 604 605 drm_modeset_lock_all(display->drm); 606 607 seq_printf(m, "CRTC info\n"); 608 seq_printf(m, "---------\n"); 609 for_each_intel_crtc(display->drm, crtc) 610 intel_crtc_info(m, crtc); 611 612 seq_printf(m, "\n"); 613 seq_printf(m, "Connector info\n"); 614 seq_printf(m, "--------------\n"); 615 drm_connector_list_iter_begin(display->drm, &conn_iter); 616 drm_for_each_connector_iter(connector, &conn_iter) 617 intel_connector_info(m, connector); 618 drm_connector_list_iter_end(&conn_iter); 619 620 drm_modeset_unlock_all(display->drm); 621 622 intel_display_rpm_put(display, wakeref); 623 624 return 0; 625 } 626 627 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 628 { 629 struct intel_display *display = node_to_intel_display(m->private); 630 struct drm_printer p = drm_seq_file_printer(m); 631 struct intel_dpll *pll; 632 int i; 633 634 drm_modeset_lock_all(display->drm); 635 636 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 637 display->dpll.ref_clks.nssc, 638 display->dpll.ref_clks.ssc); 639 640 for_each_dpll(display, pll, i) { 641 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 642 pll->info->name, pll->info->id); 643 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 644 pll->state.pipe_mask, pll->active_mask, 645 str_yes_no(pll->on)); 646 drm_printf(&p, " tracked hardware state:\n"); 647 intel_dpll_dump_hw_state(display, &p, &pll->state.hw_state); 648 } 649 drm_modeset_unlock_all(display->drm); 650 651 return 0; 652 } 653 654 static int i915_ddb_info(struct seq_file *m, void *unused) 655 { 656 struct intel_display *display = node_to_intel_display(m->private); 657 struct skl_ddb_entry *entry; 658 struct intel_crtc *crtc; 659 660 if (DISPLAY_VER(display) < 9) 661 return -ENODEV; 662 663 drm_modeset_lock_all(display->drm); 664 665 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 666 667 for_each_intel_crtc(display->drm, crtc) { 668 struct intel_crtc_state *crtc_state = 669 to_intel_crtc_state(crtc->base.state); 670 enum pipe pipe = crtc->pipe; 671 enum plane_id plane_id; 672 673 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 674 675 for_each_plane_id_on_crtc(crtc, plane_id) { 676 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 677 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 678 entry->start, entry->end, 679 skl_ddb_entry_size(entry)); 680 } 681 682 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 683 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 684 entry->end, skl_ddb_entry_size(entry)); 685 } 686 687 drm_modeset_unlock_all(display->drm); 688 689 return 0; 690 } 691 692 static bool 693 intel_lpsp_power_well_enabled(struct intel_display *display, 694 enum i915_power_well_id power_well_id) 695 { 696 bool is_enabled; 697 698 with_intel_display_rpm(display) 699 is_enabled = intel_display_power_well_is_enabled(display, 700 power_well_id); 701 702 return is_enabled; 703 } 704 705 static int i915_lpsp_status(struct seq_file *m, void *unused) 706 { 707 struct intel_display *display = node_to_intel_display(m->private); 708 bool lpsp_enabled = false; 709 710 if (DISPLAY_VER(display) >= 13 || IS_DISPLAY_VER(display, 9, 10)) { 711 lpsp_enabled = !intel_lpsp_power_well_enabled(display, SKL_DISP_PW_2); 712 } else if (IS_DISPLAY_VER(display, 11, 12)) { 713 lpsp_enabled = !intel_lpsp_power_well_enabled(display, ICL_DISP_PW_3); 714 } else if (display->platform.haswell || display->platform.broadwell) { 715 lpsp_enabled = !intel_lpsp_power_well_enabled(display, HSW_DISP_PW_GLOBAL); 716 } else { 717 seq_puts(m, "LPSP: not supported\n"); 718 return 0; 719 } 720 721 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 722 723 return 0; 724 } 725 726 static int i915_dp_mst_info(struct seq_file *m, void *unused) 727 { 728 struct intel_display *display = node_to_intel_display(m->private); 729 struct intel_encoder *intel_encoder; 730 struct intel_digital_port *dig_port; 731 struct drm_connector *connector; 732 struct drm_connector_list_iter conn_iter; 733 734 drm_connector_list_iter_begin(display->drm, &conn_iter); 735 drm_for_each_connector_iter(connector, &conn_iter) { 736 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 737 continue; 738 739 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 740 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 741 continue; 742 743 dig_port = enc_to_dig_port(intel_encoder); 744 if (!intel_dp_mst_source_support(&dig_port->dp)) 745 continue; 746 747 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 748 dig_port->base.base.base.id, 749 dig_port->base.base.name); 750 drm_dp_mst_dump_topology(m, &dig_port->dp.mst.mgr); 751 } 752 drm_connector_list_iter_end(&conn_iter); 753 754 return 0; 755 } 756 757 static ssize_t 758 i915_fifo_underrun_reset_write(struct file *filp, 759 const char __user *ubuf, 760 size_t cnt, loff_t *ppos) 761 { 762 struct intel_display *display = filp->private_data; 763 struct intel_crtc *crtc; 764 int ret; 765 bool reset; 766 767 ret = kstrtobool_from_user(ubuf, cnt, &reset); 768 if (ret) 769 return ret; 770 771 if (!reset) 772 return cnt; 773 774 for_each_intel_crtc(display->drm, crtc) { 775 struct drm_crtc_commit *commit; 776 struct intel_crtc_state *crtc_state; 777 778 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 779 if (ret) 780 return ret; 781 782 crtc_state = to_intel_crtc_state(crtc->base.state); 783 commit = crtc_state->uapi.commit; 784 if (commit) { 785 ret = wait_for_completion_interruptible(&commit->hw_done); 786 if (!ret) 787 ret = wait_for_completion_interruptible(&commit->flip_done); 788 } 789 790 if (!ret && crtc_state->hw.active) { 791 drm_dbg_kms(display->drm, 792 "Re-arming FIFO underruns on pipe %c\n", 793 pipe_name(crtc->pipe)); 794 795 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 796 } 797 798 drm_modeset_unlock(&crtc->base.mutex); 799 800 if (ret) 801 return ret; 802 } 803 804 intel_fbc_reset_underrun(display); 805 806 return cnt; 807 } 808 809 static const struct file_operations i915_fifo_underrun_reset_ops = { 810 .owner = THIS_MODULE, 811 .open = simple_open, 812 .write = i915_fifo_underrun_reset_write, 813 .llseek = default_llseek, 814 }; 815 816 static const struct drm_info_list intel_display_debugfs_list[] = { 817 {"intel_display_caps", intel_display_caps, 0}, 818 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 819 {"i915_sr_status", i915_sr_status, 0}, 820 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 821 {"i915_power_domain_info", i915_power_domain_info, 0}, 822 {"i915_display_info", i915_display_info, 0}, 823 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 824 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 825 {"i915_ddb_info", i915_ddb_info, 0}, 826 {"i915_lpsp_status", i915_lpsp_status, 0}, 827 }; 828 829 void intel_display_debugfs_register(struct intel_display *display) 830 { 831 struct dentry *debugfs_root = display->drm->debugfs_root; 832 833 debugfs_create_file("i915_fifo_underrun_reset", 0644, debugfs_root, 834 display, &i915_fifo_underrun_reset_ops); 835 836 drm_debugfs_create_files(intel_display_debugfs_list, 837 ARRAY_SIZE(intel_display_debugfs_list), 838 debugfs_root, display->drm->primary); 839 840 intel_bios_debugfs_register(display); 841 intel_cdclk_debugfs_register(display); 842 intel_display_reset_debugfs_register(display); 843 intel_dmc_debugfs_register(display); 844 intel_dp_test_debugfs_register(display); 845 intel_fbc_debugfs_register(display); 846 intel_hpd_debugfs_register(display); 847 intel_opregion_debugfs_register(display); 848 intel_psr_debugfs_register(display); 849 intel_wm_debugfs_register(display); 850 intel_display_debugfs_params(display); 851 } 852 853 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 854 { 855 struct intel_connector *connector = m->private; 856 struct intel_display *display = to_intel_display(connector); 857 struct intel_encoder *encoder = intel_attached_encoder(connector); 858 int connector_type = connector->base.connector_type; 859 bool lpsp_capable = false; 860 861 if (!encoder) 862 return -ENODEV; 863 864 if (connector->base.status != connector_status_connected) 865 return -ENODEV; 866 867 if (DISPLAY_VER(display) >= 13) 868 lpsp_capable = encoder->port <= PORT_B; 869 else if (DISPLAY_VER(display) >= 12) 870 /* 871 * Actually TGL can drive LPSP on port till DDI_C 872 * but there is no physical connected DDI_C on TGL sku's, 873 * even driver is not initializing DDI_C port for gen12. 874 */ 875 lpsp_capable = encoder->port <= PORT_B; 876 else if (DISPLAY_VER(display) == 11) 877 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 878 connector_type == DRM_MODE_CONNECTOR_eDP); 879 else if (IS_DISPLAY_VER(display, 9, 10)) 880 lpsp_capable = (encoder->port == PORT_A && 881 (connector_type == DRM_MODE_CONNECTOR_DSI || 882 connector_type == DRM_MODE_CONNECTOR_eDP || 883 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 884 else if (display->platform.haswell || display->platform.broadwell) 885 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 886 887 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 888 889 return 0; 890 } 891 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 892 893 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 894 { 895 struct intel_connector *connector = m->private; 896 struct intel_display *display = to_intel_display(connector); 897 struct drm_crtc *crtc; 898 struct intel_dp *intel_dp; 899 struct drm_modeset_acquire_ctx ctx; 900 struct intel_crtc_state *crtc_state = NULL; 901 int ret = 0; 902 bool try_again = false; 903 904 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 905 906 do { 907 try_again = false; 908 ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, 909 &ctx); 910 if (ret) { 911 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 912 try_again = true; 913 continue; 914 } 915 break; 916 } 917 crtc = connector->base.state->crtc; 918 if (connector->base.status != connector_status_connected || !crtc) { 919 ret = -ENODEV; 920 break; 921 } 922 ret = drm_modeset_lock(&crtc->mutex, &ctx); 923 if (ret == -EDEADLK) { 924 ret = drm_modeset_backoff(&ctx); 925 if (!ret) { 926 try_again = true; 927 continue; 928 } 929 break; 930 } else if (ret) { 931 break; 932 } 933 intel_dp = intel_attached_dp(connector); 934 crtc_state = to_intel_crtc_state(crtc->state); 935 seq_printf(m, "DSC_Enabled: %s\n", 936 str_yes_no(crtc_state->dsc.compression_enable)); 937 seq_printf(m, "DSC_Sink_Support: %s\n", 938 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 939 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 940 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 941 DP_DSC_RGB)), 942 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 943 DP_DSC_YCbCr420_Native)), 944 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 945 DP_DSC_YCbCr444))); 946 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 947 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 948 seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n", 949 drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), intel_dp_is_edp(intel_dp))); 950 seq_printf(m, "Force_DSC_Enable: %s\n", 951 str_yes_no(intel_dp->force_dsc_en)); 952 if (!intel_dp_is_edp(intel_dp)) 953 seq_printf(m, "FEC_Sink_Support: %s\n", 954 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 955 } while (try_again); 956 957 drm_modeset_drop_locks(&ctx); 958 drm_modeset_acquire_fini(&ctx); 959 960 return ret; 961 } 962 963 static ssize_t i915_dsc_fec_support_write(struct file *file, 964 const char __user *ubuf, 965 size_t len, loff_t *offp) 966 { 967 struct seq_file *m = file->private_data; 968 struct intel_connector *connector = m->private; 969 struct intel_display *display = to_intel_display(connector); 970 struct intel_encoder *encoder = intel_attached_encoder(connector); 971 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 972 bool dsc_enable = false; 973 int ret; 974 975 if (len == 0) 976 return 0; 977 978 drm_dbg(display->drm, 979 "Copied %zu bytes from user to force DSC\n", len); 980 981 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 982 if (ret < 0) 983 return ret; 984 985 drm_dbg(display->drm, "Got %s for DSC Enable\n", 986 str_true_false(dsc_enable)); 987 intel_dp->force_dsc_en = dsc_enable; 988 989 *offp += len; 990 return len; 991 } 992 993 static int i915_dsc_fec_support_open(struct inode *inode, 994 struct file *file) 995 { 996 return single_open(file, i915_dsc_fec_support_show, 997 inode->i_private); 998 } 999 1000 static const struct file_operations i915_dsc_fec_support_fops = { 1001 .owner = THIS_MODULE, 1002 .open = i915_dsc_fec_support_open, 1003 .read = seq_read, 1004 .llseek = seq_lseek, 1005 .release = single_release, 1006 .write = i915_dsc_fec_support_write 1007 }; 1008 1009 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1010 { 1011 struct intel_connector *connector = m->private; 1012 struct intel_display *display = to_intel_display(connector); 1013 struct intel_encoder *encoder = intel_attached_encoder(connector); 1014 struct drm_crtc *crtc; 1015 struct intel_crtc_state *crtc_state; 1016 int ret; 1017 1018 if (!encoder) 1019 return -ENODEV; 1020 1021 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1022 if (ret) 1023 return ret; 1024 1025 crtc = connector->base.state->crtc; 1026 if (connector->base.status != connector_status_connected || !crtc) { 1027 ret = -ENODEV; 1028 goto out; 1029 } 1030 1031 crtc_state = to_intel_crtc_state(crtc->state); 1032 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1033 1034 out: drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1035 1036 return ret; 1037 } 1038 1039 static ssize_t i915_dsc_bpc_write(struct file *file, 1040 const char __user *ubuf, 1041 size_t len, loff_t *offp) 1042 { 1043 struct seq_file *m = file->private_data; 1044 struct intel_connector *connector = m->private; 1045 struct intel_encoder *encoder = intel_attached_encoder(connector); 1046 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1047 int dsc_bpc = 0; 1048 int ret; 1049 1050 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1051 if (ret < 0) 1052 return ret; 1053 1054 intel_dp->force_dsc_bpc = dsc_bpc; 1055 *offp += len; 1056 1057 return len; 1058 } 1059 1060 static int i915_dsc_bpc_open(struct inode *inode, 1061 struct file *file) 1062 { 1063 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1064 } 1065 1066 static const struct file_operations i915_dsc_bpc_fops = { 1067 .owner = THIS_MODULE, 1068 .open = i915_dsc_bpc_open, 1069 .read = seq_read, 1070 .llseek = seq_lseek, 1071 .release = single_release, 1072 .write = i915_dsc_bpc_write 1073 }; 1074 1075 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1076 { 1077 struct intel_connector *connector = m->private; 1078 struct intel_display *display = to_intel_display(connector); 1079 struct intel_encoder *encoder = intel_attached_encoder(connector); 1080 struct drm_crtc *crtc; 1081 struct intel_crtc_state *crtc_state; 1082 int ret; 1083 1084 if (!encoder) 1085 return -ENODEV; 1086 1087 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1088 if (ret) 1089 return ret; 1090 1091 crtc = connector->base.state->crtc; 1092 if (connector->base.status != connector_status_connected || !crtc) { 1093 ret = -ENODEV; 1094 goto out; 1095 } 1096 1097 crtc_state = to_intel_crtc_state(crtc->state); 1098 seq_printf(m, "DSC_Output_Format: %s\n", 1099 intel_output_format_name(crtc_state->output_format)); 1100 1101 out: drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1102 1103 return ret; 1104 } 1105 1106 static ssize_t i915_dsc_output_format_write(struct file *file, 1107 const char __user *ubuf, 1108 size_t len, loff_t *offp) 1109 { 1110 struct seq_file *m = file->private_data; 1111 struct intel_connector *connector = m->private; 1112 struct intel_encoder *encoder = intel_attached_encoder(connector); 1113 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1114 int dsc_output_format = 0; 1115 int ret; 1116 1117 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1118 if (ret < 0) 1119 return ret; 1120 1121 intel_dp->force_dsc_output_format = dsc_output_format; 1122 *offp += len; 1123 1124 return len; 1125 } 1126 1127 static int i915_dsc_output_format_open(struct inode *inode, 1128 struct file *file) 1129 { 1130 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1131 } 1132 1133 static const struct file_operations i915_dsc_output_format_fops = { 1134 .owner = THIS_MODULE, 1135 .open = i915_dsc_output_format_open, 1136 .read = seq_read, 1137 .llseek = seq_lseek, 1138 .release = single_release, 1139 .write = i915_dsc_output_format_write 1140 }; 1141 1142 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1143 { 1144 struct intel_connector *connector = m->private; 1145 struct intel_display *display = to_intel_display(connector); 1146 struct intel_encoder *encoder = intel_attached_encoder(connector); 1147 struct drm_crtc *crtc; 1148 struct intel_dp *intel_dp; 1149 int ret; 1150 1151 if (!encoder) 1152 return -ENODEV; 1153 1154 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1155 if (ret) 1156 return ret; 1157 1158 crtc = connector->base.state->crtc; 1159 if (connector->base.status != connector_status_connected || !crtc) { 1160 ret = -ENODEV; 1161 goto out; 1162 } 1163 1164 intel_dp = intel_attached_dp(connector); 1165 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1166 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1167 1168 out: 1169 drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1170 1171 return ret; 1172 } 1173 1174 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1175 const char __user *ubuf, 1176 size_t len, loff_t *offp) 1177 { 1178 struct seq_file *m = file->private_data; 1179 struct intel_connector *connector = m->private; 1180 struct intel_display *display = to_intel_display(connector); 1181 struct intel_encoder *encoder = intel_attached_encoder(connector); 1182 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1183 bool dsc_fractional_bpp_enable = false; 1184 int ret; 1185 1186 if (len == 0) 1187 return 0; 1188 1189 drm_dbg(display->drm, 1190 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1191 1192 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1193 if (ret < 0) 1194 return ret; 1195 1196 drm_dbg(display->drm, "Got %s for DSC Fractional BPP Enable\n", 1197 str_true_false(dsc_fractional_bpp_enable)); 1198 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1199 1200 *offp += len; 1201 1202 return len; 1203 } 1204 1205 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1206 struct file *file) 1207 { 1208 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1209 } 1210 1211 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1212 .owner = THIS_MODULE, 1213 .open = i915_dsc_fractional_bpp_open, 1214 .read = seq_read, 1215 .llseek = seq_lseek, 1216 .release = single_release, 1217 .write = i915_dsc_fractional_bpp_write 1218 }; 1219 1220 /* 1221 * Returns the Current CRTC's bpc. 1222 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1223 */ 1224 static int i915_current_bpc_show(struct seq_file *m, void *data) 1225 { 1226 struct intel_crtc *crtc = m->private; 1227 struct intel_crtc_state *crtc_state; 1228 int ret; 1229 1230 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1231 if (ret) 1232 return ret; 1233 1234 crtc_state = to_intel_crtc_state(crtc->base.state); 1235 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1236 1237 drm_modeset_unlock(&crtc->base.mutex); 1238 1239 return ret; 1240 } 1241 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1242 1243 /* Pipe may differ from crtc index if pipes are fused off */ 1244 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1245 { 1246 struct intel_crtc *crtc = m->private; 1247 1248 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1249 1250 return 0; 1251 } 1252 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1253 1254 static int i915_joiner_show(struct seq_file *m, void *data) 1255 { 1256 struct intel_connector *connector = m->private; 1257 1258 seq_printf(m, "%d\n", connector->force_joined_pipes); 1259 1260 return 0; 1261 } 1262 1263 static ssize_t i915_joiner_write(struct file *file, 1264 const char __user *ubuf, 1265 size_t len, loff_t *offp) 1266 { 1267 struct seq_file *m = file->private_data; 1268 struct intel_connector *connector = m->private; 1269 struct intel_display *display = to_intel_display(connector); 1270 int force_joined_pipes = 0; 1271 int ret; 1272 1273 if (len == 0) 1274 return 0; 1275 1276 ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes); 1277 if (ret < 0) 1278 return ret; 1279 1280 switch (force_joined_pipes) { 1281 case 0: 1282 case 1: 1283 case 2: 1284 connector->force_joined_pipes = force_joined_pipes; 1285 break; 1286 case 4: 1287 if (HAS_ULTRAJOINER(display)) { 1288 connector->force_joined_pipes = force_joined_pipes; 1289 break; 1290 } 1291 1292 fallthrough; 1293 default: 1294 return -EINVAL; 1295 } 1296 1297 *offp += len; 1298 1299 return len; 1300 } 1301 1302 static int i915_joiner_open(struct inode *inode, struct file *file) 1303 { 1304 return single_open(file, i915_joiner_show, inode->i_private); 1305 } 1306 1307 static const struct file_operations i915_joiner_fops = { 1308 .owner = THIS_MODULE, 1309 .open = i915_joiner_open, 1310 .read = seq_read, 1311 .llseek = seq_lseek, 1312 .release = single_release, 1313 .write = i915_joiner_write 1314 }; 1315 1316 /** 1317 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1318 * @connector: pointer to a registered intel_connector 1319 * 1320 * Cleanup will be done by drm_connector_unregister() through a call to 1321 * drm_debugfs_connector_remove(). 1322 */ 1323 void intel_connector_debugfs_add(struct intel_connector *connector) 1324 { 1325 struct intel_display *display = to_intel_display(connector); 1326 struct dentry *root = connector->base.debugfs_entry; 1327 int connector_type = connector->base.connector_type; 1328 1329 /* The connector must have been registered beforehands. */ 1330 if (!root) 1331 return; 1332 1333 intel_drrs_connector_debugfs_add(connector); 1334 intel_hdcp_connector_debugfs_add(connector); 1335 intel_pps_connector_debugfs_add(connector); 1336 intel_psr_connector_debugfs_add(connector); 1337 intel_alpm_lobf_debugfs_add(connector); 1338 intel_dp_link_training_debugfs_add(connector); 1339 intel_link_bw_connector_debugfs_add(connector); 1340 1341 if (DISPLAY_VER(display) >= 11 && 1342 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst.dp) || 1343 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1344 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1345 connector, &i915_dsc_fec_support_fops); 1346 1347 debugfs_create_file("i915_dsc_bpc", 0644, root, 1348 connector, &i915_dsc_bpc_fops); 1349 1350 debugfs_create_file("i915_dsc_output_format", 0644, root, 1351 connector, &i915_dsc_output_format_fops); 1352 1353 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1354 connector, &i915_dsc_fractional_bpp_fops); 1355 } 1356 1357 if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1358 connector_type == DRM_MODE_CONNECTOR_eDP) && 1359 intel_dp_has_joiner(intel_attached_dp(connector))) { 1360 debugfs_create_file("i915_joiner_force_enable", 0644, root, 1361 connector, &i915_joiner_fops); 1362 } 1363 1364 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1365 connector_type == DRM_MODE_CONNECTOR_eDP || 1366 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1367 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1368 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1369 debugfs_create_file("i915_lpsp_capability", 0444, root, 1370 connector, &i915_lpsp_capability_fops); 1371 } 1372 1373 /** 1374 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1375 * @crtc: pointer to a drm_crtc 1376 * 1377 * Failure to add debugfs entries should generally be ignored. 1378 */ 1379 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1380 { 1381 struct dentry *root = crtc->base.debugfs_entry; 1382 1383 if (!root) 1384 return; 1385 1386 crtc_updates_add(crtc); 1387 intel_drrs_crtc_debugfs_add(crtc); 1388 intel_fbc_crtc_debugfs_add(crtc); 1389 hsw_ips_crtc_debugfs_add(crtc); 1390 1391 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1392 &i915_current_bpc_fops); 1393 debugfs_create_file("i915_pipe", 0444, root, crtc, 1394 &intel_crtc_pipe_fops); 1395 } 1396