1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/debugfs.h> 7 #include <linux/string_helpers.h> 8 9 #include <drm/drm_debugfs.h> 10 #include <drm/drm_edid.h> 11 #include <drm/drm_fourcc.h> 12 13 #include "hsw_ips.h" 14 #include "i915_debugfs.h" 15 #include "i915_irq.h" 16 #include "i915_reg.h" 17 #include "intel_alpm.h" 18 #include "intel_crtc.h" 19 #include "intel_crtc_state_dump.h" 20 #include "intel_de.h" 21 #include "intel_display_debugfs.h" 22 #include "intel_display_debugfs_params.h" 23 #include "intel_display_power.h" 24 #include "intel_display_power_well.h" 25 #include "intel_display_types.h" 26 #include "intel_dmc.h" 27 #include "intel_dp.h" 28 #include "intel_dp_link_training.h" 29 #include "intel_dp_mst.h" 30 #include "intel_drrs.h" 31 #include "intel_fb.h" 32 #include "intel_fbc.h" 33 #include "intel_fbdev.h" 34 #include "intel_hdcp.h" 35 #include "intel_hdmi.h" 36 #include "intel_hotplug.h" 37 #include "intel_panel.h" 38 #include "intel_pps.h" 39 #include "intel_psr.h" 40 #include "intel_psr_regs.h" 41 #include "intel_vdsc.h" 42 #include "intel_wm.h" 43 44 static struct intel_display *node_to_intel_display(struct drm_info_node *node) 45 { 46 return to_intel_display(node->minor->dev); 47 } 48 49 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 50 { 51 return to_i915(node->minor->dev); 52 } 53 54 static int intel_display_caps(struct seq_file *m, void *data) 55 { 56 struct intel_display *display = node_to_intel_display(m->private); 57 struct drm_printer p = drm_seq_file_printer(m); 58 59 intel_display_device_info_print(DISPLAY_INFO(display), 60 DISPLAY_RUNTIME_INFO(display), &p); 61 intel_display_params_dump(&display->params, display->drm->driver->name, &p); 62 63 return 0; 64 } 65 66 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 67 { 68 struct drm_i915_private *dev_priv = node_to_i915(m->private); 69 70 spin_lock(&dev_priv->display.fb_tracking.lock); 71 72 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 73 dev_priv->display.fb_tracking.busy_bits); 74 75 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 76 dev_priv->display.fb_tracking.flip_bits); 77 78 spin_unlock(&dev_priv->display.fb_tracking.lock); 79 80 return 0; 81 } 82 83 static int i915_sr_status(struct seq_file *m, void *unused) 84 { 85 struct drm_i915_private *dev_priv = node_to_i915(m->private); 86 intel_wakeref_t wakeref; 87 bool sr_enabled = false; 88 89 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 90 91 if (DISPLAY_VER(dev_priv) >= 9) 92 /* no global SR status; inspect per-plane WM */; 93 else if (HAS_PCH_SPLIT(dev_priv)) 94 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 95 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 96 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 97 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 98 else if (IS_I915GM(dev_priv)) 99 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 100 else if (IS_PINEVIEW(dev_priv)) 101 sr_enabled = intel_de_read(dev_priv, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN; 102 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 103 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 104 105 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 106 107 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 108 109 return 0; 110 } 111 112 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 113 { 114 struct drm_i915_private *dev_priv = node_to_i915(m->private); 115 struct intel_framebuffer *fbdev_fb = NULL; 116 struct drm_framebuffer *drm_fb; 117 118 #ifdef CONFIG_DRM_FBDEV_EMULATION 119 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 120 if (fbdev_fb) { 121 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 122 fbdev_fb->base.width, 123 fbdev_fb->base.height, 124 fbdev_fb->base.format->depth, 125 fbdev_fb->base.format->cpp[0] * 8, 126 fbdev_fb->base.modifier, 127 drm_framebuffer_read_refcount(&fbdev_fb->base)); 128 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 129 seq_putc(m, '\n'); 130 } 131 #endif 132 133 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 134 drm_for_each_fb(drm_fb, &dev_priv->drm) { 135 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 136 if (fb == fbdev_fb) 137 continue; 138 139 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 140 fb->base.width, 141 fb->base.height, 142 fb->base.format->depth, 143 fb->base.format->cpp[0] * 8, 144 fb->base.modifier, 145 drm_framebuffer_read_refcount(&fb->base)); 146 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 147 seq_putc(m, '\n'); 148 } 149 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 150 151 return 0; 152 } 153 154 static int i915_power_domain_info(struct seq_file *m, void *unused) 155 { 156 struct drm_i915_private *i915 = node_to_i915(m->private); 157 158 intel_display_power_debug(i915, m); 159 160 return 0; 161 } 162 163 static void intel_seq_print_mode(struct seq_file *m, int tabs, 164 const struct drm_display_mode *mode) 165 { 166 int i; 167 168 for (i = 0; i < tabs; i++) 169 seq_putc(m, '\t'); 170 171 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 172 } 173 174 static void intel_encoder_info(struct seq_file *m, 175 struct intel_crtc *crtc, 176 struct intel_encoder *encoder) 177 { 178 struct drm_i915_private *dev_priv = node_to_i915(m->private); 179 struct drm_connector_list_iter conn_iter; 180 struct drm_connector *connector; 181 182 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 183 encoder->base.base.id, encoder->base.name); 184 185 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 186 drm_for_each_connector_iter(connector, &conn_iter) { 187 const struct drm_connector_state *conn_state = 188 connector->state; 189 190 if (conn_state->best_encoder != &encoder->base) 191 continue; 192 193 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 194 connector->base.id, connector->name); 195 } 196 drm_connector_list_iter_end(&conn_iter); 197 } 198 199 static void intel_panel_info(struct seq_file *m, 200 struct intel_connector *connector) 201 { 202 const struct drm_display_mode *fixed_mode; 203 204 if (list_empty(&connector->panel.fixed_modes)) 205 return; 206 207 seq_puts(m, "\tfixed modes:\n"); 208 209 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 210 intel_seq_print_mode(m, 2, fixed_mode); 211 } 212 213 static void intel_hdcp_info(struct seq_file *m, 214 struct intel_connector *intel_connector, 215 bool remote_req) 216 { 217 bool hdcp_cap = false, hdcp2_cap = false; 218 219 if (!intel_connector->hdcp.shim) { 220 seq_puts(m, "No Connector Support"); 221 goto out; 222 } 223 224 if (remote_req) { 225 intel_hdcp_get_remote_capability(intel_connector, 226 &hdcp_cap, 227 &hdcp2_cap); 228 } else { 229 hdcp_cap = intel_hdcp_get_capability(intel_connector); 230 hdcp2_cap = intel_hdcp2_get_capability(intel_connector); 231 } 232 233 if (hdcp_cap) 234 seq_puts(m, "HDCP1.4 "); 235 if (hdcp2_cap) 236 seq_puts(m, "HDCP2.2 "); 237 238 if (!hdcp_cap && !hdcp2_cap) 239 seq_puts(m, "None"); 240 241 out: 242 seq_puts(m, "\n"); 243 } 244 245 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 246 { 247 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 248 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 249 250 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 251 seq_printf(m, "\taudio support: %s\n", 252 str_yes_no(connector->base.display_info.has_audio)); 253 254 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 255 connector->detect_edid, &intel_dp->aux); 256 } 257 258 static void intel_dp_mst_info(struct seq_file *m, 259 struct intel_connector *connector) 260 { 261 bool has_audio = connector->base.display_info.has_audio; 262 263 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 264 } 265 266 static void intel_hdmi_info(struct seq_file *m, 267 struct intel_connector *connector) 268 { 269 bool has_audio = connector->base.display_info.has_audio; 270 271 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 272 } 273 274 static void intel_connector_info(struct seq_file *m, 275 struct drm_connector *connector) 276 { 277 struct intel_connector *intel_connector = to_intel_connector(connector); 278 const struct drm_display_mode *mode; 279 280 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 281 connector->base.id, connector->name, 282 drm_get_connector_status_name(connector->status)); 283 284 if (connector->status == connector_status_disconnected) 285 return; 286 287 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 288 connector->display_info.width_mm, 289 connector->display_info.height_mm); 290 seq_printf(m, "\tsubpixel order: %s\n", 291 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 292 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 293 294 switch (connector->connector_type) { 295 case DRM_MODE_CONNECTOR_DisplayPort: 296 case DRM_MODE_CONNECTOR_eDP: 297 if (intel_connector->mst_port) 298 intel_dp_mst_info(m, intel_connector); 299 else 300 intel_dp_info(m, intel_connector); 301 break; 302 case DRM_MODE_CONNECTOR_HDMIA: 303 intel_hdmi_info(m, intel_connector); 304 break; 305 default: 306 break; 307 } 308 309 seq_puts(m, "\tHDCP version: "); 310 if (intel_connector->mst_port) { 311 intel_hdcp_info(m, intel_connector, true); 312 seq_puts(m, "\tMST Hub HDCP version: "); 313 } 314 intel_hdcp_info(m, intel_connector, false); 315 316 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 317 318 intel_panel_info(m, intel_connector); 319 320 seq_printf(m, "\tmodes:\n"); 321 list_for_each_entry(mode, &connector->modes, head) 322 intel_seq_print_mode(m, 2, mode); 323 } 324 325 static const char *plane_type(enum drm_plane_type type) 326 { 327 switch (type) { 328 case DRM_PLANE_TYPE_OVERLAY: 329 return "OVL"; 330 case DRM_PLANE_TYPE_PRIMARY: 331 return "PRI"; 332 case DRM_PLANE_TYPE_CURSOR: 333 return "CUR"; 334 /* 335 * Deliberately omitting default: to generate compiler warnings 336 * when a new drm_plane_type gets added. 337 */ 338 } 339 340 return "unknown"; 341 } 342 343 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 344 { 345 /* 346 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 347 * will print them all to visualize if the values are misused 348 */ 349 snprintf(buf, bufsize, 350 "%s%s%s%s%s%s(0x%08x)", 351 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 352 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 353 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 354 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 355 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 356 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 357 rotation); 358 } 359 360 static const char *plane_visibility(const struct intel_plane_state *plane_state) 361 { 362 if (plane_state->uapi.visible) 363 return "visible"; 364 365 if (plane_state->planar_slave) 366 return "planar-slave"; 367 368 return "hidden"; 369 } 370 371 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 372 { 373 const struct intel_plane_state *plane_state = 374 to_intel_plane_state(plane->base.state); 375 const struct drm_framebuffer *fb = plane_state->uapi.fb; 376 struct drm_rect src, dst; 377 char rot_str[48]; 378 379 src = drm_plane_state_src(&plane_state->uapi); 380 dst = drm_plane_state_dest(&plane_state->uapi); 381 382 plane_rotation(rot_str, sizeof(rot_str), 383 plane_state->uapi.rotation); 384 385 seq_puts(m, "\t\tuapi: [FB:"); 386 if (fb) 387 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 388 &fb->format->format, fb->modifier, fb->width, 389 fb->height); 390 else 391 seq_puts(m, "0] n/a,0x0,0x0,"); 392 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 393 ", rotation=%s\n", plane_visibility(plane_state), 394 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 395 396 if (plane_state->planar_linked_plane) 397 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 398 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 399 plane_state->planar_slave ? "slave" : "master"); 400 } 401 402 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 403 { 404 const struct intel_plane_state *plane_state = 405 to_intel_plane_state(plane->base.state); 406 const struct drm_framebuffer *fb = plane_state->hw.fb; 407 char rot_str[48]; 408 409 if (!fb) 410 return; 411 412 plane_rotation(rot_str, sizeof(rot_str), 413 plane_state->hw.rotation); 414 415 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 416 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 417 fb->base.id, &fb->format->format, 418 fb->modifier, fb->width, fb->height, 419 str_yes_no(plane_state->uapi.visible), 420 DRM_RECT_FP_ARG(&plane_state->uapi.src), 421 DRM_RECT_ARG(&plane_state->uapi.dst), 422 rot_str); 423 } 424 425 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 426 { 427 struct drm_i915_private *dev_priv = node_to_i915(m->private); 428 struct intel_plane *plane; 429 430 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 431 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 432 plane->base.base.id, plane->base.name, 433 plane_type(plane->base.type)); 434 intel_plane_uapi_info(m, plane); 435 intel_plane_hw_info(m, plane); 436 } 437 } 438 439 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 440 { 441 const struct intel_crtc_state *crtc_state = 442 to_intel_crtc_state(crtc->base.state); 443 int num_scalers = crtc->num_scalers; 444 int i; 445 446 /* Not all platforms have a scaler */ 447 if (num_scalers) { 448 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 449 num_scalers, 450 crtc_state->scaler_state.scaler_users, 451 crtc_state->scaler_state.scaler_id, 452 crtc_state->hw.scaling_filter); 453 454 for (i = 0; i < num_scalers; i++) { 455 const struct intel_scaler *sc = 456 &crtc_state->scaler_state.scalers[i]; 457 458 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 459 i, str_yes_no(sc->in_use), sc->mode); 460 } 461 seq_puts(m, "\n"); 462 } else { 463 seq_puts(m, "\tNo scalers available on this platform\n"); 464 } 465 } 466 467 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 468 static void crtc_updates_info(struct seq_file *m, 469 struct intel_crtc *crtc, 470 const char *hdr) 471 { 472 u64 count; 473 int row; 474 475 count = 0; 476 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 477 count += crtc->debug.vbl.times[row]; 478 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 479 if (!count) 480 return; 481 482 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 483 char columns[80] = " |"; 484 unsigned int x; 485 486 if (row & 1) { 487 const char *units; 488 489 if (row > 10) { 490 x = 1000000; 491 units = "ms"; 492 } else { 493 x = 1000; 494 units = "us"; 495 } 496 497 snprintf(columns, sizeof(columns), "%4ld%s |", 498 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 499 } 500 501 if (crtc->debug.vbl.times[row]) { 502 x = ilog2(crtc->debug.vbl.times[row]); 503 memset(columns + 8, '*', x); 504 columns[8 + x] = '\0'; 505 } 506 507 seq_printf(m, "%s%s\n", hdr, columns); 508 } 509 510 seq_printf(m, "%sMin update: %lluns\n", 511 hdr, crtc->debug.vbl.min); 512 seq_printf(m, "%sMax update: %lluns\n", 513 hdr, crtc->debug.vbl.max); 514 seq_printf(m, "%sAverage update: %lluns\n", 515 hdr, div64_u64(crtc->debug.vbl.sum, count)); 516 seq_printf(m, "%sOverruns > %uus: %u\n", 517 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 518 } 519 520 static int crtc_updates_show(struct seq_file *m, void *data) 521 { 522 crtc_updates_info(m, m->private, ""); 523 return 0; 524 } 525 526 static int crtc_updates_open(struct inode *inode, struct file *file) 527 { 528 return single_open(file, crtc_updates_show, inode->i_private); 529 } 530 531 static ssize_t crtc_updates_write(struct file *file, 532 const char __user *ubuf, 533 size_t len, loff_t *offp) 534 { 535 struct seq_file *m = file->private_data; 536 struct intel_crtc *crtc = m->private; 537 538 /* May race with an update. Meh. */ 539 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 540 541 return len; 542 } 543 544 static const struct file_operations crtc_updates_fops = { 545 .owner = THIS_MODULE, 546 .open = crtc_updates_open, 547 .read = seq_read, 548 .llseek = seq_lseek, 549 .release = single_release, 550 .write = crtc_updates_write 551 }; 552 553 static void crtc_updates_add(struct intel_crtc *crtc) 554 { 555 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 556 crtc, &crtc_updates_fops); 557 } 558 559 #else 560 static void crtc_updates_info(struct seq_file *m, 561 struct intel_crtc *crtc, 562 const char *hdr) 563 { 564 } 565 566 static void crtc_updates_add(struct intel_crtc *crtc) 567 { 568 } 569 #endif 570 571 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 572 { 573 struct drm_i915_private *dev_priv = node_to_i915(m->private); 574 struct drm_printer p = drm_seq_file_printer(m); 575 const struct intel_crtc_state *crtc_state = 576 to_intel_crtc_state(crtc->base.state); 577 struct intel_encoder *encoder; 578 579 seq_printf(m, "[CRTC:%d:%s]:\n", 580 crtc->base.base.id, crtc->base.name); 581 582 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 583 str_yes_no(crtc_state->uapi.enable), 584 str_yes_no(crtc_state->uapi.active), 585 DRM_MODE_ARG(&crtc_state->uapi.mode)); 586 587 seq_printf(m, "\thw: enable=%s, active=%s\n", 588 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 589 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 590 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 591 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 592 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 593 594 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 595 DRM_RECT_ARG(&crtc_state->pipe_src), 596 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 597 598 intel_scaler_info(m, crtc); 599 600 if (crtc_state->joiner_pipes) 601 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 602 crtc_state->joiner_pipes, 603 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); 604 605 intel_vdsc_state_dump(&p, 1, crtc_state); 606 607 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 608 crtc_state->uapi.encoder_mask) 609 intel_encoder_info(m, crtc, encoder); 610 611 intel_plane_info(m, crtc); 612 613 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 614 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 615 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 616 617 crtc_updates_info(m, crtc, "\t"); 618 } 619 620 static int i915_display_info(struct seq_file *m, void *unused) 621 { 622 struct drm_i915_private *dev_priv = node_to_i915(m->private); 623 struct intel_crtc *crtc; 624 struct drm_connector *connector; 625 struct drm_connector_list_iter conn_iter; 626 intel_wakeref_t wakeref; 627 628 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 629 630 drm_modeset_lock_all(&dev_priv->drm); 631 632 seq_printf(m, "CRTC info\n"); 633 seq_printf(m, "---------\n"); 634 for_each_intel_crtc(&dev_priv->drm, crtc) 635 intel_crtc_info(m, crtc); 636 637 seq_printf(m, "\n"); 638 seq_printf(m, "Connector info\n"); 639 seq_printf(m, "--------------\n"); 640 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 641 drm_for_each_connector_iter(connector, &conn_iter) 642 intel_connector_info(m, connector); 643 drm_connector_list_iter_end(&conn_iter); 644 645 drm_modeset_unlock_all(&dev_priv->drm); 646 647 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 648 649 return 0; 650 } 651 652 static int i915_display_capabilities(struct seq_file *m, void *unused) 653 { 654 struct drm_i915_private *i915 = node_to_i915(m->private); 655 struct drm_printer p = drm_seq_file_printer(m); 656 657 intel_display_device_info_print(DISPLAY_INFO(i915), 658 DISPLAY_RUNTIME_INFO(i915), &p); 659 660 return 0; 661 } 662 663 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 664 { 665 struct drm_i915_private *dev_priv = node_to_i915(m->private); 666 struct drm_printer p = drm_seq_file_printer(m); 667 struct intel_shared_dpll *pll; 668 int i; 669 670 drm_modeset_lock_all(&dev_priv->drm); 671 672 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 673 dev_priv->display.dpll.ref_clks.nssc, 674 dev_priv->display.dpll.ref_clks.ssc); 675 676 for_each_shared_dpll(dev_priv, pll, i) { 677 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 678 pll->info->name, pll->info->id); 679 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 680 pll->state.pipe_mask, pll->active_mask, 681 str_yes_no(pll->on)); 682 drm_printf(&p, " tracked hardware state:\n"); 683 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state); 684 } 685 drm_modeset_unlock_all(&dev_priv->drm); 686 687 return 0; 688 } 689 690 static int i915_ddb_info(struct seq_file *m, void *unused) 691 { 692 struct drm_i915_private *dev_priv = node_to_i915(m->private); 693 struct skl_ddb_entry *entry; 694 struct intel_crtc *crtc; 695 696 if (DISPLAY_VER(dev_priv) < 9) 697 return -ENODEV; 698 699 drm_modeset_lock_all(&dev_priv->drm); 700 701 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 702 703 for_each_intel_crtc(&dev_priv->drm, crtc) { 704 struct intel_crtc_state *crtc_state = 705 to_intel_crtc_state(crtc->base.state); 706 enum pipe pipe = crtc->pipe; 707 enum plane_id plane_id; 708 709 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 710 711 for_each_plane_id_on_crtc(crtc, plane_id) { 712 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 713 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 714 entry->start, entry->end, 715 skl_ddb_entry_size(entry)); 716 } 717 718 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 719 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 720 entry->end, skl_ddb_entry_size(entry)); 721 } 722 723 drm_modeset_unlock_all(&dev_priv->drm); 724 725 return 0; 726 } 727 728 static bool 729 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 730 enum i915_power_well_id power_well_id) 731 { 732 intel_wakeref_t wakeref; 733 bool is_enabled; 734 735 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 736 is_enabled = intel_display_power_well_is_enabled(i915, 737 power_well_id); 738 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 739 740 return is_enabled; 741 } 742 743 static int i915_lpsp_status(struct seq_file *m, void *unused) 744 { 745 struct drm_i915_private *i915 = node_to_i915(m->private); 746 bool lpsp_enabled = false; 747 748 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 749 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 750 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 751 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 752 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 753 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 754 } else { 755 seq_puts(m, "LPSP: not supported\n"); 756 return 0; 757 } 758 759 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 760 761 return 0; 762 } 763 764 static int i915_dp_mst_info(struct seq_file *m, void *unused) 765 { 766 struct drm_i915_private *dev_priv = node_to_i915(m->private); 767 struct intel_encoder *intel_encoder; 768 struct intel_digital_port *dig_port; 769 struct drm_connector *connector; 770 struct drm_connector_list_iter conn_iter; 771 772 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 773 drm_for_each_connector_iter(connector, &conn_iter) { 774 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 775 continue; 776 777 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 778 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 779 continue; 780 781 dig_port = enc_to_dig_port(intel_encoder); 782 if (!intel_dp_mst_source_support(&dig_port->dp)) 783 continue; 784 785 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 786 dig_port->base.base.base.id, 787 dig_port->base.base.name); 788 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 789 } 790 drm_connector_list_iter_end(&conn_iter); 791 792 return 0; 793 } 794 795 static ssize_t i915_displayport_test_active_write(struct file *file, 796 const char __user *ubuf, 797 size_t len, loff_t *offp) 798 { 799 char *input_buffer; 800 int status = 0; 801 struct drm_device *dev; 802 struct drm_connector *connector; 803 struct drm_connector_list_iter conn_iter; 804 struct intel_dp *intel_dp; 805 int val = 0; 806 807 dev = ((struct seq_file *)file->private_data)->private; 808 809 if (len == 0) 810 return 0; 811 812 input_buffer = memdup_user_nul(ubuf, len); 813 if (IS_ERR(input_buffer)) 814 return PTR_ERR(input_buffer); 815 816 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len); 817 818 drm_connector_list_iter_begin(dev, &conn_iter); 819 drm_for_each_connector_iter(connector, &conn_iter) { 820 struct intel_encoder *encoder; 821 822 if (connector->connector_type != 823 DRM_MODE_CONNECTOR_DisplayPort) 824 continue; 825 826 encoder = to_intel_encoder(connector->encoder); 827 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 828 continue; 829 830 if (encoder && connector->status == connector_status_connected) { 831 intel_dp = enc_to_intel_dp(encoder); 832 status = kstrtoint(input_buffer, 10, &val); 833 if (status < 0) 834 break; 835 drm_dbg(dev, "Got %d for test active\n", val); 836 /* To prevent erroneous activation of the compliance 837 * testing code, only accept an actual value of 1 here 838 */ 839 if (val == 1) 840 intel_dp->compliance.test_active = true; 841 else 842 intel_dp->compliance.test_active = false; 843 } 844 } 845 drm_connector_list_iter_end(&conn_iter); 846 kfree(input_buffer); 847 if (status < 0) 848 return status; 849 850 *offp += len; 851 return len; 852 } 853 854 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 855 { 856 struct drm_i915_private *dev_priv = m->private; 857 struct drm_connector *connector; 858 struct drm_connector_list_iter conn_iter; 859 struct intel_dp *intel_dp; 860 861 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 862 drm_for_each_connector_iter(connector, &conn_iter) { 863 struct intel_encoder *encoder; 864 865 if (connector->connector_type != 866 DRM_MODE_CONNECTOR_DisplayPort) 867 continue; 868 869 encoder = to_intel_encoder(connector->encoder); 870 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 871 continue; 872 873 if (encoder && connector->status == connector_status_connected) { 874 intel_dp = enc_to_intel_dp(encoder); 875 if (intel_dp->compliance.test_active) 876 seq_puts(m, "1"); 877 else 878 seq_puts(m, "0"); 879 } else 880 seq_puts(m, "0"); 881 } 882 drm_connector_list_iter_end(&conn_iter); 883 884 return 0; 885 } 886 887 static int i915_displayport_test_active_open(struct inode *inode, 888 struct file *file) 889 { 890 return single_open(file, i915_displayport_test_active_show, 891 inode->i_private); 892 } 893 894 static const struct file_operations i915_displayport_test_active_fops = { 895 .owner = THIS_MODULE, 896 .open = i915_displayport_test_active_open, 897 .read = seq_read, 898 .llseek = seq_lseek, 899 .release = single_release, 900 .write = i915_displayport_test_active_write 901 }; 902 903 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 904 { 905 struct drm_i915_private *dev_priv = m->private; 906 struct drm_connector *connector; 907 struct drm_connector_list_iter conn_iter; 908 struct intel_dp *intel_dp; 909 910 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 911 drm_for_each_connector_iter(connector, &conn_iter) { 912 struct intel_encoder *encoder; 913 914 if (connector->connector_type != 915 DRM_MODE_CONNECTOR_DisplayPort) 916 continue; 917 918 encoder = to_intel_encoder(connector->encoder); 919 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 920 continue; 921 922 if (encoder && connector->status == connector_status_connected) { 923 intel_dp = enc_to_intel_dp(encoder); 924 if (intel_dp->compliance.test_type == 925 DP_TEST_LINK_EDID_READ) 926 seq_printf(m, "%lx", 927 intel_dp->compliance.test_data.edid); 928 else if (intel_dp->compliance.test_type == 929 DP_TEST_LINK_VIDEO_PATTERN) { 930 seq_printf(m, "hdisplay: %d\n", 931 intel_dp->compliance.test_data.hdisplay); 932 seq_printf(m, "vdisplay: %d\n", 933 intel_dp->compliance.test_data.vdisplay); 934 seq_printf(m, "bpc: %u\n", 935 intel_dp->compliance.test_data.bpc); 936 } else if (intel_dp->compliance.test_type == 937 DP_TEST_LINK_PHY_TEST_PATTERN) { 938 seq_printf(m, "pattern: %d\n", 939 intel_dp->compliance.test_data.phytest.phy_pattern); 940 seq_printf(m, "Number of lanes: %d\n", 941 intel_dp->compliance.test_data.phytest.num_lanes); 942 seq_printf(m, "Link Rate: %d\n", 943 intel_dp->compliance.test_data.phytest.link_rate); 944 seq_printf(m, "level: %02x\n", 945 intel_dp->train_set[0]); 946 } 947 } else 948 seq_puts(m, "0"); 949 } 950 drm_connector_list_iter_end(&conn_iter); 951 952 return 0; 953 } 954 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 955 956 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 957 { 958 struct drm_i915_private *dev_priv = m->private; 959 struct drm_connector *connector; 960 struct drm_connector_list_iter conn_iter; 961 struct intel_dp *intel_dp; 962 963 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 964 drm_for_each_connector_iter(connector, &conn_iter) { 965 struct intel_encoder *encoder; 966 967 if (connector->connector_type != 968 DRM_MODE_CONNECTOR_DisplayPort) 969 continue; 970 971 encoder = to_intel_encoder(connector->encoder); 972 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 973 continue; 974 975 if (encoder && connector->status == connector_status_connected) { 976 intel_dp = enc_to_intel_dp(encoder); 977 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 978 } else 979 seq_puts(m, "0"); 980 } 981 drm_connector_list_iter_end(&conn_iter); 982 983 return 0; 984 } 985 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 986 987 static ssize_t 988 i915_fifo_underrun_reset_write(struct file *filp, 989 const char __user *ubuf, 990 size_t cnt, loff_t *ppos) 991 { 992 struct drm_i915_private *dev_priv = filp->private_data; 993 struct intel_crtc *crtc; 994 int ret; 995 bool reset; 996 997 ret = kstrtobool_from_user(ubuf, cnt, &reset); 998 if (ret) 999 return ret; 1000 1001 if (!reset) 1002 return cnt; 1003 1004 for_each_intel_crtc(&dev_priv->drm, crtc) { 1005 struct drm_crtc_commit *commit; 1006 struct intel_crtc_state *crtc_state; 1007 1008 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1009 if (ret) 1010 return ret; 1011 1012 crtc_state = to_intel_crtc_state(crtc->base.state); 1013 commit = crtc_state->uapi.commit; 1014 if (commit) { 1015 ret = wait_for_completion_interruptible(&commit->hw_done); 1016 if (!ret) 1017 ret = wait_for_completion_interruptible(&commit->flip_done); 1018 } 1019 1020 if (!ret && crtc_state->hw.active) { 1021 drm_dbg_kms(&dev_priv->drm, 1022 "Re-arming FIFO underruns on pipe %c\n", 1023 pipe_name(crtc->pipe)); 1024 1025 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1026 } 1027 1028 drm_modeset_unlock(&crtc->base.mutex); 1029 1030 if (ret) 1031 return ret; 1032 } 1033 1034 intel_fbc_reset_underrun(&dev_priv->display); 1035 1036 return cnt; 1037 } 1038 1039 static const struct file_operations i915_fifo_underrun_reset_ops = { 1040 .owner = THIS_MODULE, 1041 .open = simple_open, 1042 .write = i915_fifo_underrun_reset_write, 1043 .llseek = default_llseek, 1044 }; 1045 1046 static const struct drm_info_list intel_display_debugfs_list[] = { 1047 {"intel_display_caps", intel_display_caps, 0}, 1048 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1049 {"i915_sr_status", i915_sr_status, 0}, 1050 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1051 {"i915_power_domain_info", i915_power_domain_info, 0}, 1052 {"i915_display_info", i915_display_info, 0}, 1053 {"i915_display_capabilities", i915_display_capabilities, 0}, 1054 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1055 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1056 {"i915_ddb_info", i915_ddb_info, 0}, 1057 {"i915_lpsp_status", i915_lpsp_status, 0}, 1058 }; 1059 1060 static const struct { 1061 const char *name; 1062 const struct file_operations *fops; 1063 } intel_display_debugfs_files[] = { 1064 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1065 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1066 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1067 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1068 }; 1069 1070 void intel_display_debugfs_register(struct drm_i915_private *i915) 1071 { 1072 struct intel_display *display = &i915->display; 1073 struct drm_minor *minor = i915->drm.primary; 1074 int i; 1075 1076 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1077 debugfs_create_file(intel_display_debugfs_files[i].name, 1078 0644, 1079 minor->debugfs_root, 1080 to_i915(minor->dev), 1081 intel_display_debugfs_files[i].fops); 1082 } 1083 1084 drm_debugfs_create_files(intel_display_debugfs_list, 1085 ARRAY_SIZE(intel_display_debugfs_list), 1086 minor->debugfs_root, minor); 1087 1088 intel_bios_debugfs_register(display); 1089 intel_cdclk_debugfs_register(display); 1090 intel_dmc_debugfs_register(display); 1091 intel_fbc_debugfs_register(display); 1092 intel_hpd_debugfs_register(i915); 1093 intel_opregion_debugfs_register(display); 1094 intel_psr_debugfs_register(display); 1095 intel_wm_debugfs_register(i915); 1096 intel_display_debugfs_params(display); 1097 } 1098 1099 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1100 { 1101 struct intel_connector *connector = m->private; 1102 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1103 int ret; 1104 1105 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1106 if (ret) 1107 return ret; 1108 1109 if (!connector->base.encoder || 1110 connector->base.status != connector_status_connected) { 1111 ret = -ENODEV; 1112 goto out; 1113 } 1114 1115 seq_printf(m, "%s:%d HDCP version: ", connector->base.name, 1116 connector->base.base.id); 1117 intel_hdcp_info(m, connector, false); 1118 1119 out: 1120 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1121 1122 return ret; 1123 } 1124 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1125 1126 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1127 { 1128 struct intel_connector *connector = m->private; 1129 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1130 struct intel_encoder *encoder = intel_attached_encoder(connector); 1131 int connector_type = connector->base.connector_type; 1132 bool lpsp_capable = false; 1133 1134 if (!encoder) 1135 return -ENODEV; 1136 1137 if (connector->base.status != connector_status_connected) 1138 return -ENODEV; 1139 1140 if (DISPLAY_VER(i915) >= 13) 1141 lpsp_capable = encoder->port <= PORT_B; 1142 else if (DISPLAY_VER(i915) >= 12) 1143 /* 1144 * Actually TGL can drive LPSP on port till DDI_C 1145 * but there is no physical connected DDI_C on TGL sku's, 1146 * even driver is not initilizing DDI_C port for gen12. 1147 */ 1148 lpsp_capable = encoder->port <= PORT_B; 1149 else if (DISPLAY_VER(i915) == 11) 1150 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 1151 connector_type == DRM_MODE_CONNECTOR_eDP); 1152 else if (IS_DISPLAY_VER(i915, 9, 10)) 1153 lpsp_capable = (encoder->port == PORT_A && 1154 (connector_type == DRM_MODE_CONNECTOR_DSI || 1155 connector_type == DRM_MODE_CONNECTOR_eDP || 1156 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1157 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1158 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 1159 1160 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1161 1162 return 0; 1163 } 1164 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1165 1166 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1167 { 1168 struct intel_connector *connector = m->private; 1169 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1170 struct drm_crtc *crtc; 1171 struct intel_dp *intel_dp; 1172 struct drm_modeset_acquire_ctx ctx; 1173 struct intel_crtc_state *crtc_state = NULL; 1174 int ret = 0; 1175 bool try_again = false; 1176 1177 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1178 1179 do { 1180 try_again = false; 1181 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, 1182 &ctx); 1183 if (ret) { 1184 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1185 try_again = true; 1186 continue; 1187 } 1188 break; 1189 } 1190 crtc = connector->base.state->crtc; 1191 if (connector->base.status != connector_status_connected || !crtc) { 1192 ret = -ENODEV; 1193 break; 1194 } 1195 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1196 if (ret == -EDEADLK) { 1197 ret = drm_modeset_backoff(&ctx); 1198 if (!ret) { 1199 try_again = true; 1200 continue; 1201 } 1202 break; 1203 } else if (ret) { 1204 break; 1205 } 1206 intel_dp = intel_attached_dp(connector); 1207 crtc_state = to_intel_crtc_state(crtc->state); 1208 seq_printf(m, "DSC_Enabled: %s\n", 1209 str_yes_no(crtc_state->dsc.compression_enable)); 1210 seq_printf(m, "DSC_Sink_Support: %s\n", 1211 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 1212 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1213 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1214 DP_DSC_RGB)), 1215 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1216 DP_DSC_YCbCr420_Native)), 1217 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1218 DP_DSC_YCbCr444))); 1219 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 1220 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 1221 seq_printf(m, "Force_DSC_Enable: %s\n", 1222 str_yes_no(intel_dp->force_dsc_en)); 1223 if (!intel_dp_is_edp(intel_dp)) 1224 seq_printf(m, "FEC_Sink_Support: %s\n", 1225 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 1226 } while (try_again); 1227 1228 drm_modeset_drop_locks(&ctx); 1229 drm_modeset_acquire_fini(&ctx); 1230 1231 return ret; 1232 } 1233 1234 static ssize_t i915_dsc_fec_support_write(struct file *file, 1235 const char __user *ubuf, 1236 size_t len, loff_t *offp) 1237 { 1238 struct seq_file *m = file->private_data; 1239 struct intel_connector *connector = m->private; 1240 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1241 struct intel_encoder *encoder = intel_attached_encoder(connector); 1242 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1243 bool dsc_enable = false; 1244 int ret; 1245 1246 if (len == 0) 1247 return 0; 1248 1249 drm_dbg(&i915->drm, 1250 "Copied %zu bytes from user to force DSC\n", len); 1251 1252 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1253 if (ret < 0) 1254 return ret; 1255 1256 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1257 (dsc_enable) ? "true" : "false"); 1258 intel_dp->force_dsc_en = dsc_enable; 1259 1260 *offp += len; 1261 return len; 1262 } 1263 1264 static int i915_dsc_fec_support_open(struct inode *inode, 1265 struct file *file) 1266 { 1267 return single_open(file, i915_dsc_fec_support_show, 1268 inode->i_private); 1269 } 1270 1271 static const struct file_operations i915_dsc_fec_support_fops = { 1272 .owner = THIS_MODULE, 1273 .open = i915_dsc_fec_support_open, 1274 .read = seq_read, 1275 .llseek = seq_lseek, 1276 .release = single_release, 1277 .write = i915_dsc_fec_support_write 1278 }; 1279 1280 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1281 { 1282 struct intel_connector *connector = m->private; 1283 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1284 struct intel_encoder *encoder = intel_attached_encoder(connector); 1285 struct drm_crtc *crtc; 1286 struct intel_crtc_state *crtc_state; 1287 int ret; 1288 1289 if (!encoder) 1290 return -ENODEV; 1291 1292 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1293 if (ret) 1294 return ret; 1295 1296 crtc = connector->base.state->crtc; 1297 if (connector->base.status != connector_status_connected || !crtc) { 1298 ret = -ENODEV; 1299 goto out; 1300 } 1301 1302 crtc_state = to_intel_crtc_state(crtc->state); 1303 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1304 1305 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1306 1307 return ret; 1308 } 1309 1310 static ssize_t i915_dsc_bpc_write(struct file *file, 1311 const char __user *ubuf, 1312 size_t len, loff_t *offp) 1313 { 1314 struct seq_file *m = file->private_data; 1315 struct intel_connector *connector = m->private; 1316 struct intel_encoder *encoder = intel_attached_encoder(connector); 1317 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1318 int dsc_bpc = 0; 1319 int ret; 1320 1321 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1322 if (ret < 0) 1323 return ret; 1324 1325 intel_dp->force_dsc_bpc = dsc_bpc; 1326 *offp += len; 1327 1328 return len; 1329 } 1330 1331 static int i915_dsc_bpc_open(struct inode *inode, 1332 struct file *file) 1333 { 1334 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1335 } 1336 1337 static const struct file_operations i915_dsc_bpc_fops = { 1338 .owner = THIS_MODULE, 1339 .open = i915_dsc_bpc_open, 1340 .read = seq_read, 1341 .llseek = seq_lseek, 1342 .release = single_release, 1343 .write = i915_dsc_bpc_write 1344 }; 1345 1346 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1347 { 1348 struct intel_connector *connector = m->private; 1349 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1350 struct intel_encoder *encoder = intel_attached_encoder(connector); 1351 struct drm_crtc *crtc; 1352 struct intel_crtc_state *crtc_state; 1353 int ret; 1354 1355 if (!encoder) 1356 return -ENODEV; 1357 1358 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1359 if (ret) 1360 return ret; 1361 1362 crtc = connector->base.state->crtc; 1363 if (connector->base.status != connector_status_connected || !crtc) { 1364 ret = -ENODEV; 1365 goto out; 1366 } 1367 1368 crtc_state = to_intel_crtc_state(crtc->state); 1369 seq_printf(m, "DSC_Output_Format: %s\n", 1370 intel_output_format_name(crtc_state->output_format)); 1371 1372 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1373 1374 return ret; 1375 } 1376 1377 static ssize_t i915_dsc_output_format_write(struct file *file, 1378 const char __user *ubuf, 1379 size_t len, loff_t *offp) 1380 { 1381 struct seq_file *m = file->private_data; 1382 struct intel_connector *connector = m->private; 1383 struct intel_encoder *encoder = intel_attached_encoder(connector); 1384 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1385 int dsc_output_format = 0; 1386 int ret; 1387 1388 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1389 if (ret < 0) 1390 return ret; 1391 1392 intel_dp->force_dsc_output_format = dsc_output_format; 1393 *offp += len; 1394 1395 return len; 1396 } 1397 1398 static int i915_dsc_output_format_open(struct inode *inode, 1399 struct file *file) 1400 { 1401 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1402 } 1403 1404 static const struct file_operations i915_dsc_output_format_fops = { 1405 .owner = THIS_MODULE, 1406 .open = i915_dsc_output_format_open, 1407 .read = seq_read, 1408 .llseek = seq_lseek, 1409 .release = single_release, 1410 .write = i915_dsc_output_format_write 1411 }; 1412 1413 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1414 { 1415 struct intel_connector *connector = m->private; 1416 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1417 struct intel_encoder *encoder = intel_attached_encoder(connector); 1418 struct drm_crtc *crtc; 1419 struct intel_dp *intel_dp; 1420 int ret; 1421 1422 if (!encoder) 1423 return -ENODEV; 1424 1425 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1426 if (ret) 1427 return ret; 1428 1429 crtc = connector->base.state->crtc; 1430 if (connector->base.status != connector_status_connected || !crtc) { 1431 ret = -ENODEV; 1432 goto out; 1433 } 1434 1435 intel_dp = intel_attached_dp(connector); 1436 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1437 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1438 1439 out: 1440 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1441 1442 return ret; 1443 } 1444 1445 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1446 const char __user *ubuf, 1447 size_t len, loff_t *offp) 1448 { 1449 struct seq_file *m = file->private_data; 1450 struct intel_connector *connector = m->private; 1451 struct intel_encoder *encoder = intel_attached_encoder(connector); 1452 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1453 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1454 bool dsc_fractional_bpp_enable = false; 1455 int ret; 1456 1457 if (len == 0) 1458 return 0; 1459 1460 drm_dbg(&i915->drm, 1461 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1462 1463 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1464 if (ret < 0) 1465 return ret; 1466 1467 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n", 1468 (dsc_fractional_bpp_enable) ? "true" : "false"); 1469 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1470 1471 *offp += len; 1472 1473 return len; 1474 } 1475 1476 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1477 struct file *file) 1478 { 1479 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1480 } 1481 1482 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1483 .owner = THIS_MODULE, 1484 .open = i915_dsc_fractional_bpp_open, 1485 .read = seq_read, 1486 .llseek = seq_lseek, 1487 .release = single_release, 1488 .write = i915_dsc_fractional_bpp_write 1489 }; 1490 1491 /* 1492 * Returns the Current CRTC's bpc. 1493 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1494 */ 1495 static int i915_current_bpc_show(struct seq_file *m, void *data) 1496 { 1497 struct intel_crtc *crtc = m->private; 1498 struct intel_crtc_state *crtc_state; 1499 int ret; 1500 1501 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1502 if (ret) 1503 return ret; 1504 1505 crtc_state = to_intel_crtc_state(crtc->base.state); 1506 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1507 1508 drm_modeset_unlock(&crtc->base.mutex); 1509 1510 return ret; 1511 } 1512 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1513 1514 /* Pipe may differ from crtc index if pipes are fused off */ 1515 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1516 { 1517 struct intel_crtc *crtc = m->private; 1518 1519 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1520 1521 return 0; 1522 } 1523 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1524 1525 /** 1526 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1527 * @connector: pointer to a registered intel_connector 1528 * 1529 * Cleanup will be done by drm_connector_unregister() through a call to 1530 * drm_debugfs_connector_remove(). 1531 */ 1532 void intel_connector_debugfs_add(struct intel_connector *connector) 1533 { 1534 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1535 struct dentry *root = connector->base.debugfs_entry; 1536 int connector_type = connector->base.connector_type; 1537 1538 /* The connector must have been registered beforehands. */ 1539 if (!root) 1540 return; 1541 1542 intel_drrs_connector_debugfs_add(connector); 1543 intel_pps_connector_debugfs_add(connector); 1544 intel_psr_connector_debugfs_add(connector); 1545 intel_alpm_lobf_debugfs_add(connector); 1546 intel_dp_link_training_debugfs_add(connector); 1547 1548 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1549 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1550 connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1551 debugfs_create_file("i915_hdcp_sink_capability", 0444, root, 1552 connector, &i915_hdcp_sink_capability_fops); 1553 } 1554 1555 if (DISPLAY_VER(i915) >= 11 && 1556 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) || 1557 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1558 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1559 connector, &i915_dsc_fec_support_fops); 1560 1561 debugfs_create_file("i915_dsc_bpc", 0644, root, 1562 connector, &i915_dsc_bpc_fops); 1563 1564 debugfs_create_file("i915_dsc_output_format", 0644, root, 1565 connector, &i915_dsc_output_format_fops); 1566 1567 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1568 connector, &i915_dsc_fractional_bpp_fops); 1569 } 1570 1571 if (HAS_BIGJOINER(i915) && 1572 (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1573 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1574 debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root, 1575 &connector->force_bigjoiner_enable); 1576 } 1577 1578 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1579 connector_type == DRM_MODE_CONNECTOR_eDP || 1580 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1581 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1582 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1583 debugfs_create_file("i915_lpsp_capability", 0444, root, 1584 connector, &i915_lpsp_capability_fops); 1585 } 1586 1587 /** 1588 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1589 * @crtc: pointer to a drm_crtc 1590 * 1591 * Failure to add debugfs entries should generally be ignored. 1592 */ 1593 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1594 { 1595 struct dentry *root = crtc->base.debugfs_entry; 1596 1597 if (!root) 1598 return; 1599 1600 crtc_updates_add(crtc); 1601 intel_drrs_crtc_debugfs_add(crtc); 1602 intel_fbc_crtc_debugfs_add(crtc); 1603 hsw_ips_crtc_debugfs_add(crtc); 1604 1605 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1606 &i915_current_bpc_fops); 1607 debugfs_create_file("i915_pipe", 0444, root, crtc, 1608 &intel_crtc_pipe_fops); 1609 } 1610