xref: /linux/drivers/gpu/drm/i915/display/intel_display_debugfs.c (revision ab6a0edb7ded060e84dc1a24e3936c86c3d048b9)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2020 Intel Corporation
4  */
5 
6 #include <linux/string_helpers.h>
7 
8 #include <drm/drm_debugfs.h>
9 #include <drm/drm_edid.h>
10 #include <drm/drm_fourcc.h>
11 
12 #include "hsw_ips.h"
13 #include "i915_debugfs.h"
14 #include "i915_irq.h"
15 #include "i915_reg.h"
16 #include "intel_crtc.h"
17 #include "intel_de.h"
18 #include "intel_crtc_state_dump.h"
19 #include "intel_display_debugfs.h"
20 #include "intel_display_debugfs_params.h"
21 #include "intel_display_power.h"
22 #include "intel_display_power_well.h"
23 #include "intel_display_types.h"
24 #include "intel_dmc.h"
25 #include "intel_dp.h"
26 #include "intel_dp_mst.h"
27 #include "intel_drrs.h"
28 #include "intel_fbc.h"
29 #include "intel_fbdev.h"
30 #include "intel_hdcp.h"
31 #include "intel_hdmi.h"
32 #include "intel_hotplug.h"
33 #include "intel_panel.h"
34 #include "intel_pps.h"
35 #include "intel_psr.h"
36 #include "intel_psr_regs.h"
37 #include "intel_wm.h"
38 
39 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
40 {
41 	return to_i915(node->minor->dev);
42 }
43 
44 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
45 {
46 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
47 
48 	spin_lock(&dev_priv->display.fb_tracking.lock);
49 
50 	seq_printf(m, "FB tracking busy bits: 0x%08x\n",
51 		   dev_priv->display.fb_tracking.busy_bits);
52 
53 	seq_printf(m, "FB tracking flip bits: 0x%08x\n",
54 		   dev_priv->display.fb_tracking.flip_bits);
55 
56 	spin_unlock(&dev_priv->display.fb_tracking.lock);
57 
58 	return 0;
59 }
60 
61 static int i915_sr_status(struct seq_file *m, void *unused)
62 {
63 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
64 	intel_wakeref_t wakeref;
65 	bool sr_enabled = false;
66 
67 	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
68 
69 	if (DISPLAY_VER(dev_priv) >= 9)
70 		/* no global SR status; inspect per-plane WM */;
71 	else if (HAS_PCH_SPLIT(dev_priv))
72 		sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
73 	else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
74 		 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
75 		sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
76 	else if (IS_I915GM(dev_priv))
77 		sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
78 	else if (IS_PINEVIEW(dev_priv))
79 		sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
80 	else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
81 		sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
82 
83 	intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
84 
85 	seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
86 
87 	return 0;
88 }
89 
90 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
91 {
92 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
93 	struct intel_framebuffer *fbdev_fb = NULL;
94 	struct drm_framebuffer *drm_fb;
95 
96 #ifdef CONFIG_DRM_FBDEV_EMULATION
97 	fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
98 	if (fbdev_fb) {
99 		seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
100 			   fbdev_fb->base.width,
101 			   fbdev_fb->base.height,
102 			   fbdev_fb->base.format->depth,
103 			   fbdev_fb->base.format->cpp[0] * 8,
104 			   fbdev_fb->base.modifier,
105 			   drm_framebuffer_read_refcount(&fbdev_fb->base));
106 		i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
107 		seq_putc(m, '\n');
108 	}
109 #endif
110 
111 	mutex_lock(&dev_priv->drm.mode_config.fb_lock);
112 	drm_for_each_fb(drm_fb, &dev_priv->drm) {
113 		struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
114 		if (fb == fbdev_fb)
115 			continue;
116 
117 		seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
118 			   fb->base.width,
119 			   fb->base.height,
120 			   fb->base.format->depth,
121 			   fb->base.format->cpp[0] * 8,
122 			   fb->base.modifier,
123 			   drm_framebuffer_read_refcount(&fb->base));
124 		i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
125 		seq_putc(m, '\n');
126 	}
127 	mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
128 
129 	return 0;
130 }
131 
132 static int i915_power_domain_info(struct seq_file *m, void *unused)
133 {
134 	struct drm_i915_private *i915 = node_to_i915(m->private);
135 
136 	intel_display_power_debug(i915, m);
137 
138 	return 0;
139 }
140 
141 static void intel_seq_print_mode(struct seq_file *m, int tabs,
142 				 const struct drm_display_mode *mode)
143 {
144 	int i;
145 
146 	for (i = 0; i < tabs; i++)
147 		seq_putc(m, '\t');
148 
149 	seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
150 }
151 
152 static void intel_encoder_info(struct seq_file *m,
153 			       struct intel_crtc *crtc,
154 			       struct intel_encoder *encoder)
155 {
156 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
157 	struct drm_connector_list_iter conn_iter;
158 	struct drm_connector *connector;
159 
160 	seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
161 		   encoder->base.base.id, encoder->base.name);
162 
163 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
164 	drm_for_each_connector_iter(connector, &conn_iter) {
165 		const struct drm_connector_state *conn_state =
166 			connector->state;
167 
168 		if (conn_state->best_encoder != &encoder->base)
169 			continue;
170 
171 		seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
172 			   connector->base.id, connector->name);
173 	}
174 	drm_connector_list_iter_end(&conn_iter);
175 }
176 
177 static void intel_panel_info(struct seq_file *m,
178 			     struct intel_connector *connector)
179 {
180 	const struct drm_display_mode *fixed_mode;
181 
182 	if (list_empty(&connector->panel.fixed_modes))
183 		return;
184 
185 	seq_puts(m, "\tfixed modes:\n");
186 
187 	list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
188 		intel_seq_print_mode(m, 2, fixed_mode);
189 }
190 
191 static void intel_hdcp_info(struct seq_file *m,
192 			    struct intel_connector *intel_connector,
193 			    bool remote_req)
194 {
195 	bool hdcp_cap = false, hdcp2_cap = false;
196 
197 	if (!intel_connector->hdcp.shim) {
198 		seq_puts(m, "No Connector Support");
199 		goto out;
200 	}
201 
202 	if (remote_req) {
203 		intel_hdcp_get_remote_capability(intel_connector,
204 						 &hdcp_cap,
205 						 &hdcp2_cap);
206 	} else {
207 		hdcp_cap = intel_hdcp_get_capability(intel_connector);
208 		hdcp2_cap = intel_hdcp2_get_capability(intel_connector);
209 	}
210 
211 	if (hdcp_cap)
212 		seq_puts(m, "HDCP1.4 ");
213 	if (hdcp2_cap)
214 		seq_puts(m, "HDCP2.2 ");
215 
216 	if (!hdcp_cap && !hdcp2_cap)
217 		seq_puts(m, "None");
218 
219 out:
220 	seq_puts(m, "\n");
221 }
222 
223 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
224 {
225 	struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
226 	struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
227 
228 	seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
229 	seq_printf(m, "\taudio support: %s\n",
230 		   str_yes_no(connector->base.display_info.has_audio));
231 
232 	drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
233 				connector->detect_edid, &intel_dp->aux);
234 }
235 
236 static void intel_dp_mst_info(struct seq_file *m,
237 			      struct intel_connector *connector)
238 {
239 	bool has_audio = connector->base.display_info.has_audio;
240 
241 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
242 }
243 
244 static void intel_hdmi_info(struct seq_file *m,
245 			    struct intel_connector *connector)
246 {
247 	bool has_audio = connector->base.display_info.has_audio;
248 
249 	seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
250 }
251 
252 static void intel_connector_info(struct seq_file *m,
253 				 struct drm_connector *connector)
254 {
255 	struct intel_connector *intel_connector = to_intel_connector(connector);
256 	const struct drm_display_mode *mode;
257 
258 	seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
259 		   connector->base.id, connector->name,
260 		   drm_get_connector_status_name(connector->status));
261 
262 	if (connector->status == connector_status_disconnected)
263 		return;
264 
265 	seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
266 		   connector->display_info.width_mm,
267 		   connector->display_info.height_mm);
268 	seq_printf(m, "\tsubpixel order: %s\n",
269 		   drm_get_subpixel_order_name(connector->display_info.subpixel_order));
270 	seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
271 
272 	switch (connector->connector_type) {
273 	case DRM_MODE_CONNECTOR_DisplayPort:
274 	case DRM_MODE_CONNECTOR_eDP:
275 		if (intel_connector->mst_port)
276 			intel_dp_mst_info(m, intel_connector);
277 		else
278 			intel_dp_info(m, intel_connector);
279 		break;
280 	case DRM_MODE_CONNECTOR_HDMIA:
281 		intel_hdmi_info(m, intel_connector);
282 		break;
283 	default:
284 		break;
285 	}
286 
287 	seq_puts(m, "\tHDCP version: ");
288 	if (intel_connector->mst_port) {
289 		intel_hdcp_info(m, intel_connector, true);
290 		seq_puts(m, "\tMST Hub HDCP version: ");
291 	}
292 	intel_hdcp_info(m, intel_connector, false);
293 
294 	seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
295 
296 	intel_panel_info(m, intel_connector);
297 
298 	seq_printf(m, "\tmodes:\n");
299 	list_for_each_entry(mode, &connector->modes, head)
300 		intel_seq_print_mode(m, 2, mode);
301 }
302 
303 static const char *plane_type(enum drm_plane_type type)
304 {
305 	switch (type) {
306 	case DRM_PLANE_TYPE_OVERLAY:
307 		return "OVL";
308 	case DRM_PLANE_TYPE_PRIMARY:
309 		return "PRI";
310 	case DRM_PLANE_TYPE_CURSOR:
311 		return "CUR";
312 	/*
313 	 * Deliberately omitting default: to generate compiler warnings
314 	 * when a new drm_plane_type gets added.
315 	 */
316 	}
317 
318 	return "unknown";
319 }
320 
321 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
322 {
323 	/*
324 	 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
325 	 * will print them all to visualize if the values are misused
326 	 */
327 	snprintf(buf, bufsize,
328 		 "%s%s%s%s%s%s(0x%08x)",
329 		 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
330 		 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
331 		 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
332 		 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
333 		 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
334 		 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
335 		 rotation);
336 }
337 
338 static const char *plane_visibility(const struct intel_plane_state *plane_state)
339 {
340 	if (plane_state->uapi.visible)
341 		return "visible";
342 
343 	if (plane_state->planar_slave)
344 		return "planar-slave";
345 
346 	return "hidden";
347 }
348 
349 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
350 {
351 	const struct intel_plane_state *plane_state =
352 		to_intel_plane_state(plane->base.state);
353 	const struct drm_framebuffer *fb = plane_state->uapi.fb;
354 	struct drm_rect src, dst;
355 	char rot_str[48];
356 
357 	src = drm_plane_state_src(&plane_state->uapi);
358 	dst = drm_plane_state_dest(&plane_state->uapi);
359 
360 	plane_rotation(rot_str, sizeof(rot_str),
361 		       plane_state->uapi.rotation);
362 
363 	seq_puts(m, "\t\tuapi: [FB:");
364 	if (fb)
365 		seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
366 			   &fb->format->format, fb->modifier, fb->width,
367 			   fb->height);
368 	else
369 		seq_puts(m, "0] n/a,0x0,0x0,");
370 	seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
371 		   ", rotation=%s\n", plane_visibility(plane_state),
372 		   DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
373 
374 	if (plane_state->planar_linked_plane)
375 		seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
376 			   plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
377 			   plane_state->planar_slave ? "slave" : "master");
378 }
379 
380 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
381 {
382 	const struct intel_plane_state *plane_state =
383 		to_intel_plane_state(plane->base.state);
384 	const struct drm_framebuffer *fb = plane_state->hw.fb;
385 	char rot_str[48];
386 
387 	if (!fb)
388 		return;
389 
390 	plane_rotation(rot_str, sizeof(rot_str),
391 		       plane_state->hw.rotation);
392 
393 	seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
394 		   DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
395 		   fb->base.id, &fb->format->format,
396 		   fb->modifier, fb->width, fb->height,
397 		   str_yes_no(plane_state->uapi.visible),
398 		   DRM_RECT_FP_ARG(&plane_state->uapi.src),
399 		   DRM_RECT_ARG(&plane_state->uapi.dst),
400 		   rot_str);
401 }
402 
403 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
404 {
405 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
406 	struct intel_plane *plane;
407 
408 	for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
409 		seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
410 			   plane->base.base.id, plane->base.name,
411 			   plane_type(plane->base.type));
412 		intel_plane_uapi_info(m, plane);
413 		intel_plane_hw_info(m, plane);
414 	}
415 }
416 
417 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
418 {
419 	const struct intel_crtc_state *crtc_state =
420 		to_intel_crtc_state(crtc->base.state);
421 	int num_scalers = crtc->num_scalers;
422 	int i;
423 
424 	/* Not all platformas have a scaler */
425 	if (num_scalers) {
426 		seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
427 			   num_scalers,
428 			   crtc_state->scaler_state.scaler_users,
429 			   crtc_state->scaler_state.scaler_id,
430 			   crtc_state->hw.scaling_filter);
431 
432 		for (i = 0; i < num_scalers; i++) {
433 			const struct intel_scaler *sc =
434 				&crtc_state->scaler_state.scalers[i];
435 
436 			seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
437 				   i, str_yes_no(sc->in_use), sc->mode);
438 		}
439 		seq_puts(m, "\n");
440 	} else {
441 		seq_puts(m, "\tNo scalers available on this platform\n");
442 	}
443 }
444 
445 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
446 static void crtc_updates_info(struct seq_file *m,
447 			      struct intel_crtc *crtc,
448 			      const char *hdr)
449 {
450 	u64 count;
451 	int row;
452 
453 	count = 0;
454 	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
455 		count += crtc->debug.vbl.times[row];
456 	seq_printf(m, "%sUpdates: %llu\n", hdr, count);
457 	if (!count)
458 		return;
459 
460 	for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
461 		char columns[80] = "       |";
462 		unsigned int x;
463 
464 		if (row & 1) {
465 			const char *units;
466 
467 			if (row > 10) {
468 				x = 1000000;
469 				units = "ms";
470 			} else {
471 				x = 1000;
472 				units = "us";
473 			}
474 
475 			snprintf(columns, sizeof(columns), "%4ld%s |",
476 				 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
477 		}
478 
479 		if (crtc->debug.vbl.times[row]) {
480 			x = ilog2(crtc->debug.vbl.times[row]);
481 			memset(columns + 8, '*', x);
482 			columns[8 + x] = '\0';
483 		}
484 
485 		seq_printf(m, "%s%s\n", hdr, columns);
486 	}
487 
488 	seq_printf(m, "%sMin update: %lluns\n",
489 		   hdr, crtc->debug.vbl.min);
490 	seq_printf(m, "%sMax update: %lluns\n",
491 		   hdr, crtc->debug.vbl.max);
492 	seq_printf(m, "%sAverage update: %lluns\n",
493 		   hdr, div64_u64(crtc->debug.vbl.sum,  count));
494 	seq_printf(m, "%sOverruns > %uus: %u\n",
495 		   hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
496 }
497 
498 static int crtc_updates_show(struct seq_file *m, void *data)
499 {
500 	crtc_updates_info(m, m->private, "");
501 	return 0;
502 }
503 
504 static int crtc_updates_open(struct inode *inode, struct file *file)
505 {
506 	return single_open(file, crtc_updates_show, inode->i_private);
507 }
508 
509 static ssize_t crtc_updates_write(struct file *file,
510 				  const char __user *ubuf,
511 				  size_t len, loff_t *offp)
512 {
513 	struct seq_file *m = file->private_data;
514 	struct intel_crtc *crtc = m->private;
515 
516 	/* May race with an update. Meh. */
517 	memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
518 
519 	return len;
520 }
521 
522 static const struct file_operations crtc_updates_fops = {
523 	.owner = THIS_MODULE,
524 	.open = crtc_updates_open,
525 	.read = seq_read,
526 	.llseek = seq_lseek,
527 	.release = single_release,
528 	.write = crtc_updates_write
529 };
530 
531 static void crtc_updates_add(struct intel_crtc *crtc)
532 {
533 	debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
534 			    crtc, &crtc_updates_fops);
535 }
536 
537 #else
538 static void crtc_updates_info(struct seq_file *m,
539 			      struct intel_crtc *crtc,
540 			      const char *hdr)
541 {
542 }
543 
544 static void crtc_updates_add(struct intel_crtc *crtc)
545 {
546 }
547 #endif
548 
549 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
550 {
551 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
552 	const struct intel_crtc_state *crtc_state =
553 		to_intel_crtc_state(crtc->base.state);
554 	struct intel_encoder *encoder;
555 
556 	seq_printf(m, "[CRTC:%d:%s]:\n",
557 		   crtc->base.base.id, crtc->base.name);
558 
559 	seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
560 		   str_yes_no(crtc_state->uapi.enable),
561 		   str_yes_no(crtc_state->uapi.active),
562 		   DRM_MODE_ARG(&crtc_state->uapi.mode));
563 
564 	seq_printf(m, "\thw: enable=%s, active=%s\n",
565 		   str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
566 	seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
567 		   DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
568 	seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
569 		   DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
570 
571 	seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
572 		   DRM_RECT_ARG(&crtc_state->pipe_src),
573 		   str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
574 
575 	intel_scaler_info(m, crtc);
576 
577 	if (crtc_state->bigjoiner_pipes)
578 		seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
579 			   crtc_state->bigjoiner_pipes,
580 			   intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master");
581 
582 	for_each_intel_encoder_mask(&dev_priv->drm, encoder,
583 				    crtc_state->uapi.encoder_mask)
584 		intel_encoder_info(m, crtc, encoder);
585 
586 	intel_plane_info(m, crtc);
587 
588 	seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
589 		   str_yes_no(!crtc->cpu_fifo_underrun_disabled),
590 		   str_yes_no(!crtc->pch_fifo_underrun_disabled));
591 
592 	crtc_updates_info(m, crtc, "\t");
593 }
594 
595 static int i915_display_info(struct seq_file *m, void *unused)
596 {
597 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
598 	struct intel_crtc *crtc;
599 	struct drm_connector *connector;
600 	struct drm_connector_list_iter conn_iter;
601 	intel_wakeref_t wakeref;
602 
603 	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
604 
605 	drm_modeset_lock_all(&dev_priv->drm);
606 
607 	seq_printf(m, "CRTC info\n");
608 	seq_printf(m, "---------\n");
609 	for_each_intel_crtc(&dev_priv->drm, crtc)
610 		intel_crtc_info(m, crtc);
611 
612 	seq_printf(m, "\n");
613 	seq_printf(m, "Connector info\n");
614 	seq_printf(m, "--------------\n");
615 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
616 	drm_for_each_connector_iter(connector, &conn_iter)
617 		intel_connector_info(m, connector);
618 	drm_connector_list_iter_end(&conn_iter);
619 
620 	drm_modeset_unlock_all(&dev_priv->drm);
621 
622 	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
623 
624 	return 0;
625 }
626 
627 static int i915_display_capabilities(struct seq_file *m, void *unused)
628 {
629 	struct drm_i915_private *i915 = node_to_i915(m->private);
630 	struct drm_printer p = drm_seq_file_printer(m);
631 
632 	intel_display_device_info_print(DISPLAY_INFO(i915),
633 					DISPLAY_RUNTIME_INFO(i915), &p);
634 
635 	return 0;
636 }
637 
638 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
639 {
640 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
641 	struct intel_shared_dpll *pll;
642 	int i;
643 
644 	drm_modeset_lock_all(&dev_priv->drm);
645 
646 	seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
647 		   dev_priv->display.dpll.ref_clks.nssc,
648 		   dev_priv->display.dpll.ref_clks.ssc);
649 
650 	for_each_shared_dpll(dev_priv, pll, i) {
651 		seq_printf(m, "DPLL%i: %s, id: %i\n", pll->index,
652 			   pll->info->name, pll->info->id);
653 		seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
654 			   pll->state.pipe_mask, pll->active_mask,
655 			   str_yes_no(pll->on));
656 		seq_printf(m, " tracked hardware state:\n");
657 		seq_printf(m, " dpll:    0x%08x\n", pll->state.hw_state.dpll);
658 		seq_printf(m, " dpll_md: 0x%08x\n",
659 			   pll->state.hw_state.dpll_md);
660 		seq_printf(m, " fp0:     0x%08x\n", pll->state.hw_state.fp0);
661 		seq_printf(m, " fp1:     0x%08x\n", pll->state.hw_state.fp1);
662 		seq_printf(m, " wrpll:   0x%08x\n", pll->state.hw_state.wrpll);
663 		seq_printf(m, " cfgcr0:  0x%08x\n", pll->state.hw_state.cfgcr0);
664 		seq_printf(m, " cfgcr1:  0x%08x\n", pll->state.hw_state.cfgcr1);
665 		seq_printf(m, " div0:    0x%08x\n", pll->state.hw_state.div0);
666 		seq_printf(m, " mg_refclkin_ctl:        0x%08x\n",
667 			   pll->state.hw_state.mg_refclkin_ctl);
668 		seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n",
669 			   pll->state.hw_state.mg_clktop2_coreclkctl1);
670 		seq_printf(m, " mg_clktop2_hsclkctl:    0x%08x\n",
671 			   pll->state.hw_state.mg_clktop2_hsclkctl);
672 		seq_printf(m, " mg_pll_div0:  0x%08x\n",
673 			   pll->state.hw_state.mg_pll_div0);
674 		seq_printf(m, " mg_pll_div1:  0x%08x\n",
675 			   pll->state.hw_state.mg_pll_div1);
676 		seq_printf(m, " mg_pll_lf:    0x%08x\n",
677 			   pll->state.hw_state.mg_pll_lf);
678 		seq_printf(m, " mg_pll_frac_lock: 0x%08x\n",
679 			   pll->state.hw_state.mg_pll_frac_lock);
680 		seq_printf(m, " mg_pll_ssc:   0x%08x\n",
681 			   pll->state.hw_state.mg_pll_ssc);
682 		seq_printf(m, " mg_pll_bias:  0x%08x\n",
683 			   pll->state.hw_state.mg_pll_bias);
684 		seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
685 			   pll->state.hw_state.mg_pll_tdc_coldst_bias);
686 	}
687 	drm_modeset_unlock_all(&dev_priv->drm);
688 
689 	return 0;
690 }
691 
692 static int i915_ddb_info(struct seq_file *m, void *unused)
693 {
694 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
695 	struct skl_ddb_entry *entry;
696 	struct intel_crtc *crtc;
697 
698 	if (DISPLAY_VER(dev_priv) < 9)
699 		return -ENODEV;
700 
701 	drm_modeset_lock_all(&dev_priv->drm);
702 
703 	seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
704 
705 	for_each_intel_crtc(&dev_priv->drm, crtc) {
706 		struct intel_crtc_state *crtc_state =
707 			to_intel_crtc_state(crtc->base.state);
708 		enum pipe pipe = crtc->pipe;
709 		enum plane_id plane_id;
710 
711 		seq_printf(m, "Pipe %c\n", pipe_name(pipe));
712 
713 		for_each_plane_id_on_crtc(crtc, plane_id) {
714 			entry = &crtc_state->wm.skl.plane_ddb[plane_id];
715 			seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane_id + 1,
716 				   entry->start, entry->end,
717 				   skl_ddb_entry_size(entry));
718 		}
719 
720 		entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
721 		seq_printf(m, "  %-13s%8u%8u%8u\n", "Cursor", entry->start,
722 			   entry->end, skl_ddb_entry_size(entry));
723 	}
724 
725 	drm_modeset_unlock_all(&dev_priv->drm);
726 
727 	return 0;
728 }
729 
730 static bool
731 intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
732 			      enum i915_power_well_id power_well_id)
733 {
734 	intel_wakeref_t wakeref;
735 	bool is_enabled;
736 
737 	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
738 	is_enabled = intel_display_power_well_is_enabled(i915,
739 							 power_well_id);
740 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
741 
742 	return is_enabled;
743 }
744 
745 static int i915_lpsp_status(struct seq_file *m, void *unused)
746 {
747 	struct drm_i915_private *i915 = node_to_i915(m->private);
748 	bool lpsp_enabled = false;
749 
750 	if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
751 		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
752 	} else if (IS_DISPLAY_VER(i915, 11, 12)) {
753 		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
754 	} else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
755 		lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
756 	} else {
757 		seq_puts(m, "LPSP: not supported\n");
758 		return 0;
759 	}
760 
761 	seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
762 
763 	return 0;
764 }
765 
766 static int i915_dp_mst_info(struct seq_file *m, void *unused)
767 {
768 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
769 	struct intel_encoder *intel_encoder;
770 	struct intel_digital_port *dig_port;
771 	struct drm_connector *connector;
772 	struct drm_connector_list_iter conn_iter;
773 
774 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
775 	drm_for_each_connector_iter(connector, &conn_iter) {
776 		if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
777 			continue;
778 
779 		intel_encoder = intel_attached_encoder(to_intel_connector(connector));
780 		if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
781 			continue;
782 
783 		dig_port = enc_to_dig_port(intel_encoder);
784 		if (!intel_dp_mst_source_support(&dig_port->dp))
785 			continue;
786 
787 		seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
788 			   dig_port->base.base.base.id,
789 			   dig_port->base.base.name);
790 		drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
791 	}
792 	drm_connector_list_iter_end(&conn_iter);
793 
794 	return 0;
795 }
796 
797 static ssize_t i915_displayport_test_active_write(struct file *file,
798 						  const char __user *ubuf,
799 						  size_t len, loff_t *offp)
800 {
801 	char *input_buffer;
802 	int status = 0;
803 	struct drm_device *dev;
804 	struct drm_connector *connector;
805 	struct drm_connector_list_iter conn_iter;
806 	struct intel_dp *intel_dp;
807 	int val = 0;
808 
809 	dev = ((struct seq_file *)file->private_data)->private;
810 
811 	if (len == 0)
812 		return 0;
813 
814 	input_buffer = memdup_user_nul(ubuf, len);
815 	if (IS_ERR(input_buffer))
816 		return PTR_ERR(input_buffer);
817 
818 	drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len);
819 
820 	drm_connector_list_iter_begin(dev, &conn_iter);
821 	drm_for_each_connector_iter(connector, &conn_iter) {
822 		struct intel_encoder *encoder;
823 
824 		if (connector->connector_type !=
825 		    DRM_MODE_CONNECTOR_DisplayPort)
826 			continue;
827 
828 		encoder = to_intel_encoder(connector->encoder);
829 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
830 			continue;
831 
832 		if (encoder && connector->status == connector_status_connected) {
833 			intel_dp = enc_to_intel_dp(encoder);
834 			status = kstrtoint(input_buffer, 10, &val);
835 			if (status < 0)
836 				break;
837 			drm_dbg(dev, "Got %d for test active\n", val);
838 			/* To prevent erroneous activation of the compliance
839 			 * testing code, only accept an actual value of 1 here
840 			 */
841 			if (val == 1)
842 				intel_dp->compliance.test_active = true;
843 			else
844 				intel_dp->compliance.test_active = false;
845 		}
846 	}
847 	drm_connector_list_iter_end(&conn_iter);
848 	kfree(input_buffer);
849 	if (status < 0)
850 		return status;
851 
852 	*offp += len;
853 	return len;
854 }
855 
856 static int i915_displayport_test_active_show(struct seq_file *m, void *data)
857 {
858 	struct drm_i915_private *dev_priv = m->private;
859 	struct drm_connector *connector;
860 	struct drm_connector_list_iter conn_iter;
861 	struct intel_dp *intel_dp;
862 
863 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
864 	drm_for_each_connector_iter(connector, &conn_iter) {
865 		struct intel_encoder *encoder;
866 
867 		if (connector->connector_type !=
868 		    DRM_MODE_CONNECTOR_DisplayPort)
869 			continue;
870 
871 		encoder = to_intel_encoder(connector->encoder);
872 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
873 			continue;
874 
875 		if (encoder && connector->status == connector_status_connected) {
876 			intel_dp = enc_to_intel_dp(encoder);
877 			if (intel_dp->compliance.test_active)
878 				seq_puts(m, "1");
879 			else
880 				seq_puts(m, "0");
881 		} else
882 			seq_puts(m, "0");
883 	}
884 	drm_connector_list_iter_end(&conn_iter);
885 
886 	return 0;
887 }
888 
889 static int i915_displayport_test_active_open(struct inode *inode,
890 					     struct file *file)
891 {
892 	return single_open(file, i915_displayport_test_active_show,
893 			   inode->i_private);
894 }
895 
896 static const struct file_operations i915_displayport_test_active_fops = {
897 	.owner = THIS_MODULE,
898 	.open = i915_displayport_test_active_open,
899 	.read = seq_read,
900 	.llseek = seq_lseek,
901 	.release = single_release,
902 	.write = i915_displayport_test_active_write
903 };
904 
905 static int i915_displayport_test_data_show(struct seq_file *m, void *data)
906 {
907 	struct drm_i915_private *dev_priv = m->private;
908 	struct drm_connector *connector;
909 	struct drm_connector_list_iter conn_iter;
910 	struct intel_dp *intel_dp;
911 
912 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
913 	drm_for_each_connector_iter(connector, &conn_iter) {
914 		struct intel_encoder *encoder;
915 
916 		if (connector->connector_type !=
917 		    DRM_MODE_CONNECTOR_DisplayPort)
918 			continue;
919 
920 		encoder = to_intel_encoder(connector->encoder);
921 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
922 			continue;
923 
924 		if (encoder && connector->status == connector_status_connected) {
925 			intel_dp = enc_to_intel_dp(encoder);
926 			if (intel_dp->compliance.test_type ==
927 			    DP_TEST_LINK_EDID_READ)
928 				seq_printf(m, "%lx",
929 					   intel_dp->compliance.test_data.edid);
930 			else if (intel_dp->compliance.test_type ==
931 				 DP_TEST_LINK_VIDEO_PATTERN) {
932 				seq_printf(m, "hdisplay: %d\n",
933 					   intel_dp->compliance.test_data.hdisplay);
934 				seq_printf(m, "vdisplay: %d\n",
935 					   intel_dp->compliance.test_data.vdisplay);
936 				seq_printf(m, "bpc: %u\n",
937 					   intel_dp->compliance.test_data.bpc);
938 			} else if (intel_dp->compliance.test_type ==
939 				   DP_TEST_LINK_PHY_TEST_PATTERN) {
940 				seq_printf(m, "pattern: %d\n",
941 					   intel_dp->compliance.test_data.phytest.phy_pattern);
942 				seq_printf(m, "Number of lanes: %d\n",
943 					   intel_dp->compliance.test_data.phytest.num_lanes);
944 				seq_printf(m, "Link Rate: %d\n",
945 					   intel_dp->compliance.test_data.phytest.link_rate);
946 				seq_printf(m, "level: %02x\n",
947 					   intel_dp->train_set[0]);
948 			}
949 		} else
950 			seq_puts(m, "0");
951 	}
952 	drm_connector_list_iter_end(&conn_iter);
953 
954 	return 0;
955 }
956 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
957 
958 static int i915_displayport_test_type_show(struct seq_file *m, void *data)
959 {
960 	struct drm_i915_private *dev_priv = m->private;
961 	struct drm_connector *connector;
962 	struct drm_connector_list_iter conn_iter;
963 	struct intel_dp *intel_dp;
964 
965 	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
966 	drm_for_each_connector_iter(connector, &conn_iter) {
967 		struct intel_encoder *encoder;
968 
969 		if (connector->connector_type !=
970 		    DRM_MODE_CONNECTOR_DisplayPort)
971 			continue;
972 
973 		encoder = to_intel_encoder(connector->encoder);
974 		if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
975 			continue;
976 
977 		if (encoder && connector->status == connector_status_connected) {
978 			intel_dp = enc_to_intel_dp(encoder);
979 			seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
980 		} else
981 			seq_puts(m, "0");
982 	}
983 	drm_connector_list_iter_end(&conn_iter);
984 
985 	return 0;
986 }
987 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
988 
989 static ssize_t
990 i915_fifo_underrun_reset_write(struct file *filp,
991 			       const char __user *ubuf,
992 			       size_t cnt, loff_t *ppos)
993 {
994 	struct drm_i915_private *dev_priv = filp->private_data;
995 	struct intel_crtc *crtc;
996 	int ret;
997 	bool reset;
998 
999 	ret = kstrtobool_from_user(ubuf, cnt, &reset);
1000 	if (ret)
1001 		return ret;
1002 
1003 	if (!reset)
1004 		return cnt;
1005 
1006 	for_each_intel_crtc(&dev_priv->drm, crtc) {
1007 		struct drm_crtc_commit *commit;
1008 		struct intel_crtc_state *crtc_state;
1009 
1010 		ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1011 		if (ret)
1012 			return ret;
1013 
1014 		crtc_state = to_intel_crtc_state(crtc->base.state);
1015 		commit = crtc_state->uapi.commit;
1016 		if (commit) {
1017 			ret = wait_for_completion_interruptible(&commit->hw_done);
1018 			if (!ret)
1019 				ret = wait_for_completion_interruptible(&commit->flip_done);
1020 		}
1021 
1022 		if (!ret && crtc_state->hw.active) {
1023 			drm_dbg_kms(&dev_priv->drm,
1024 				    "Re-arming FIFO underruns on pipe %c\n",
1025 				    pipe_name(crtc->pipe));
1026 
1027 			intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1028 		}
1029 
1030 		drm_modeset_unlock(&crtc->base.mutex);
1031 
1032 		if (ret)
1033 			return ret;
1034 	}
1035 
1036 	intel_fbc_reset_underrun(dev_priv);
1037 
1038 	return cnt;
1039 }
1040 
1041 static const struct file_operations i915_fifo_underrun_reset_ops = {
1042 	.owner = THIS_MODULE,
1043 	.open = simple_open,
1044 	.write = i915_fifo_underrun_reset_write,
1045 	.llseek = default_llseek,
1046 };
1047 
1048 static const struct drm_info_list intel_display_debugfs_list[] = {
1049 	{"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1050 	{"i915_sr_status", i915_sr_status, 0},
1051 	{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1052 	{"i915_power_domain_info", i915_power_domain_info, 0},
1053 	{"i915_display_info", i915_display_info, 0},
1054 	{"i915_display_capabilities", i915_display_capabilities, 0},
1055 	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1056 	{"i915_dp_mst_info", i915_dp_mst_info, 0},
1057 	{"i915_ddb_info", i915_ddb_info, 0},
1058 	{"i915_lpsp_status", i915_lpsp_status, 0},
1059 };
1060 
1061 static const struct {
1062 	const char *name;
1063 	const struct file_operations *fops;
1064 } intel_display_debugfs_files[] = {
1065 	{"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1066 	{"i915_dp_test_data", &i915_displayport_test_data_fops},
1067 	{"i915_dp_test_type", &i915_displayport_test_type_fops},
1068 	{"i915_dp_test_active", &i915_displayport_test_active_fops},
1069 };
1070 
1071 void intel_display_debugfs_register(struct drm_i915_private *i915)
1072 {
1073 	struct drm_minor *minor = i915->drm.primary;
1074 	int i;
1075 
1076 	for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1077 		debugfs_create_file(intel_display_debugfs_files[i].name,
1078 				    0644,
1079 				    minor->debugfs_root,
1080 				    to_i915(minor->dev),
1081 				    intel_display_debugfs_files[i].fops);
1082 	}
1083 
1084 	drm_debugfs_create_files(intel_display_debugfs_list,
1085 				 ARRAY_SIZE(intel_display_debugfs_list),
1086 				 minor->debugfs_root, minor);
1087 
1088 	intel_bios_debugfs_register(i915);
1089 	intel_cdclk_debugfs_register(i915);
1090 	intel_dmc_debugfs_register(i915);
1091 	intel_fbc_debugfs_register(i915);
1092 	intel_hpd_debugfs_register(i915);
1093 	intel_opregion_debugfs_register(i915);
1094 	intel_psr_debugfs_register(i915);
1095 	intel_wm_debugfs_register(i915);
1096 	intel_display_debugfs_params(i915);
1097 }
1098 
1099 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1100 {
1101 	struct intel_connector *connector = m->private;
1102 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1103 	int ret;
1104 
1105 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1106 	if (ret)
1107 		return ret;
1108 
1109 	if (!connector->base.encoder ||
1110 	    connector->base.status != connector_status_connected) {
1111 		ret = -ENODEV;
1112 		goto out;
1113 	}
1114 
1115 	seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
1116 		   connector->base.base.id);
1117 	intel_hdcp_info(m, connector, false);
1118 
1119 out:
1120 	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1121 
1122 	return ret;
1123 }
1124 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1125 
1126 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1127 {
1128 	struct intel_connector *connector = m->private;
1129 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1130 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1131 	int connector_type = connector->base.connector_type;
1132 	bool lpsp_capable = false;
1133 
1134 	if (!encoder)
1135 		return -ENODEV;
1136 
1137 	if (connector->base.status != connector_status_connected)
1138 		return -ENODEV;
1139 
1140 	if (DISPLAY_VER(i915) >= 13)
1141 		lpsp_capable = encoder->port <= PORT_B;
1142 	else if (DISPLAY_VER(i915) >= 12)
1143 		/*
1144 		 * Actually TGL can drive LPSP on port till DDI_C
1145 		 * but there is no physical connected DDI_C on TGL sku's,
1146 		 * even driver is not initilizing DDI_C port for gen12.
1147 		 */
1148 		lpsp_capable = encoder->port <= PORT_B;
1149 	else if (DISPLAY_VER(i915) == 11)
1150 		lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
1151 				connector_type == DRM_MODE_CONNECTOR_eDP);
1152 	else if (IS_DISPLAY_VER(i915, 9, 10))
1153 		lpsp_capable = (encoder->port == PORT_A &&
1154 				(connector_type == DRM_MODE_CONNECTOR_DSI ||
1155 				 connector_type == DRM_MODE_CONNECTOR_eDP ||
1156 				 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1157 	else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1158 		lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
1159 
1160 	seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1161 
1162 	return 0;
1163 }
1164 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1165 
1166 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1167 {
1168 	struct intel_connector *connector = m->private;
1169 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1170 	struct drm_crtc *crtc;
1171 	struct intel_dp *intel_dp;
1172 	struct drm_modeset_acquire_ctx ctx;
1173 	struct intel_crtc_state *crtc_state = NULL;
1174 	int ret = 0;
1175 	bool try_again = false;
1176 
1177 	drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1178 
1179 	do {
1180 		try_again = false;
1181 		ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
1182 				       &ctx);
1183 		if (ret) {
1184 			if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1185 				try_again = true;
1186 				continue;
1187 			}
1188 			break;
1189 		}
1190 		crtc = connector->base.state->crtc;
1191 		if (connector->base.status != connector_status_connected || !crtc) {
1192 			ret = -ENODEV;
1193 			break;
1194 		}
1195 		ret = drm_modeset_lock(&crtc->mutex, &ctx);
1196 		if (ret == -EDEADLK) {
1197 			ret = drm_modeset_backoff(&ctx);
1198 			if (!ret) {
1199 				try_again = true;
1200 				continue;
1201 			}
1202 			break;
1203 		} else if (ret) {
1204 			break;
1205 		}
1206 		intel_dp = intel_attached_dp(connector);
1207 		crtc_state = to_intel_crtc_state(crtc->state);
1208 		seq_printf(m, "DSC_Enabled: %s\n",
1209 			   str_yes_no(crtc_state->dsc.compression_enable));
1210 		seq_printf(m, "DSC_Sink_Support: %s\n",
1211 			   str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
1212 		seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1213 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1214 								      DP_DSC_RGB)),
1215 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1216 								      DP_DSC_YCbCr420_Native)),
1217 			   str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1218 								      DP_DSC_YCbCr444)));
1219 		seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1220 			   drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
1221 		seq_printf(m, "Force_DSC_Enable: %s\n",
1222 			   str_yes_no(intel_dp->force_dsc_en));
1223 		if (!intel_dp_is_edp(intel_dp))
1224 			seq_printf(m, "FEC_Sink_Support: %s\n",
1225 				   str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
1226 	} while (try_again);
1227 
1228 	drm_modeset_drop_locks(&ctx);
1229 	drm_modeset_acquire_fini(&ctx);
1230 
1231 	return ret;
1232 }
1233 
1234 static ssize_t i915_dsc_fec_support_write(struct file *file,
1235 					  const char __user *ubuf,
1236 					  size_t len, loff_t *offp)
1237 {
1238 	struct seq_file *m = file->private_data;
1239 	struct intel_connector *connector = m->private;
1240 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1241 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1242 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1243 	bool dsc_enable = false;
1244 	int ret;
1245 
1246 	if (len == 0)
1247 		return 0;
1248 
1249 	drm_dbg(&i915->drm,
1250 		"Copied %zu bytes from user to force DSC\n", len);
1251 
1252 	ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1253 	if (ret < 0)
1254 		return ret;
1255 
1256 	drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1257 		(dsc_enable) ? "true" : "false");
1258 	intel_dp->force_dsc_en = dsc_enable;
1259 
1260 	*offp += len;
1261 	return len;
1262 }
1263 
1264 static int i915_dsc_fec_support_open(struct inode *inode,
1265 				     struct file *file)
1266 {
1267 	return single_open(file, i915_dsc_fec_support_show,
1268 			   inode->i_private);
1269 }
1270 
1271 static const struct file_operations i915_dsc_fec_support_fops = {
1272 	.owner = THIS_MODULE,
1273 	.open = i915_dsc_fec_support_open,
1274 	.read = seq_read,
1275 	.llseek = seq_lseek,
1276 	.release = single_release,
1277 	.write = i915_dsc_fec_support_write
1278 };
1279 
1280 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1281 {
1282 	struct intel_connector *connector = m->private;
1283 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1284 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1285 	struct drm_crtc *crtc;
1286 	struct intel_crtc_state *crtc_state;
1287 	int ret;
1288 
1289 	if (!encoder)
1290 		return -ENODEV;
1291 
1292 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1293 	if (ret)
1294 		return ret;
1295 
1296 	crtc = connector->base.state->crtc;
1297 	if (connector->base.status != connector_status_connected || !crtc) {
1298 		ret = -ENODEV;
1299 		goto out;
1300 	}
1301 
1302 	crtc_state = to_intel_crtc_state(crtc->state);
1303 	seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1304 
1305 out:	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1306 
1307 	return ret;
1308 }
1309 
1310 static ssize_t i915_dsc_bpc_write(struct file *file,
1311 				  const char __user *ubuf,
1312 				  size_t len, loff_t *offp)
1313 {
1314 	struct seq_file *m = file->private_data;
1315 	struct intel_connector *connector = m->private;
1316 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1317 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1318 	int dsc_bpc = 0;
1319 	int ret;
1320 
1321 	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1322 	if (ret < 0)
1323 		return ret;
1324 
1325 	intel_dp->force_dsc_bpc = dsc_bpc;
1326 	*offp += len;
1327 
1328 	return len;
1329 }
1330 
1331 static int i915_dsc_bpc_open(struct inode *inode,
1332 			     struct file *file)
1333 {
1334 	return single_open(file, i915_dsc_bpc_show, inode->i_private);
1335 }
1336 
1337 static const struct file_operations i915_dsc_bpc_fops = {
1338 	.owner = THIS_MODULE,
1339 	.open = i915_dsc_bpc_open,
1340 	.read = seq_read,
1341 	.llseek = seq_lseek,
1342 	.release = single_release,
1343 	.write = i915_dsc_bpc_write
1344 };
1345 
1346 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1347 {
1348 	struct intel_connector *connector = m->private;
1349 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1350 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1351 	struct drm_crtc *crtc;
1352 	struct intel_crtc_state *crtc_state;
1353 	int ret;
1354 
1355 	if (!encoder)
1356 		return -ENODEV;
1357 
1358 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1359 	if (ret)
1360 		return ret;
1361 
1362 	crtc = connector->base.state->crtc;
1363 	if (connector->base.status != connector_status_connected || !crtc) {
1364 		ret = -ENODEV;
1365 		goto out;
1366 	}
1367 
1368 	crtc_state = to_intel_crtc_state(crtc->state);
1369 	seq_printf(m, "DSC_Output_Format: %s\n",
1370 		   intel_output_format_name(crtc_state->output_format));
1371 
1372 out:	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1373 
1374 	return ret;
1375 }
1376 
1377 static ssize_t i915_dsc_output_format_write(struct file *file,
1378 					    const char __user *ubuf,
1379 					    size_t len, loff_t *offp)
1380 {
1381 	struct seq_file *m = file->private_data;
1382 	struct intel_connector *connector = m->private;
1383 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1384 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1385 	int dsc_output_format = 0;
1386 	int ret;
1387 
1388 	ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1389 	if (ret < 0)
1390 		return ret;
1391 
1392 	intel_dp->force_dsc_output_format = dsc_output_format;
1393 	*offp += len;
1394 
1395 	return len;
1396 }
1397 
1398 static int i915_dsc_output_format_open(struct inode *inode,
1399 				       struct file *file)
1400 {
1401 	return single_open(file, i915_dsc_output_format_show, inode->i_private);
1402 }
1403 
1404 static const struct file_operations i915_dsc_output_format_fops = {
1405 	.owner = THIS_MODULE,
1406 	.open = i915_dsc_output_format_open,
1407 	.read = seq_read,
1408 	.llseek = seq_lseek,
1409 	.release = single_release,
1410 	.write = i915_dsc_output_format_write
1411 };
1412 
1413 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1414 {
1415 	struct intel_connector *connector = m->private;
1416 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1417 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1418 	struct drm_crtc *crtc;
1419 	struct intel_dp *intel_dp;
1420 	int ret;
1421 
1422 	if (!encoder)
1423 		return -ENODEV;
1424 
1425 	ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1426 	if (ret)
1427 		return ret;
1428 
1429 	crtc = connector->base.state->crtc;
1430 	if (connector->base.status != connector_status_connected || !crtc) {
1431 		ret = -ENODEV;
1432 		goto out;
1433 	}
1434 
1435 	intel_dp = intel_attached_dp(connector);
1436 	seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1437 		   str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1438 
1439 out:
1440 	drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1441 
1442 	return ret;
1443 }
1444 
1445 static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1446 					     const char __user *ubuf,
1447 					     size_t len, loff_t *offp)
1448 {
1449 	struct seq_file *m = file->private_data;
1450 	struct intel_connector *connector = m->private;
1451 	struct intel_encoder *encoder = intel_attached_encoder(connector);
1452 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1453 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1454 	bool dsc_fractional_bpp_enable = false;
1455 	int ret;
1456 
1457 	if (len == 0)
1458 		return 0;
1459 
1460 	drm_dbg(&i915->drm,
1461 		"Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1462 
1463 	ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1464 	if (ret < 0)
1465 		return ret;
1466 
1467 	drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
1468 		(dsc_fractional_bpp_enable) ? "true" : "false");
1469 	intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1470 
1471 	*offp += len;
1472 
1473 	return len;
1474 }
1475 
1476 static int i915_dsc_fractional_bpp_open(struct inode *inode,
1477 					struct file *file)
1478 {
1479 	return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1480 }
1481 
1482 static const struct file_operations i915_dsc_fractional_bpp_fops = {
1483 	.owner = THIS_MODULE,
1484 	.open = i915_dsc_fractional_bpp_open,
1485 	.read = seq_read,
1486 	.llseek = seq_lseek,
1487 	.release = single_release,
1488 	.write = i915_dsc_fractional_bpp_write
1489 };
1490 
1491 /*
1492  * Returns the Current CRTC's bpc.
1493  * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1494  */
1495 static int i915_current_bpc_show(struct seq_file *m, void *data)
1496 {
1497 	struct intel_crtc *crtc = m->private;
1498 	struct intel_crtc_state *crtc_state;
1499 	int ret;
1500 
1501 	ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1502 	if (ret)
1503 		return ret;
1504 
1505 	crtc_state = to_intel_crtc_state(crtc->base.state);
1506 	seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1507 
1508 	drm_modeset_unlock(&crtc->base.mutex);
1509 
1510 	return ret;
1511 }
1512 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1513 
1514 /* Pipe may differ from crtc index if pipes are fused off */
1515 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1516 {
1517 	struct intel_crtc *crtc = m->private;
1518 
1519 	seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1520 
1521 	return 0;
1522 }
1523 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1524 
1525 /**
1526  * intel_connector_debugfs_add - add i915 specific connector debugfs files
1527  * @connector: pointer to a registered intel_connector
1528  *
1529  * Cleanup will be done by drm_connector_unregister() through a call to
1530  * drm_debugfs_connector_remove().
1531  */
1532 void intel_connector_debugfs_add(struct intel_connector *connector)
1533 {
1534 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
1535 	struct dentry *root = connector->base.debugfs_entry;
1536 	int connector_type = connector->base.connector_type;
1537 
1538 	/* The connector must have been registered beforehands. */
1539 	if (!root)
1540 		return;
1541 
1542 	intel_drrs_connector_debugfs_add(connector);
1543 	intel_pps_connector_debugfs_add(connector);
1544 	intel_psr_connector_debugfs_add(connector);
1545 
1546 	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1547 	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1548 	    connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1549 		debugfs_create_file("i915_hdcp_sink_capability", 0444, root,
1550 				    connector, &i915_hdcp_sink_capability_fops);
1551 	}
1552 
1553 	if (DISPLAY_VER(i915) >= 11 &&
1554 	    ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) ||
1555 	     connector_type == DRM_MODE_CONNECTOR_eDP)) {
1556 		debugfs_create_file("i915_dsc_fec_support", 0644, root,
1557 				    connector, &i915_dsc_fec_support_fops);
1558 
1559 		debugfs_create_file("i915_dsc_bpc", 0644, root,
1560 				    connector, &i915_dsc_bpc_fops);
1561 
1562 		debugfs_create_file("i915_dsc_output_format", 0644, root,
1563 				    connector, &i915_dsc_output_format_fops);
1564 
1565 		debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1566 				    connector, &i915_dsc_fractional_bpp_fops);
1567 	}
1568 
1569 	if (DISPLAY_VER(i915) >= 11 &&
1570 	    (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1571 	     connector_type == DRM_MODE_CONNECTOR_eDP)) {
1572 		debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,
1573 				    &connector->force_bigjoiner_enable);
1574 	}
1575 
1576 	if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1577 	    connector_type == DRM_MODE_CONNECTOR_eDP ||
1578 	    connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1579 	    connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1580 	    connector_type == DRM_MODE_CONNECTOR_HDMIB)
1581 		debugfs_create_file("i915_lpsp_capability", 0444, root,
1582 				    connector, &i915_lpsp_capability_fops);
1583 }
1584 
1585 /**
1586  * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1587  * @crtc: pointer to a drm_crtc
1588  *
1589  * Failure to add debugfs entries should generally be ignored.
1590  */
1591 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1592 {
1593 	struct dentry *root = crtc->base.debugfs_entry;
1594 
1595 	if (!root)
1596 		return;
1597 
1598 	crtc_updates_add(crtc);
1599 	intel_drrs_crtc_debugfs_add(crtc);
1600 	intel_fbc_crtc_debugfs_add(crtc);
1601 	hsw_ips_crtc_debugfs_add(crtc);
1602 
1603 	debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1604 			    &i915_current_bpc_fops);
1605 	debugfs_create_file("i915_pipe", 0444, root, crtc,
1606 			    &intel_crtc_pipe_fops);
1607 }
1608