1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/string_helpers.h> 7 8 #include <drm/drm_debugfs.h> 9 #include <drm/drm_edid.h> 10 #include <drm/drm_fourcc.h> 11 12 #include "hsw_ips.h" 13 #include "i915_debugfs.h" 14 #include "i915_irq.h" 15 #include "i915_reg.h" 16 #include "intel_crtc.h" 17 #include "intel_de.h" 18 #include "intel_crtc_state_dump.h" 19 #include "intel_display_debugfs.h" 20 #include "intel_display_debugfs_params.h" 21 #include "intel_display_power.h" 22 #include "intel_display_power_well.h" 23 #include "intel_display_types.h" 24 #include "intel_dmc.h" 25 #include "intel_dp.h" 26 #include "intel_dp_mst.h" 27 #include "intel_drrs.h" 28 #include "intel_fbc.h" 29 #include "intel_fbdev.h" 30 #include "intel_hdcp.h" 31 #include "intel_hdmi.h" 32 #include "intel_hotplug.h" 33 #include "intel_panel.h" 34 #include "intel_psr.h" 35 #include "intel_psr_regs.h" 36 #include "intel_wm.h" 37 38 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 39 { 40 return to_i915(node->minor->dev); 41 } 42 43 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 44 { 45 struct drm_i915_private *dev_priv = node_to_i915(m->private); 46 47 spin_lock(&dev_priv->display.fb_tracking.lock); 48 49 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 50 dev_priv->display.fb_tracking.busy_bits); 51 52 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 53 dev_priv->display.fb_tracking.flip_bits); 54 55 spin_unlock(&dev_priv->display.fb_tracking.lock); 56 57 return 0; 58 } 59 60 static int i915_sr_status(struct seq_file *m, void *unused) 61 { 62 struct drm_i915_private *dev_priv = node_to_i915(m->private); 63 intel_wakeref_t wakeref; 64 bool sr_enabled = false; 65 66 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 67 68 if (DISPLAY_VER(dev_priv) >= 9) 69 /* no global SR status; inspect per-plane WM */; 70 else if (HAS_PCH_SPLIT(dev_priv)) 71 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 72 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 73 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 74 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 75 else if (IS_I915GM(dev_priv)) 76 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 77 else if (IS_PINEVIEW(dev_priv)) 78 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 79 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 80 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 81 82 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 83 84 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 85 86 return 0; 87 } 88 89 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 90 { 91 struct drm_i915_private *dev_priv = node_to_i915(m->private); 92 struct intel_framebuffer *fbdev_fb = NULL; 93 struct drm_framebuffer *drm_fb; 94 95 #ifdef CONFIG_DRM_FBDEV_EMULATION 96 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 97 if (fbdev_fb) { 98 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 99 fbdev_fb->base.width, 100 fbdev_fb->base.height, 101 fbdev_fb->base.format->depth, 102 fbdev_fb->base.format->cpp[0] * 8, 103 fbdev_fb->base.modifier, 104 drm_framebuffer_read_refcount(&fbdev_fb->base)); 105 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 106 seq_putc(m, '\n'); 107 } 108 #endif 109 110 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 111 drm_for_each_fb(drm_fb, &dev_priv->drm) { 112 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 113 if (fb == fbdev_fb) 114 continue; 115 116 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 117 fb->base.width, 118 fb->base.height, 119 fb->base.format->depth, 120 fb->base.format->cpp[0] * 8, 121 fb->base.modifier, 122 drm_framebuffer_read_refcount(&fb->base)); 123 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 124 seq_putc(m, '\n'); 125 } 126 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 127 128 return 0; 129 } 130 131 static int i915_power_domain_info(struct seq_file *m, void *unused) 132 { 133 struct drm_i915_private *i915 = node_to_i915(m->private); 134 135 intel_display_power_debug(i915, m); 136 137 return 0; 138 } 139 140 static void intel_seq_print_mode(struct seq_file *m, int tabs, 141 const struct drm_display_mode *mode) 142 { 143 int i; 144 145 for (i = 0; i < tabs; i++) 146 seq_putc(m, '\t'); 147 148 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 149 } 150 151 static void intel_encoder_info(struct seq_file *m, 152 struct intel_crtc *crtc, 153 struct intel_encoder *encoder) 154 { 155 struct drm_i915_private *dev_priv = node_to_i915(m->private); 156 struct drm_connector_list_iter conn_iter; 157 struct drm_connector *connector; 158 159 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 160 encoder->base.base.id, encoder->base.name); 161 162 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 163 drm_for_each_connector_iter(connector, &conn_iter) { 164 const struct drm_connector_state *conn_state = 165 connector->state; 166 167 if (conn_state->best_encoder != &encoder->base) 168 continue; 169 170 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 171 connector->base.id, connector->name); 172 } 173 drm_connector_list_iter_end(&conn_iter); 174 } 175 176 static void intel_panel_info(struct seq_file *m, 177 struct intel_connector *connector) 178 { 179 const struct drm_display_mode *fixed_mode; 180 181 if (list_empty(&connector->panel.fixed_modes)) 182 return; 183 184 seq_puts(m, "\tfixed modes:\n"); 185 186 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 187 intel_seq_print_mode(m, 2, fixed_mode); 188 } 189 190 static void intel_hdcp_info(struct seq_file *m, 191 struct intel_connector *intel_connector) 192 { 193 bool hdcp_cap, hdcp2_cap; 194 195 if (!intel_connector->hdcp.shim) { 196 seq_puts(m, "No Connector Support"); 197 goto out; 198 } 199 200 hdcp_cap = intel_hdcp_capable(intel_connector); 201 hdcp2_cap = intel_hdcp2_capable(intel_connector); 202 203 if (hdcp_cap) 204 seq_puts(m, "HDCP1.4 "); 205 if (hdcp2_cap) 206 seq_puts(m, "HDCP2.2 "); 207 208 if (!hdcp_cap && !hdcp2_cap) 209 seq_puts(m, "None"); 210 211 out: 212 seq_puts(m, "\n"); 213 } 214 215 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 216 { 217 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 218 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 219 220 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 221 seq_printf(m, "\taudio support: %s\n", 222 str_yes_no(connector->base.display_info.has_audio)); 223 224 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 225 connector->detect_edid, &intel_dp->aux); 226 } 227 228 static void intel_dp_mst_info(struct seq_file *m, 229 struct intel_connector *connector) 230 { 231 bool has_audio = connector->base.display_info.has_audio; 232 233 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 234 } 235 236 static void intel_hdmi_info(struct seq_file *m, 237 struct intel_connector *connector) 238 { 239 bool has_audio = connector->base.display_info.has_audio; 240 241 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 242 } 243 244 static void intel_connector_info(struct seq_file *m, 245 struct drm_connector *connector) 246 { 247 struct intel_connector *intel_connector = to_intel_connector(connector); 248 const struct drm_connector_state *conn_state = connector->state; 249 struct intel_encoder *encoder = 250 to_intel_encoder(conn_state->best_encoder); 251 const struct drm_display_mode *mode; 252 253 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 254 connector->base.id, connector->name, 255 drm_get_connector_status_name(connector->status)); 256 257 if (connector->status == connector_status_disconnected) 258 return; 259 260 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 261 connector->display_info.width_mm, 262 connector->display_info.height_mm); 263 seq_printf(m, "\tsubpixel order: %s\n", 264 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 265 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 266 267 if (!encoder) 268 return; 269 270 switch (connector->connector_type) { 271 case DRM_MODE_CONNECTOR_DisplayPort: 272 case DRM_MODE_CONNECTOR_eDP: 273 if (encoder->type == INTEL_OUTPUT_DP_MST) 274 intel_dp_mst_info(m, intel_connector); 275 else 276 intel_dp_info(m, intel_connector); 277 break; 278 case DRM_MODE_CONNECTOR_HDMIA: 279 if (encoder->type == INTEL_OUTPUT_HDMI || 280 encoder->type == INTEL_OUTPUT_DDI) 281 intel_hdmi_info(m, intel_connector); 282 break; 283 default: 284 break; 285 } 286 287 seq_puts(m, "\tHDCP version: "); 288 intel_hdcp_info(m, intel_connector); 289 290 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 291 292 intel_panel_info(m, intel_connector); 293 294 seq_printf(m, "\tmodes:\n"); 295 list_for_each_entry(mode, &connector->modes, head) 296 intel_seq_print_mode(m, 2, mode); 297 } 298 299 static const char *plane_type(enum drm_plane_type type) 300 { 301 switch (type) { 302 case DRM_PLANE_TYPE_OVERLAY: 303 return "OVL"; 304 case DRM_PLANE_TYPE_PRIMARY: 305 return "PRI"; 306 case DRM_PLANE_TYPE_CURSOR: 307 return "CUR"; 308 /* 309 * Deliberately omitting default: to generate compiler warnings 310 * when a new drm_plane_type gets added. 311 */ 312 } 313 314 return "unknown"; 315 } 316 317 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 318 { 319 /* 320 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 321 * will print them all to visualize if the values are misused 322 */ 323 snprintf(buf, bufsize, 324 "%s%s%s%s%s%s(0x%08x)", 325 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 326 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 327 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 328 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 329 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 330 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 331 rotation); 332 } 333 334 static const char *plane_visibility(const struct intel_plane_state *plane_state) 335 { 336 if (plane_state->uapi.visible) 337 return "visible"; 338 339 if (plane_state->planar_slave) 340 return "planar-slave"; 341 342 return "hidden"; 343 } 344 345 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 346 { 347 const struct intel_plane_state *plane_state = 348 to_intel_plane_state(plane->base.state); 349 const struct drm_framebuffer *fb = plane_state->uapi.fb; 350 struct drm_rect src, dst; 351 char rot_str[48]; 352 353 src = drm_plane_state_src(&plane_state->uapi); 354 dst = drm_plane_state_dest(&plane_state->uapi); 355 356 plane_rotation(rot_str, sizeof(rot_str), 357 plane_state->uapi.rotation); 358 359 seq_puts(m, "\t\tuapi: [FB:"); 360 if (fb) 361 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 362 &fb->format->format, fb->modifier, fb->width, 363 fb->height); 364 else 365 seq_puts(m, "0] n/a,0x0,0x0,"); 366 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 367 ", rotation=%s\n", plane_visibility(plane_state), 368 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 369 370 if (plane_state->planar_linked_plane) 371 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 372 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 373 plane_state->planar_slave ? "slave" : "master"); 374 } 375 376 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 377 { 378 const struct intel_plane_state *plane_state = 379 to_intel_plane_state(plane->base.state); 380 const struct drm_framebuffer *fb = plane_state->hw.fb; 381 char rot_str[48]; 382 383 if (!fb) 384 return; 385 386 plane_rotation(rot_str, sizeof(rot_str), 387 plane_state->hw.rotation); 388 389 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 390 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 391 fb->base.id, &fb->format->format, 392 fb->modifier, fb->width, fb->height, 393 str_yes_no(plane_state->uapi.visible), 394 DRM_RECT_FP_ARG(&plane_state->uapi.src), 395 DRM_RECT_ARG(&plane_state->uapi.dst), 396 rot_str); 397 } 398 399 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 400 { 401 struct drm_i915_private *dev_priv = node_to_i915(m->private); 402 struct intel_plane *plane; 403 404 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 405 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 406 plane->base.base.id, plane->base.name, 407 plane_type(plane->base.type)); 408 intel_plane_uapi_info(m, plane); 409 intel_plane_hw_info(m, plane); 410 } 411 } 412 413 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 414 { 415 const struct intel_crtc_state *crtc_state = 416 to_intel_crtc_state(crtc->base.state); 417 int num_scalers = crtc->num_scalers; 418 int i; 419 420 /* Not all platformas have a scaler */ 421 if (num_scalers) { 422 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 423 num_scalers, 424 crtc_state->scaler_state.scaler_users, 425 crtc_state->scaler_state.scaler_id, 426 crtc_state->hw.scaling_filter); 427 428 for (i = 0; i < num_scalers; i++) { 429 const struct intel_scaler *sc = 430 &crtc_state->scaler_state.scalers[i]; 431 432 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 433 i, str_yes_no(sc->in_use), sc->mode); 434 } 435 seq_puts(m, "\n"); 436 } else { 437 seq_puts(m, "\tNo scalers available on this platform\n"); 438 } 439 } 440 441 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 442 static void crtc_updates_info(struct seq_file *m, 443 struct intel_crtc *crtc, 444 const char *hdr) 445 { 446 u64 count; 447 int row; 448 449 count = 0; 450 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 451 count += crtc->debug.vbl.times[row]; 452 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 453 if (!count) 454 return; 455 456 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 457 char columns[80] = " |"; 458 unsigned int x; 459 460 if (row & 1) { 461 const char *units; 462 463 if (row > 10) { 464 x = 1000000; 465 units = "ms"; 466 } else { 467 x = 1000; 468 units = "us"; 469 } 470 471 snprintf(columns, sizeof(columns), "%4ld%s |", 472 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 473 } 474 475 if (crtc->debug.vbl.times[row]) { 476 x = ilog2(crtc->debug.vbl.times[row]); 477 memset(columns + 8, '*', x); 478 columns[8 + x] = '\0'; 479 } 480 481 seq_printf(m, "%s%s\n", hdr, columns); 482 } 483 484 seq_printf(m, "%sMin update: %lluns\n", 485 hdr, crtc->debug.vbl.min); 486 seq_printf(m, "%sMax update: %lluns\n", 487 hdr, crtc->debug.vbl.max); 488 seq_printf(m, "%sAverage update: %lluns\n", 489 hdr, div64_u64(crtc->debug.vbl.sum, count)); 490 seq_printf(m, "%sOverruns > %uus: %u\n", 491 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 492 } 493 494 static int crtc_updates_show(struct seq_file *m, void *data) 495 { 496 crtc_updates_info(m, m->private, ""); 497 return 0; 498 } 499 500 static int crtc_updates_open(struct inode *inode, struct file *file) 501 { 502 return single_open(file, crtc_updates_show, inode->i_private); 503 } 504 505 static ssize_t crtc_updates_write(struct file *file, 506 const char __user *ubuf, 507 size_t len, loff_t *offp) 508 { 509 struct seq_file *m = file->private_data; 510 struct intel_crtc *crtc = m->private; 511 512 /* May race with an update. Meh. */ 513 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 514 515 return len; 516 } 517 518 static const struct file_operations crtc_updates_fops = { 519 .owner = THIS_MODULE, 520 .open = crtc_updates_open, 521 .read = seq_read, 522 .llseek = seq_lseek, 523 .release = single_release, 524 .write = crtc_updates_write 525 }; 526 527 static void crtc_updates_add(struct intel_crtc *crtc) 528 { 529 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 530 crtc, &crtc_updates_fops); 531 } 532 533 #else 534 static void crtc_updates_info(struct seq_file *m, 535 struct intel_crtc *crtc, 536 const char *hdr) 537 { 538 } 539 540 static void crtc_updates_add(struct intel_crtc *crtc) 541 { 542 } 543 #endif 544 545 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 546 { 547 struct drm_i915_private *dev_priv = node_to_i915(m->private); 548 const struct intel_crtc_state *crtc_state = 549 to_intel_crtc_state(crtc->base.state); 550 struct intel_encoder *encoder; 551 552 seq_printf(m, "[CRTC:%d:%s]:\n", 553 crtc->base.base.id, crtc->base.name); 554 555 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 556 str_yes_no(crtc_state->uapi.enable), 557 str_yes_no(crtc_state->uapi.active), 558 DRM_MODE_ARG(&crtc_state->uapi.mode)); 559 560 seq_printf(m, "\thw: enable=%s, active=%s\n", 561 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 562 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 563 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 564 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 565 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 566 567 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 568 DRM_RECT_ARG(&crtc_state->pipe_src), 569 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 570 571 intel_scaler_info(m, crtc); 572 573 if (crtc_state->bigjoiner_pipes) 574 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 575 crtc_state->bigjoiner_pipes, 576 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); 577 578 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 579 crtc_state->uapi.encoder_mask) 580 intel_encoder_info(m, crtc, encoder); 581 582 intel_plane_info(m, crtc); 583 584 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 585 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 586 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 587 588 crtc_updates_info(m, crtc, "\t"); 589 } 590 591 static int i915_display_info(struct seq_file *m, void *unused) 592 { 593 struct drm_i915_private *dev_priv = node_to_i915(m->private); 594 struct intel_crtc *crtc; 595 struct drm_connector *connector; 596 struct drm_connector_list_iter conn_iter; 597 intel_wakeref_t wakeref; 598 599 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 600 601 drm_modeset_lock_all(&dev_priv->drm); 602 603 seq_printf(m, "CRTC info\n"); 604 seq_printf(m, "---------\n"); 605 for_each_intel_crtc(&dev_priv->drm, crtc) 606 intel_crtc_info(m, crtc); 607 608 seq_printf(m, "\n"); 609 seq_printf(m, "Connector info\n"); 610 seq_printf(m, "--------------\n"); 611 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 612 drm_for_each_connector_iter(connector, &conn_iter) 613 intel_connector_info(m, connector); 614 drm_connector_list_iter_end(&conn_iter); 615 616 drm_modeset_unlock_all(&dev_priv->drm); 617 618 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 619 620 return 0; 621 } 622 623 static int i915_display_capabilities(struct seq_file *m, void *unused) 624 { 625 struct drm_i915_private *i915 = node_to_i915(m->private); 626 struct drm_printer p = drm_seq_file_printer(m); 627 628 intel_display_device_info_print(DISPLAY_INFO(i915), 629 DISPLAY_RUNTIME_INFO(i915), &p); 630 631 return 0; 632 } 633 634 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 635 { 636 struct drm_i915_private *dev_priv = node_to_i915(m->private); 637 struct intel_shared_dpll *pll; 638 int i; 639 640 drm_modeset_lock_all(&dev_priv->drm); 641 642 seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 643 dev_priv->display.dpll.ref_clks.nssc, 644 dev_priv->display.dpll.ref_clks.ssc); 645 646 for_each_shared_dpll(dev_priv, pll, i) { 647 seq_printf(m, "DPLL%i: %s, id: %i\n", pll->index, 648 pll->info->name, pll->info->id); 649 seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 650 pll->state.pipe_mask, pll->active_mask, 651 str_yes_no(pll->on)); 652 seq_printf(m, " tracked hardware state:\n"); 653 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll); 654 seq_printf(m, " dpll_md: 0x%08x\n", 655 pll->state.hw_state.dpll_md); 656 seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0); 657 seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1); 658 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll); 659 seq_printf(m, " cfgcr0: 0x%08x\n", pll->state.hw_state.cfgcr0); 660 seq_printf(m, " cfgcr1: 0x%08x\n", pll->state.hw_state.cfgcr1); 661 seq_printf(m, " div0: 0x%08x\n", pll->state.hw_state.div0); 662 seq_printf(m, " mg_refclkin_ctl: 0x%08x\n", 663 pll->state.hw_state.mg_refclkin_ctl); 664 seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n", 665 pll->state.hw_state.mg_clktop2_coreclkctl1); 666 seq_printf(m, " mg_clktop2_hsclkctl: 0x%08x\n", 667 pll->state.hw_state.mg_clktop2_hsclkctl); 668 seq_printf(m, " mg_pll_div0: 0x%08x\n", 669 pll->state.hw_state.mg_pll_div0); 670 seq_printf(m, " mg_pll_div1: 0x%08x\n", 671 pll->state.hw_state.mg_pll_div1); 672 seq_printf(m, " mg_pll_lf: 0x%08x\n", 673 pll->state.hw_state.mg_pll_lf); 674 seq_printf(m, " mg_pll_frac_lock: 0x%08x\n", 675 pll->state.hw_state.mg_pll_frac_lock); 676 seq_printf(m, " mg_pll_ssc: 0x%08x\n", 677 pll->state.hw_state.mg_pll_ssc); 678 seq_printf(m, " mg_pll_bias: 0x%08x\n", 679 pll->state.hw_state.mg_pll_bias); 680 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n", 681 pll->state.hw_state.mg_pll_tdc_coldst_bias); 682 } 683 drm_modeset_unlock_all(&dev_priv->drm); 684 685 return 0; 686 } 687 688 static int i915_ddb_info(struct seq_file *m, void *unused) 689 { 690 struct drm_i915_private *dev_priv = node_to_i915(m->private); 691 struct skl_ddb_entry *entry; 692 struct intel_crtc *crtc; 693 694 if (DISPLAY_VER(dev_priv) < 9) 695 return -ENODEV; 696 697 drm_modeset_lock_all(&dev_priv->drm); 698 699 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 700 701 for_each_intel_crtc(&dev_priv->drm, crtc) { 702 struct intel_crtc_state *crtc_state = 703 to_intel_crtc_state(crtc->base.state); 704 enum pipe pipe = crtc->pipe; 705 enum plane_id plane_id; 706 707 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 708 709 for_each_plane_id_on_crtc(crtc, plane_id) { 710 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 711 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 712 entry->start, entry->end, 713 skl_ddb_entry_size(entry)); 714 } 715 716 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 717 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 718 entry->end, skl_ddb_entry_size(entry)); 719 } 720 721 drm_modeset_unlock_all(&dev_priv->drm); 722 723 return 0; 724 } 725 726 static bool 727 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 728 enum i915_power_well_id power_well_id) 729 { 730 intel_wakeref_t wakeref; 731 bool is_enabled; 732 733 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 734 is_enabled = intel_display_power_well_is_enabled(i915, 735 power_well_id); 736 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 737 738 return is_enabled; 739 } 740 741 static int i915_lpsp_status(struct seq_file *m, void *unused) 742 { 743 struct drm_i915_private *i915 = node_to_i915(m->private); 744 bool lpsp_enabled = false; 745 746 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 747 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 748 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 749 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 750 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 751 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 752 } else { 753 seq_puts(m, "LPSP: not supported\n"); 754 return 0; 755 } 756 757 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 758 759 return 0; 760 } 761 762 static int i915_dp_mst_info(struct seq_file *m, void *unused) 763 { 764 struct drm_i915_private *dev_priv = node_to_i915(m->private); 765 struct intel_encoder *intel_encoder; 766 struct intel_digital_port *dig_port; 767 struct drm_connector *connector; 768 struct drm_connector_list_iter conn_iter; 769 770 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 771 drm_for_each_connector_iter(connector, &conn_iter) { 772 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 773 continue; 774 775 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 776 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 777 continue; 778 779 dig_port = enc_to_dig_port(intel_encoder); 780 if (!intel_dp_mst_source_support(&dig_port->dp)) 781 continue; 782 783 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 784 dig_port->base.base.base.id, 785 dig_port->base.base.name); 786 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 787 } 788 drm_connector_list_iter_end(&conn_iter); 789 790 return 0; 791 } 792 793 static ssize_t i915_displayport_test_active_write(struct file *file, 794 const char __user *ubuf, 795 size_t len, loff_t *offp) 796 { 797 char *input_buffer; 798 int status = 0; 799 struct drm_device *dev; 800 struct drm_connector *connector; 801 struct drm_connector_list_iter conn_iter; 802 struct intel_dp *intel_dp; 803 int val = 0; 804 805 dev = ((struct seq_file *)file->private_data)->private; 806 807 if (len == 0) 808 return 0; 809 810 input_buffer = memdup_user_nul(ubuf, len); 811 if (IS_ERR(input_buffer)) 812 return PTR_ERR(input_buffer); 813 814 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len); 815 816 drm_connector_list_iter_begin(dev, &conn_iter); 817 drm_for_each_connector_iter(connector, &conn_iter) { 818 struct intel_encoder *encoder; 819 820 if (connector->connector_type != 821 DRM_MODE_CONNECTOR_DisplayPort) 822 continue; 823 824 encoder = to_intel_encoder(connector->encoder); 825 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 826 continue; 827 828 if (encoder && connector->status == connector_status_connected) { 829 intel_dp = enc_to_intel_dp(encoder); 830 status = kstrtoint(input_buffer, 10, &val); 831 if (status < 0) 832 break; 833 drm_dbg(dev, "Got %d for test active\n", val); 834 /* To prevent erroneous activation of the compliance 835 * testing code, only accept an actual value of 1 here 836 */ 837 if (val == 1) 838 intel_dp->compliance.test_active = true; 839 else 840 intel_dp->compliance.test_active = false; 841 } 842 } 843 drm_connector_list_iter_end(&conn_iter); 844 kfree(input_buffer); 845 if (status < 0) 846 return status; 847 848 *offp += len; 849 return len; 850 } 851 852 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 853 { 854 struct drm_i915_private *dev_priv = m->private; 855 struct drm_connector *connector; 856 struct drm_connector_list_iter conn_iter; 857 struct intel_dp *intel_dp; 858 859 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 860 drm_for_each_connector_iter(connector, &conn_iter) { 861 struct intel_encoder *encoder; 862 863 if (connector->connector_type != 864 DRM_MODE_CONNECTOR_DisplayPort) 865 continue; 866 867 encoder = to_intel_encoder(connector->encoder); 868 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 869 continue; 870 871 if (encoder && connector->status == connector_status_connected) { 872 intel_dp = enc_to_intel_dp(encoder); 873 if (intel_dp->compliance.test_active) 874 seq_puts(m, "1"); 875 else 876 seq_puts(m, "0"); 877 } else 878 seq_puts(m, "0"); 879 } 880 drm_connector_list_iter_end(&conn_iter); 881 882 return 0; 883 } 884 885 static int i915_displayport_test_active_open(struct inode *inode, 886 struct file *file) 887 { 888 return single_open(file, i915_displayport_test_active_show, 889 inode->i_private); 890 } 891 892 static const struct file_operations i915_displayport_test_active_fops = { 893 .owner = THIS_MODULE, 894 .open = i915_displayport_test_active_open, 895 .read = seq_read, 896 .llseek = seq_lseek, 897 .release = single_release, 898 .write = i915_displayport_test_active_write 899 }; 900 901 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 902 { 903 struct drm_i915_private *dev_priv = m->private; 904 struct drm_connector *connector; 905 struct drm_connector_list_iter conn_iter; 906 struct intel_dp *intel_dp; 907 908 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 909 drm_for_each_connector_iter(connector, &conn_iter) { 910 struct intel_encoder *encoder; 911 912 if (connector->connector_type != 913 DRM_MODE_CONNECTOR_DisplayPort) 914 continue; 915 916 encoder = to_intel_encoder(connector->encoder); 917 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 918 continue; 919 920 if (encoder && connector->status == connector_status_connected) { 921 intel_dp = enc_to_intel_dp(encoder); 922 if (intel_dp->compliance.test_type == 923 DP_TEST_LINK_EDID_READ) 924 seq_printf(m, "%lx", 925 intel_dp->compliance.test_data.edid); 926 else if (intel_dp->compliance.test_type == 927 DP_TEST_LINK_VIDEO_PATTERN) { 928 seq_printf(m, "hdisplay: %d\n", 929 intel_dp->compliance.test_data.hdisplay); 930 seq_printf(m, "vdisplay: %d\n", 931 intel_dp->compliance.test_data.vdisplay); 932 seq_printf(m, "bpc: %u\n", 933 intel_dp->compliance.test_data.bpc); 934 } else if (intel_dp->compliance.test_type == 935 DP_TEST_LINK_PHY_TEST_PATTERN) { 936 seq_printf(m, "pattern: %d\n", 937 intel_dp->compliance.test_data.phytest.phy_pattern); 938 seq_printf(m, "Number of lanes: %d\n", 939 intel_dp->compliance.test_data.phytest.num_lanes); 940 seq_printf(m, "Link Rate: %d\n", 941 intel_dp->compliance.test_data.phytest.link_rate); 942 seq_printf(m, "level: %02x\n", 943 intel_dp->train_set[0]); 944 } 945 } else 946 seq_puts(m, "0"); 947 } 948 drm_connector_list_iter_end(&conn_iter); 949 950 return 0; 951 } 952 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 953 954 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 955 { 956 struct drm_i915_private *dev_priv = m->private; 957 struct drm_connector *connector; 958 struct drm_connector_list_iter conn_iter; 959 struct intel_dp *intel_dp; 960 961 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 962 drm_for_each_connector_iter(connector, &conn_iter) { 963 struct intel_encoder *encoder; 964 965 if (connector->connector_type != 966 DRM_MODE_CONNECTOR_DisplayPort) 967 continue; 968 969 encoder = to_intel_encoder(connector->encoder); 970 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 971 continue; 972 973 if (encoder && connector->status == connector_status_connected) { 974 intel_dp = enc_to_intel_dp(encoder); 975 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 976 } else 977 seq_puts(m, "0"); 978 } 979 drm_connector_list_iter_end(&conn_iter); 980 981 return 0; 982 } 983 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 984 985 static ssize_t 986 i915_fifo_underrun_reset_write(struct file *filp, 987 const char __user *ubuf, 988 size_t cnt, loff_t *ppos) 989 { 990 struct drm_i915_private *dev_priv = filp->private_data; 991 struct intel_crtc *crtc; 992 int ret; 993 bool reset; 994 995 ret = kstrtobool_from_user(ubuf, cnt, &reset); 996 if (ret) 997 return ret; 998 999 if (!reset) 1000 return cnt; 1001 1002 for_each_intel_crtc(&dev_priv->drm, crtc) { 1003 struct drm_crtc_commit *commit; 1004 struct intel_crtc_state *crtc_state; 1005 1006 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1007 if (ret) 1008 return ret; 1009 1010 crtc_state = to_intel_crtc_state(crtc->base.state); 1011 commit = crtc_state->uapi.commit; 1012 if (commit) { 1013 ret = wait_for_completion_interruptible(&commit->hw_done); 1014 if (!ret) 1015 ret = wait_for_completion_interruptible(&commit->flip_done); 1016 } 1017 1018 if (!ret && crtc_state->hw.active) { 1019 drm_dbg_kms(&dev_priv->drm, 1020 "Re-arming FIFO underruns on pipe %c\n", 1021 pipe_name(crtc->pipe)); 1022 1023 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1024 } 1025 1026 drm_modeset_unlock(&crtc->base.mutex); 1027 1028 if (ret) 1029 return ret; 1030 } 1031 1032 intel_fbc_reset_underrun(dev_priv); 1033 1034 return cnt; 1035 } 1036 1037 static const struct file_operations i915_fifo_underrun_reset_ops = { 1038 .owner = THIS_MODULE, 1039 .open = simple_open, 1040 .write = i915_fifo_underrun_reset_write, 1041 .llseek = default_llseek, 1042 }; 1043 1044 static const struct drm_info_list intel_display_debugfs_list[] = { 1045 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1046 {"i915_sr_status", i915_sr_status, 0}, 1047 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1048 {"i915_power_domain_info", i915_power_domain_info, 0}, 1049 {"i915_display_info", i915_display_info, 0}, 1050 {"i915_display_capabilities", i915_display_capabilities, 0}, 1051 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1052 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1053 {"i915_ddb_info", i915_ddb_info, 0}, 1054 {"i915_lpsp_status", i915_lpsp_status, 0}, 1055 }; 1056 1057 static const struct { 1058 const char *name; 1059 const struct file_operations *fops; 1060 } intel_display_debugfs_files[] = { 1061 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1062 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1063 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1064 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1065 }; 1066 1067 void intel_display_debugfs_register(struct drm_i915_private *i915) 1068 { 1069 struct drm_minor *minor = i915->drm.primary; 1070 int i; 1071 1072 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1073 debugfs_create_file(intel_display_debugfs_files[i].name, 1074 0644, 1075 minor->debugfs_root, 1076 to_i915(minor->dev), 1077 intel_display_debugfs_files[i].fops); 1078 } 1079 1080 drm_debugfs_create_files(intel_display_debugfs_list, 1081 ARRAY_SIZE(intel_display_debugfs_list), 1082 minor->debugfs_root, minor); 1083 1084 intel_bios_debugfs_register(i915); 1085 intel_cdclk_debugfs_register(i915); 1086 intel_dmc_debugfs_register(i915); 1087 intel_fbc_debugfs_register(i915); 1088 intel_hpd_debugfs_register(i915); 1089 intel_opregion_debugfs_register(i915); 1090 intel_psr_debugfs_register(i915); 1091 intel_wm_debugfs_register(i915); 1092 intel_display_debugfs_params(i915); 1093 } 1094 1095 static int i915_panel_show(struct seq_file *m, void *data) 1096 { 1097 struct intel_connector *connector = m->private; 1098 struct intel_dp *intel_dp = intel_attached_dp(connector); 1099 1100 if (connector->base.status != connector_status_connected) 1101 return -ENODEV; 1102 1103 seq_printf(m, "Panel power up delay: %d\n", 1104 intel_dp->pps.panel_power_up_delay); 1105 seq_printf(m, "Panel power down delay: %d\n", 1106 intel_dp->pps.panel_power_down_delay); 1107 seq_printf(m, "Backlight on delay: %d\n", 1108 intel_dp->pps.backlight_on_delay); 1109 seq_printf(m, "Backlight off delay: %d\n", 1110 intel_dp->pps.backlight_off_delay); 1111 1112 return 0; 1113 } 1114 DEFINE_SHOW_ATTRIBUTE(i915_panel); 1115 1116 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1117 { 1118 struct intel_connector *connector = m->private; 1119 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1120 int ret; 1121 1122 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1123 if (ret) 1124 return ret; 1125 1126 if (!connector->base.encoder || 1127 connector->base.status != connector_status_connected) { 1128 ret = -ENODEV; 1129 goto out; 1130 } 1131 1132 seq_printf(m, "%s:%d HDCP version: ", connector->base.name, 1133 connector->base.base.id); 1134 intel_hdcp_info(m, connector); 1135 1136 out: 1137 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1138 1139 return ret; 1140 } 1141 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1142 1143 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1144 { 1145 struct intel_connector *connector = m->private; 1146 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1147 struct intel_encoder *encoder = intel_attached_encoder(connector); 1148 int connector_type = connector->base.connector_type; 1149 bool lpsp_capable = false; 1150 1151 if (!encoder) 1152 return -ENODEV; 1153 1154 if (connector->base.status != connector_status_connected) 1155 return -ENODEV; 1156 1157 if (DISPLAY_VER(i915) >= 13) 1158 lpsp_capable = encoder->port <= PORT_B; 1159 else if (DISPLAY_VER(i915) >= 12) 1160 /* 1161 * Actually TGL can drive LPSP on port till DDI_C 1162 * but there is no physical connected DDI_C on TGL sku's, 1163 * even driver is not initilizing DDI_C port for gen12. 1164 */ 1165 lpsp_capable = encoder->port <= PORT_B; 1166 else if (DISPLAY_VER(i915) == 11) 1167 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 1168 connector_type == DRM_MODE_CONNECTOR_eDP); 1169 else if (IS_DISPLAY_VER(i915, 9, 10)) 1170 lpsp_capable = (encoder->port == PORT_A && 1171 (connector_type == DRM_MODE_CONNECTOR_DSI || 1172 connector_type == DRM_MODE_CONNECTOR_eDP || 1173 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1174 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1175 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 1176 1177 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1178 1179 return 0; 1180 } 1181 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1182 1183 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1184 { 1185 struct intel_connector *connector = m->private; 1186 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1187 struct drm_crtc *crtc; 1188 struct intel_dp *intel_dp; 1189 struct drm_modeset_acquire_ctx ctx; 1190 struct intel_crtc_state *crtc_state = NULL; 1191 int ret = 0; 1192 bool try_again = false; 1193 1194 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1195 1196 do { 1197 try_again = false; 1198 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, 1199 &ctx); 1200 if (ret) { 1201 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1202 try_again = true; 1203 continue; 1204 } 1205 break; 1206 } 1207 crtc = connector->base.state->crtc; 1208 if (connector->base.status != connector_status_connected || !crtc) { 1209 ret = -ENODEV; 1210 break; 1211 } 1212 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1213 if (ret == -EDEADLK) { 1214 ret = drm_modeset_backoff(&ctx); 1215 if (!ret) { 1216 try_again = true; 1217 continue; 1218 } 1219 break; 1220 } else if (ret) { 1221 break; 1222 } 1223 intel_dp = intel_attached_dp(connector); 1224 crtc_state = to_intel_crtc_state(crtc->state); 1225 seq_printf(m, "DSC_Enabled: %s\n", 1226 str_yes_no(crtc_state->dsc.compression_enable)); 1227 seq_printf(m, "DSC_Sink_Support: %s\n", 1228 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 1229 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1230 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1231 DP_DSC_RGB)), 1232 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1233 DP_DSC_YCbCr420_Native)), 1234 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1235 DP_DSC_YCbCr444))); 1236 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 1237 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 1238 seq_printf(m, "Force_DSC_Enable: %s\n", 1239 str_yes_no(intel_dp->force_dsc_en)); 1240 if (!intel_dp_is_edp(intel_dp)) 1241 seq_printf(m, "FEC_Sink_Support: %s\n", 1242 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 1243 } while (try_again); 1244 1245 drm_modeset_drop_locks(&ctx); 1246 drm_modeset_acquire_fini(&ctx); 1247 1248 return ret; 1249 } 1250 1251 static ssize_t i915_dsc_fec_support_write(struct file *file, 1252 const char __user *ubuf, 1253 size_t len, loff_t *offp) 1254 { 1255 struct seq_file *m = file->private_data; 1256 struct intel_connector *connector = m->private; 1257 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1258 struct intel_encoder *encoder = intel_attached_encoder(connector); 1259 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1260 bool dsc_enable = false; 1261 int ret; 1262 1263 if (len == 0) 1264 return 0; 1265 1266 drm_dbg(&i915->drm, 1267 "Copied %zu bytes from user to force DSC\n", len); 1268 1269 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1270 if (ret < 0) 1271 return ret; 1272 1273 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1274 (dsc_enable) ? "true" : "false"); 1275 intel_dp->force_dsc_en = dsc_enable; 1276 1277 *offp += len; 1278 return len; 1279 } 1280 1281 static int i915_dsc_fec_support_open(struct inode *inode, 1282 struct file *file) 1283 { 1284 return single_open(file, i915_dsc_fec_support_show, 1285 inode->i_private); 1286 } 1287 1288 static const struct file_operations i915_dsc_fec_support_fops = { 1289 .owner = THIS_MODULE, 1290 .open = i915_dsc_fec_support_open, 1291 .read = seq_read, 1292 .llseek = seq_lseek, 1293 .release = single_release, 1294 .write = i915_dsc_fec_support_write 1295 }; 1296 1297 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1298 { 1299 struct intel_connector *connector = m->private; 1300 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1301 struct intel_encoder *encoder = intel_attached_encoder(connector); 1302 struct drm_crtc *crtc; 1303 struct intel_crtc_state *crtc_state; 1304 int ret; 1305 1306 if (!encoder) 1307 return -ENODEV; 1308 1309 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1310 if (ret) 1311 return ret; 1312 1313 crtc = connector->base.state->crtc; 1314 if (connector->base.status != connector_status_connected || !crtc) { 1315 ret = -ENODEV; 1316 goto out; 1317 } 1318 1319 crtc_state = to_intel_crtc_state(crtc->state); 1320 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1321 1322 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1323 1324 return ret; 1325 } 1326 1327 static ssize_t i915_dsc_bpc_write(struct file *file, 1328 const char __user *ubuf, 1329 size_t len, loff_t *offp) 1330 { 1331 struct seq_file *m = file->private_data; 1332 struct intel_connector *connector = m->private; 1333 struct intel_encoder *encoder = intel_attached_encoder(connector); 1334 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1335 int dsc_bpc = 0; 1336 int ret; 1337 1338 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1339 if (ret < 0) 1340 return ret; 1341 1342 intel_dp->force_dsc_bpc = dsc_bpc; 1343 *offp += len; 1344 1345 return len; 1346 } 1347 1348 static int i915_dsc_bpc_open(struct inode *inode, 1349 struct file *file) 1350 { 1351 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1352 } 1353 1354 static const struct file_operations i915_dsc_bpc_fops = { 1355 .owner = THIS_MODULE, 1356 .open = i915_dsc_bpc_open, 1357 .read = seq_read, 1358 .llseek = seq_lseek, 1359 .release = single_release, 1360 .write = i915_dsc_bpc_write 1361 }; 1362 1363 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1364 { 1365 struct intel_connector *connector = m->private; 1366 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1367 struct intel_encoder *encoder = intel_attached_encoder(connector); 1368 struct drm_crtc *crtc; 1369 struct intel_crtc_state *crtc_state; 1370 int ret; 1371 1372 if (!encoder) 1373 return -ENODEV; 1374 1375 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1376 if (ret) 1377 return ret; 1378 1379 crtc = connector->base.state->crtc; 1380 if (connector->base.status != connector_status_connected || !crtc) { 1381 ret = -ENODEV; 1382 goto out; 1383 } 1384 1385 crtc_state = to_intel_crtc_state(crtc->state); 1386 seq_printf(m, "DSC_Output_Format: %s\n", 1387 intel_output_format_name(crtc_state->output_format)); 1388 1389 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1390 1391 return ret; 1392 } 1393 1394 static ssize_t i915_dsc_output_format_write(struct file *file, 1395 const char __user *ubuf, 1396 size_t len, loff_t *offp) 1397 { 1398 struct seq_file *m = file->private_data; 1399 struct intel_connector *connector = m->private; 1400 struct intel_encoder *encoder = intel_attached_encoder(connector); 1401 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1402 int dsc_output_format = 0; 1403 int ret; 1404 1405 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1406 if (ret < 0) 1407 return ret; 1408 1409 intel_dp->force_dsc_output_format = dsc_output_format; 1410 *offp += len; 1411 1412 return len; 1413 } 1414 1415 static int i915_dsc_output_format_open(struct inode *inode, 1416 struct file *file) 1417 { 1418 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1419 } 1420 1421 static const struct file_operations i915_dsc_output_format_fops = { 1422 .owner = THIS_MODULE, 1423 .open = i915_dsc_output_format_open, 1424 .read = seq_read, 1425 .llseek = seq_lseek, 1426 .release = single_release, 1427 .write = i915_dsc_output_format_write 1428 }; 1429 1430 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1431 { 1432 struct intel_connector *connector = m->private; 1433 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1434 struct intel_encoder *encoder = intel_attached_encoder(connector); 1435 struct drm_crtc *crtc; 1436 struct intel_dp *intel_dp; 1437 int ret; 1438 1439 if (!encoder) 1440 return -ENODEV; 1441 1442 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1443 if (ret) 1444 return ret; 1445 1446 crtc = connector->base.state->crtc; 1447 if (connector->base.status != connector_status_connected || !crtc) { 1448 ret = -ENODEV; 1449 goto out; 1450 } 1451 1452 intel_dp = intel_attached_dp(connector); 1453 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1454 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1455 1456 out: 1457 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1458 1459 return ret; 1460 } 1461 1462 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1463 const char __user *ubuf, 1464 size_t len, loff_t *offp) 1465 { 1466 struct seq_file *m = file->private_data; 1467 struct intel_connector *connector = m->private; 1468 struct intel_encoder *encoder = intel_attached_encoder(connector); 1469 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1470 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1471 bool dsc_fractional_bpp_enable = false; 1472 int ret; 1473 1474 if (len == 0) 1475 return 0; 1476 1477 drm_dbg(&i915->drm, 1478 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1479 1480 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1481 if (ret < 0) 1482 return ret; 1483 1484 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n", 1485 (dsc_fractional_bpp_enable) ? "true" : "false"); 1486 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1487 1488 *offp += len; 1489 1490 return len; 1491 } 1492 1493 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1494 struct file *file) 1495 { 1496 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1497 } 1498 1499 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1500 .owner = THIS_MODULE, 1501 .open = i915_dsc_fractional_bpp_open, 1502 .read = seq_read, 1503 .llseek = seq_lseek, 1504 .release = single_release, 1505 .write = i915_dsc_fractional_bpp_write 1506 }; 1507 1508 /* 1509 * Returns the Current CRTC's bpc. 1510 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1511 */ 1512 static int i915_current_bpc_show(struct seq_file *m, void *data) 1513 { 1514 struct intel_crtc *crtc = m->private; 1515 struct intel_crtc_state *crtc_state; 1516 int ret; 1517 1518 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1519 if (ret) 1520 return ret; 1521 1522 crtc_state = to_intel_crtc_state(crtc->base.state); 1523 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1524 1525 drm_modeset_unlock(&crtc->base.mutex); 1526 1527 return ret; 1528 } 1529 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1530 1531 /* Pipe may differ from crtc index if pipes are fused off */ 1532 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1533 { 1534 struct intel_crtc *crtc = m->private; 1535 1536 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1537 1538 return 0; 1539 } 1540 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1541 1542 /** 1543 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1544 * @connector: pointer to a registered intel_connector 1545 * 1546 * Cleanup will be done by drm_connector_unregister() through a call to 1547 * drm_debugfs_connector_remove(). 1548 */ 1549 void intel_connector_debugfs_add(struct intel_connector *connector) 1550 { 1551 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1552 struct dentry *root = connector->base.debugfs_entry; 1553 int connector_type = connector->base.connector_type; 1554 1555 /* The connector must have been registered beforehands. */ 1556 if (!root) 1557 return; 1558 1559 intel_drrs_connector_debugfs_add(connector); 1560 intel_psr_connector_debugfs_add(connector); 1561 1562 if (connector_type == DRM_MODE_CONNECTOR_eDP) 1563 debugfs_create_file("i915_panel_timings", 0444, root, 1564 connector, &i915_panel_fops); 1565 1566 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1567 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1568 connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1569 debugfs_create_file("i915_hdcp_sink_capability", 0444, root, 1570 connector, &i915_hdcp_sink_capability_fops); 1571 } 1572 1573 if (DISPLAY_VER(i915) >= 11 && 1574 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) || 1575 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1576 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1577 connector, &i915_dsc_fec_support_fops); 1578 1579 debugfs_create_file("i915_dsc_bpc", 0644, root, 1580 connector, &i915_dsc_bpc_fops); 1581 1582 debugfs_create_file("i915_dsc_output_format", 0644, root, 1583 connector, &i915_dsc_output_format_fops); 1584 1585 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1586 connector, &i915_dsc_fractional_bpp_fops); 1587 } 1588 1589 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1590 connector_type == DRM_MODE_CONNECTOR_eDP || 1591 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1592 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1593 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1594 debugfs_create_file("i915_lpsp_capability", 0444, root, 1595 connector, &i915_lpsp_capability_fops); 1596 } 1597 1598 /** 1599 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1600 * @crtc: pointer to a drm_crtc 1601 * 1602 * Failure to add debugfs entries should generally be ignored. 1603 */ 1604 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1605 { 1606 struct dentry *root = crtc->base.debugfs_entry; 1607 1608 if (!root) 1609 return; 1610 1611 crtc_updates_add(crtc); 1612 intel_drrs_crtc_debugfs_add(crtc); 1613 intel_fbc_crtc_debugfs_add(crtc); 1614 hsw_ips_crtc_debugfs_add(crtc); 1615 1616 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1617 &i915_current_bpc_fops); 1618 debugfs_create_file("i915_pipe", 0444, root, crtc, 1619 &intel_crtc_pipe_fops); 1620 } 1621