1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/debugfs.h> 7 #include <linux/string_helpers.h> 8 9 #include <drm/drm_debugfs.h> 10 #include <drm/drm_edid.h> 11 #include <drm/drm_fourcc.h> 12 13 #include "hsw_ips.h" 14 #include "i915_irq.h" 15 #include "i915_reg.h" 16 #include "intel_alpm.h" 17 #include "intel_bo.h" 18 #include "intel_crtc.h" 19 #include "intel_crtc_state_dump.h" 20 #include "intel_de.h" 21 #include "intel_display_debugfs.h" 22 #include "intel_display_debugfs_params.h" 23 #include "intel_display_power.h" 24 #include "intel_display_power_well.h" 25 #include "intel_display_types.h" 26 #include "intel_dmc.h" 27 #include "intel_dp.h" 28 #include "intel_dp_link_training.h" 29 #include "intel_dp_mst.h" 30 #include "intel_dp_test.h" 31 #include "intel_drrs.h" 32 #include "intel_fb.h" 33 #include "intel_fbc.h" 34 #include "intel_fbdev.h" 35 #include "intel_hdcp.h" 36 #include "intel_hdmi.h" 37 #include "intel_hotplug.h" 38 #include "intel_panel.h" 39 #include "intel_pps.h" 40 #include "intel_psr.h" 41 #include "intel_psr_regs.h" 42 #include "intel_vdsc.h" 43 #include "intel_wm.h" 44 45 static struct intel_display *node_to_intel_display(struct drm_info_node *node) 46 { 47 return to_intel_display(node->minor->dev); 48 } 49 50 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 51 { 52 return to_i915(node->minor->dev); 53 } 54 55 static int intel_display_caps(struct seq_file *m, void *data) 56 { 57 struct intel_display *display = node_to_intel_display(m->private); 58 struct drm_printer p = drm_seq_file_printer(m); 59 60 intel_display_device_info_print(DISPLAY_INFO(display), 61 DISPLAY_RUNTIME_INFO(display), &p); 62 intel_display_params_dump(&display->params, display->drm->driver->name, &p); 63 64 return 0; 65 } 66 67 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 68 { 69 struct drm_i915_private *dev_priv = node_to_i915(m->private); 70 71 spin_lock(&dev_priv->display.fb_tracking.lock); 72 73 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 74 dev_priv->display.fb_tracking.busy_bits); 75 76 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 77 dev_priv->display.fb_tracking.flip_bits); 78 79 spin_unlock(&dev_priv->display.fb_tracking.lock); 80 81 return 0; 82 } 83 84 static int i915_sr_status(struct seq_file *m, void *unused) 85 { 86 struct drm_i915_private *dev_priv = node_to_i915(m->private); 87 intel_wakeref_t wakeref; 88 bool sr_enabled = false; 89 90 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 91 92 if (DISPLAY_VER(dev_priv) >= 9) 93 /* no global SR status; inspect per-plane WM */; 94 else if (HAS_PCH_SPLIT(dev_priv)) 95 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 96 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 97 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 98 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 99 else if (IS_I915GM(dev_priv)) 100 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 101 else if (IS_PINEVIEW(dev_priv)) 102 sr_enabled = intel_de_read(dev_priv, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN; 103 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 104 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 105 106 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 107 108 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 109 110 return 0; 111 } 112 113 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 114 { 115 struct drm_i915_private *dev_priv = node_to_i915(m->private); 116 struct intel_framebuffer *fbdev_fb = NULL; 117 struct drm_framebuffer *drm_fb; 118 119 #ifdef CONFIG_DRM_FBDEV_EMULATION 120 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 121 if (fbdev_fb) { 122 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 123 fbdev_fb->base.width, 124 fbdev_fb->base.height, 125 fbdev_fb->base.format->depth, 126 fbdev_fb->base.format->cpp[0] * 8, 127 fbdev_fb->base.modifier, 128 drm_framebuffer_read_refcount(&fbdev_fb->base)); 129 intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base)); 130 seq_putc(m, '\n'); 131 } 132 #endif 133 134 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 135 drm_for_each_fb(drm_fb, &dev_priv->drm) { 136 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 137 if (fb == fbdev_fb) 138 continue; 139 140 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 141 fb->base.width, 142 fb->base.height, 143 fb->base.format->depth, 144 fb->base.format->cpp[0] * 8, 145 fb->base.modifier, 146 drm_framebuffer_read_refcount(&fb->base)); 147 intel_bo_describe(m, intel_fb_bo(&fb->base)); 148 seq_putc(m, '\n'); 149 } 150 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 151 152 return 0; 153 } 154 155 static int i915_power_domain_info(struct seq_file *m, void *unused) 156 { 157 struct drm_i915_private *i915 = node_to_i915(m->private); 158 159 intel_display_power_debug(i915, m); 160 161 return 0; 162 } 163 164 static void intel_seq_print_mode(struct seq_file *m, int tabs, 165 const struct drm_display_mode *mode) 166 { 167 int i; 168 169 for (i = 0; i < tabs; i++) 170 seq_putc(m, '\t'); 171 172 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 173 } 174 175 static void intel_encoder_info(struct seq_file *m, 176 struct intel_crtc *crtc, 177 struct intel_encoder *encoder) 178 { 179 struct drm_i915_private *dev_priv = node_to_i915(m->private); 180 struct drm_connector_list_iter conn_iter; 181 struct drm_connector *connector; 182 183 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 184 encoder->base.base.id, encoder->base.name); 185 186 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 187 drm_for_each_connector_iter(connector, &conn_iter) { 188 const struct drm_connector_state *conn_state = 189 connector->state; 190 191 if (conn_state->best_encoder != &encoder->base) 192 continue; 193 194 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 195 connector->base.id, connector->name); 196 } 197 drm_connector_list_iter_end(&conn_iter); 198 } 199 200 static void intel_panel_info(struct seq_file *m, 201 struct intel_connector *connector) 202 { 203 const struct drm_display_mode *fixed_mode; 204 205 if (list_empty(&connector->panel.fixed_modes)) 206 return; 207 208 seq_puts(m, "\tfixed modes:\n"); 209 210 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 211 intel_seq_print_mode(m, 2, fixed_mode); 212 } 213 214 static void intel_hdcp_info(struct seq_file *m, 215 struct intel_connector *intel_connector, 216 bool remote_req) 217 { 218 bool hdcp_cap = false, hdcp2_cap = false; 219 220 if (!intel_connector->hdcp.shim) { 221 seq_puts(m, "No Connector Support"); 222 goto out; 223 } 224 225 if (remote_req) { 226 intel_hdcp_get_remote_capability(intel_connector, 227 &hdcp_cap, 228 &hdcp2_cap); 229 } else { 230 hdcp_cap = intel_hdcp_get_capability(intel_connector); 231 hdcp2_cap = intel_hdcp2_get_capability(intel_connector); 232 } 233 234 if (hdcp_cap) 235 seq_puts(m, "HDCP1.4 "); 236 if (hdcp2_cap) 237 seq_puts(m, "HDCP2.2 "); 238 239 if (!hdcp_cap && !hdcp2_cap) 240 seq_puts(m, "None"); 241 242 out: 243 seq_puts(m, "\n"); 244 } 245 246 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 247 { 248 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 249 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 250 251 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 252 seq_printf(m, "\taudio support: %s\n", 253 str_yes_no(connector->base.display_info.has_audio)); 254 255 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 256 connector->detect_edid, &intel_dp->aux); 257 } 258 259 static void intel_dp_mst_info(struct seq_file *m, 260 struct intel_connector *connector) 261 { 262 bool has_audio = connector->base.display_info.has_audio; 263 264 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 265 } 266 267 static void intel_hdmi_info(struct seq_file *m, 268 struct intel_connector *connector) 269 { 270 bool has_audio = connector->base.display_info.has_audio; 271 272 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 273 } 274 275 static void intel_connector_info(struct seq_file *m, 276 struct drm_connector *connector) 277 { 278 struct intel_connector *intel_connector = to_intel_connector(connector); 279 const struct drm_display_mode *mode; 280 281 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 282 connector->base.id, connector->name, 283 drm_get_connector_status_name(connector->status)); 284 285 if (connector->status == connector_status_disconnected) 286 return; 287 288 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 289 connector->display_info.width_mm, 290 connector->display_info.height_mm); 291 seq_printf(m, "\tsubpixel order: %s\n", 292 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 293 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 294 295 switch (connector->connector_type) { 296 case DRM_MODE_CONNECTOR_DisplayPort: 297 case DRM_MODE_CONNECTOR_eDP: 298 if (intel_connector->mst_port) 299 intel_dp_mst_info(m, intel_connector); 300 else 301 intel_dp_info(m, intel_connector); 302 break; 303 case DRM_MODE_CONNECTOR_HDMIA: 304 intel_hdmi_info(m, intel_connector); 305 break; 306 default: 307 break; 308 } 309 310 seq_puts(m, "\tHDCP version: "); 311 if (intel_connector->mst_port) { 312 intel_hdcp_info(m, intel_connector, true); 313 seq_puts(m, "\tMST Hub HDCP version: "); 314 } 315 intel_hdcp_info(m, intel_connector, false); 316 317 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 318 319 intel_panel_info(m, intel_connector); 320 321 seq_printf(m, "\tmodes:\n"); 322 list_for_each_entry(mode, &connector->modes, head) 323 intel_seq_print_mode(m, 2, mode); 324 } 325 326 static const char *plane_type(enum drm_plane_type type) 327 { 328 switch (type) { 329 case DRM_PLANE_TYPE_OVERLAY: 330 return "OVL"; 331 case DRM_PLANE_TYPE_PRIMARY: 332 return "PRI"; 333 case DRM_PLANE_TYPE_CURSOR: 334 return "CUR"; 335 /* 336 * Deliberately omitting default: to generate compiler warnings 337 * when a new drm_plane_type gets added. 338 */ 339 } 340 341 return "unknown"; 342 } 343 344 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 345 { 346 /* 347 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 348 * will print them all to visualize if the values are misused 349 */ 350 snprintf(buf, bufsize, 351 "%s%s%s%s%s%s(0x%08x)", 352 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 353 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 354 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 355 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 356 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 357 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 358 rotation); 359 } 360 361 static const char *plane_visibility(const struct intel_plane_state *plane_state) 362 { 363 if (plane_state->uapi.visible) 364 return "visible"; 365 366 if (plane_state->planar_slave) 367 return "planar-slave"; 368 369 return "hidden"; 370 } 371 372 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 373 { 374 const struct intel_plane_state *plane_state = 375 to_intel_plane_state(plane->base.state); 376 const struct drm_framebuffer *fb = plane_state->uapi.fb; 377 struct drm_rect src, dst; 378 char rot_str[48]; 379 380 src = drm_plane_state_src(&plane_state->uapi); 381 dst = drm_plane_state_dest(&plane_state->uapi); 382 383 plane_rotation(rot_str, sizeof(rot_str), 384 plane_state->uapi.rotation); 385 386 seq_puts(m, "\t\tuapi: [FB:"); 387 if (fb) 388 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 389 &fb->format->format, fb->modifier, fb->width, 390 fb->height); 391 else 392 seq_puts(m, "0] n/a,0x0,0x0,"); 393 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 394 ", rotation=%s\n", plane_visibility(plane_state), 395 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 396 397 if (plane_state->planar_linked_plane) 398 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 399 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 400 plane_state->planar_slave ? "slave" : "master"); 401 } 402 403 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 404 { 405 const struct intel_plane_state *plane_state = 406 to_intel_plane_state(plane->base.state); 407 const struct drm_framebuffer *fb = plane_state->hw.fb; 408 char rot_str[48]; 409 410 if (!fb) 411 return; 412 413 plane_rotation(rot_str, sizeof(rot_str), 414 plane_state->hw.rotation); 415 416 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 417 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 418 fb->base.id, &fb->format->format, 419 fb->modifier, fb->width, fb->height, 420 str_yes_no(plane_state->uapi.visible), 421 DRM_RECT_FP_ARG(&plane_state->uapi.src), 422 DRM_RECT_ARG(&plane_state->uapi.dst), 423 rot_str); 424 } 425 426 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 427 { 428 struct drm_i915_private *dev_priv = node_to_i915(m->private); 429 struct intel_plane *plane; 430 431 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 432 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 433 plane->base.base.id, plane->base.name, 434 plane_type(plane->base.type)); 435 intel_plane_uapi_info(m, plane); 436 intel_plane_hw_info(m, plane); 437 } 438 } 439 440 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 441 { 442 const struct intel_crtc_state *crtc_state = 443 to_intel_crtc_state(crtc->base.state); 444 int num_scalers = crtc->num_scalers; 445 int i; 446 447 /* Not all platforms have a scaler */ 448 if (num_scalers) { 449 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 450 num_scalers, 451 crtc_state->scaler_state.scaler_users, 452 crtc_state->scaler_state.scaler_id, 453 crtc_state->hw.scaling_filter); 454 455 for (i = 0; i < num_scalers; i++) { 456 const struct intel_scaler *sc = 457 &crtc_state->scaler_state.scalers[i]; 458 459 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 460 i, str_yes_no(sc->in_use), sc->mode); 461 } 462 seq_puts(m, "\n"); 463 } else { 464 seq_puts(m, "\tNo scalers available on this platform\n"); 465 } 466 } 467 468 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 469 static void crtc_updates_info(struct seq_file *m, 470 struct intel_crtc *crtc, 471 const char *hdr) 472 { 473 u64 count; 474 int row; 475 476 count = 0; 477 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 478 count += crtc->debug.vbl.times[row]; 479 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 480 if (!count) 481 return; 482 483 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 484 char columns[80] = " |"; 485 unsigned int x; 486 487 if (row & 1) { 488 const char *units; 489 490 if (row > 10) { 491 x = 1000000; 492 units = "ms"; 493 } else { 494 x = 1000; 495 units = "us"; 496 } 497 498 snprintf(columns, sizeof(columns), "%4ld%s |", 499 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 500 } 501 502 if (crtc->debug.vbl.times[row]) { 503 x = ilog2(crtc->debug.vbl.times[row]); 504 memset(columns + 8, '*', x); 505 columns[8 + x] = '\0'; 506 } 507 508 seq_printf(m, "%s%s\n", hdr, columns); 509 } 510 511 seq_printf(m, "%sMin update: %lluns\n", 512 hdr, crtc->debug.vbl.min); 513 seq_printf(m, "%sMax update: %lluns\n", 514 hdr, crtc->debug.vbl.max); 515 seq_printf(m, "%sAverage update: %lluns\n", 516 hdr, div64_u64(crtc->debug.vbl.sum, count)); 517 seq_printf(m, "%sOverruns > %uus: %u\n", 518 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 519 } 520 521 static int crtc_updates_show(struct seq_file *m, void *data) 522 { 523 crtc_updates_info(m, m->private, ""); 524 return 0; 525 } 526 527 static int crtc_updates_open(struct inode *inode, struct file *file) 528 { 529 return single_open(file, crtc_updates_show, inode->i_private); 530 } 531 532 static ssize_t crtc_updates_write(struct file *file, 533 const char __user *ubuf, 534 size_t len, loff_t *offp) 535 { 536 struct seq_file *m = file->private_data; 537 struct intel_crtc *crtc = m->private; 538 539 /* May race with an update. Meh. */ 540 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 541 542 return len; 543 } 544 545 static const struct file_operations crtc_updates_fops = { 546 .owner = THIS_MODULE, 547 .open = crtc_updates_open, 548 .read = seq_read, 549 .llseek = seq_lseek, 550 .release = single_release, 551 .write = crtc_updates_write 552 }; 553 554 static void crtc_updates_add(struct intel_crtc *crtc) 555 { 556 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 557 crtc, &crtc_updates_fops); 558 } 559 560 #else 561 static void crtc_updates_info(struct seq_file *m, 562 struct intel_crtc *crtc, 563 const char *hdr) 564 { 565 } 566 567 static void crtc_updates_add(struct intel_crtc *crtc) 568 { 569 } 570 #endif 571 572 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 573 { 574 struct drm_i915_private *dev_priv = node_to_i915(m->private); 575 struct drm_printer p = drm_seq_file_printer(m); 576 const struct intel_crtc_state *crtc_state = 577 to_intel_crtc_state(crtc->base.state); 578 struct intel_encoder *encoder; 579 580 seq_printf(m, "[CRTC:%d:%s]:\n", 581 crtc->base.base.id, crtc->base.name); 582 583 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 584 str_yes_no(crtc_state->uapi.enable), 585 str_yes_no(crtc_state->uapi.active), 586 DRM_MODE_ARG(&crtc_state->uapi.mode)); 587 588 seq_printf(m, "\thw: enable=%s, active=%s\n", 589 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 590 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 591 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 592 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 593 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 594 595 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 596 DRM_RECT_ARG(&crtc_state->pipe_src), 597 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 598 599 intel_scaler_info(m, crtc); 600 601 if (crtc_state->joiner_pipes) 602 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 603 crtc_state->joiner_pipes, 604 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); 605 606 intel_vdsc_state_dump(&p, 1, crtc_state); 607 608 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 609 crtc_state->uapi.encoder_mask) 610 intel_encoder_info(m, crtc, encoder); 611 612 intel_plane_info(m, crtc); 613 614 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 615 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 616 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 617 618 crtc_updates_info(m, crtc, "\t"); 619 } 620 621 static int i915_display_info(struct seq_file *m, void *unused) 622 { 623 struct drm_i915_private *dev_priv = node_to_i915(m->private); 624 struct intel_crtc *crtc; 625 struct drm_connector *connector; 626 struct drm_connector_list_iter conn_iter; 627 intel_wakeref_t wakeref; 628 629 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 630 631 drm_modeset_lock_all(&dev_priv->drm); 632 633 seq_printf(m, "CRTC info\n"); 634 seq_printf(m, "---------\n"); 635 for_each_intel_crtc(&dev_priv->drm, crtc) 636 intel_crtc_info(m, crtc); 637 638 seq_printf(m, "\n"); 639 seq_printf(m, "Connector info\n"); 640 seq_printf(m, "--------------\n"); 641 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 642 drm_for_each_connector_iter(connector, &conn_iter) 643 intel_connector_info(m, connector); 644 drm_connector_list_iter_end(&conn_iter); 645 646 drm_modeset_unlock_all(&dev_priv->drm); 647 648 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 649 650 return 0; 651 } 652 653 static int i915_display_capabilities(struct seq_file *m, void *unused) 654 { 655 struct drm_i915_private *i915 = node_to_i915(m->private); 656 struct drm_printer p = drm_seq_file_printer(m); 657 658 intel_display_device_info_print(DISPLAY_INFO(i915), 659 DISPLAY_RUNTIME_INFO(i915), &p); 660 661 return 0; 662 } 663 664 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 665 { 666 struct drm_i915_private *dev_priv = node_to_i915(m->private); 667 struct drm_printer p = drm_seq_file_printer(m); 668 struct intel_shared_dpll *pll; 669 int i; 670 671 drm_modeset_lock_all(&dev_priv->drm); 672 673 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 674 dev_priv->display.dpll.ref_clks.nssc, 675 dev_priv->display.dpll.ref_clks.ssc); 676 677 for_each_shared_dpll(dev_priv, pll, i) { 678 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 679 pll->info->name, pll->info->id); 680 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 681 pll->state.pipe_mask, pll->active_mask, 682 str_yes_no(pll->on)); 683 drm_printf(&p, " tracked hardware state:\n"); 684 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state); 685 } 686 drm_modeset_unlock_all(&dev_priv->drm); 687 688 return 0; 689 } 690 691 static int i915_ddb_info(struct seq_file *m, void *unused) 692 { 693 struct drm_i915_private *dev_priv = node_to_i915(m->private); 694 struct skl_ddb_entry *entry; 695 struct intel_crtc *crtc; 696 697 if (DISPLAY_VER(dev_priv) < 9) 698 return -ENODEV; 699 700 drm_modeset_lock_all(&dev_priv->drm); 701 702 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 703 704 for_each_intel_crtc(&dev_priv->drm, crtc) { 705 struct intel_crtc_state *crtc_state = 706 to_intel_crtc_state(crtc->base.state); 707 enum pipe pipe = crtc->pipe; 708 enum plane_id plane_id; 709 710 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 711 712 for_each_plane_id_on_crtc(crtc, plane_id) { 713 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 714 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 715 entry->start, entry->end, 716 skl_ddb_entry_size(entry)); 717 } 718 719 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 720 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 721 entry->end, skl_ddb_entry_size(entry)); 722 } 723 724 drm_modeset_unlock_all(&dev_priv->drm); 725 726 return 0; 727 } 728 729 static bool 730 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 731 enum i915_power_well_id power_well_id) 732 { 733 intel_wakeref_t wakeref; 734 bool is_enabled; 735 736 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 737 is_enabled = intel_display_power_well_is_enabled(i915, 738 power_well_id); 739 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 740 741 return is_enabled; 742 } 743 744 static int i915_lpsp_status(struct seq_file *m, void *unused) 745 { 746 struct drm_i915_private *i915 = node_to_i915(m->private); 747 bool lpsp_enabled = false; 748 749 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 750 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 751 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 752 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 753 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 754 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 755 } else { 756 seq_puts(m, "LPSP: not supported\n"); 757 return 0; 758 } 759 760 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 761 762 return 0; 763 } 764 765 static int i915_dp_mst_info(struct seq_file *m, void *unused) 766 { 767 struct drm_i915_private *dev_priv = node_to_i915(m->private); 768 struct intel_encoder *intel_encoder; 769 struct intel_digital_port *dig_port; 770 struct drm_connector *connector; 771 struct drm_connector_list_iter conn_iter; 772 773 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 774 drm_for_each_connector_iter(connector, &conn_iter) { 775 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 776 continue; 777 778 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 779 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 780 continue; 781 782 dig_port = enc_to_dig_port(intel_encoder); 783 if (!intel_dp_mst_source_support(&dig_port->dp)) 784 continue; 785 786 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 787 dig_port->base.base.base.id, 788 dig_port->base.base.name); 789 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 790 } 791 drm_connector_list_iter_end(&conn_iter); 792 793 return 0; 794 } 795 796 static ssize_t 797 i915_fifo_underrun_reset_write(struct file *filp, 798 const char __user *ubuf, 799 size_t cnt, loff_t *ppos) 800 { 801 struct drm_i915_private *dev_priv = filp->private_data; 802 struct intel_crtc *crtc; 803 int ret; 804 bool reset; 805 806 ret = kstrtobool_from_user(ubuf, cnt, &reset); 807 if (ret) 808 return ret; 809 810 if (!reset) 811 return cnt; 812 813 for_each_intel_crtc(&dev_priv->drm, crtc) { 814 struct drm_crtc_commit *commit; 815 struct intel_crtc_state *crtc_state; 816 817 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 818 if (ret) 819 return ret; 820 821 crtc_state = to_intel_crtc_state(crtc->base.state); 822 commit = crtc_state->uapi.commit; 823 if (commit) { 824 ret = wait_for_completion_interruptible(&commit->hw_done); 825 if (!ret) 826 ret = wait_for_completion_interruptible(&commit->flip_done); 827 } 828 829 if (!ret && crtc_state->hw.active) { 830 drm_dbg_kms(&dev_priv->drm, 831 "Re-arming FIFO underruns on pipe %c\n", 832 pipe_name(crtc->pipe)); 833 834 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 835 } 836 837 drm_modeset_unlock(&crtc->base.mutex); 838 839 if (ret) 840 return ret; 841 } 842 843 intel_fbc_reset_underrun(&dev_priv->display); 844 845 return cnt; 846 } 847 848 static const struct file_operations i915_fifo_underrun_reset_ops = { 849 .owner = THIS_MODULE, 850 .open = simple_open, 851 .write = i915_fifo_underrun_reset_write, 852 .llseek = default_llseek, 853 }; 854 855 static const struct drm_info_list intel_display_debugfs_list[] = { 856 {"intel_display_caps", intel_display_caps, 0}, 857 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 858 {"i915_sr_status", i915_sr_status, 0}, 859 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 860 {"i915_power_domain_info", i915_power_domain_info, 0}, 861 {"i915_display_info", i915_display_info, 0}, 862 {"i915_display_capabilities", i915_display_capabilities, 0}, 863 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 864 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 865 {"i915_ddb_info", i915_ddb_info, 0}, 866 {"i915_lpsp_status", i915_lpsp_status, 0}, 867 }; 868 869 void intel_display_debugfs_register(struct drm_i915_private *i915) 870 { 871 struct intel_display *display = &i915->display; 872 struct drm_minor *minor = i915->drm.primary; 873 874 debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root, 875 to_i915(minor->dev), &i915_fifo_underrun_reset_ops); 876 877 drm_debugfs_create_files(intel_display_debugfs_list, 878 ARRAY_SIZE(intel_display_debugfs_list), 879 minor->debugfs_root, minor); 880 881 intel_bios_debugfs_register(display); 882 intel_cdclk_debugfs_register(display); 883 intel_dmc_debugfs_register(display); 884 intel_dp_test_debugfs_register(display); 885 intel_fbc_debugfs_register(display); 886 intel_hpd_debugfs_register(i915); 887 intel_opregion_debugfs_register(display); 888 intel_psr_debugfs_register(display); 889 intel_wm_debugfs_register(i915); 890 intel_display_debugfs_params(display); 891 } 892 893 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 894 { 895 struct intel_connector *connector = m->private; 896 struct drm_i915_private *i915 = to_i915(connector->base.dev); 897 int ret; 898 899 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 900 if (ret) 901 return ret; 902 903 if (!connector->base.encoder || 904 connector->base.status != connector_status_connected) { 905 ret = -ENODEV; 906 goto out; 907 } 908 909 seq_printf(m, "%s:%d HDCP version: ", connector->base.name, 910 connector->base.base.id); 911 intel_hdcp_info(m, connector, false); 912 913 out: 914 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 915 916 return ret; 917 } 918 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 919 920 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 921 { 922 struct intel_connector *connector = m->private; 923 struct drm_i915_private *i915 = to_i915(connector->base.dev); 924 struct intel_encoder *encoder = intel_attached_encoder(connector); 925 int connector_type = connector->base.connector_type; 926 bool lpsp_capable = false; 927 928 if (!encoder) 929 return -ENODEV; 930 931 if (connector->base.status != connector_status_connected) 932 return -ENODEV; 933 934 if (DISPLAY_VER(i915) >= 13) 935 lpsp_capable = encoder->port <= PORT_B; 936 else if (DISPLAY_VER(i915) >= 12) 937 /* 938 * Actually TGL can drive LPSP on port till DDI_C 939 * but there is no physical connected DDI_C on TGL sku's, 940 * even driver is not initilizing DDI_C port for gen12. 941 */ 942 lpsp_capable = encoder->port <= PORT_B; 943 else if (DISPLAY_VER(i915) == 11) 944 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 945 connector_type == DRM_MODE_CONNECTOR_eDP); 946 else if (IS_DISPLAY_VER(i915, 9, 10)) 947 lpsp_capable = (encoder->port == PORT_A && 948 (connector_type == DRM_MODE_CONNECTOR_DSI || 949 connector_type == DRM_MODE_CONNECTOR_eDP || 950 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 951 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 952 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 953 954 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 955 956 return 0; 957 } 958 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 959 960 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 961 { 962 struct intel_connector *connector = m->private; 963 struct drm_i915_private *i915 = to_i915(connector->base.dev); 964 struct drm_crtc *crtc; 965 struct intel_dp *intel_dp; 966 struct drm_modeset_acquire_ctx ctx; 967 struct intel_crtc_state *crtc_state = NULL; 968 int ret = 0; 969 bool try_again = false; 970 971 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 972 973 do { 974 try_again = false; 975 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, 976 &ctx); 977 if (ret) { 978 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 979 try_again = true; 980 continue; 981 } 982 break; 983 } 984 crtc = connector->base.state->crtc; 985 if (connector->base.status != connector_status_connected || !crtc) { 986 ret = -ENODEV; 987 break; 988 } 989 ret = drm_modeset_lock(&crtc->mutex, &ctx); 990 if (ret == -EDEADLK) { 991 ret = drm_modeset_backoff(&ctx); 992 if (!ret) { 993 try_again = true; 994 continue; 995 } 996 break; 997 } else if (ret) { 998 break; 999 } 1000 intel_dp = intel_attached_dp(connector); 1001 crtc_state = to_intel_crtc_state(crtc->state); 1002 seq_printf(m, "DSC_Enabled: %s\n", 1003 str_yes_no(crtc_state->dsc.compression_enable)); 1004 seq_printf(m, "DSC_Sink_Support: %s\n", 1005 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 1006 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1007 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1008 DP_DSC_RGB)), 1009 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1010 DP_DSC_YCbCr420_Native)), 1011 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1012 DP_DSC_YCbCr444))); 1013 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 1014 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 1015 seq_printf(m, "Force_DSC_Enable: %s\n", 1016 str_yes_no(intel_dp->force_dsc_en)); 1017 if (!intel_dp_is_edp(intel_dp)) 1018 seq_printf(m, "FEC_Sink_Support: %s\n", 1019 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 1020 } while (try_again); 1021 1022 drm_modeset_drop_locks(&ctx); 1023 drm_modeset_acquire_fini(&ctx); 1024 1025 return ret; 1026 } 1027 1028 static ssize_t i915_dsc_fec_support_write(struct file *file, 1029 const char __user *ubuf, 1030 size_t len, loff_t *offp) 1031 { 1032 struct seq_file *m = file->private_data; 1033 struct intel_connector *connector = m->private; 1034 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1035 struct intel_encoder *encoder = intel_attached_encoder(connector); 1036 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1037 bool dsc_enable = false; 1038 int ret; 1039 1040 if (len == 0) 1041 return 0; 1042 1043 drm_dbg(&i915->drm, 1044 "Copied %zu bytes from user to force DSC\n", len); 1045 1046 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1047 if (ret < 0) 1048 return ret; 1049 1050 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1051 (dsc_enable) ? "true" : "false"); 1052 intel_dp->force_dsc_en = dsc_enable; 1053 1054 *offp += len; 1055 return len; 1056 } 1057 1058 static int i915_dsc_fec_support_open(struct inode *inode, 1059 struct file *file) 1060 { 1061 return single_open(file, i915_dsc_fec_support_show, 1062 inode->i_private); 1063 } 1064 1065 static const struct file_operations i915_dsc_fec_support_fops = { 1066 .owner = THIS_MODULE, 1067 .open = i915_dsc_fec_support_open, 1068 .read = seq_read, 1069 .llseek = seq_lseek, 1070 .release = single_release, 1071 .write = i915_dsc_fec_support_write 1072 }; 1073 1074 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1075 { 1076 struct intel_connector *connector = m->private; 1077 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1078 struct intel_encoder *encoder = intel_attached_encoder(connector); 1079 struct drm_crtc *crtc; 1080 struct intel_crtc_state *crtc_state; 1081 int ret; 1082 1083 if (!encoder) 1084 return -ENODEV; 1085 1086 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1087 if (ret) 1088 return ret; 1089 1090 crtc = connector->base.state->crtc; 1091 if (connector->base.status != connector_status_connected || !crtc) { 1092 ret = -ENODEV; 1093 goto out; 1094 } 1095 1096 crtc_state = to_intel_crtc_state(crtc->state); 1097 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1098 1099 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1100 1101 return ret; 1102 } 1103 1104 static ssize_t i915_dsc_bpc_write(struct file *file, 1105 const char __user *ubuf, 1106 size_t len, loff_t *offp) 1107 { 1108 struct seq_file *m = file->private_data; 1109 struct intel_connector *connector = m->private; 1110 struct intel_encoder *encoder = intel_attached_encoder(connector); 1111 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1112 int dsc_bpc = 0; 1113 int ret; 1114 1115 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1116 if (ret < 0) 1117 return ret; 1118 1119 intel_dp->force_dsc_bpc = dsc_bpc; 1120 *offp += len; 1121 1122 return len; 1123 } 1124 1125 static int i915_dsc_bpc_open(struct inode *inode, 1126 struct file *file) 1127 { 1128 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1129 } 1130 1131 static const struct file_operations i915_dsc_bpc_fops = { 1132 .owner = THIS_MODULE, 1133 .open = i915_dsc_bpc_open, 1134 .read = seq_read, 1135 .llseek = seq_lseek, 1136 .release = single_release, 1137 .write = i915_dsc_bpc_write 1138 }; 1139 1140 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1141 { 1142 struct intel_connector *connector = m->private; 1143 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1144 struct intel_encoder *encoder = intel_attached_encoder(connector); 1145 struct drm_crtc *crtc; 1146 struct intel_crtc_state *crtc_state; 1147 int ret; 1148 1149 if (!encoder) 1150 return -ENODEV; 1151 1152 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1153 if (ret) 1154 return ret; 1155 1156 crtc = connector->base.state->crtc; 1157 if (connector->base.status != connector_status_connected || !crtc) { 1158 ret = -ENODEV; 1159 goto out; 1160 } 1161 1162 crtc_state = to_intel_crtc_state(crtc->state); 1163 seq_printf(m, "DSC_Output_Format: %s\n", 1164 intel_output_format_name(crtc_state->output_format)); 1165 1166 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1167 1168 return ret; 1169 } 1170 1171 static ssize_t i915_dsc_output_format_write(struct file *file, 1172 const char __user *ubuf, 1173 size_t len, loff_t *offp) 1174 { 1175 struct seq_file *m = file->private_data; 1176 struct intel_connector *connector = m->private; 1177 struct intel_encoder *encoder = intel_attached_encoder(connector); 1178 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1179 int dsc_output_format = 0; 1180 int ret; 1181 1182 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1183 if (ret < 0) 1184 return ret; 1185 1186 intel_dp->force_dsc_output_format = dsc_output_format; 1187 *offp += len; 1188 1189 return len; 1190 } 1191 1192 static int i915_dsc_output_format_open(struct inode *inode, 1193 struct file *file) 1194 { 1195 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1196 } 1197 1198 static const struct file_operations i915_dsc_output_format_fops = { 1199 .owner = THIS_MODULE, 1200 .open = i915_dsc_output_format_open, 1201 .read = seq_read, 1202 .llseek = seq_lseek, 1203 .release = single_release, 1204 .write = i915_dsc_output_format_write 1205 }; 1206 1207 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1208 { 1209 struct intel_connector *connector = m->private; 1210 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1211 struct intel_encoder *encoder = intel_attached_encoder(connector); 1212 struct drm_crtc *crtc; 1213 struct intel_dp *intel_dp; 1214 int ret; 1215 1216 if (!encoder) 1217 return -ENODEV; 1218 1219 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1220 if (ret) 1221 return ret; 1222 1223 crtc = connector->base.state->crtc; 1224 if (connector->base.status != connector_status_connected || !crtc) { 1225 ret = -ENODEV; 1226 goto out; 1227 } 1228 1229 intel_dp = intel_attached_dp(connector); 1230 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1231 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1232 1233 out: 1234 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1235 1236 return ret; 1237 } 1238 1239 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1240 const char __user *ubuf, 1241 size_t len, loff_t *offp) 1242 { 1243 struct seq_file *m = file->private_data; 1244 struct intel_connector *connector = m->private; 1245 struct intel_encoder *encoder = intel_attached_encoder(connector); 1246 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1247 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1248 bool dsc_fractional_bpp_enable = false; 1249 int ret; 1250 1251 if (len == 0) 1252 return 0; 1253 1254 drm_dbg(&i915->drm, 1255 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1256 1257 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1258 if (ret < 0) 1259 return ret; 1260 1261 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n", 1262 (dsc_fractional_bpp_enable) ? "true" : "false"); 1263 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1264 1265 *offp += len; 1266 1267 return len; 1268 } 1269 1270 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1271 struct file *file) 1272 { 1273 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1274 } 1275 1276 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1277 .owner = THIS_MODULE, 1278 .open = i915_dsc_fractional_bpp_open, 1279 .read = seq_read, 1280 .llseek = seq_lseek, 1281 .release = single_release, 1282 .write = i915_dsc_fractional_bpp_write 1283 }; 1284 1285 /* 1286 * Returns the Current CRTC's bpc. 1287 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1288 */ 1289 static int i915_current_bpc_show(struct seq_file *m, void *data) 1290 { 1291 struct intel_crtc *crtc = m->private; 1292 struct intel_crtc_state *crtc_state; 1293 int ret; 1294 1295 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1296 if (ret) 1297 return ret; 1298 1299 crtc_state = to_intel_crtc_state(crtc->base.state); 1300 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1301 1302 drm_modeset_unlock(&crtc->base.mutex); 1303 1304 return ret; 1305 } 1306 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1307 1308 /* Pipe may differ from crtc index if pipes are fused off */ 1309 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1310 { 1311 struct intel_crtc *crtc = m->private; 1312 1313 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1314 1315 return 0; 1316 } 1317 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1318 1319 static int i915_joiner_show(struct seq_file *m, void *data) 1320 { 1321 struct intel_connector *connector = m->private; 1322 1323 seq_printf(m, "%d\n", connector->force_joined_pipes); 1324 1325 return 0; 1326 } 1327 1328 static ssize_t i915_joiner_write(struct file *file, 1329 const char __user *ubuf, 1330 size_t len, loff_t *offp) 1331 { 1332 struct seq_file *m = file->private_data; 1333 struct intel_connector *connector = m->private; 1334 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1335 int force_joined_pipes = 0; 1336 int ret; 1337 1338 if (len == 0) 1339 return 0; 1340 1341 ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes); 1342 if (ret < 0) 1343 return ret; 1344 1345 switch (force_joined_pipes) { 1346 case 0: 1347 case 1: 1348 case 2: 1349 connector->force_joined_pipes = force_joined_pipes; 1350 break; 1351 case 4: 1352 if (HAS_ULTRAJOINER(i915)) { 1353 connector->force_joined_pipes = force_joined_pipes; 1354 break; 1355 } 1356 1357 fallthrough; 1358 default: 1359 return -EINVAL; 1360 } 1361 1362 *offp += len; 1363 1364 return len; 1365 } 1366 1367 static int i915_joiner_open(struct inode *inode, struct file *file) 1368 { 1369 return single_open(file, i915_joiner_show, inode->i_private); 1370 } 1371 1372 static const struct file_operations i915_joiner_fops = { 1373 .owner = THIS_MODULE, 1374 .open = i915_joiner_open, 1375 .read = seq_read, 1376 .llseek = seq_lseek, 1377 .release = single_release, 1378 .write = i915_joiner_write 1379 }; 1380 1381 /** 1382 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1383 * @connector: pointer to a registered intel_connector 1384 * 1385 * Cleanup will be done by drm_connector_unregister() through a call to 1386 * drm_debugfs_connector_remove(). 1387 */ 1388 void intel_connector_debugfs_add(struct intel_connector *connector) 1389 { 1390 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1391 struct dentry *root = connector->base.debugfs_entry; 1392 int connector_type = connector->base.connector_type; 1393 1394 /* The connector must have been registered beforehands. */ 1395 if (!root) 1396 return; 1397 1398 intel_drrs_connector_debugfs_add(connector); 1399 intel_pps_connector_debugfs_add(connector); 1400 intel_psr_connector_debugfs_add(connector); 1401 intel_alpm_lobf_debugfs_add(connector); 1402 intel_dp_link_training_debugfs_add(connector); 1403 1404 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1405 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1406 connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1407 debugfs_create_file("i915_hdcp_sink_capability", 0444, root, 1408 connector, &i915_hdcp_sink_capability_fops); 1409 } 1410 1411 if (DISPLAY_VER(i915) >= 11 && 1412 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) || 1413 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1414 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1415 connector, &i915_dsc_fec_support_fops); 1416 1417 debugfs_create_file("i915_dsc_bpc", 0644, root, 1418 connector, &i915_dsc_bpc_fops); 1419 1420 debugfs_create_file("i915_dsc_output_format", 0644, root, 1421 connector, &i915_dsc_output_format_fops); 1422 1423 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1424 connector, &i915_dsc_fractional_bpp_fops); 1425 } 1426 1427 if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1428 connector_type == DRM_MODE_CONNECTOR_eDP) && 1429 intel_dp_has_joiner(intel_attached_dp(connector))) { 1430 debugfs_create_file("i915_joiner_force_enable", 0644, root, 1431 connector, &i915_joiner_fops); 1432 } 1433 1434 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1435 connector_type == DRM_MODE_CONNECTOR_eDP || 1436 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1437 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1438 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1439 debugfs_create_file("i915_lpsp_capability", 0444, root, 1440 connector, &i915_lpsp_capability_fops); 1441 } 1442 1443 /** 1444 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1445 * @crtc: pointer to a drm_crtc 1446 * 1447 * Failure to add debugfs entries should generally be ignored. 1448 */ 1449 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1450 { 1451 struct dentry *root = crtc->base.debugfs_entry; 1452 1453 if (!root) 1454 return; 1455 1456 crtc_updates_add(crtc); 1457 intel_drrs_crtc_debugfs_add(crtc); 1458 intel_fbc_crtc_debugfs_add(crtc); 1459 hsw_ips_crtc_debugfs_add(crtc); 1460 1461 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1462 &i915_current_bpc_fops); 1463 debugfs_create_file("i915_pipe", 0444, root, crtc, 1464 &intel_crtc_pipe_fops); 1465 } 1466