1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/debugfs.h> 7 #include <linux/string_helpers.h> 8 9 #include <drm/drm_debugfs.h> 10 #include <drm/drm_edid.h> 11 #include <drm/drm_fourcc.h> 12 13 #include "hsw_ips.h" 14 #include "i915_drv.h" 15 #include "i915_irq.h" 16 #include "i915_reg.h" 17 #include "i9xx_wm_regs.h" 18 #include "intel_alpm.h" 19 #include "intel_bo.h" 20 #include "intel_crtc.h" 21 #include "intel_crtc_state_dump.h" 22 #include "intel_de.h" 23 #include "intel_display_debugfs.h" 24 #include "intel_display_debugfs_params.h" 25 #include "intel_display_power.h" 26 #include "intel_display_power_well.h" 27 #include "intel_display_types.h" 28 #include "intel_dmc.h" 29 #include "intel_dp.h" 30 #include "intel_dp_link_training.h" 31 #include "intel_dp_mst.h" 32 #include "intel_dp_test.h" 33 #include "intel_drrs.h" 34 #include "intel_fb.h" 35 #include "intel_fbc.h" 36 #include "intel_fbdev.h" 37 #include "intel_hdcp.h" 38 #include "intel_hdmi.h" 39 #include "intel_hotplug.h" 40 #include "intel_panel.h" 41 #include "intel_pps.h" 42 #include "intel_psr.h" 43 #include "intel_psr_regs.h" 44 #include "intel_vdsc.h" 45 #include "intel_wm.h" 46 47 static struct intel_display *node_to_intel_display(struct drm_info_node *node) 48 { 49 return to_intel_display(node->minor->dev); 50 } 51 52 static int intel_display_caps(struct seq_file *m, void *data) 53 { 54 struct intel_display *display = node_to_intel_display(m->private); 55 struct drm_printer p = drm_seq_file_printer(m); 56 57 intel_display_device_info_print(DISPLAY_INFO(display), 58 DISPLAY_RUNTIME_INFO(display), &p); 59 intel_display_params_dump(&display->params, display->drm->driver->name, &p); 60 61 return 0; 62 } 63 64 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 65 { 66 struct intel_display *display = node_to_intel_display(m->private); 67 68 spin_lock(&display->fb_tracking.lock); 69 70 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 71 display->fb_tracking.busy_bits); 72 73 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 74 display->fb_tracking.flip_bits); 75 76 spin_unlock(&display->fb_tracking.lock); 77 78 return 0; 79 } 80 81 static int i915_sr_status(struct seq_file *m, void *unused) 82 { 83 struct intel_display *display = node_to_intel_display(m->private); 84 struct drm_i915_private *dev_priv = to_i915(display->drm); 85 intel_wakeref_t wakeref; 86 bool sr_enabled = false; 87 88 wakeref = intel_display_power_get(display, POWER_DOMAIN_INIT); 89 90 if (DISPLAY_VER(display) >= 9) 91 /* no global SR status; inspect per-plane WM */; 92 else if (HAS_PCH_SPLIT(dev_priv)) 93 sr_enabled = intel_de_read(display, WM1_LP_ILK) & WM_LP_ENABLE; 94 else if (display->platform.i965gm || display->platform.g4x || 95 display->platform.i945g || display->platform.i945gm) 96 sr_enabled = intel_de_read(display, FW_BLC_SELF) & FW_BLC_SELF_EN; 97 else if (display->platform.i915gm) 98 sr_enabled = intel_de_read(display, INSTPM) & INSTPM_SELF_EN; 99 else if (display->platform.pineview) 100 sr_enabled = intel_de_read(display, DSPFW3(display)) & PINEVIEW_SELF_REFRESH_EN; 101 else if (display->platform.valleyview || display->platform.cherryview) 102 sr_enabled = intel_de_read(display, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 103 104 intel_display_power_put(display, POWER_DOMAIN_INIT, wakeref); 105 106 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 107 108 return 0; 109 } 110 111 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 112 { 113 struct intel_display *display = node_to_intel_display(m->private); 114 struct intel_framebuffer *fbdev_fb = NULL; 115 struct drm_framebuffer *drm_fb; 116 117 fbdev_fb = intel_fbdev_framebuffer(display->fbdev.fbdev); 118 if (fbdev_fb) { 119 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 120 fbdev_fb->base.width, 121 fbdev_fb->base.height, 122 fbdev_fb->base.format->depth, 123 fbdev_fb->base.format->cpp[0] * 8, 124 fbdev_fb->base.modifier, 125 drm_framebuffer_read_refcount(&fbdev_fb->base)); 126 intel_bo_describe(m, intel_fb_bo(&fbdev_fb->base)); 127 seq_putc(m, '\n'); 128 } 129 130 mutex_lock(&display->drm->mode_config.fb_lock); 131 drm_for_each_fb(drm_fb, display->drm) { 132 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 133 if (fb == fbdev_fb) 134 continue; 135 136 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 137 fb->base.width, 138 fb->base.height, 139 fb->base.format->depth, 140 fb->base.format->cpp[0] * 8, 141 fb->base.modifier, 142 drm_framebuffer_read_refcount(&fb->base)); 143 intel_bo_describe(m, intel_fb_bo(&fb->base)); 144 seq_putc(m, '\n'); 145 } 146 mutex_unlock(&display->drm->mode_config.fb_lock); 147 148 return 0; 149 } 150 151 static int i915_power_domain_info(struct seq_file *m, void *unused) 152 { 153 struct intel_display *display = node_to_intel_display(m->private); 154 155 intel_display_power_debug(display, m); 156 157 return 0; 158 } 159 160 static void intel_seq_print_mode(struct seq_file *m, int tabs, 161 const struct drm_display_mode *mode) 162 { 163 int i; 164 165 for (i = 0; i < tabs; i++) 166 seq_putc(m, '\t'); 167 168 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 169 } 170 171 static void intel_encoder_info(struct seq_file *m, 172 struct intel_crtc *crtc, 173 struct intel_encoder *encoder) 174 { 175 struct intel_display *display = node_to_intel_display(m->private); 176 struct drm_connector_list_iter conn_iter; 177 struct drm_connector *connector; 178 179 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 180 encoder->base.base.id, encoder->base.name); 181 182 drm_connector_list_iter_begin(display->drm, &conn_iter); 183 drm_for_each_connector_iter(connector, &conn_iter) { 184 const struct drm_connector_state *conn_state = 185 connector->state; 186 187 if (conn_state->best_encoder != &encoder->base) 188 continue; 189 190 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 191 connector->base.id, connector->name); 192 } 193 drm_connector_list_iter_end(&conn_iter); 194 } 195 196 static void intel_panel_info(struct seq_file *m, 197 struct intel_connector *connector) 198 { 199 const struct drm_display_mode *fixed_mode; 200 201 if (list_empty(&connector->panel.fixed_modes)) 202 return; 203 204 seq_puts(m, "\tfixed modes:\n"); 205 206 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 207 intel_seq_print_mode(m, 2, fixed_mode); 208 } 209 210 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 211 { 212 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 213 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 214 215 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 216 seq_printf(m, "\taudio support: %s\n", 217 str_yes_no(connector->base.display_info.has_audio)); 218 219 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 220 connector->detect_edid, &intel_dp->aux); 221 } 222 223 static void intel_dp_mst_info(struct seq_file *m, 224 struct intel_connector *connector) 225 { 226 bool has_audio = connector->base.display_info.has_audio; 227 228 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 229 } 230 231 static void intel_hdmi_info(struct seq_file *m, 232 struct intel_connector *connector) 233 { 234 bool has_audio = connector->base.display_info.has_audio; 235 236 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 237 } 238 239 static void intel_connector_info(struct seq_file *m, 240 struct drm_connector *connector) 241 { 242 struct intel_connector *intel_connector = to_intel_connector(connector); 243 const struct drm_display_mode *mode; 244 245 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 246 connector->base.id, connector->name, 247 drm_get_connector_status_name(connector->status)); 248 249 if (connector->status == connector_status_disconnected) 250 return; 251 252 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 253 connector->display_info.width_mm, 254 connector->display_info.height_mm); 255 seq_printf(m, "\tsubpixel order: %s\n", 256 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 257 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 258 259 switch (connector->connector_type) { 260 case DRM_MODE_CONNECTOR_DisplayPort: 261 case DRM_MODE_CONNECTOR_eDP: 262 if (intel_connector->mst.dp) 263 intel_dp_mst_info(m, intel_connector); 264 else 265 intel_dp_info(m, intel_connector); 266 break; 267 case DRM_MODE_CONNECTOR_HDMIA: 268 intel_hdmi_info(m, intel_connector); 269 break; 270 default: 271 break; 272 } 273 274 intel_hdcp_info(m, intel_connector); 275 276 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 277 278 intel_panel_info(m, intel_connector); 279 280 seq_printf(m, "\tmodes:\n"); 281 list_for_each_entry(mode, &connector->modes, head) 282 intel_seq_print_mode(m, 2, mode); 283 } 284 285 static const char *plane_type(enum drm_plane_type type) 286 { 287 switch (type) { 288 case DRM_PLANE_TYPE_OVERLAY: 289 return "OVL"; 290 case DRM_PLANE_TYPE_PRIMARY: 291 return "PRI"; 292 case DRM_PLANE_TYPE_CURSOR: 293 return "CUR"; 294 /* 295 * Deliberately omitting default: to generate compiler warnings 296 * when a new drm_plane_type gets added. 297 */ 298 } 299 300 return "unknown"; 301 } 302 303 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 304 { 305 /* 306 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 307 * will print them all to visualize if the values are misused 308 */ 309 snprintf(buf, bufsize, 310 "%s%s%s%s%s%s(0x%08x)", 311 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 312 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 313 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 314 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 315 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 316 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 317 rotation); 318 } 319 320 static const char *plane_visibility(const struct intel_plane_state *plane_state) 321 { 322 if (plane_state->uapi.visible) 323 return "visible"; 324 325 if (plane_state->is_y_plane) 326 return "Y plane"; 327 328 return "hidden"; 329 } 330 331 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 332 { 333 const struct intel_plane_state *plane_state = 334 to_intel_plane_state(plane->base.state); 335 const struct drm_framebuffer *fb = plane_state->uapi.fb; 336 struct drm_rect src, dst; 337 char rot_str[48]; 338 339 src = drm_plane_state_src(&plane_state->uapi); 340 dst = drm_plane_state_dest(&plane_state->uapi); 341 342 plane_rotation(rot_str, sizeof(rot_str), 343 plane_state->uapi.rotation); 344 345 seq_puts(m, "\t\tuapi: [FB:"); 346 if (fb) 347 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 348 &fb->format->format, fb->modifier, fb->width, 349 fb->height); 350 else 351 seq_puts(m, "0] n/a,0x0,0x0,"); 352 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 353 ", rotation=%s\n", plane_visibility(plane_state), 354 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 355 356 if (plane_state->planar_linked_plane) 357 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 358 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 359 plane_state->is_y_plane ? "Y plane" : "UV plane"); 360 } 361 362 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 363 { 364 const struct intel_plane_state *plane_state = 365 to_intel_plane_state(plane->base.state); 366 const struct drm_framebuffer *fb = plane_state->hw.fb; 367 char rot_str[48]; 368 369 if (!fb) 370 return; 371 372 plane_rotation(rot_str, sizeof(rot_str), 373 plane_state->hw.rotation); 374 375 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 376 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 377 fb->base.id, &fb->format->format, 378 fb->modifier, fb->width, fb->height, 379 str_yes_no(plane_state->uapi.visible), 380 DRM_RECT_FP_ARG(&plane_state->uapi.src), 381 DRM_RECT_ARG(&plane_state->uapi.dst), 382 rot_str); 383 } 384 385 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 386 { 387 struct intel_display *display = node_to_intel_display(m->private); 388 struct intel_plane *plane; 389 390 for_each_intel_plane_on_crtc(display->drm, crtc, plane) { 391 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 392 plane->base.base.id, plane->base.name, 393 plane_type(plane->base.type)); 394 intel_plane_uapi_info(m, plane); 395 intel_plane_hw_info(m, plane); 396 } 397 } 398 399 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 400 { 401 const struct intel_crtc_state *crtc_state = 402 to_intel_crtc_state(crtc->base.state); 403 int num_scalers = crtc->num_scalers; 404 int i; 405 406 /* Not all platforms have a scaler */ 407 if (num_scalers) { 408 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 409 num_scalers, 410 crtc_state->scaler_state.scaler_users, 411 crtc_state->scaler_state.scaler_id, 412 crtc_state->hw.scaling_filter); 413 414 for (i = 0; i < num_scalers; i++) { 415 const struct intel_scaler *sc = 416 &crtc_state->scaler_state.scalers[i]; 417 418 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 419 i, str_yes_no(sc->in_use), sc->mode); 420 } 421 seq_puts(m, "\n"); 422 } else { 423 seq_puts(m, "\tNo scalers available on this platform\n"); 424 } 425 } 426 427 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 428 static void crtc_updates_info(struct seq_file *m, 429 struct intel_crtc *crtc, 430 const char *hdr) 431 { 432 u64 count; 433 int row; 434 435 count = 0; 436 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 437 count += crtc->debug.vbl.times[row]; 438 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 439 if (!count) 440 return; 441 442 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 443 char columns[80] = " |"; 444 unsigned int x; 445 446 if (row & 1) { 447 const char *units; 448 449 if (row > 10) { 450 x = 1000000; 451 units = "ms"; 452 } else { 453 x = 1000; 454 units = "us"; 455 } 456 457 snprintf(columns, sizeof(columns), "%4ld%s |", 458 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 459 } 460 461 if (crtc->debug.vbl.times[row]) { 462 x = ilog2(crtc->debug.vbl.times[row]); 463 memset(columns + 8, '*', x); 464 columns[8 + x] = '\0'; 465 } 466 467 seq_printf(m, "%s%s\n", hdr, columns); 468 } 469 470 seq_printf(m, "%sMin update: %lluns\n", 471 hdr, crtc->debug.vbl.min); 472 seq_printf(m, "%sMax update: %lluns\n", 473 hdr, crtc->debug.vbl.max); 474 seq_printf(m, "%sAverage update: %lluns\n", 475 hdr, div64_u64(crtc->debug.vbl.sum, count)); 476 seq_printf(m, "%sOverruns > %uus: %u\n", 477 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 478 } 479 480 static int crtc_updates_show(struct seq_file *m, void *data) 481 { 482 crtc_updates_info(m, m->private, ""); 483 return 0; 484 } 485 486 static int crtc_updates_open(struct inode *inode, struct file *file) 487 { 488 return single_open(file, crtc_updates_show, inode->i_private); 489 } 490 491 static ssize_t crtc_updates_write(struct file *file, 492 const char __user *ubuf, 493 size_t len, loff_t *offp) 494 { 495 struct seq_file *m = file->private_data; 496 struct intel_crtc *crtc = m->private; 497 498 /* May race with an update. Meh. */ 499 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 500 501 return len; 502 } 503 504 static const struct file_operations crtc_updates_fops = { 505 .owner = THIS_MODULE, 506 .open = crtc_updates_open, 507 .read = seq_read, 508 .llseek = seq_lseek, 509 .release = single_release, 510 .write = crtc_updates_write 511 }; 512 513 static void crtc_updates_add(struct intel_crtc *crtc) 514 { 515 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 516 crtc, &crtc_updates_fops); 517 } 518 519 #else 520 static void crtc_updates_info(struct seq_file *m, 521 struct intel_crtc *crtc, 522 const char *hdr) 523 { 524 } 525 526 static void crtc_updates_add(struct intel_crtc *crtc) 527 { 528 } 529 #endif 530 531 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 532 { 533 struct intel_display *display = node_to_intel_display(m->private); 534 struct drm_printer p = drm_seq_file_printer(m); 535 const struct intel_crtc_state *crtc_state = 536 to_intel_crtc_state(crtc->base.state); 537 struct intel_encoder *encoder; 538 539 seq_printf(m, "[CRTC:%d:%s]:\n", 540 crtc->base.base.id, crtc->base.name); 541 542 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 543 str_yes_no(crtc_state->uapi.enable), 544 str_yes_no(crtc_state->uapi.active), 545 DRM_MODE_ARG(&crtc_state->uapi.mode)); 546 547 seq_printf(m, "\thw: enable=%s, active=%s\n", 548 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 549 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 550 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 551 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 552 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 553 554 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 555 DRM_RECT_ARG(&crtc_state->pipe_src), 556 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 557 558 intel_scaler_info(m, crtc); 559 560 if (crtc_state->joiner_pipes) 561 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 562 crtc_state->joiner_pipes, 563 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master"); 564 565 intel_vdsc_state_dump(&p, 1, crtc_state); 566 567 for_each_intel_encoder_mask(display->drm, encoder, 568 crtc_state->uapi.encoder_mask) 569 intel_encoder_info(m, crtc, encoder); 570 571 intel_plane_info(m, crtc); 572 573 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 574 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 575 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 576 577 crtc_updates_info(m, crtc, "\t"); 578 } 579 580 static int i915_display_info(struct seq_file *m, void *unused) 581 { 582 struct intel_display *display = node_to_intel_display(m->private); 583 struct drm_i915_private *dev_priv = to_i915(display->drm); 584 struct intel_crtc *crtc; 585 struct drm_connector *connector; 586 struct drm_connector_list_iter conn_iter; 587 intel_wakeref_t wakeref; 588 589 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 590 591 drm_modeset_lock_all(display->drm); 592 593 seq_printf(m, "CRTC info\n"); 594 seq_printf(m, "---------\n"); 595 for_each_intel_crtc(display->drm, crtc) 596 intel_crtc_info(m, crtc); 597 598 seq_printf(m, "\n"); 599 seq_printf(m, "Connector info\n"); 600 seq_printf(m, "--------------\n"); 601 drm_connector_list_iter_begin(display->drm, &conn_iter); 602 drm_for_each_connector_iter(connector, &conn_iter) 603 intel_connector_info(m, connector); 604 drm_connector_list_iter_end(&conn_iter); 605 606 drm_modeset_unlock_all(display->drm); 607 608 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 609 610 return 0; 611 } 612 613 static int i915_display_capabilities(struct seq_file *m, void *unused) 614 { 615 struct intel_display *display = node_to_intel_display(m->private); 616 struct drm_printer p = drm_seq_file_printer(m); 617 618 intel_display_device_info_print(DISPLAY_INFO(display), 619 DISPLAY_RUNTIME_INFO(display), &p); 620 621 return 0; 622 } 623 624 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 625 { 626 struct intel_display *display = node_to_intel_display(m->private); 627 struct drm_printer p = drm_seq_file_printer(m); 628 struct intel_shared_dpll *pll; 629 int i; 630 631 drm_modeset_lock_all(display->drm); 632 633 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 634 display->dpll.ref_clks.nssc, 635 display->dpll.ref_clks.ssc); 636 637 for_each_shared_dpll(display, pll, i) { 638 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 639 pll->info->name, pll->info->id); 640 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 641 pll->state.pipe_mask, pll->active_mask, 642 str_yes_no(pll->on)); 643 drm_printf(&p, " tracked hardware state:\n"); 644 intel_dpll_dump_hw_state(display, &p, &pll->state.hw_state); 645 } 646 drm_modeset_unlock_all(display->drm); 647 648 return 0; 649 } 650 651 static int i915_ddb_info(struct seq_file *m, void *unused) 652 { 653 struct intel_display *display = node_to_intel_display(m->private); 654 struct skl_ddb_entry *entry; 655 struct intel_crtc *crtc; 656 657 if (DISPLAY_VER(display) < 9) 658 return -ENODEV; 659 660 drm_modeset_lock_all(display->drm); 661 662 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 663 664 for_each_intel_crtc(display->drm, crtc) { 665 struct intel_crtc_state *crtc_state = 666 to_intel_crtc_state(crtc->base.state); 667 enum pipe pipe = crtc->pipe; 668 enum plane_id plane_id; 669 670 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 671 672 for_each_plane_id_on_crtc(crtc, plane_id) { 673 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 674 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 675 entry->start, entry->end, 676 skl_ddb_entry_size(entry)); 677 } 678 679 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 680 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 681 entry->end, skl_ddb_entry_size(entry)); 682 } 683 684 drm_modeset_unlock_all(display->drm); 685 686 return 0; 687 } 688 689 static bool 690 intel_lpsp_power_well_enabled(struct intel_display *display, 691 enum i915_power_well_id power_well_id) 692 { 693 struct drm_i915_private *i915 = to_i915(display->drm); 694 intel_wakeref_t wakeref; 695 bool is_enabled; 696 697 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 698 is_enabled = intel_display_power_well_is_enabled(display, 699 power_well_id); 700 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 701 702 return is_enabled; 703 } 704 705 static int i915_lpsp_status(struct seq_file *m, void *unused) 706 { 707 struct intel_display *display = node_to_intel_display(m->private); 708 bool lpsp_enabled = false; 709 710 if (DISPLAY_VER(display) >= 13 || IS_DISPLAY_VER(display, 9, 10)) { 711 lpsp_enabled = !intel_lpsp_power_well_enabled(display, SKL_DISP_PW_2); 712 } else if (IS_DISPLAY_VER(display, 11, 12)) { 713 lpsp_enabled = !intel_lpsp_power_well_enabled(display, ICL_DISP_PW_3); 714 } else if (display->platform.haswell || display->platform.broadwell) { 715 lpsp_enabled = !intel_lpsp_power_well_enabled(display, HSW_DISP_PW_GLOBAL); 716 } else { 717 seq_puts(m, "LPSP: not supported\n"); 718 return 0; 719 } 720 721 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 722 723 return 0; 724 } 725 726 static int i915_dp_mst_info(struct seq_file *m, void *unused) 727 { 728 struct intel_display *display = node_to_intel_display(m->private); 729 struct intel_encoder *intel_encoder; 730 struct intel_digital_port *dig_port; 731 struct drm_connector *connector; 732 struct drm_connector_list_iter conn_iter; 733 734 drm_connector_list_iter_begin(display->drm, &conn_iter); 735 drm_for_each_connector_iter(connector, &conn_iter) { 736 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 737 continue; 738 739 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 740 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 741 continue; 742 743 dig_port = enc_to_dig_port(intel_encoder); 744 if (!intel_dp_mst_source_support(&dig_port->dp)) 745 continue; 746 747 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 748 dig_port->base.base.base.id, 749 dig_port->base.base.name); 750 drm_dp_mst_dump_topology(m, &dig_port->dp.mst.mgr); 751 } 752 drm_connector_list_iter_end(&conn_iter); 753 754 return 0; 755 } 756 757 static ssize_t 758 i915_fifo_underrun_reset_write(struct file *filp, 759 const char __user *ubuf, 760 size_t cnt, loff_t *ppos) 761 { 762 struct intel_display *display = filp->private_data; 763 struct intel_crtc *crtc; 764 int ret; 765 bool reset; 766 767 ret = kstrtobool_from_user(ubuf, cnt, &reset); 768 if (ret) 769 return ret; 770 771 if (!reset) 772 return cnt; 773 774 for_each_intel_crtc(display->drm, crtc) { 775 struct drm_crtc_commit *commit; 776 struct intel_crtc_state *crtc_state; 777 778 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 779 if (ret) 780 return ret; 781 782 crtc_state = to_intel_crtc_state(crtc->base.state); 783 commit = crtc_state->uapi.commit; 784 if (commit) { 785 ret = wait_for_completion_interruptible(&commit->hw_done); 786 if (!ret) 787 ret = wait_for_completion_interruptible(&commit->flip_done); 788 } 789 790 if (!ret && crtc_state->hw.active) { 791 drm_dbg_kms(display->drm, 792 "Re-arming FIFO underruns on pipe %c\n", 793 pipe_name(crtc->pipe)); 794 795 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 796 } 797 798 drm_modeset_unlock(&crtc->base.mutex); 799 800 if (ret) 801 return ret; 802 } 803 804 intel_fbc_reset_underrun(display); 805 806 return cnt; 807 } 808 809 static const struct file_operations i915_fifo_underrun_reset_ops = { 810 .owner = THIS_MODULE, 811 .open = simple_open, 812 .write = i915_fifo_underrun_reset_write, 813 .llseek = default_llseek, 814 }; 815 816 static const struct drm_info_list intel_display_debugfs_list[] = { 817 {"intel_display_caps", intel_display_caps, 0}, 818 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 819 {"i915_sr_status", i915_sr_status, 0}, 820 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 821 {"i915_power_domain_info", i915_power_domain_info, 0}, 822 {"i915_display_info", i915_display_info, 0}, 823 {"i915_display_capabilities", i915_display_capabilities, 0}, 824 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 825 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 826 {"i915_ddb_info", i915_ddb_info, 0}, 827 {"i915_lpsp_status", i915_lpsp_status, 0}, 828 }; 829 830 void intel_display_debugfs_register(struct intel_display *display) 831 { 832 struct drm_i915_private *i915 = to_i915(display->drm); 833 struct drm_minor *minor = display->drm->primary; 834 835 debugfs_create_file("i915_fifo_underrun_reset", 0644, minor->debugfs_root, 836 display, &i915_fifo_underrun_reset_ops); 837 838 drm_debugfs_create_files(intel_display_debugfs_list, 839 ARRAY_SIZE(intel_display_debugfs_list), 840 minor->debugfs_root, minor); 841 842 intel_bios_debugfs_register(display); 843 intel_cdclk_debugfs_register(display); 844 intel_dmc_debugfs_register(display); 845 intel_dp_test_debugfs_register(display); 846 intel_fbc_debugfs_register(display); 847 intel_hpd_debugfs_register(i915); 848 intel_opregion_debugfs_register(display); 849 intel_psr_debugfs_register(display); 850 intel_wm_debugfs_register(i915); 851 intel_display_debugfs_params(display); 852 } 853 854 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 855 { 856 struct intel_connector *connector = m->private; 857 struct intel_display *display = to_intel_display(connector); 858 struct intel_encoder *encoder = intel_attached_encoder(connector); 859 int connector_type = connector->base.connector_type; 860 bool lpsp_capable = false; 861 862 if (!encoder) 863 return -ENODEV; 864 865 if (connector->base.status != connector_status_connected) 866 return -ENODEV; 867 868 if (DISPLAY_VER(display) >= 13) 869 lpsp_capable = encoder->port <= PORT_B; 870 else if (DISPLAY_VER(display) >= 12) 871 /* 872 * Actually TGL can drive LPSP on port till DDI_C 873 * but there is no physical connected DDI_C on TGL sku's, 874 * even driver is not initializing DDI_C port for gen12. 875 */ 876 lpsp_capable = encoder->port <= PORT_B; 877 else if (DISPLAY_VER(display) == 11) 878 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 879 connector_type == DRM_MODE_CONNECTOR_eDP); 880 else if (IS_DISPLAY_VER(display, 9, 10)) 881 lpsp_capable = (encoder->port == PORT_A && 882 (connector_type == DRM_MODE_CONNECTOR_DSI || 883 connector_type == DRM_MODE_CONNECTOR_eDP || 884 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 885 else if (display->platform.haswell || display->platform.broadwell) 886 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 887 888 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 889 890 return 0; 891 } 892 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 893 894 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 895 { 896 struct intel_connector *connector = m->private; 897 struct intel_display *display = to_intel_display(connector); 898 struct drm_crtc *crtc; 899 struct intel_dp *intel_dp; 900 struct drm_modeset_acquire_ctx ctx; 901 struct intel_crtc_state *crtc_state = NULL; 902 int ret = 0; 903 bool try_again = false; 904 905 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 906 907 do { 908 try_again = false; 909 ret = drm_modeset_lock(&display->drm->mode_config.connection_mutex, 910 &ctx); 911 if (ret) { 912 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 913 try_again = true; 914 continue; 915 } 916 break; 917 } 918 crtc = connector->base.state->crtc; 919 if (connector->base.status != connector_status_connected || !crtc) { 920 ret = -ENODEV; 921 break; 922 } 923 ret = drm_modeset_lock(&crtc->mutex, &ctx); 924 if (ret == -EDEADLK) { 925 ret = drm_modeset_backoff(&ctx); 926 if (!ret) { 927 try_again = true; 928 continue; 929 } 930 break; 931 } else if (ret) { 932 break; 933 } 934 intel_dp = intel_attached_dp(connector); 935 crtc_state = to_intel_crtc_state(crtc->state); 936 seq_printf(m, "DSC_Enabled: %s\n", 937 str_yes_no(crtc_state->dsc.compression_enable)); 938 seq_printf(m, "DSC_Sink_Support: %s\n", 939 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 940 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 941 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 942 DP_DSC_RGB)), 943 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 944 DP_DSC_YCbCr420_Native)), 945 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 946 DP_DSC_YCbCr444))); 947 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 948 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 949 seq_printf(m, "DSC_Sink_Max_Slice_Count: %d\n", 950 drm_dp_dsc_sink_max_slice_count((connector->dp.dsc_dpcd), intel_dp_is_edp(intel_dp))); 951 seq_printf(m, "Force_DSC_Enable: %s\n", 952 str_yes_no(intel_dp->force_dsc_en)); 953 if (!intel_dp_is_edp(intel_dp)) 954 seq_printf(m, "FEC_Sink_Support: %s\n", 955 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 956 } while (try_again); 957 958 drm_modeset_drop_locks(&ctx); 959 drm_modeset_acquire_fini(&ctx); 960 961 return ret; 962 } 963 964 static ssize_t i915_dsc_fec_support_write(struct file *file, 965 const char __user *ubuf, 966 size_t len, loff_t *offp) 967 { 968 struct seq_file *m = file->private_data; 969 struct intel_connector *connector = m->private; 970 struct intel_display *display = to_intel_display(connector); 971 struct intel_encoder *encoder = intel_attached_encoder(connector); 972 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 973 bool dsc_enable = false; 974 int ret; 975 976 if (len == 0) 977 return 0; 978 979 drm_dbg(display->drm, 980 "Copied %zu bytes from user to force DSC\n", len); 981 982 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 983 if (ret < 0) 984 return ret; 985 986 drm_dbg(display->drm, "Got %s for DSC Enable\n", 987 (dsc_enable) ? "true" : "false"); 988 intel_dp->force_dsc_en = dsc_enable; 989 990 *offp += len; 991 return len; 992 } 993 994 static int i915_dsc_fec_support_open(struct inode *inode, 995 struct file *file) 996 { 997 return single_open(file, i915_dsc_fec_support_show, 998 inode->i_private); 999 } 1000 1001 static const struct file_operations i915_dsc_fec_support_fops = { 1002 .owner = THIS_MODULE, 1003 .open = i915_dsc_fec_support_open, 1004 .read = seq_read, 1005 .llseek = seq_lseek, 1006 .release = single_release, 1007 .write = i915_dsc_fec_support_write 1008 }; 1009 1010 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1011 { 1012 struct intel_connector *connector = m->private; 1013 struct intel_display *display = to_intel_display(connector); 1014 struct intel_encoder *encoder = intel_attached_encoder(connector); 1015 struct drm_crtc *crtc; 1016 struct intel_crtc_state *crtc_state; 1017 int ret; 1018 1019 if (!encoder) 1020 return -ENODEV; 1021 1022 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1023 if (ret) 1024 return ret; 1025 1026 crtc = connector->base.state->crtc; 1027 if (connector->base.status != connector_status_connected || !crtc) { 1028 ret = -ENODEV; 1029 goto out; 1030 } 1031 1032 crtc_state = to_intel_crtc_state(crtc->state); 1033 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1034 1035 out: drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1036 1037 return ret; 1038 } 1039 1040 static ssize_t i915_dsc_bpc_write(struct file *file, 1041 const char __user *ubuf, 1042 size_t len, loff_t *offp) 1043 { 1044 struct seq_file *m = file->private_data; 1045 struct intel_connector *connector = m->private; 1046 struct intel_encoder *encoder = intel_attached_encoder(connector); 1047 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1048 int dsc_bpc = 0; 1049 int ret; 1050 1051 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1052 if (ret < 0) 1053 return ret; 1054 1055 intel_dp->force_dsc_bpc = dsc_bpc; 1056 *offp += len; 1057 1058 return len; 1059 } 1060 1061 static int i915_dsc_bpc_open(struct inode *inode, 1062 struct file *file) 1063 { 1064 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1065 } 1066 1067 static const struct file_operations i915_dsc_bpc_fops = { 1068 .owner = THIS_MODULE, 1069 .open = i915_dsc_bpc_open, 1070 .read = seq_read, 1071 .llseek = seq_lseek, 1072 .release = single_release, 1073 .write = i915_dsc_bpc_write 1074 }; 1075 1076 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1077 { 1078 struct intel_connector *connector = m->private; 1079 struct intel_display *display = to_intel_display(connector); 1080 struct intel_encoder *encoder = intel_attached_encoder(connector); 1081 struct drm_crtc *crtc; 1082 struct intel_crtc_state *crtc_state; 1083 int ret; 1084 1085 if (!encoder) 1086 return -ENODEV; 1087 1088 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1089 if (ret) 1090 return ret; 1091 1092 crtc = connector->base.state->crtc; 1093 if (connector->base.status != connector_status_connected || !crtc) { 1094 ret = -ENODEV; 1095 goto out; 1096 } 1097 1098 crtc_state = to_intel_crtc_state(crtc->state); 1099 seq_printf(m, "DSC_Output_Format: %s\n", 1100 intel_output_format_name(crtc_state->output_format)); 1101 1102 out: drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1103 1104 return ret; 1105 } 1106 1107 static ssize_t i915_dsc_output_format_write(struct file *file, 1108 const char __user *ubuf, 1109 size_t len, loff_t *offp) 1110 { 1111 struct seq_file *m = file->private_data; 1112 struct intel_connector *connector = m->private; 1113 struct intel_encoder *encoder = intel_attached_encoder(connector); 1114 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1115 int dsc_output_format = 0; 1116 int ret; 1117 1118 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1119 if (ret < 0) 1120 return ret; 1121 1122 intel_dp->force_dsc_output_format = dsc_output_format; 1123 *offp += len; 1124 1125 return len; 1126 } 1127 1128 static int i915_dsc_output_format_open(struct inode *inode, 1129 struct file *file) 1130 { 1131 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1132 } 1133 1134 static const struct file_operations i915_dsc_output_format_fops = { 1135 .owner = THIS_MODULE, 1136 .open = i915_dsc_output_format_open, 1137 .read = seq_read, 1138 .llseek = seq_lseek, 1139 .release = single_release, 1140 .write = i915_dsc_output_format_write 1141 }; 1142 1143 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1144 { 1145 struct intel_connector *connector = m->private; 1146 struct intel_display *display = to_intel_display(connector); 1147 struct intel_encoder *encoder = intel_attached_encoder(connector); 1148 struct drm_crtc *crtc; 1149 struct intel_dp *intel_dp; 1150 int ret; 1151 1152 if (!encoder) 1153 return -ENODEV; 1154 1155 ret = drm_modeset_lock_single_interruptible(&display->drm->mode_config.connection_mutex); 1156 if (ret) 1157 return ret; 1158 1159 crtc = connector->base.state->crtc; 1160 if (connector->base.status != connector_status_connected || !crtc) { 1161 ret = -ENODEV; 1162 goto out; 1163 } 1164 1165 intel_dp = intel_attached_dp(connector); 1166 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1167 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1168 1169 out: 1170 drm_modeset_unlock(&display->drm->mode_config.connection_mutex); 1171 1172 return ret; 1173 } 1174 1175 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1176 const char __user *ubuf, 1177 size_t len, loff_t *offp) 1178 { 1179 struct seq_file *m = file->private_data; 1180 struct intel_connector *connector = m->private; 1181 struct intel_display *display = to_intel_display(connector); 1182 struct intel_encoder *encoder = intel_attached_encoder(connector); 1183 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1184 bool dsc_fractional_bpp_enable = false; 1185 int ret; 1186 1187 if (len == 0) 1188 return 0; 1189 1190 drm_dbg(display->drm, 1191 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1192 1193 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1194 if (ret < 0) 1195 return ret; 1196 1197 drm_dbg(display->drm, "Got %s for DSC Fractional BPP Enable\n", 1198 (dsc_fractional_bpp_enable) ? "true" : "false"); 1199 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1200 1201 *offp += len; 1202 1203 return len; 1204 } 1205 1206 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1207 struct file *file) 1208 { 1209 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1210 } 1211 1212 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1213 .owner = THIS_MODULE, 1214 .open = i915_dsc_fractional_bpp_open, 1215 .read = seq_read, 1216 .llseek = seq_lseek, 1217 .release = single_release, 1218 .write = i915_dsc_fractional_bpp_write 1219 }; 1220 1221 /* 1222 * Returns the Current CRTC's bpc. 1223 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1224 */ 1225 static int i915_current_bpc_show(struct seq_file *m, void *data) 1226 { 1227 struct intel_crtc *crtc = m->private; 1228 struct intel_crtc_state *crtc_state; 1229 int ret; 1230 1231 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1232 if (ret) 1233 return ret; 1234 1235 crtc_state = to_intel_crtc_state(crtc->base.state); 1236 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1237 1238 drm_modeset_unlock(&crtc->base.mutex); 1239 1240 return ret; 1241 } 1242 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1243 1244 /* Pipe may differ from crtc index if pipes are fused off */ 1245 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1246 { 1247 struct intel_crtc *crtc = m->private; 1248 1249 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1250 1251 return 0; 1252 } 1253 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1254 1255 static int i915_joiner_show(struct seq_file *m, void *data) 1256 { 1257 struct intel_connector *connector = m->private; 1258 1259 seq_printf(m, "%d\n", connector->force_joined_pipes); 1260 1261 return 0; 1262 } 1263 1264 static ssize_t i915_joiner_write(struct file *file, 1265 const char __user *ubuf, 1266 size_t len, loff_t *offp) 1267 { 1268 struct seq_file *m = file->private_data; 1269 struct intel_connector *connector = m->private; 1270 struct intel_display *display = to_intel_display(connector); 1271 int force_joined_pipes = 0; 1272 int ret; 1273 1274 if (len == 0) 1275 return 0; 1276 1277 ret = kstrtoint_from_user(ubuf, len, 0, &force_joined_pipes); 1278 if (ret < 0) 1279 return ret; 1280 1281 switch (force_joined_pipes) { 1282 case 0: 1283 case 1: 1284 case 2: 1285 connector->force_joined_pipes = force_joined_pipes; 1286 break; 1287 case 4: 1288 if (HAS_ULTRAJOINER(display)) { 1289 connector->force_joined_pipes = force_joined_pipes; 1290 break; 1291 } 1292 1293 fallthrough; 1294 default: 1295 return -EINVAL; 1296 } 1297 1298 *offp += len; 1299 1300 return len; 1301 } 1302 1303 static int i915_joiner_open(struct inode *inode, struct file *file) 1304 { 1305 return single_open(file, i915_joiner_show, inode->i_private); 1306 } 1307 1308 static const struct file_operations i915_joiner_fops = { 1309 .owner = THIS_MODULE, 1310 .open = i915_joiner_open, 1311 .read = seq_read, 1312 .llseek = seq_lseek, 1313 .release = single_release, 1314 .write = i915_joiner_write 1315 }; 1316 1317 /** 1318 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1319 * @connector: pointer to a registered intel_connector 1320 * 1321 * Cleanup will be done by drm_connector_unregister() through a call to 1322 * drm_debugfs_connector_remove(). 1323 */ 1324 void intel_connector_debugfs_add(struct intel_connector *connector) 1325 { 1326 struct intel_display *display = to_intel_display(connector); 1327 struct dentry *root = connector->base.debugfs_entry; 1328 int connector_type = connector->base.connector_type; 1329 1330 /* The connector must have been registered beforehands. */ 1331 if (!root) 1332 return; 1333 1334 intel_drrs_connector_debugfs_add(connector); 1335 intel_hdcp_connector_debugfs_add(connector); 1336 intel_pps_connector_debugfs_add(connector); 1337 intel_psr_connector_debugfs_add(connector); 1338 intel_alpm_lobf_debugfs_add(connector); 1339 intel_dp_link_training_debugfs_add(connector); 1340 1341 if (DISPLAY_VER(display) >= 11 && 1342 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst.dp) || 1343 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1344 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1345 connector, &i915_dsc_fec_support_fops); 1346 1347 debugfs_create_file("i915_dsc_bpc", 0644, root, 1348 connector, &i915_dsc_bpc_fops); 1349 1350 debugfs_create_file("i915_dsc_output_format", 0644, root, 1351 connector, &i915_dsc_output_format_fops); 1352 1353 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1354 connector, &i915_dsc_fractional_bpp_fops); 1355 } 1356 1357 if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1358 connector_type == DRM_MODE_CONNECTOR_eDP) && 1359 intel_dp_has_joiner(intel_attached_dp(connector))) { 1360 debugfs_create_file("i915_joiner_force_enable", 0644, root, 1361 connector, &i915_joiner_fops); 1362 } 1363 1364 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1365 connector_type == DRM_MODE_CONNECTOR_eDP || 1366 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1367 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1368 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1369 debugfs_create_file("i915_lpsp_capability", 0444, root, 1370 connector, &i915_lpsp_capability_fops); 1371 } 1372 1373 /** 1374 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1375 * @crtc: pointer to a drm_crtc 1376 * 1377 * Failure to add debugfs entries should generally be ignored. 1378 */ 1379 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1380 { 1381 struct dentry *root = crtc->base.debugfs_entry; 1382 1383 if (!root) 1384 return; 1385 1386 crtc_updates_add(crtc); 1387 intel_drrs_crtc_debugfs_add(crtc); 1388 intel_fbc_crtc_debugfs_add(crtc); 1389 hsw_ips_crtc_debugfs_add(crtc); 1390 1391 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1392 &i915_current_bpc_fops); 1393 debugfs_create_file("i915_pipe", 0444, root, crtc, 1394 &intel_crtc_pipe_fops); 1395 } 1396