1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/string_helpers.h> 7 8 #include <drm/drm_debugfs.h> 9 #include <drm/drm_edid.h> 10 #include <drm/drm_fourcc.h> 11 12 #include "hsw_ips.h" 13 #include "i915_debugfs.h" 14 #include "i915_irq.h" 15 #include "i915_reg.h" 16 #include "intel_crtc.h" 17 #include "intel_de.h" 18 #include "intel_crtc_state_dump.h" 19 #include "intel_display_debugfs.h" 20 #include "intel_display_power.h" 21 #include "intel_display_power_well.h" 22 #include "intel_display_types.h" 23 #include "intel_dmc.h" 24 #include "intel_dp.h" 25 #include "intel_dp_mst.h" 26 #include "intel_drrs.h" 27 #include "intel_fbc.h" 28 #include "intel_fbdev.h" 29 #include "intel_hdcp.h" 30 #include "intel_hdmi.h" 31 #include "intel_hotplug.h" 32 #include "intel_panel.h" 33 #include "intel_psr.h" 34 #include "intel_psr_regs.h" 35 #include "intel_wm.h" 36 37 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 38 { 39 return to_i915(node->minor->dev); 40 } 41 42 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 43 { 44 struct drm_i915_private *dev_priv = node_to_i915(m->private); 45 46 spin_lock(&dev_priv->display.fb_tracking.lock); 47 48 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 49 dev_priv->display.fb_tracking.busy_bits); 50 51 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 52 dev_priv->display.fb_tracking.flip_bits); 53 54 spin_unlock(&dev_priv->display.fb_tracking.lock); 55 56 return 0; 57 } 58 59 static int i915_sr_status(struct seq_file *m, void *unused) 60 { 61 struct drm_i915_private *dev_priv = node_to_i915(m->private); 62 intel_wakeref_t wakeref; 63 bool sr_enabled = false; 64 65 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 66 67 if (DISPLAY_VER(dev_priv) >= 9) 68 /* no global SR status; inspect per-plane WM */; 69 else if (HAS_PCH_SPLIT(dev_priv)) 70 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 71 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 72 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 73 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 74 else if (IS_I915GM(dev_priv)) 75 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 76 else if (IS_PINEVIEW(dev_priv)) 77 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 78 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 79 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 80 81 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 82 83 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 84 85 return 0; 86 } 87 88 static int i915_opregion(struct seq_file *m, void *unused) 89 { 90 struct drm_i915_private *i915 = node_to_i915(m->private); 91 struct intel_opregion *opregion = &i915->display.opregion; 92 93 if (opregion->header) 94 seq_write(m, opregion->header, OPREGION_SIZE); 95 96 return 0; 97 } 98 99 static int i915_vbt(struct seq_file *m, void *unused) 100 { 101 struct drm_i915_private *i915 = node_to_i915(m->private); 102 struct intel_opregion *opregion = &i915->display.opregion; 103 104 if (opregion->vbt) 105 seq_write(m, opregion->vbt, opregion->vbt_size); 106 107 return 0; 108 } 109 110 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 111 { 112 struct drm_i915_private *dev_priv = node_to_i915(m->private); 113 struct intel_framebuffer *fbdev_fb = NULL; 114 struct drm_framebuffer *drm_fb; 115 116 #ifdef CONFIG_DRM_FBDEV_EMULATION 117 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 118 if (fbdev_fb) { 119 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 120 fbdev_fb->base.width, 121 fbdev_fb->base.height, 122 fbdev_fb->base.format->depth, 123 fbdev_fb->base.format->cpp[0] * 8, 124 fbdev_fb->base.modifier, 125 drm_framebuffer_read_refcount(&fbdev_fb->base)); 126 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 127 seq_putc(m, '\n'); 128 } 129 #endif 130 131 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 132 drm_for_each_fb(drm_fb, &dev_priv->drm) { 133 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 134 if (fb == fbdev_fb) 135 continue; 136 137 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 138 fb->base.width, 139 fb->base.height, 140 fb->base.format->depth, 141 fb->base.format->cpp[0] * 8, 142 fb->base.modifier, 143 drm_framebuffer_read_refcount(&fb->base)); 144 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 145 seq_putc(m, '\n'); 146 } 147 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 148 149 return 0; 150 } 151 152 static int i915_power_domain_info(struct seq_file *m, void *unused) 153 { 154 struct drm_i915_private *i915 = node_to_i915(m->private); 155 156 intel_display_power_debug(i915, m); 157 158 return 0; 159 } 160 161 static void intel_seq_print_mode(struct seq_file *m, int tabs, 162 const struct drm_display_mode *mode) 163 { 164 int i; 165 166 for (i = 0; i < tabs; i++) 167 seq_putc(m, '\t'); 168 169 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 170 } 171 172 static void intel_encoder_info(struct seq_file *m, 173 struct intel_crtc *crtc, 174 struct intel_encoder *encoder) 175 { 176 struct drm_i915_private *dev_priv = node_to_i915(m->private); 177 struct drm_connector_list_iter conn_iter; 178 struct drm_connector *connector; 179 180 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 181 encoder->base.base.id, encoder->base.name); 182 183 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 184 drm_for_each_connector_iter(connector, &conn_iter) { 185 const struct drm_connector_state *conn_state = 186 connector->state; 187 188 if (conn_state->best_encoder != &encoder->base) 189 continue; 190 191 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 192 connector->base.id, connector->name); 193 } 194 drm_connector_list_iter_end(&conn_iter); 195 } 196 197 static void intel_panel_info(struct seq_file *m, 198 struct intel_connector *connector) 199 { 200 const struct drm_display_mode *fixed_mode; 201 202 if (list_empty(&connector->panel.fixed_modes)) 203 return; 204 205 seq_puts(m, "\tfixed modes:\n"); 206 207 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 208 intel_seq_print_mode(m, 2, fixed_mode); 209 } 210 211 static void intel_hdcp_info(struct seq_file *m, 212 struct intel_connector *intel_connector) 213 { 214 bool hdcp_cap, hdcp2_cap; 215 216 if (!intel_connector->hdcp.shim) { 217 seq_puts(m, "No Connector Support"); 218 goto out; 219 } 220 221 hdcp_cap = intel_hdcp_capable(intel_connector); 222 hdcp2_cap = intel_hdcp2_capable(intel_connector); 223 224 if (hdcp_cap) 225 seq_puts(m, "HDCP1.4 "); 226 if (hdcp2_cap) 227 seq_puts(m, "HDCP2.2 "); 228 229 if (!hdcp_cap && !hdcp2_cap) 230 seq_puts(m, "None"); 231 232 out: 233 seq_puts(m, "\n"); 234 } 235 236 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 237 { 238 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 239 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 240 241 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 242 seq_printf(m, "\taudio support: %s\n", 243 str_yes_no(connector->base.display_info.has_audio)); 244 245 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 246 connector->detect_edid, &intel_dp->aux); 247 } 248 249 static void intel_dp_mst_info(struct seq_file *m, 250 struct intel_connector *connector) 251 { 252 bool has_audio = connector->base.display_info.has_audio; 253 254 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 255 } 256 257 static void intel_hdmi_info(struct seq_file *m, 258 struct intel_connector *connector) 259 { 260 bool has_audio = connector->base.display_info.has_audio; 261 262 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 263 } 264 265 static void intel_connector_info(struct seq_file *m, 266 struct drm_connector *connector) 267 { 268 struct intel_connector *intel_connector = to_intel_connector(connector); 269 const struct drm_connector_state *conn_state = connector->state; 270 struct intel_encoder *encoder = 271 to_intel_encoder(conn_state->best_encoder); 272 const struct drm_display_mode *mode; 273 274 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 275 connector->base.id, connector->name, 276 drm_get_connector_status_name(connector->status)); 277 278 if (connector->status == connector_status_disconnected) 279 return; 280 281 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 282 connector->display_info.width_mm, 283 connector->display_info.height_mm); 284 seq_printf(m, "\tsubpixel order: %s\n", 285 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 286 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 287 288 if (!encoder) 289 return; 290 291 switch (connector->connector_type) { 292 case DRM_MODE_CONNECTOR_DisplayPort: 293 case DRM_MODE_CONNECTOR_eDP: 294 if (encoder->type == INTEL_OUTPUT_DP_MST) 295 intel_dp_mst_info(m, intel_connector); 296 else 297 intel_dp_info(m, intel_connector); 298 break; 299 case DRM_MODE_CONNECTOR_HDMIA: 300 if (encoder->type == INTEL_OUTPUT_HDMI || 301 encoder->type == INTEL_OUTPUT_DDI) 302 intel_hdmi_info(m, intel_connector); 303 break; 304 default: 305 break; 306 } 307 308 seq_puts(m, "\tHDCP version: "); 309 intel_hdcp_info(m, intel_connector); 310 311 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 312 313 intel_panel_info(m, intel_connector); 314 315 seq_printf(m, "\tmodes:\n"); 316 list_for_each_entry(mode, &connector->modes, head) 317 intel_seq_print_mode(m, 2, mode); 318 } 319 320 static const char *plane_type(enum drm_plane_type type) 321 { 322 switch (type) { 323 case DRM_PLANE_TYPE_OVERLAY: 324 return "OVL"; 325 case DRM_PLANE_TYPE_PRIMARY: 326 return "PRI"; 327 case DRM_PLANE_TYPE_CURSOR: 328 return "CUR"; 329 /* 330 * Deliberately omitting default: to generate compiler warnings 331 * when a new drm_plane_type gets added. 332 */ 333 } 334 335 return "unknown"; 336 } 337 338 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 339 { 340 /* 341 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 342 * will print them all to visualize if the values are misused 343 */ 344 snprintf(buf, bufsize, 345 "%s%s%s%s%s%s(0x%08x)", 346 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 347 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 348 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 349 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 350 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 351 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 352 rotation); 353 } 354 355 static const char *plane_visibility(const struct intel_plane_state *plane_state) 356 { 357 if (plane_state->uapi.visible) 358 return "visible"; 359 360 if (plane_state->planar_slave) 361 return "planar-slave"; 362 363 return "hidden"; 364 } 365 366 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 367 { 368 const struct intel_plane_state *plane_state = 369 to_intel_plane_state(plane->base.state); 370 const struct drm_framebuffer *fb = plane_state->uapi.fb; 371 struct drm_rect src, dst; 372 char rot_str[48]; 373 374 src = drm_plane_state_src(&plane_state->uapi); 375 dst = drm_plane_state_dest(&plane_state->uapi); 376 377 plane_rotation(rot_str, sizeof(rot_str), 378 plane_state->uapi.rotation); 379 380 seq_puts(m, "\t\tuapi: [FB:"); 381 if (fb) 382 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 383 &fb->format->format, fb->modifier, fb->width, 384 fb->height); 385 else 386 seq_puts(m, "0] n/a,0x0,0x0,"); 387 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 388 ", rotation=%s\n", plane_visibility(plane_state), 389 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 390 391 if (plane_state->planar_linked_plane) 392 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 393 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 394 plane_state->planar_slave ? "slave" : "master"); 395 } 396 397 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 398 { 399 const struct intel_plane_state *plane_state = 400 to_intel_plane_state(plane->base.state); 401 const struct drm_framebuffer *fb = plane_state->hw.fb; 402 char rot_str[48]; 403 404 if (!fb) 405 return; 406 407 plane_rotation(rot_str, sizeof(rot_str), 408 plane_state->hw.rotation); 409 410 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 411 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 412 fb->base.id, &fb->format->format, 413 fb->modifier, fb->width, fb->height, 414 str_yes_no(plane_state->uapi.visible), 415 DRM_RECT_FP_ARG(&plane_state->uapi.src), 416 DRM_RECT_ARG(&plane_state->uapi.dst), 417 rot_str); 418 } 419 420 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 421 { 422 struct drm_i915_private *dev_priv = node_to_i915(m->private); 423 struct intel_plane *plane; 424 425 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 426 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 427 plane->base.base.id, plane->base.name, 428 plane_type(plane->base.type)); 429 intel_plane_uapi_info(m, plane); 430 intel_plane_hw_info(m, plane); 431 } 432 } 433 434 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 435 { 436 const struct intel_crtc_state *crtc_state = 437 to_intel_crtc_state(crtc->base.state); 438 int num_scalers = crtc->num_scalers; 439 int i; 440 441 /* Not all platformas have a scaler */ 442 if (num_scalers) { 443 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 444 num_scalers, 445 crtc_state->scaler_state.scaler_users, 446 crtc_state->scaler_state.scaler_id, 447 crtc_state->hw.scaling_filter); 448 449 for (i = 0; i < num_scalers; i++) { 450 const struct intel_scaler *sc = 451 &crtc_state->scaler_state.scalers[i]; 452 453 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 454 i, str_yes_no(sc->in_use), sc->mode); 455 } 456 seq_puts(m, "\n"); 457 } else { 458 seq_puts(m, "\tNo scalers available on this platform\n"); 459 } 460 } 461 462 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 463 static void crtc_updates_info(struct seq_file *m, 464 struct intel_crtc *crtc, 465 const char *hdr) 466 { 467 u64 count; 468 int row; 469 470 count = 0; 471 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 472 count += crtc->debug.vbl.times[row]; 473 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 474 if (!count) 475 return; 476 477 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 478 char columns[80] = " |"; 479 unsigned int x; 480 481 if (row & 1) { 482 const char *units; 483 484 if (row > 10) { 485 x = 1000000; 486 units = "ms"; 487 } else { 488 x = 1000; 489 units = "us"; 490 } 491 492 snprintf(columns, sizeof(columns), "%4ld%s |", 493 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 494 } 495 496 if (crtc->debug.vbl.times[row]) { 497 x = ilog2(crtc->debug.vbl.times[row]); 498 memset(columns + 8, '*', x); 499 columns[8 + x] = '\0'; 500 } 501 502 seq_printf(m, "%s%s\n", hdr, columns); 503 } 504 505 seq_printf(m, "%sMin update: %lluns\n", 506 hdr, crtc->debug.vbl.min); 507 seq_printf(m, "%sMax update: %lluns\n", 508 hdr, crtc->debug.vbl.max); 509 seq_printf(m, "%sAverage update: %lluns\n", 510 hdr, div64_u64(crtc->debug.vbl.sum, count)); 511 seq_printf(m, "%sOverruns > %uus: %u\n", 512 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 513 } 514 515 static int crtc_updates_show(struct seq_file *m, void *data) 516 { 517 crtc_updates_info(m, m->private, ""); 518 return 0; 519 } 520 521 static int crtc_updates_open(struct inode *inode, struct file *file) 522 { 523 return single_open(file, crtc_updates_show, inode->i_private); 524 } 525 526 static ssize_t crtc_updates_write(struct file *file, 527 const char __user *ubuf, 528 size_t len, loff_t *offp) 529 { 530 struct seq_file *m = file->private_data; 531 struct intel_crtc *crtc = m->private; 532 533 /* May race with an update. Meh. */ 534 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 535 536 return len; 537 } 538 539 static const struct file_operations crtc_updates_fops = { 540 .owner = THIS_MODULE, 541 .open = crtc_updates_open, 542 .read = seq_read, 543 .llseek = seq_lseek, 544 .release = single_release, 545 .write = crtc_updates_write 546 }; 547 548 static void crtc_updates_add(struct intel_crtc *crtc) 549 { 550 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 551 crtc, &crtc_updates_fops); 552 } 553 554 #else 555 static void crtc_updates_info(struct seq_file *m, 556 struct intel_crtc *crtc, 557 const char *hdr) 558 { 559 } 560 561 static void crtc_updates_add(struct intel_crtc *crtc) 562 { 563 } 564 #endif 565 566 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 567 { 568 struct drm_i915_private *dev_priv = node_to_i915(m->private); 569 const struct intel_crtc_state *crtc_state = 570 to_intel_crtc_state(crtc->base.state); 571 struct intel_encoder *encoder; 572 573 seq_printf(m, "[CRTC:%d:%s]:\n", 574 crtc->base.base.id, crtc->base.name); 575 576 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 577 str_yes_no(crtc_state->uapi.enable), 578 str_yes_no(crtc_state->uapi.active), 579 DRM_MODE_ARG(&crtc_state->uapi.mode)); 580 581 seq_printf(m, "\thw: enable=%s, active=%s\n", 582 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 583 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 584 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 585 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 586 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 587 588 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 589 DRM_RECT_ARG(&crtc_state->pipe_src), 590 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 591 592 intel_scaler_info(m, crtc); 593 594 if (crtc_state->bigjoiner_pipes) 595 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 596 crtc_state->bigjoiner_pipes, 597 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); 598 599 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 600 crtc_state->uapi.encoder_mask) 601 intel_encoder_info(m, crtc, encoder); 602 603 intel_plane_info(m, crtc); 604 605 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 606 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 607 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 608 609 crtc_updates_info(m, crtc, "\t"); 610 } 611 612 static int i915_display_info(struct seq_file *m, void *unused) 613 { 614 struct drm_i915_private *dev_priv = node_to_i915(m->private); 615 struct intel_crtc *crtc; 616 struct drm_connector *connector; 617 struct drm_connector_list_iter conn_iter; 618 intel_wakeref_t wakeref; 619 620 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 621 622 drm_modeset_lock_all(&dev_priv->drm); 623 624 seq_printf(m, "CRTC info\n"); 625 seq_printf(m, "---------\n"); 626 for_each_intel_crtc(&dev_priv->drm, crtc) 627 intel_crtc_info(m, crtc); 628 629 seq_printf(m, "\n"); 630 seq_printf(m, "Connector info\n"); 631 seq_printf(m, "--------------\n"); 632 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 633 drm_for_each_connector_iter(connector, &conn_iter) 634 intel_connector_info(m, connector); 635 drm_connector_list_iter_end(&conn_iter); 636 637 drm_modeset_unlock_all(&dev_priv->drm); 638 639 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 640 641 return 0; 642 } 643 644 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 645 { 646 struct drm_i915_private *dev_priv = node_to_i915(m->private); 647 struct intel_shared_dpll *pll; 648 int i; 649 650 drm_modeset_lock_all(&dev_priv->drm); 651 652 seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 653 dev_priv->display.dpll.ref_clks.nssc, 654 dev_priv->display.dpll.ref_clks.ssc); 655 656 for_each_shared_dpll(dev_priv, pll, i) { 657 seq_printf(m, "DPLL%i: %s, id: %i\n", pll->index, 658 pll->info->name, pll->info->id); 659 seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 660 pll->state.pipe_mask, pll->active_mask, 661 str_yes_no(pll->on)); 662 seq_printf(m, " tracked hardware state:\n"); 663 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll); 664 seq_printf(m, " dpll_md: 0x%08x\n", 665 pll->state.hw_state.dpll_md); 666 seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0); 667 seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1); 668 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll); 669 seq_printf(m, " cfgcr0: 0x%08x\n", pll->state.hw_state.cfgcr0); 670 seq_printf(m, " cfgcr1: 0x%08x\n", pll->state.hw_state.cfgcr1); 671 seq_printf(m, " div0: 0x%08x\n", pll->state.hw_state.div0); 672 seq_printf(m, " mg_refclkin_ctl: 0x%08x\n", 673 pll->state.hw_state.mg_refclkin_ctl); 674 seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n", 675 pll->state.hw_state.mg_clktop2_coreclkctl1); 676 seq_printf(m, " mg_clktop2_hsclkctl: 0x%08x\n", 677 pll->state.hw_state.mg_clktop2_hsclkctl); 678 seq_printf(m, " mg_pll_div0: 0x%08x\n", 679 pll->state.hw_state.mg_pll_div0); 680 seq_printf(m, " mg_pll_div1: 0x%08x\n", 681 pll->state.hw_state.mg_pll_div1); 682 seq_printf(m, " mg_pll_lf: 0x%08x\n", 683 pll->state.hw_state.mg_pll_lf); 684 seq_printf(m, " mg_pll_frac_lock: 0x%08x\n", 685 pll->state.hw_state.mg_pll_frac_lock); 686 seq_printf(m, " mg_pll_ssc: 0x%08x\n", 687 pll->state.hw_state.mg_pll_ssc); 688 seq_printf(m, " mg_pll_bias: 0x%08x\n", 689 pll->state.hw_state.mg_pll_bias); 690 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n", 691 pll->state.hw_state.mg_pll_tdc_coldst_bias); 692 } 693 drm_modeset_unlock_all(&dev_priv->drm); 694 695 return 0; 696 } 697 698 static int i915_ddb_info(struct seq_file *m, void *unused) 699 { 700 struct drm_i915_private *dev_priv = node_to_i915(m->private); 701 struct skl_ddb_entry *entry; 702 struct intel_crtc *crtc; 703 704 if (DISPLAY_VER(dev_priv) < 9) 705 return -ENODEV; 706 707 drm_modeset_lock_all(&dev_priv->drm); 708 709 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 710 711 for_each_intel_crtc(&dev_priv->drm, crtc) { 712 struct intel_crtc_state *crtc_state = 713 to_intel_crtc_state(crtc->base.state); 714 enum pipe pipe = crtc->pipe; 715 enum plane_id plane_id; 716 717 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 718 719 for_each_plane_id_on_crtc(crtc, plane_id) { 720 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 721 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 722 entry->start, entry->end, 723 skl_ddb_entry_size(entry)); 724 } 725 726 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 727 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 728 entry->end, skl_ddb_entry_size(entry)); 729 } 730 731 drm_modeset_unlock_all(&dev_priv->drm); 732 733 return 0; 734 } 735 736 static bool 737 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 738 enum i915_power_well_id power_well_id) 739 { 740 intel_wakeref_t wakeref; 741 bool is_enabled; 742 743 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 744 is_enabled = intel_display_power_well_is_enabled(i915, 745 power_well_id); 746 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 747 748 return is_enabled; 749 } 750 751 static int i915_lpsp_status(struct seq_file *m, void *unused) 752 { 753 struct drm_i915_private *i915 = node_to_i915(m->private); 754 bool lpsp_enabled = false; 755 756 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 757 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 758 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 759 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 760 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 761 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 762 } else { 763 seq_puts(m, "LPSP: not supported\n"); 764 return 0; 765 } 766 767 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 768 769 return 0; 770 } 771 772 static int i915_dp_mst_info(struct seq_file *m, void *unused) 773 { 774 struct drm_i915_private *dev_priv = node_to_i915(m->private); 775 struct intel_encoder *intel_encoder; 776 struct intel_digital_port *dig_port; 777 struct drm_connector *connector; 778 struct drm_connector_list_iter conn_iter; 779 780 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 781 drm_for_each_connector_iter(connector, &conn_iter) { 782 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 783 continue; 784 785 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 786 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 787 continue; 788 789 dig_port = enc_to_dig_port(intel_encoder); 790 if (!intel_dp_mst_source_support(&dig_port->dp)) 791 continue; 792 793 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 794 dig_port->base.base.base.id, 795 dig_port->base.base.name); 796 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 797 } 798 drm_connector_list_iter_end(&conn_iter); 799 800 return 0; 801 } 802 803 static ssize_t i915_displayport_test_active_write(struct file *file, 804 const char __user *ubuf, 805 size_t len, loff_t *offp) 806 { 807 char *input_buffer; 808 int status = 0; 809 struct drm_device *dev; 810 struct drm_connector *connector; 811 struct drm_connector_list_iter conn_iter; 812 struct intel_dp *intel_dp; 813 int val = 0; 814 815 dev = ((struct seq_file *)file->private_data)->private; 816 817 if (len == 0) 818 return 0; 819 820 input_buffer = memdup_user_nul(ubuf, len); 821 if (IS_ERR(input_buffer)) 822 return PTR_ERR(input_buffer); 823 824 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len); 825 826 drm_connector_list_iter_begin(dev, &conn_iter); 827 drm_for_each_connector_iter(connector, &conn_iter) { 828 struct intel_encoder *encoder; 829 830 if (connector->connector_type != 831 DRM_MODE_CONNECTOR_DisplayPort) 832 continue; 833 834 encoder = to_intel_encoder(connector->encoder); 835 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 836 continue; 837 838 if (encoder && connector->status == connector_status_connected) { 839 intel_dp = enc_to_intel_dp(encoder); 840 status = kstrtoint(input_buffer, 10, &val); 841 if (status < 0) 842 break; 843 drm_dbg(dev, "Got %d for test active\n", val); 844 /* To prevent erroneous activation of the compliance 845 * testing code, only accept an actual value of 1 here 846 */ 847 if (val == 1) 848 intel_dp->compliance.test_active = true; 849 else 850 intel_dp->compliance.test_active = false; 851 } 852 } 853 drm_connector_list_iter_end(&conn_iter); 854 kfree(input_buffer); 855 if (status < 0) 856 return status; 857 858 *offp += len; 859 return len; 860 } 861 862 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 863 { 864 struct drm_i915_private *dev_priv = m->private; 865 struct drm_connector *connector; 866 struct drm_connector_list_iter conn_iter; 867 struct intel_dp *intel_dp; 868 869 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 870 drm_for_each_connector_iter(connector, &conn_iter) { 871 struct intel_encoder *encoder; 872 873 if (connector->connector_type != 874 DRM_MODE_CONNECTOR_DisplayPort) 875 continue; 876 877 encoder = to_intel_encoder(connector->encoder); 878 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 879 continue; 880 881 if (encoder && connector->status == connector_status_connected) { 882 intel_dp = enc_to_intel_dp(encoder); 883 if (intel_dp->compliance.test_active) 884 seq_puts(m, "1"); 885 else 886 seq_puts(m, "0"); 887 } else 888 seq_puts(m, "0"); 889 } 890 drm_connector_list_iter_end(&conn_iter); 891 892 return 0; 893 } 894 895 static int i915_displayport_test_active_open(struct inode *inode, 896 struct file *file) 897 { 898 return single_open(file, i915_displayport_test_active_show, 899 inode->i_private); 900 } 901 902 static const struct file_operations i915_displayport_test_active_fops = { 903 .owner = THIS_MODULE, 904 .open = i915_displayport_test_active_open, 905 .read = seq_read, 906 .llseek = seq_lseek, 907 .release = single_release, 908 .write = i915_displayport_test_active_write 909 }; 910 911 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 912 { 913 struct drm_i915_private *dev_priv = m->private; 914 struct drm_connector *connector; 915 struct drm_connector_list_iter conn_iter; 916 struct intel_dp *intel_dp; 917 918 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 919 drm_for_each_connector_iter(connector, &conn_iter) { 920 struct intel_encoder *encoder; 921 922 if (connector->connector_type != 923 DRM_MODE_CONNECTOR_DisplayPort) 924 continue; 925 926 encoder = to_intel_encoder(connector->encoder); 927 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 928 continue; 929 930 if (encoder && connector->status == connector_status_connected) { 931 intel_dp = enc_to_intel_dp(encoder); 932 if (intel_dp->compliance.test_type == 933 DP_TEST_LINK_EDID_READ) 934 seq_printf(m, "%lx", 935 intel_dp->compliance.test_data.edid); 936 else if (intel_dp->compliance.test_type == 937 DP_TEST_LINK_VIDEO_PATTERN) { 938 seq_printf(m, "hdisplay: %d\n", 939 intel_dp->compliance.test_data.hdisplay); 940 seq_printf(m, "vdisplay: %d\n", 941 intel_dp->compliance.test_data.vdisplay); 942 seq_printf(m, "bpc: %u\n", 943 intel_dp->compliance.test_data.bpc); 944 } else if (intel_dp->compliance.test_type == 945 DP_TEST_LINK_PHY_TEST_PATTERN) { 946 seq_printf(m, "pattern: %d\n", 947 intel_dp->compliance.test_data.phytest.phy_pattern); 948 seq_printf(m, "Number of lanes: %d\n", 949 intel_dp->compliance.test_data.phytest.num_lanes); 950 seq_printf(m, "Link Rate: %d\n", 951 intel_dp->compliance.test_data.phytest.link_rate); 952 seq_printf(m, "level: %02x\n", 953 intel_dp->train_set[0]); 954 } 955 } else 956 seq_puts(m, "0"); 957 } 958 drm_connector_list_iter_end(&conn_iter); 959 960 return 0; 961 } 962 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 963 964 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 965 { 966 struct drm_i915_private *dev_priv = m->private; 967 struct drm_connector *connector; 968 struct drm_connector_list_iter conn_iter; 969 struct intel_dp *intel_dp; 970 971 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 972 drm_for_each_connector_iter(connector, &conn_iter) { 973 struct intel_encoder *encoder; 974 975 if (connector->connector_type != 976 DRM_MODE_CONNECTOR_DisplayPort) 977 continue; 978 979 encoder = to_intel_encoder(connector->encoder); 980 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 981 continue; 982 983 if (encoder && connector->status == connector_status_connected) { 984 intel_dp = enc_to_intel_dp(encoder); 985 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 986 } else 987 seq_puts(m, "0"); 988 } 989 drm_connector_list_iter_end(&conn_iter); 990 991 return 0; 992 } 993 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 994 995 static ssize_t 996 i915_fifo_underrun_reset_write(struct file *filp, 997 const char __user *ubuf, 998 size_t cnt, loff_t *ppos) 999 { 1000 struct drm_i915_private *dev_priv = filp->private_data; 1001 struct intel_crtc *crtc; 1002 int ret; 1003 bool reset; 1004 1005 ret = kstrtobool_from_user(ubuf, cnt, &reset); 1006 if (ret) 1007 return ret; 1008 1009 if (!reset) 1010 return cnt; 1011 1012 for_each_intel_crtc(&dev_priv->drm, crtc) { 1013 struct drm_crtc_commit *commit; 1014 struct intel_crtc_state *crtc_state; 1015 1016 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1017 if (ret) 1018 return ret; 1019 1020 crtc_state = to_intel_crtc_state(crtc->base.state); 1021 commit = crtc_state->uapi.commit; 1022 if (commit) { 1023 ret = wait_for_completion_interruptible(&commit->hw_done); 1024 if (!ret) 1025 ret = wait_for_completion_interruptible(&commit->flip_done); 1026 } 1027 1028 if (!ret && crtc_state->hw.active) { 1029 drm_dbg_kms(&dev_priv->drm, 1030 "Re-arming FIFO underruns on pipe %c\n", 1031 pipe_name(crtc->pipe)); 1032 1033 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1034 } 1035 1036 drm_modeset_unlock(&crtc->base.mutex); 1037 1038 if (ret) 1039 return ret; 1040 } 1041 1042 intel_fbc_reset_underrun(dev_priv); 1043 1044 return cnt; 1045 } 1046 1047 static const struct file_operations i915_fifo_underrun_reset_ops = { 1048 .owner = THIS_MODULE, 1049 .open = simple_open, 1050 .write = i915_fifo_underrun_reset_write, 1051 .llseek = default_llseek, 1052 }; 1053 1054 static const struct drm_info_list intel_display_debugfs_list[] = { 1055 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1056 {"i915_sr_status", i915_sr_status, 0}, 1057 {"i915_opregion", i915_opregion, 0}, 1058 {"i915_vbt", i915_vbt, 0}, 1059 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1060 {"i915_power_domain_info", i915_power_domain_info, 0}, 1061 {"i915_display_info", i915_display_info, 0}, 1062 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1063 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1064 {"i915_ddb_info", i915_ddb_info, 0}, 1065 {"i915_lpsp_status", i915_lpsp_status, 0}, 1066 }; 1067 1068 static const struct { 1069 const char *name; 1070 const struct file_operations *fops; 1071 } intel_display_debugfs_files[] = { 1072 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1073 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1074 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1075 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1076 }; 1077 1078 void intel_display_debugfs_register(struct drm_i915_private *i915) 1079 { 1080 struct drm_minor *minor = i915->drm.primary; 1081 int i; 1082 1083 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1084 debugfs_create_file(intel_display_debugfs_files[i].name, 1085 S_IRUGO | S_IWUSR, 1086 minor->debugfs_root, 1087 to_i915(minor->dev), 1088 intel_display_debugfs_files[i].fops); 1089 } 1090 1091 drm_debugfs_create_files(intel_display_debugfs_list, 1092 ARRAY_SIZE(intel_display_debugfs_list), 1093 minor->debugfs_root, minor); 1094 1095 intel_cdclk_debugfs_register(i915); 1096 intel_dmc_debugfs_register(i915); 1097 intel_fbc_debugfs_register(i915); 1098 intel_hpd_debugfs_register(i915); 1099 intel_psr_debugfs_register(i915); 1100 intel_wm_debugfs_register(i915); 1101 } 1102 1103 static int i915_panel_show(struct seq_file *m, void *data) 1104 { 1105 struct drm_connector *connector = m->private; 1106 struct intel_dp *intel_dp = 1107 intel_attached_dp(to_intel_connector(connector)); 1108 1109 if (connector->status != connector_status_connected) 1110 return -ENODEV; 1111 1112 seq_printf(m, "Panel power up delay: %d\n", 1113 intel_dp->pps.panel_power_up_delay); 1114 seq_printf(m, "Panel power down delay: %d\n", 1115 intel_dp->pps.panel_power_down_delay); 1116 seq_printf(m, "Backlight on delay: %d\n", 1117 intel_dp->pps.backlight_on_delay); 1118 seq_printf(m, "Backlight off delay: %d\n", 1119 intel_dp->pps.backlight_off_delay); 1120 1121 return 0; 1122 } 1123 DEFINE_SHOW_ATTRIBUTE(i915_panel); 1124 1125 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1126 { 1127 struct drm_connector *connector = m->private; 1128 struct drm_i915_private *i915 = to_i915(connector->dev); 1129 struct intel_connector *intel_connector = to_intel_connector(connector); 1130 int ret; 1131 1132 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1133 if (ret) 1134 return ret; 1135 1136 if (!connector->encoder || connector->status != connector_status_connected) { 1137 ret = -ENODEV; 1138 goto out; 1139 } 1140 1141 seq_printf(m, "%s:%d HDCP version: ", connector->name, 1142 connector->base.id); 1143 intel_hdcp_info(m, intel_connector); 1144 1145 out: 1146 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1147 1148 return ret; 1149 } 1150 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1151 1152 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1153 { 1154 struct drm_connector *connector = m->private; 1155 struct drm_i915_private *i915 = to_i915(connector->dev); 1156 struct intel_encoder *encoder; 1157 bool lpsp_capable = false; 1158 1159 encoder = intel_attached_encoder(to_intel_connector(connector)); 1160 if (!encoder) 1161 return -ENODEV; 1162 1163 if (connector->status != connector_status_connected) 1164 return -ENODEV; 1165 1166 if (DISPLAY_VER(i915) >= 13) 1167 lpsp_capable = encoder->port <= PORT_B; 1168 else if (DISPLAY_VER(i915) >= 12) 1169 /* 1170 * Actually TGL can drive LPSP on port till DDI_C 1171 * but there is no physical connected DDI_C on TGL sku's, 1172 * even driver is not initilizing DDI_C port for gen12. 1173 */ 1174 lpsp_capable = encoder->port <= PORT_B; 1175 else if (DISPLAY_VER(i915) == 11) 1176 lpsp_capable = (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1177 connector->connector_type == DRM_MODE_CONNECTOR_eDP); 1178 else if (IS_DISPLAY_VER(i915, 9, 10)) 1179 lpsp_capable = (encoder->port == PORT_A && 1180 (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1181 connector->connector_type == DRM_MODE_CONNECTOR_eDP || 1182 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1183 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1184 lpsp_capable = connector->connector_type == DRM_MODE_CONNECTOR_eDP; 1185 1186 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1187 1188 return 0; 1189 } 1190 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1191 1192 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1193 { 1194 struct intel_connector *connector = to_intel_connector(m->private); 1195 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1196 struct drm_crtc *crtc; 1197 struct intel_dp *intel_dp; 1198 struct drm_modeset_acquire_ctx ctx; 1199 struct intel_crtc_state *crtc_state = NULL; 1200 int ret = 0; 1201 bool try_again = false; 1202 1203 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1204 1205 do { 1206 try_again = false; 1207 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, 1208 &ctx); 1209 if (ret) { 1210 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1211 try_again = true; 1212 continue; 1213 } 1214 break; 1215 } 1216 crtc = connector->base.state->crtc; 1217 if (connector->base.status != connector_status_connected || !crtc) { 1218 ret = -ENODEV; 1219 break; 1220 } 1221 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1222 if (ret == -EDEADLK) { 1223 ret = drm_modeset_backoff(&ctx); 1224 if (!ret) { 1225 try_again = true; 1226 continue; 1227 } 1228 break; 1229 } else if (ret) { 1230 break; 1231 } 1232 intel_dp = intel_attached_dp(connector); 1233 crtc_state = to_intel_crtc_state(crtc->state); 1234 seq_printf(m, "DSC_Enabled: %s\n", 1235 str_yes_no(crtc_state->dsc.compression_enable)); 1236 seq_printf(m, "DSC_Sink_Support: %s\n", 1237 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 1238 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1239 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1240 DP_DSC_RGB)), 1241 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1242 DP_DSC_YCbCr420_Native)), 1243 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1244 DP_DSC_YCbCr444))); 1245 seq_printf(m, "Force_DSC_Enable: %s\n", 1246 str_yes_no(intel_dp->force_dsc_en)); 1247 if (!intel_dp_is_edp(intel_dp)) 1248 seq_printf(m, "FEC_Sink_Support: %s\n", 1249 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 1250 } while (try_again); 1251 1252 drm_modeset_drop_locks(&ctx); 1253 drm_modeset_acquire_fini(&ctx); 1254 1255 return ret; 1256 } 1257 1258 static ssize_t i915_dsc_fec_support_write(struct file *file, 1259 const char __user *ubuf, 1260 size_t len, loff_t *offp) 1261 { 1262 bool dsc_enable = false; 1263 int ret; 1264 struct drm_connector *connector = 1265 ((struct seq_file *)file->private_data)->private; 1266 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1267 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 1268 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1269 1270 if (len == 0) 1271 return 0; 1272 1273 drm_dbg(&i915->drm, 1274 "Copied %zu bytes from user to force DSC\n", len); 1275 1276 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1277 if (ret < 0) 1278 return ret; 1279 1280 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1281 (dsc_enable) ? "true" : "false"); 1282 intel_dp->force_dsc_en = dsc_enable; 1283 1284 *offp += len; 1285 return len; 1286 } 1287 1288 static int i915_dsc_fec_support_open(struct inode *inode, 1289 struct file *file) 1290 { 1291 return single_open(file, i915_dsc_fec_support_show, 1292 inode->i_private); 1293 } 1294 1295 static const struct file_operations i915_dsc_fec_support_fops = { 1296 .owner = THIS_MODULE, 1297 .open = i915_dsc_fec_support_open, 1298 .read = seq_read, 1299 .llseek = seq_lseek, 1300 .release = single_release, 1301 .write = i915_dsc_fec_support_write 1302 }; 1303 1304 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1305 { 1306 struct drm_connector *connector = m->private; 1307 struct drm_device *dev = connector->dev; 1308 struct drm_crtc *crtc; 1309 struct intel_crtc_state *crtc_state; 1310 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1311 int ret; 1312 1313 if (!encoder) 1314 return -ENODEV; 1315 1316 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); 1317 if (ret) 1318 return ret; 1319 1320 crtc = connector->state->crtc; 1321 if (connector->status != connector_status_connected || !crtc) { 1322 ret = -ENODEV; 1323 goto out; 1324 } 1325 1326 crtc_state = to_intel_crtc_state(crtc->state); 1327 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1328 1329 out: drm_modeset_unlock(&dev->mode_config.connection_mutex); 1330 1331 return ret; 1332 } 1333 1334 static ssize_t i915_dsc_bpc_write(struct file *file, 1335 const char __user *ubuf, 1336 size_t len, loff_t *offp) 1337 { 1338 struct drm_connector *connector = 1339 ((struct seq_file *)file->private_data)->private; 1340 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1341 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1342 int dsc_bpc = 0; 1343 int ret; 1344 1345 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1346 if (ret < 0) 1347 return ret; 1348 1349 intel_dp->force_dsc_bpc = dsc_bpc; 1350 *offp += len; 1351 1352 return len; 1353 } 1354 1355 static int i915_dsc_bpc_open(struct inode *inode, 1356 struct file *file) 1357 { 1358 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1359 } 1360 1361 static const struct file_operations i915_dsc_bpc_fops = { 1362 .owner = THIS_MODULE, 1363 .open = i915_dsc_bpc_open, 1364 .read = seq_read, 1365 .llseek = seq_lseek, 1366 .release = single_release, 1367 .write = i915_dsc_bpc_write 1368 }; 1369 1370 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1371 { 1372 struct drm_connector *connector = m->private; 1373 struct drm_device *dev = connector->dev; 1374 struct drm_crtc *crtc; 1375 struct intel_crtc_state *crtc_state; 1376 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1377 int ret; 1378 1379 if (!encoder) 1380 return -ENODEV; 1381 1382 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); 1383 if (ret) 1384 return ret; 1385 1386 crtc = connector->state->crtc; 1387 if (connector->status != connector_status_connected || !crtc) { 1388 ret = -ENODEV; 1389 goto out; 1390 } 1391 1392 crtc_state = to_intel_crtc_state(crtc->state); 1393 seq_printf(m, "DSC_Output_Format: %s\n", 1394 intel_output_format_name(crtc_state->output_format)); 1395 1396 out: drm_modeset_unlock(&dev->mode_config.connection_mutex); 1397 1398 return ret; 1399 } 1400 1401 static ssize_t i915_dsc_output_format_write(struct file *file, 1402 const char __user *ubuf, 1403 size_t len, loff_t *offp) 1404 { 1405 struct drm_connector *connector = 1406 ((struct seq_file *)file->private_data)->private; 1407 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1408 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1409 int dsc_output_format = 0; 1410 int ret; 1411 1412 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1413 if (ret < 0) 1414 return ret; 1415 1416 intel_dp->force_dsc_output_format = dsc_output_format; 1417 *offp += len; 1418 1419 return len; 1420 } 1421 1422 static int i915_dsc_output_format_open(struct inode *inode, 1423 struct file *file) 1424 { 1425 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1426 } 1427 1428 static const struct file_operations i915_dsc_output_format_fops = { 1429 .owner = THIS_MODULE, 1430 .open = i915_dsc_output_format_open, 1431 .read = seq_read, 1432 .llseek = seq_lseek, 1433 .release = single_release, 1434 .write = i915_dsc_output_format_write 1435 }; 1436 1437 /* 1438 * Returns the Current CRTC's bpc. 1439 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1440 */ 1441 static int i915_current_bpc_show(struct seq_file *m, void *data) 1442 { 1443 struct intel_crtc *crtc = m->private; 1444 struct intel_crtc_state *crtc_state; 1445 int ret; 1446 1447 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1448 if (ret) 1449 return ret; 1450 1451 crtc_state = to_intel_crtc_state(crtc->base.state); 1452 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1453 1454 drm_modeset_unlock(&crtc->base.mutex); 1455 1456 return ret; 1457 } 1458 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1459 1460 /* Pipe may differ from crtc index if pipes are fused off */ 1461 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1462 { 1463 struct intel_crtc *crtc = m->private; 1464 1465 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1466 1467 return 0; 1468 } 1469 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1470 1471 /** 1472 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1473 * @intel_connector: pointer to a registered drm_connector 1474 * 1475 * Cleanup will be done by drm_connector_unregister() through a call to 1476 * drm_debugfs_connector_remove(). 1477 */ 1478 void intel_connector_debugfs_add(struct intel_connector *intel_connector) 1479 { 1480 struct drm_connector *connector = &intel_connector->base; 1481 struct dentry *root = connector->debugfs_entry; 1482 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1483 1484 /* The connector must have been registered beforehands. */ 1485 if (!root) 1486 return; 1487 1488 intel_drrs_connector_debugfs_add(intel_connector); 1489 intel_psr_connector_debugfs_add(intel_connector); 1490 1491 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) 1492 debugfs_create_file("i915_panel_timings", S_IRUGO, root, 1493 connector, &i915_panel_fops); 1494 1495 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1496 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || 1497 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1498 debugfs_create_file("i915_hdcp_sink_capability", S_IRUGO, root, 1499 connector, &i915_hdcp_sink_capability_fops); 1500 } 1501 1502 if (DISPLAY_VER(dev_priv) >= 11 && 1503 ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && 1504 !to_intel_connector(connector)->mst_port) || 1505 connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { 1506 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1507 connector, &i915_dsc_fec_support_fops); 1508 1509 debugfs_create_file("i915_dsc_bpc", 0644, root, 1510 connector, &i915_dsc_bpc_fops); 1511 1512 debugfs_create_file("i915_dsc_output_format", 0644, root, 1513 connector, &i915_dsc_output_format_fops); 1514 } 1515 1516 if (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1517 connector->connector_type == DRM_MODE_CONNECTOR_eDP || 1518 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1519 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || 1520 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) 1521 debugfs_create_file("i915_lpsp_capability", 0444, root, 1522 connector, &i915_lpsp_capability_fops); 1523 } 1524 1525 /** 1526 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1527 * @crtc: pointer to a drm_crtc 1528 * 1529 * Failure to add debugfs entries should generally be ignored. 1530 */ 1531 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1532 { 1533 struct dentry *root = crtc->base.debugfs_entry; 1534 1535 if (!root) 1536 return; 1537 1538 crtc_updates_add(crtc); 1539 intel_drrs_crtc_debugfs_add(crtc); 1540 intel_fbc_crtc_debugfs_add(crtc); 1541 hsw_ips_crtc_debugfs_add(crtc); 1542 1543 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1544 &i915_current_bpc_fops); 1545 debugfs_create_file("i915_pipe", 0444, root, crtc, 1546 &intel_crtc_pipe_fops); 1547 } 1548