1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/string_helpers.h> 7 8 #include <drm/drm_debugfs.h> 9 #include <drm/drm_edid.h> 10 #include <drm/drm_fourcc.h> 11 12 #include "hsw_ips.h" 13 #include "i915_debugfs.h" 14 #include "i915_irq.h" 15 #include "i915_reg.h" 16 #include "intel_crtc.h" 17 #include "intel_de.h" 18 #include "intel_crtc_state_dump.h" 19 #include "intel_display_debugfs.h" 20 #include "intel_display_power.h" 21 #include "intel_display_power_well.h" 22 #include "intel_display_types.h" 23 #include "intel_dmc.h" 24 #include "intel_dp.h" 25 #include "intel_dp_mst.h" 26 #include "intel_drrs.h" 27 #include "intel_fbc.h" 28 #include "intel_fbdev.h" 29 #include "intel_hdcp.h" 30 #include "intel_hdmi.h" 31 #include "intel_hotplug.h" 32 #include "intel_panel.h" 33 #include "intel_psr.h" 34 #include "intel_psr_regs.h" 35 #include "intel_wm.h" 36 37 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 38 { 39 return to_i915(node->minor->dev); 40 } 41 42 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 43 { 44 struct drm_i915_private *dev_priv = node_to_i915(m->private); 45 46 spin_lock(&dev_priv->display.fb_tracking.lock); 47 48 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 49 dev_priv->display.fb_tracking.busy_bits); 50 51 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 52 dev_priv->display.fb_tracking.flip_bits); 53 54 spin_unlock(&dev_priv->display.fb_tracking.lock); 55 56 return 0; 57 } 58 59 static int i915_sr_status(struct seq_file *m, void *unused) 60 { 61 struct drm_i915_private *dev_priv = node_to_i915(m->private); 62 intel_wakeref_t wakeref; 63 bool sr_enabled = false; 64 65 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 66 67 if (DISPLAY_VER(dev_priv) >= 9) 68 /* no global SR status; inspect per-plane WM */; 69 else if (HAS_PCH_SPLIT(dev_priv)) 70 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 71 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 72 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 73 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 74 else if (IS_I915GM(dev_priv)) 75 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 76 else if (IS_PINEVIEW(dev_priv)) 77 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 78 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 79 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 80 81 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 82 83 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 84 85 return 0; 86 } 87 88 static int i915_opregion(struct seq_file *m, void *unused) 89 { 90 struct drm_i915_private *i915 = node_to_i915(m->private); 91 struct intel_opregion *opregion = &i915->display.opregion; 92 93 if (opregion->header) 94 seq_write(m, opregion->header, OPREGION_SIZE); 95 96 return 0; 97 } 98 99 static int i915_vbt(struct seq_file *m, void *unused) 100 { 101 struct drm_i915_private *i915 = node_to_i915(m->private); 102 struct intel_opregion *opregion = &i915->display.opregion; 103 104 if (opregion->vbt) 105 seq_write(m, opregion->vbt, opregion->vbt_size); 106 107 return 0; 108 } 109 110 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 111 { 112 struct drm_i915_private *dev_priv = node_to_i915(m->private); 113 struct intel_framebuffer *fbdev_fb = NULL; 114 struct drm_framebuffer *drm_fb; 115 116 #ifdef CONFIG_DRM_FBDEV_EMULATION 117 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 118 if (fbdev_fb) { 119 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 120 fbdev_fb->base.width, 121 fbdev_fb->base.height, 122 fbdev_fb->base.format->depth, 123 fbdev_fb->base.format->cpp[0] * 8, 124 fbdev_fb->base.modifier, 125 drm_framebuffer_read_refcount(&fbdev_fb->base)); 126 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 127 seq_putc(m, '\n'); 128 } 129 #endif 130 131 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 132 drm_for_each_fb(drm_fb, &dev_priv->drm) { 133 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 134 if (fb == fbdev_fb) 135 continue; 136 137 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 138 fb->base.width, 139 fb->base.height, 140 fb->base.format->depth, 141 fb->base.format->cpp[0] * 8, 142 fb->base.modifier, 143 drm_framebuffer_read_refcount(&fb->base)); 144 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 145 seq_putc(m, '\n'); 146 } 147 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 148 149 return 0; 150 } 151 152 static int i915_power_domain_info(struct seq_file *m, void *unused) 153 { 154 struct drm_i915_private *i915 = node_to_i915(m->private); 155 156 intel_display_power_debug(i915, m); 157 158 return 0; 159 } 160 161 static void intel_seq_print_mode(struct seq_file *m, int tabs, 162 const struct drm_display_mode *mode) 163 { 164 int i; 165 166 for (i = 0; i < tabs; i++) 167 seq_putc(m, '\t'); 168 169 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 170 } 171 172 static void intel_encoder_info(struct seq_file *m, 173 struct intel_crtc *crtc, 174 struct intel_encoder *encoder) 175 { 176 struct drm_i915_private *dev_priv = node_to_i915(m->private); 177 struct drm_connector_list_iter conn_iter; 178 struct drm_connector *connector; 179 180 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 181 encoder->base.base.id, encoder->base.name); 182 183 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 184 drm_for_each_connector_iter(connector, &conn_iter) { 185 const struct drm_connector_state *conn_state = 186 connector->state; 187 188 if (conn_state->best_encoder != &encoder->base) 189 continue; 190 191 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 192 connector->base.id, connector->name); 193 } 194 drm_connector_list_iter_end(&conn_iter); 195 } 196 197 static void intel_panel_info(struct seq_file *m, 198 struct intel_connector *connector) 199 { 200 const struct drm_display_mode *fixed_mode; 201 202 if (list_empty(&connector->panel.fixed_modes)) 203 return; 204 205 seq_puts(m, "\tfixed modes:\n"); 206 207 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 208 intel_seq_print_mode(m, 2, fixed_mode); 209 } 210 211 static void intel_hdcp_info(struct seq_file *m, 212 struct intel_connector *intel_connector) 213 { 214 bool hdcp_cap, hdcp2_cap; 215 216 if (!intel_connector->hdcp.shim) { 217 seq_puts(m, "No Connector Support"); 218 goto out; 219 } 220 221 hdcp_cap = intel_hdcp_capable(intel_connector); 222 hdcp2_cap = intel_hdcp2_capable(intel_connector); 223 224 if (hdcp_cap) 225 seq_puts(m, "HDCP1.4 "); 226 if (hdcp2_cap) 227 seq_puts(m, "HDCP2.2 "); 228 229 if (!hdcp_cap && !hdcp2_cap) 230 seq_puts(m, "None"); 231 232 out: 233 seq_puts(m, "\n"); 234 } 235 236 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 237 { 238 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 239 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 240 241 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 242 seq_printf(m, "\taudio support: %s\n", 243 str_yes_no(connector->base.display_info.has_audio)); 244 245 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 246 connector->detect_edid, &intel_dp->aux); 247 } 248 249 static void intel_dp_mst_info(struct seq_file *m, 250 struct intel_connector *connector) 251 { 252 bool has_audio = connector->base.display_info.has_audio; 253 254 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 255 } 256 257 static void intel_hdmi_info(struct seq_file *m, 258 struct intel_connector *connector) 259 { 260 bool has_audio = connector->base.display_info.has_audio; 261 262 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 263 } 264 265 static void intel_connector_info(struct seq_file *m, 266 struct drm_connector *connector) 267 { 268 struct intel_connector *intel_connector = to_intel_connector(connector); 269 const struct drm_connector_state *conn_state = connector->state; 270 struct intel_encoder *encoder = 271 to_intel_encoder(conn_state->best_encoder); 272 const struct drm_display_mode *mode; 273 274 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 275 connector->base.id, connector->name, 276 drm_get_connector_status_name(connector->status)); 277 278 if (connector->status == connector_status_disconnected) 279 return; 280 281 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 282 connector->display_info.width_mm, 283 connector->display_info.height_mm); 284 seq_printf(m, "\tsubpixel order: %s\n", 285 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 286 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 287 288 if (!encoder) 289 return; 290 291 switch (connector->connector_type) { 292 case DRM_MODE_CONNECTOR_DisplayPort: 293 case DRM_MODE_CONNECTOR_eDP: 294 if (encoder->type == INTEL_OUTPUT_DP_MST) 295 intel_dp_mst_info(m, intel_connector); 296 else 297 intel_dp_info(m, intel_connector); 298 break; 299 case DRM_MODE_CONNECTOR_HDMIA: 300 if (encoder->type == INTEL_OUTPUT_HDMI || 301 encoder->type == INTEL_OUTPUT_DDI) 302 intel_hdmi_info(m, intel_connector); 303 break; 304 default: 305 break; 306 } 307 308 seq_puts(m, "\tHDCP version: "); 309 intel_hdcp_info(m, intel_connector); 310 311 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 312 313 intel_panel_info(m, intel_connector); 314 315 seq_printf(m, "\tmodes:\n"); 316 list_for_each_entry(mode, &connector->modes, head) 317 intel_seq_print_mode(m, 2, mode); 318 } 319 320 static const char *plane_type(enum drm_plane_type type) 321 { 322 switch (type) { 323 case DRM_PLANE_TYPE_OVERLAY: 324 return "OVL"; 325 case DRM_PLANE_TYPE_PRIMARY: 326 return "PRI"; 327 case DRM_PLANE_TYPE_CURSOR: 328 return "CUR"; 329 /* 330 * Deliberately omitting default: to generate compiler warnings 331 * when a new drm_plane_type gets added. 332 */ 333 } 334 335 return "unknown"; 336 } 337 338 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 339 { 340 /* 341 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 342 * will print them all to visualize if the values are misused 343 */ 344 snprintf(buf, bufsize, 345 "%s%s%s%s%s%s(0x%08x)", 346 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 347 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 348 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 349 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 350 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 351 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 352 rotation); 353 } 354 355 static const char *plane_visibility(const struct intel_plane_state *plane_state) 356 { 357 if (plane_state->uapi.visible) 358 return "visible"; 359 360 if (plane_state->planar_slave) 361 return "planar-slave"; 362 363 return "hidden"; 364 } 365 366 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 367 { 368 const struct intel_plane_state *plane_state = 369 to_intel_plane_state(plane->base.state); 370 const struct drm_framebuffer *fb = plane_state->uapi.fb; 371 struct drm_rect src, dst; 372 char rot_str[48]; 373 374 src = drm_plane_state_src(&plane_state->uapi); 375 dst = drm_plane_state_dest(&plane_state->uapi); 376 377 plane_rotation(rot_str, sizeof(rot_str), 378 plane_state->uapi.rotation); 379 380 seq_puts(m, "\t\tuapi: [FB:"); 381 if (fb) 382 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 383 &fb->format->format, fb->modifier, fb->width, 384 fb->height); 385 else 386 seq_puts(m, "0] n/a,0x0,0x0,"); 387 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 388 ", rotation=%s\n", plane_visibility(plane_state), 389 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 390 391 if (plane_state->planar_linked_plane) 392 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 393 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 394 plane_state->planar_slave ? "slave" : "master"); 395 } 396 397 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 398 { 399 const struct intel_plane_state *plane_state = 400 to_intel_plane_state(plane->base.state); 401 const struct drm_framebuffer *fb = plane_state->hw.fb; 402 char rot_str[48]; 403 404 if (!fb) 405 return; 406 407 plane_rotation(rot_str, sizeof(rot_str), 408 plane_state->hw.rotation); 409 410 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 411 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 412 fb->base.id, &fb->format->format, 413 fb->modifier, fb->width, fb->height, 414 str_yes_no(plane_state->uapi.visible), 415 DRM_RECT_FP_ARG(&plane_state->uapi.src), 416 DRM_RECT_ARG(&plane_state->uapi.dst), 417 rot_str); 418 } 419 420 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 421 { 422 struct drm_i915_private *dev_priv = node_to_i915(m->private); 423 struct intel_plane *plane; 424 425 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 426 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 427 plane->base.base.id, plane->base.name, 428 plane_type(plane->base.type)); 429 intel_plane_uapi_info(m, plane); 430 intel_plane_hw_info(m, plane); 431 } 432 } 433 434 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 435 { 436 const struct intel_crtc_state *crtc_state = 437 to_intel_crtc_state(crtc->base.state); 438 int num_scalers = crtc->num_scalers; 439 int i; 440 441 /* Not all platformas have a scaler */ 442 if (num_scalers) { 443 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 444 num_scalers, 445 crtc_state->scaler_state.scaler_users, 446 crtc_state->scaler_state.scaler_id, 447 crtc_state->hw.scaling_filter); 448 449 for (i = 0; i < num_scalers; i++) { 450 const struct intel_scaler *sc = 451 &crtc_state->scaler_state.scalers[i]; 452 453 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 454 i, str_yes_no(sc->in_use), sc->mode); 455 } 456 seq_puts(m, "\n"); 457 } else { 458 seq_puts(m, "\tNo scalers available on this platform\n"); 459 } 460 } 461 462 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 463 static void crtc_updates_info(struct seq_file *m, 464 struct intel_crtc *crtc, 465 const char *hdr) 466 { 467 u64 count; 468 int row; 469 470 count = 0; 471 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 472 count += crtc->debug.vbl.times[row]; 473 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 474 if (!count) 475 return; 476 477 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 478 char columns[80] = " |"; 479 unsigned int x; 480 481 if (row & 1) { 482 const char *units; 483 484 if (row > 10) { 485 x = 1000000; 486 units = "ms"; 487 } else { 488 x = 1000; 489 units = "us"; 490 } 491 492 snprintf(columns, sizeof(columns), "%4ld%s |", 493 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 494 } 495 496 if (crtc->debug.vbl.times[row]) { 497 x = ilog2(crtc->debug.vbl.times[row]); 498 memset(columns + 8, '*', x); 499 columns[8 + x] = '\0'; 500 } 501 502 seq_printf(m, "%s%s\n", hdr, columns); 503 } 504 505 seq_printf(m, "%sMin update: %lluns\n", 506 hdr, crtc->debug.vbl.min); 507 seq_printf(m, "%sMax update: %lluns\n", 508 hdr, crtc->debug.vbl.max); 509 seq_printf(m, "%sAverage update: %lluns\n", 510 hdr, div64_u64(crtc->debug.vbl.sum, count)); 511 seq_printf(m, "%sOverruns > %uus: %u\n", 512 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 513 } 514 515 static int crtc_updates_show(struct seq_file *m, void *data) 516 { 517 crtc_updates_info(m, m->private, ""); 518 return 0; 519 } 520 521 static int crtc_updates_open(struct inode *inode, struct file *file) 522 { 523 return single_open(file, crtc_updates_show, inode->i_private); 524 } 525 526 static ssize_t crtc_updates_write(struct file *file, 527 const char __user *ubuf, 528 size_t len, loff_t *offp) 529 { 530 struct seq_file *m = file->private_data; 531 struct intel_crtc *crtc = m->private; 532 533 /* May race with an update. Meh. */ 534 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 535 536 return len; 537 } 538 539 static const struct file_operations crtc_updates_fops = { 540 .owner = THIS_MODULE, 541 .open = crtc_updates_open, 542 .read = seq_read, 543 .llseek = seq_lseek, 544 .release = single_release, 545 .write = crtc_updates_write 546 }; 547 548 static void crtc_updates_add(struct intel_crtc *crtc) 549 { 550 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 551 crtc, &crtc_updates_fops); 552 } 553 554 #else 555 static void crtc_updates_info(struct seq_file *m, 556 struct intel_crtc *crtc, 557 const char *hdr) 558 { 559 } 560 561 static void crtc_updates_add(struct intel_crtc *crtc) 562 { 563 } 564 #endif 565 566 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 567 { 568 struct drm_i915_private *dev_priv = node_to_i915(m->private); 569 const struct intel_crtc_state *crtc_state = 570 to_intel_crtc_state(crtc->base.state); 571 struct intel_encoder *encoder; 572 573 seq_printf(m, "[CRTC:%d:%s]:\n", 574 crtc->base.base.id, crtc->base.name); 575 576 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 577 str_yes_no(crtc_state->uapi.enable), 578 str_yes_no(crtc_state->uapi.active), 579 DRM_MODE_ARG(&crtc_state->uapi.mode)); 580 581 seq_printf(m, "\thw: enable=%s, active=%s\n", 582 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 583 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 584 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 585 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 586 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 587 588 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 589 DRM_RECT_ARG(&crtc_state->pipe_src), 590 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 591 592 intel_scaler_info(m, crtc); 593 594 if (crtc_state->bigjoiner_pipes) 595 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 596 crtc_state->bigjoiner_pipes, 597 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); 598 599 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 600 crtc_state->uapi.encoder_mask) 601 intel_encoder_info(m, crtc, encoder); 602 603 intel_plane_info(m, crtc); 604 605 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 606 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 607 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 608 609 crtc_updates_info(m, crtc, "\t"); 610 } 611 612 static int i915_display_info(struct seq_file *m, void *unused) 613 { 614 struct drm_i915_private *dev_priv = node_to_i915(m->private); 615 struct intel_crtc *crtc; 616 struct drm_connector *connector; 617 struct drm_connector_list_iter conn_iter; 618 intel_wakeref_t wakeref; 619 620 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 621 622 drm_modeset_lock_all(&dev_priv->drm); 623 624 seq_printf(m, "CRTC info\n"); 625 seq_printf(m, "---------\n"); 626 for_each_intel_crtc(&dev_priv->drm, crtc) 627 intel_crtc_info(m, crtc); 628 629 seq_printf(m, "\n"); 630 seq_printf(m, "Connector info\n"); 631 seq_printf(m, "--------------\n"); 632 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 633 drm_for_each_connector_iter(connector, &conn_iter) 634 intel_connector_info(m, connector); 635 drm_connector_list_iter_end(&conn_iter); 636 637 drm_modeset_unlock_all(&dev_priv->drm); 638 639 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 640 641 return 0; 642 } 643 644 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 645 { 646 struct drm_i915_private *dev_priv = node_to_i915(m->private); 647 int i; 648 649 drm_modeset_lock_all(&dev_priv->drm); 650 651 seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 652 dev_priv->display.dpll.ref_clks.nssc, 653 dev_priv->display.dpll.ref_clks.ssc); 654 655 for (i = 0; i < dev_priv->display.dpll.num_shared_dpll; i++) { 656 struct intel_shared_dpll *pll = &dev_priv->display.dpll.shared_dplls[i]; 657 658 seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->info->name, 659 pll->info->id); 660 seq_printf(m, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 661 pll->state.pipe_mask, pll->active_mask, 662 str_yes_no(pll->on)); 663 seq_printf(m, " tracked hardware state:\n"); 664 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll); 665 seq_printf(m, " dpll_md: 0x%08x\n", 666 pll->state.hw_state.dpll_md); 667 seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0); 668 seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1); 669 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll); 670 seq_printf(m, " cfgcr0: 0x%08x\n", pll->state.hw_state.cfgcr0); 671 seq_printf(m, " cfgcr1: 0x%08x\n", pll->state.hw_state.cfgcr1); 672 seq_printf(m, " div0: 0x%08x\n", pll->state.hw_state.div0); 673 seq_printf(m, " mg_refclkin_ctl: 0x%08x\n", 674 pll->state.hw_state.mg_refclkin_ctl); 675 seq_printf(m, " mg_clktop2_coreclkctl1: 0x%08x\n", 676 pll->state.hw_state.mg_clktop2_coreclkctl1); 677 seq_printf(m, " mg_clktop2_hsclkctl: 0x%08x\n", 678 pll->state.hw_state.mg_clktop2_hsclkctl); 679 seq_printf(m, " mg_pll_div0: 0x%08x\n", 680 pll->state.hw_state.mg_pll_div0); 681 seq_printf(m, " mg_pll_div1: 0x%08x\n", 682 pll->state.hw_state.mg_pll_div1); 683 seq_printf(m, " mg_pll_lf: 0x%08x\n", 684 pll->state.hw_state.mg_pll_lf); 685 seq_printf(m, " mg_pll_frac_lock: 0x%08x\n", 686 pll->state.hw_state.mg_pll_frac_lock); 687 seq_printf(m, " mg_pll_ssc: 0x%08x\n", 688 pll->state.hw_state.mg_pll_ssc); 689 seq_printf(m, " mg_pll_bias: 0x%08x\n", 690 pll->state.hw_state.mg_pll_bias); 691 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n", 692 pll->state.hw_state.mg_pll_tdc_coldst_bias); 693 } 694 drm_modeset_unlock_all(&dev_priv->drm); 695 696 return 0; 697 } 698 699 static int i915_ddb_info(struct seq_file *m, void *unused) 700 { 701 struct drm_i915_private *dev_priv = node_to_i915(m->private); 702 struct skl_ddb_entry *entry; 703 struct intel_crtc *crtc; 704 705 if (DISPLAY_VER(dev_priv) < 9) 706 return -ENODEV; 707 708 drm_modeset_lock_all(&dev_priv->drm); 709 710 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 711 712 for_each_intel_crtc(&dev_priv->drm, crtc) { 713 struct intel_crtc_state *crtc_state = 714 to_intel_crtc_state(crtc->base.state); 715 enum pipe pipe = crtc->pipe; 716 enum plane_id plane_id; 717 718 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 719 720 for_each_plane_id_on_crtc(crtc, plane_id) { 721 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 722 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 723 entry->start, entry->end, 724 skl_ddb_entry_size(entry)); 725 } 726 727 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 728 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 729 entry->end, skl_ddb_entry_size(entry)); 730 } 731 732 drm_modeset_unlock_all(&dev_priv->drm); 733 734 return 0; 735 } 736 737 static bool 738 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 739 enum i915_power_well_id power_well_id) 740 { 741 intel_wakeref_t wakeref; 742 bool is_enabled; 743 744 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 745 is_enabled = intel_display_power_well_is_enabled(i915, 746 power_well_id); 747 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 748 749 return is_enabled; 750 } 751 752 static int i915_lpsp_status(struct seq_file *m, void *unused) 753 { 754 struct drm_i915_private *i915 = node_to_i915(m->private); 755 bool lpsp_enabled = false; 756 757 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 758 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 759 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 760 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 761 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 762 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 763 } else { 764 seq_puts(m, "LPSP: not supported\n"); 765 return 0; 766 } 767 768 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 769 770 return 0; 771 } 772 773 static int i915_dp_mst_info(struct seq_file *m, void *unused) 774 { 775 struct drm_i915_private *dev_priv = node_to_i915(m->private); 776 struct intel_encoder *intel_encoder; 777 struct intel_digital_port *dig_port; 778 struct drm_connector *connector; 779 struct drm_connector_list_iter conn_iter; 780 781 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 782 drm_for_each_connector_iter(connector, &conn_iter) { 783 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 784 continue; 785 786 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 787 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 788 continue; 789 790 dig_port = enc_to_dig_port(intel_encoder); 791 if (!intel_dp_mst_source_support(&dig_port->dp)) 792 continue; 793 794 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 795 dig_port->base.base.base.id, 796 dig_port->base.base.name); 797 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 798 } 799 drm_connector_list_iter_end(&conn_iter); 800 801 return 0; 802 } 803 804 static ssize_t i915_displayport_test_active_write(struct file *file, 805 const char __user *ubuf, 806 size_t len, loff_t *offp) 807 { 808 char *input_buffer; 809 int status = 0; 810 struct drm_device *dev; 811 struct drm_connector *connector; 812 struct drm_connector_list_iter conn_iter; 813 struct intel_dp *intel_dp; 814 int val = 0; 815 816 dev = ((struct seq_file *)file->private_data)->private; 817 818 if (len == 0) 819 return 0; 820 821 input_buffer = memdup_user_nul(ubuf, len); 822 if (IS_ERR(input_buffer)) 823 return PTR_ERR(input_buffer); 824 825 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len); 826 827 drm_connector_list_iter_begin(dev, &conn_iter); 828 drm_for_each_connector_iter(connector, &conn_iter) { 829 struct intel_encoder *encoder; 830 831 if (connector->connector_type != 832 DRM_MODE_CONNECTOR_DisplayPort) 833 continue; 834 835 encoder = to_intel_encoder(connector->encoder); 836 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 837 continue; 838 839 if (encoder && connector->status == connector_status_connected) { 840 intel_dp = enc_to_intel_dp(encoder); 841 status = kstrtoint(input_buffer, 10, &val); 842 if (status < 0) 843 break; 844 drm_dbg(dev, "Got %d for test active\n", val); 845 /* To prevent erroneous activation of the compliance 846 * testing code, only accept an actual value of 1 here 847 */ 848 if (val == 1) 849 intel_dp->compliance.test_active = true; 850 else 851 intel_dp->compliance.test_active = false; 852 } 853 } 854 drm_connector_list_iter_end(&conn_iter); 855 kfree(input_buffer); 856 if (status < 0) 857 return status; 858 859 *offp += len; 860 return len; 861 } 862 863 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 864 { 865 struct drm_i915_private *dev_priv = m->private; 866 struct drm_connector *connector; 867 struct drm_connector_list_iter conn_iter; 868 struct intel_dp *intel_dp; 869 870 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 871 drm_for_each_connector_iter(connector, &conn_iter) { 872 struct intel_encoder *encoder; 873 874 if (connector->connector_type != 875 DRM_MODE_CONNECTOR_DisplayPort) 876 continue; 877 878 encoder = to_intel_encoder(connector->encoder); 879 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 880 continue; 881 882 if (encoder && connector->status == connector_status_connected) { 883 intel_dp = enc_to_intel_dp(encoder); 884 if (intel_dp->compliance.test_active) 885 seq_puts(m, "1"); 886 else 887 seq_puts(m, "0"); 888 } else 889 seq_puts(m, "0"); 890 } 891 drm_connector_list_iter_end(&conn_iter); 892 893 return 0; 894 } 895 896 static int i915_displayport_test_active_open(struct inode *inode, 897 struct file *file) 898 { 899 return single_open(file, i915_displayport_test_active_show, 900 inode->i_private); 901 } 902 903 static const struct file_operations i915_displayport_test_active_fops = { 904 .owner = THIS_MODULE, 905 .open = i915_displayport_test_active_open, 906 .read = seq_read, 907 .llseek = seq_lseek, 908 .release = single_release, 909 .write = i915_displayport_test_active_write 910 }; 911 912 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 913 { 914 struct drm_i915_private *dev_priv = m->private; 915 struct drm_connector *connector; 916 struct drm_connector_list_iter conn_iter; 917 struct intel_dp *intel_dp; 918 919 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 920 drm_for_each_connector_iter(connector, &conn_iter) { 921 struct intel_encoder *encoder; 922 923 if (connector->connector_type != 924 DRM_MODE_CONNECTOR_DisplayPort) 925 continue; 926 927 encoder = to_intel_encoder(connector->encoder); 928 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 929 continue; 930 931 if (encoder && connector->status == connector_status_connected) { 932 intel_dp = enc_to_intel_dp(encoder); 933 if (intel_dp->compliance.test_type == 934 DP_TEST_LINK_EDID_READ) 935 seq_printf(m, "%lx", 936 intel_dp->compliance.test_data.edid); 937 else if (intel_dp->compliance.test_type == 938 DP_TEST_LINK_VIDEO_PATTERN) { 939 seq_printf(m, "hdisplay: %d\n", 940 intel_dp->compliance.test_data.hdisplay); 941 seq_printf(m, "vdisplay: %d\n", 942 intel_dp->compliance.test_data.vdisplay); 943 seq_printf(m, "bpc: %u\n", 944 intel_dp->compliance.test_data.bpc); 945 } else if (intel_dp->compliance.test_type == 946 DP_TEST_LINK_PHY_TEST_PATTERN) { 947 seq_printf(m, "pattern: %d\n", 948 intel_dp->compliance.test_data.phytest.phy_pattern); 949 seq_printf(m, "Number of lanes: %d\n", 950 intel_dp->compliance.test_data.phytest.num_lanes); 951 seq_printf(m, "Link Rate: %d\n", 952 intel_dp->compliance.test_data.phytest.link_rate); 953 seq_printf(m, "level: %02x\n", 954 intel_dp->train_set[0]); 955 } 956 } else 957 seq_puts(m, "0"); 958 } 959 drm_connector_list_iter_end(&conn_iter); 960 961 return 0; 962 } 963 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 964 965 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 966 { 967 struct drm_i915_private *dev_priv = m->private; 968 struct drm_connector *connector; 969 struct drm_connector_list_iter conn_iter; 970 struct intel_dp *intel_dp; 971 972 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 973 drm_for_each_connector_iter(connector, &conn_iter) { 974 struct intel_encoder *encoder; 975 976 if (connector->connector_type != 977 DRM_MODE_CONNECTOR_DisplayPort) 978 continue; 979 980 encoder = to_intel_encoder(connector->encoder); 981 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 982 continue; 983 984 if (encoder && connector->status == connector_status_connected) { 985 intel_dp = enc_to_intel_dp(encoder); 986 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 987 } else 988 seq_puts(m, "0"); 989 } 990 drm_connector_list_iter_end(&conn_iter); 991 992 return 0; 993 } 994 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 995 996 static ssize_t 997 i915_fifo_underrun_reset_write(struct file *filp, 998 const char __user *ubuf, 999 size_t cnt, loff_t *ppos) 1000 { 1001 struct drm_i915_private *dev_priv = filp->private_data; 1002 struct intel_crtc *crtc; 1003 int ret; 1004 bool reset; 1005 1006 ret = kstrtobool_from_user(ubuf, cnt, &reset); 1007 if (ret) 1008 return ret; 1009 1010 if (!reset) 1011 return cnt; 1012 1013 for_each_intel_crtc(&dev_priv->drm, crtc) { 1014 struct drm_crtc_commit *commit; 1015 struct intel_crtc_state *crtc_state; 1016 1017 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1018 if (ret) 1019 return ret; 1020 1021 crtc_state = to_intel_crtc_state(crtc->base.state); 1022 commit = crtc_state->uapi.commit; 1023 if (commit) { 1024 ret = wait_for_completion_interruptible(&commit->hw_done); 1025 if (!ret) 1026 ret = wait_for_completion_interruptible(&commit->flip_done); 1027 } 1028 1029 if (!ret && crtc_state->hw.active) { 1030 drm_dbg_kms(&dev_priv->drm, 1031 "Re-arming FIFO underruns on pipe %c\n", 1032 pipe_name(crtc->pipe)); 1033 1034 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1035 } 1036 1037 drm_modeset_unlock(&crtc->base.mutex); 1038 1039 if (ret) 1040 return ret; 1041 } 1042 1043 intel_fbc_reset_underrun(dev_priv); 1044 1045 return cnt; 1046 } 1047 1048 static const struct file_operations i915_fifo_underrun_reset_ops = { 1049 .owner = THIS_MODULE, 1050 .open = simple_open, 1051 .write = i915_fifo_underrun_reset_write, 1052 .llseek = default_llseek, 1053 }; 1054 1055 static const struct drm_info_list intel_display_debugfs_list[] = { 1056 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1057 {"i915_sr_status", i915_sr_status, 0}, 1058 {"i915_opregion", i915_opregion, 0}, 1059 {"i915_vbt", i915_vbt, 0}, 1060 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1061 {"i915_power_domain_info", i915_power_domain_info, 0}, 1062 {"i915_display_info", i915_display_info, 0}, 1063 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1064 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1065 {"i915_ddb_info", i915_ddb_info, 0}, 1066 {"i915_lpsp_status", i915_lpsp_status, 0}, 1067 }; 1068 1069 static const struct { 1070 const char *name; 1071 const struct file_operations *fops; 1072 } intel_display_debugfs_files[] = { 1073 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1074 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1075 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1076 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1077 }; 1078 1079 void intel_display_debugfs_register(struct drm_i915_private *i915) 1080 { 1081 struct drm_minor *minor = i915->drm.primary; 1082 int i; 1083 1084 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1085 debugfs_create_file(intel_display_debugfs_files[i].name, 1086 S_IRUGO | S_IWUSR, 1087 minor->debugfs_root, 1088 to_i915(minor->dev), 1089 intel_display_debugfs_files[i].fops); 1090 } 1091 1092 drm_debugfs_create_files(intel_display_debugfs_list, 1093 ARRAY_SIZE(intel_display_debugfs_list), 1094 minor->debugfs_root, minor); 1095 1096 intel_cdclk_debugfs_register(i915); 1097 intel_dmc_debugfs_register(i915); 1098 intel_fbc_debugfs_register(i915); 1099 intel_hpd_debugfs_register(i915); 1100 intel_psr_debugfs_register(i915); 1101 intel_wm_debugfs_register(i915); 1102 } 1103 1104 static int i915_panel_show(struct seq_file *m, void *data) 1105 { 1106 struct drm_connector *connector = m->private; 1107 struct intel_dp *intel_dp = 1108 intel_attached_dp(to_intel_connector(connector)); 1109 1110 if (connector->status != connector_status_connected) 1111 return -ENODEV; 1112 1113 seq_printf(m, "Panel power up delay: %d\n", 1114 intel_dp->pps.panel_power_up_delay); 1115 seq_printf(m, "Panel power down delay: %d\n", 1116 intel_dp->pps.panel_power_down_delay); 1117 seq_printf(m, "Backlight on delay: %d\n", 1118 intel_dp->pps.backlight_on_delay); 1119 seq_printf(m, "Backlight off delay: %d\n", 1120 intel_dp->pps.backlight_off_delay); 1121 1122 return 0; 1123 } 1124 DEFINE_SHOW_ATTRIBUTE(i915_panel); 1125 1126 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1127 { 1128 struct drm_connector *connector = m->private; 1129 struct drm_i915_private *i915 = to_i915(connector->dev); 1130 struct intel_connector *intel_connector = to_intel_connector(connector); 1131 int ret; 1132 1133 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1134 if (ret) 1135 return ret; 1136 1137 if (!connector->encoder || connector->status != connector_status_connected) { 1138 ret = -ENODEV; 1139 goto out; 1140 } 1141 1142 seq_printf(m, "%s:%d HDCP version: ", connector->name, 1143 connector->base.id); 1144 intel_hdcp_info(m, intel_connector); 1145 1146 out: 1147 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1148 1149 return ret; 1150 } 1151 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1152 1153 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1154 { 1155 struct drm_connector *connector = m->private; 1156 struct drm_i915_private *i915 = to_i915(connector->dev); 1157 struct intel_encoder *encoder; 1158 bool lpsp_capable = false; 1159 1160 encoder = intel_attached_encoder(to_intel_connector(connector)); 1161 if (!encoder) 1162 return -ENODEV; 1163 1164 if (connector->status != connector_status_connected) 1165 return -ENODEV; 1166 1167 if (DISPLAY_VER(i915) >= 13) 1168 lpsp_capable = encoder->port <= PORT_B; 1169 else if (DISPLAY_VER(i915) >= 12) 1170 /* 1171 * Actually TGL can drive LPSP on port till DDI_C 1172 * but there is no physical connected DDI_C on TGL sku's, 1173 * even driver is not initilizing DDI_C port for gen12. 1174 */ 1175 lpsp_capable = encoder->port <= PORT_B; 1176 else if (DISPLAY_VER(i915) == 11) 1177 lpsp_capable = (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1178 connector->connector_type == DRM_MODE_CONNECTOR_eDP); 1179 else if (IS_DISPLAY_VER(i915, 9, 10)) 1180 lpsp_capable = (encoder->port == PORT_A && 1181 (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1182 connector->connector_type == DRM_MODE_CONNECTOR_eDP || 1183 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1184 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1185 lpsp_capable = connector->connector_type == DRM_MODE_CONNECTOR_eDP; 1186 1187 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1188 1189 return 0; 1190 } 1191 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1192 1193 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1194 { 1195 struct drm_connector *connector = m->private; 1196 struct drm_device *dev = connector->dev; 1197 struct drm_crtc *crtc; 1198 struct intel_dp *intel_dp; 1199 struct drm_modeset_acquire_ctx ctx; 1200 struct intel_crtc_state *crtc_state = NULL; 1201 int ret = 0; 1202 bool try_again = false; 1203 1204 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1205 1206 do { 1207 try_again = false; 1208 ret = drm_modeset_lock(&dev->mode_config.connection_mutex, 1209 &ctx); 1210 if (ret) { 1211 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1212 try_again = true; 1213 continue; 1214 } 1215 break; 1216 } 1217 crtc = connector->state->crtc; 1218 if (connector->status != connector_status_connected || !crtc) { 1219 ret = -ENODEV; 1220 break; 1221 } 1222 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1223 if (ret == -EDEADLK) { 1224 ret = drm_modeset_backoff(&ctx); 1225 if (!ret) { 1226 try_again = true; 1227 continue; 1228 } 1229 break; 1230 } else if (ret) { 1231 break; 1232 } 1233 intel_dp = intel_attached_dp(to_intel_connector(connector)); 1234 crtc_state = to_intel_crtc_state(crtc->state); 1235 seq_printf(m, "DSC_Enabled: %s\n", 1236 str_yes_no(crtc_state->dsc.compression_enable)); 1237 seq_printf(m, "DSC_Sink_Support: %s\n", 1238 str_yes_no(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd))); 1239 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1240 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, 1241 DP_DSC_RGB)), 1242 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, 1243 DP_DSC_YCbCr420_Native)), 1244 str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, 1245 DP_DSC_YCbCr444))); 1246 seq_printf(m, "Force_DSC_Enable: %s\n", 1247 str_yes_no(intel_dp->force_dsc_en)); 1248 if (!intel_dp_is_edp(intel_dp)) 1249 seq_printf(m, "FEC_Sink_Support: %s\n", 1250 str_yes_no(drm_dp_sink_supports_fec(intel_dp->fec_capable))); 1251 } while (try_again); 1252 1253 drm_modeset_drop_locks(&ctx); 1254 drm_modeset_acquire_fini(&ctx); 1255 1256 return ret; 1257 } 1258 1259 static ssize_t i915_dsc_fec_support_write(struct file *file, 1260 const char __user *ubuf, 1261 size_t len, loff_t *offp) 1262 { 1263 bool dsc_enable = false; 1264 int ret; 1265 struct drm_connector *connector = 1266 ((struct seq_file *)file->private_data)->private; 1267 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1268 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 1269 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1270 1271 if (len == 0) 1272 return 0; 1273 1274 drm_dbg(&i915->drm, 1275 "Copied %zu bytes from user to force DSC\n", len); 1276 1277 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1278 if (ret < 0) 1279 return ret; 1280 1281 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1282 (dsc_enable) ? "true" : "false"); 1283 intel_dp->force_dsc_en = dsc_enable; 1284 1285 *offp += len; 1286 return len; 1287 } 1288 1289 static int i915_dsc_fec_support_open(struct inode *inode, 1290 struct file *file) 1291 { 1292 return single_open(file, i915_dsc_fec_support_show, 1293 inode->i_private); 1294 } 1295 1296 static const struct file_operations i915_dsc_fec_support_fops = { 1297 .owner = THIS_MODULE, 1298 .open = i915_dsc_fec_support_open, 1299 .read = seq_read, 1300 .llseek = seq_lseek, 1301 .release = single_release, 1302 .write = i915_dsc_fec_support_write 1303 }; 1304 1305 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1306 { 1307 struct drm_connector *connector = m->private; 1308 struct drm_device *dev = connector->dev; 1309 struct drm_crtc *crtc; 1310 struct intel_crtc_state *crtc_state; 1311 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1312 int ret; 1313 1314 if (!encoder) 1315 return -ENODEV; 1316 1317 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); 1318 if (ret) 1319 return ret; 1320 1321 crtc = connector->state->crtc; 1322 if (connector->status != connector_status_connected || !crtc) { 1323 ret = -ENODEV; 1324 goto out; 1325 } 1326 1327 crtc_state = to_intel_crtc_state(crtc->state); 1328 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1329 1330 out: drm_modeset_unlock(&dev->mode_config.connection_mutex); 1331 1332 return ret; 1333 } 1334 1335 static ssize_t i915_dsc_bpc_write(struct file *file, 1336 const char __user *ubuf, 1337 size_t len, loff_t *offp) 1338 { 1339 struct drm_connector *connector = 1340 ((struct seq_file *)file->private_data)->private; 1341 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1342 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1343 int dsc_bpc = 0; 1344 int ret; 1345 1346 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1347 if (ret < 0) 1348 return ret; 1349 1350 intel_dp->force_dsc_bpc = dsc_bpc; 1351 *offp += len; 1352 1353 return len; 1354 } 1355 1356 static int i915_dsc_bpc_open(struct inode *inode, 1357 struct file *file) 1358 { 1359 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1360 } 1361 1362 static const struct file_operations i915_dsc_bpc_fops = { 1363 .owner = THIS_MODULE, 1364 .open = i915_dsc_bpc_open, 1365 .read = seq_read, 1366 .llseek = seq_lseek, 1367 .release = single_release, 1368 .write = i915_dsc_bpc_write 1369 }; 1370 1371 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1372 { 1373 struct drm_connector *connector = m->private; 1374 struct drm_device *dev = connector->dev; 1375 struct drm_crtc *crtc; 1376 struct intel_crtc_state *crtc_state; 1377 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1378 int ret; 1379 1380 if (!encoder) 1381 return -ENODEV; 1382 1383 ret = drm_modeset_lock_single_interruptible(&dev->mode_config.connection_mutex); 1384 if (ret) 1385 return ret; 1386 1387 crtc = connector->state->crtc; 1388 if (connector->status != connector_status_connected || !crtc) { 1389 ret = -ENODEV; 1390 goto out; 1391 } 1392 1393 crtc_state = to_intel_crtc_state(crtc->state); 1394 seq_printf(m, "DSC_Output_Format: %s\n", 1395 intel_output_format_name(crtc_state->output_format)); 1396 1397 out: drm_modeset_unlock(&dev->mode_config.connection_mutex); 1398 1399 return ret; 1400 } 1401 1402 static ssize_t i915_dsc_output_format_write(struct file *file, 1403 const char __user *ubuf, 1404 size_t len, loff_t *offp) 1405 { 1406 struct drm_connector *connector = 1407 ((struct seq_file *)file->private_data)->private; 1408 struct intel_encoder *encoder = intel_attached_encoder(to_intel_connector(connector)); 1409 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1410 int dsc_output_format = 0; 1411 int ret; 1412 1413 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1414 if (ret < 0) 1415 return ret; 1416 1417 intel_dp->force_dsc_output_format = dsc_output_format; 1418 *offp += len; 1419 1420 return len; 1421 } 1422 1423 static int i915_dsc_output_format_open(struct inode *inode, 1424 struct file *file) 1425 { 1426 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1427 } 1428 1429 static const struct file_operations i915_dsc_output_format_fops = { 1430 .owner = THIS_MODULE, 1431 .open = i915_dsc_output_format_open, 1432 .read = seq_read, 1433 .llseek = seq_lseek, 1434 .release = single_release, 1435 .write = i915_dsc_output_format_write 1436 }; 1437 1438 /* 1439 * Returns the Current CRTC's bpc. 1440 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1441 */ 1442 static int i915_current_bpc_show(struct seq_file *m, void *data) 1443 { 1444 struct intel_crtc *crtc = m->private; 1445 struct intel_crtc_state *crtc_state; 1446 int ret; 1447 1448 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1449 if (ret) 1450 return ret; 1451 1452 crtc_state = to_intel_crtc_state(crtc->base.state); 1453 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1454 1455 drm_modeset_unlock(&crtc->base.mutex); 1456 1457 return ret; 1458 } 1459 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1460 1461 /* Pipe may differ from crtc index if pipes are fused off */ 1462 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1463 { 1464 struct intel_crtc *crtc = m->private; 1465 1466 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1467 1468 return 0; 1469 } 1470 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1471 1472 /** 1473 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1474 * @intel_connector: pointer to a registered drm_connector 1475 * 1476 * Cleanup will be done by drm_connector_unregister() through a call to 1477 * drm_debugfs_connector_remove(). 1478 */ 1479 void intel_connector_debugfs_add(struct intel_connector *intel_connector) 1480 { 1481 struct drm_connector *connector = &intel_connector->base; 1482 struct dentry *root = connector->debugfs_entry; 1483 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1484 1485 /* The connector must have been registered beforehands. */ 1486 if (!root) 1487 return; 1488 1489 intel_drrs_connector_debugfs_add(intel_connector); 1490 intel_psr_connector_debugfs_add(intel_connector); 1491 1492 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) 1493 debugfs_create_file("i915_panel_timings", S_IRUGO, root, 1494 connector, &i915_panel_fops); 1495 1496 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1497 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || 1498 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1499 debugfs_create_file("i915_hdcp_sink_capability", S_IRUGO, root, 1500 connector, &i915_hdcp_sink_capability_fops); 1501 } 1502 1503 if (DISPLAY_VER(dev_priv) >= 11 && 1504 ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && 1505 !to_intel_connector(connector)->mst_port) || 1506 connector->connector_type == DRM_MODE_CONNECTOR_eDP)) { 1507 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1508 connector, &i915_dsc_fec_support_fops); 1509 1510 debugfs_create_file("i915_dsc_bpc", 0644, root, 1511 connector, &i915_dsc_bpc_fops); 1512 1513 debugfs_create_file("i915_dsc_output_format", 0644, root, 1514 connector, &i915_dsc_output_format_fops); 1515 } 1516 1517 if (connector->connector_type == DRM_MODE_CONNECTOR_DSI || 1518 connector->connector_type == DRM_MODE_CONNECTOR_eDP || 1519 connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1520 connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || 1521 connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) 1522 debugfs_create_file("i915_lpsp_capability", 0444, root, 1523 connector, &i915_lpsp_capability_fops); 1524 } 1525 1526 /** 1527 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1528 * @crtc: pointer to a drm_crtc 1529 * 1530 * Failure to add debugfs entries should generally be ignored. 1531 */ 1532 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1533 { 1534 struct dentry *root = crtc->base.debugfs_entry; 1535 1536 if (!root) 1537 return; 1538 1539 crtc_updates_add(crtc); 1540 intel_drrs_crtc_debugfs_add(crtc); 1541 intel_fbc_crtc_debugfs_add(crtc); 1542 hsw_ips_crtc_debugfs_add(crtc); 1543 1544 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1545 &i915_current_bpc_fops); 1546 debugfs_create_file("i915_pipe", 0444, root, crtc, 1547 &intel_crtc_pipe_fops); 1548 } 1549