1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020 Intel Corporation 4 */ 5 6 #include <linux/string_helpers.h> 7 8 #include <drm/drm_debugfs.h> 9 #include <drm/drm_edid.h> 10 #include <drm/drm_fourcc.h> 11 12 #include "hsw_ips.h" 13 #include "i915_debugfs.h" 14 #include "i915_irq.h" 15 #include "i915_reg.h" 16 #include "intel_crtc.h" 17 #include "intel_de.h" 18 #include "intel_crtc_state_dump.h" 19 #include "intel_display_debugfs.h" 20 #include "intel_display_debugfs_params.h" 21 #include "intel_display_power.h" 22 #include "intel_display_power_well.h" 23 #include "intel_display_types.h" 24 #include "intel_dmc.h" 25 #include "intel_dp.h" 26 #include "intel_dp_mst.h" 27 #include "intel_drrs.h" 28 #include "intel_fbc.h" 29 #include "intel_fbdev.h" 30 #include "intel_hdcp.h" 31 #include "intel_hdmi.h" 32 #include "intel_hotplug.h" 33 #include "intel_panel.h" 34 #include "intel_pps.h" 35 #include "intel_psr.h" 36 #include "intel_psr_regs.h" 37 #include "intel_wm.h" 38 39 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node) 40 { 41 return to_i915(node->minor->dev); 42 } 43 44 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) 45 { 46 struct drm_i915_private *dev_priv = node_to_i915(m->private); 47 48 spin_lock(&dev_priv->display.fb_tracking.lock); 49 50 seq_printf(m, "FB tracking busy bits: 0x%08x\n", 51 dev_priv->display.fb_tracking.busy_bits); 52 53 seq_printf(m, "FB tracking flip bits: 0x%08x\n", 54 dev_priv->display.fb_tracking.flip_bits); 55 56 spin_unlock(&dev_priv->display.fb_tracking.lock); 57 58 return 0; 59 } 60 61 static int i915_sr_status(struct seq_file *m, void *unused) 62 { 63 struct drm_i915_private *dev_priv = node_to_i915(m->private); 64 intel_wakeref_t wakeref; 65 bool sr_enabled = false; 66 67 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); 68 69 if (DISPLAY_VER(dev_priv) >= 9) 70 /* no global SR status; inspect per-plane WM */; 71 else if (HAS_PCH_SPLIT(dev_priv)) 72 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE; 73 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) || 74 IS_I945G(dev_priv) || IS_I945GM(dev_priv)) 75 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN; 76 else if (IS_I915GM(dev_priv)) 77 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN; 78 else if (IS_PINEVIEW(dev_priv)) 79 sr_enabled = intel_de_read(dev_priv, DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 80 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) 81 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; 82 83 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref); 84 85 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled)); 86 87 return 0; 88 } 89 90 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 91 { 92 struct drm_i915_private *dev_priv = node_to_i915(m->private); 93 struct intel_framebuffer *fbdev_fb = NULL; 94 struct drm_framebuffer *drm_fb; 95 96 #ifdef CONFIG_DRM_FBDEV_EMULATION 97 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev); 98 if (fbdev_fb) { 99 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 100 fbdev_fb->base.width, 101 fbdev_fb->base.height, 102 fbdev_fb->base.format->depth, 103 fbdev_fb->base.format->cpp[0] * 8, 104 fbdev_fb->base.modifier, 105 drm_framebuffer_read_refcount(&fbdev_fb->base)); 106 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base)); 107 seq_putc(m, '\n'); 108 } 109 #endif 110 111 mutex_lock(&dev_priv->drm.mode_config.fb_lock); 112 drm_for_each_fb(drm_fb, &dev_priv->drm) { 113 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb); 114 if (fb == fbdev_fb) 115 continue; 116 117 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", 118 fb->base.width, 119 fb->base.height, 120 fb->base.format->depth, 121 fb->base.format->cpp[0] * 8, 122 fb->base.modifier, 123 drm_framebuffer_read_refcount(&fb->base)); 124 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base)); 125 seq_putc(m, '\n'); 126 } 127 mutex_unlock(&dev_priv->drm.mode_config.fb_lock); 128 129 return 0; 130 } 131 132 static int i915_power_domain_info(struct seq_file *m, void *unused) 133 { 134 struct drm_i915_private *i915 = node_to_i915(m->private); 135 136 intel_display_power_debug(i915, m); 137 138 return 0; 139 } 140 141 static void intel_seq_print_mode(struct seq_file *m, int tabs, 142 const struct drm_display_mode *mode) 143 { 144 int i; 145 146 for (i = 0; i < tabs; i++) 147 seq_putc(m, '\t'); 148 149 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 150 } 151 152 static void intel_encoder_info(struct seq_file *m, 153 struct intel_crtc *crtc, 154 struct intel_encoder *encoder) 155 { 156 struct drm_i915_private *dev_priv = node_to_i915(m->private); 157 struct drm_connector_list_iter conn_iter; 158 struct drm_connector *connector; 159 160 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n", 161 encoder->base.base.id, encoder->base.name); 162 163 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 164 drm_for_each_connector_iter(connector, &conn_iter) { 165 const struct drm_connector_state *conn_state = 166 connector->state; 167 168 if (conn_state->best_encoder != &encoder->base) 169 continue; 170 171 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n", 172 connector->base.id, connector->name); 173 } 174 drm_connector_list_iter_end(&conn_iter); 175 } 176 177 static void intel_panel_info(struct seq_file *m, 178 struct intel_connector *connector) 179 { 180 const struct drm_display_mode *fixed_mode; 181 182 if (list_empty(&connector->panel.fixed_modes)) 183 return; 184 185 seq_puts(m, "\tfixed modes:\n"); 186 187 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head) 188 intel_seq_print_mode(m, 2, fixed_mode); 189 } 190 191 static void intel_hdcp_info(struct seq_file *m, 192 struct intel_connector *intel_connector, 193 bool remote_req) 194 { 195 bool hdcp_cap = false, hdcp2_cap = false; 196 197 if (!intel_connector->hdcp.shim) { 198 seq_puts(m, "No Connector Support"); 199 goto out; 200 } 201 202 if (remote_req) { 203 intel_hdcp_get_remote_capability(intel_connector, 204 &hdcp_cap, 205 &hdcp2_cap); 206 } else { 207 hdcp_cap = intel_hdcp_get_capability(intel_connector); 208 hdcp2_cap = intel_hdcp2_get_capability(intel_connector); 209 } 210 211 if (hdcp_cap) 212 seq_puts(m, "HDCP1.4 "); 213 if (hdcp2_cap) 214 seq_puts(m, "HDCP2.2 "); 215 216 if (!hdcp_cap && !hdcp2_cap) 217 seq_puts(m, "None"); 218 219 out: 220 seq_puts(m, "\n"); 221 } 222 223 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector) 224 { 225 struct intel_encoder *intel_encoder = intel_attached_encoder(connector); 226 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder); 227 228 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); 229 seq_printf(m, "\taudio support: %s\n", 230 str_yes_no(connector->base.display_info.has_audio)); 231 232 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports, 233 connector->detect_edid, &intel_dp->aux); 234 } 235 236 static void intel_dp_mst_info(struct seq_file *m, 237 struct intel_connector *connector) 238 { 239 bool has_audio = connector->base.display_info.has_audio; 240 241 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 242 } 243 244 static void intel_hdmi_info(struct seq_file *m, 245 struct intel_connector *connector) 246 { 247 bool has_audio = connector->base.display_info.has_audio; 248 249 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio)); 250 } 251 252 static void intel_connector_info(struct seq_file *m, 253 struct drm_connector *connector) 254 { 255 struct intel_connector *intel_connector = to_intel_connector(connector); 256 const struct drm_display_mode *mode; 257 258 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n", 259 connector->base.id, connector->name, 260 drm_get_connector_status_name(connector->status)); 261 262 if (connector->status == connector_status_disconnected) 263 return; 264 265 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", 266 connector->display_info.width_mm, 267 connector->display_info.height_mm); 268 seq_printf(m, "\tsubpixel order: %s\n", 269 drm_get_subpixel_order_name(connector->display_info.subpixel_order)); 270 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev); 271 272 switch (connector->connector_type) { 273 case DRM_MODE_CONNECTOR_DisplayPort: 274 case DRM_MODE_CONNECTOR_eDP: 275 if (intel_connector->mst_port) 276 intel_dp_mst_info(m, intel_connector); 277 else 278 intel_dp_info(m, intel_connector); 279 break; 280 case DRM_MODE_CONNECTOR_HDMIA: 281 intel_hdmi_info(m, intel_connector); 282 break; 283 default: 284 break; 285 } 286 287 seq_puts(m, "\tHDCP version: "); 288 if (intel_connector->mst_port) { 289 intel_hdcp_info(m, intel_connector, true); 290 seq_puts(m, "\tMST Hub HDCP version: "); 291 } 292 intel_hdcp_info(m, intel_connector, false); 293 294 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc); 295 296 intel_panel_info(m, intel_connector); 297 298 seq_printf(m, "\tmodes:\n"); 299 list_for_each_entry(mode, &connector->modes, head) 300 intel_seq_print_mode(m, 2, mode); 301 } 302 303 static const char *plane_type(enum drm_plane_type type) 304 { 305 switch (type) { 306 case DRM_PLANE_TYPE_OVERLAY: 307 return "OVL"; 308 case DRM_PLANE_TYPE_PRIMARY: 309 return "PRI"; 310 case DRM_PLANE_TYPE_CURSOR: 311 return "CUR"; 312 /* 313 * Deliberately omitting default: to generate compiler warnings 314 * when a new drm_plane_type gets added. 315 */ 316 } 317 318 return "unknown"; 319 } 320 321 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation) 322 { 323 /* 324 * According to doc only one DRM_MODE_ROTATE_ is allowed but this 325 * will print them all to visualize if the values are misused 326 */ 327 snprintf(buf, bufsize, 328 "%s%s%s%s%s%s(0x%08x)", 329 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "", 330 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "", 331 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "", 332 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "", 333 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "", 334 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "", 335 rotation); 336 } 337 338 static const char *plane_visibility(const struct intel_plane_state *plane_state) 339 { 340 if (plane_state->uapi.visible) 341 return "visible"; 342 343 if (plane_state->planar_slave) 344 return "planar-slave"; 345 346 return "hidden"; 347 } 348 349 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) 350 { 351 const struct intel_plane_state *plane_state = 352 to_intel_plane_state(plane->base.state); 353 const struct drm_framebuffer *fb = plane_state->uapi.fb; 354 struct drm_rect src, dst; 355 char rot_str[48]; 356 357 src = drm_plane_state_src(&plane_state->uapi); 358 dst = drm_plane_state_dest(&plane_state->uapi); 359 360 plane_rotation(rot_str, sizeof(rot_str), 361 plane_state->uapi.rotation); 362 363 seq_puts(m, "\t\tuapi: [FB:"); 364 if (fb) 365 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 366 &fb->format->format, fb->modifier, fb->width, 367 fb->height); 368 else 369 seq_puts(m, "0] n/a,0x0,0x0,"); 370 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 371 ", rotation=%s\n", plane_visibility(plane_state), 372 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 373 374 if (plane_state->planar_linked_plane) 375 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", 376 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, 377 plane_state->planar_slave ? "slave" : "master"); 378 } 379 380 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) 381 { 382 const struct intel_plane_state *plane_state = 383 to_intel_plane_state(plane->base.state); 384 const struct drm_framebuffer *fb = plane_state->hw.fb; 385 char rot_str[48]; 386 387 if (!fb) 388 return; 389 390 plane_rotation(rot_str, sizeof(rot_str), 391 plane_state->hw.rotation); 392 393 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 394 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 395 fb->base.id, &fb->format->format, 396 fb->modifier, fb->width, fb->height, 397 str_yes_no(plane_state->uapi.visible), 398 DRM_RECT_FP_ARG(&plane_state->uapi.src), 399 DRM_RECT_ARG(&plane_state->uapi.dst), 400 rot_str); 401 } 402 403 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc) 404 { 405 struct drm_i915_private *dev_priv = node_to_i915(m->private); 406 struct intel_plane *plane; 407 408 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { 409 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n", 410 plane->base.base.id, plane->base.name, 411 plane_type(plane->base.type)); 412 intel_plane_uapi_info(m, plane); 413 intel_plane_hw_info(m, plane); 414 } 415 } 416 417 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc) 418 { 419 const struct intel_crtc_state *crtc_state = 420 to_intel_crtc_state(crtc->base.state); 421 int num_scalers = crtc->num_scalers; 422 int i; 423 424 /* Not all platformas have a scaler */ 425 if (num_scalers) { 426 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d", 427 num_scalers, 428 crtc_state->scaler_state.scaler_users, 429 crtc_state->scaler_state.scaler_id, 430 crtc_state->hw.scaling_filter); 431 432 for (i = 0; i < num_scalers; i++) { 433 const struct intel_scaler *sc = 434 &crtc_state->scaler_state.scalers[i]; 435 436 seq_printf(m, ", scalers[%d]: use=%s, mode=%x", 437 i, str_yes_no(sc->in_use), sc->mode); 438 } 439 seq_puts(m, "\n"); 440 } else { 441 seq_puts(m, "\tNo scalers available on this platform\n"); 442 } 443 } 444 445 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE) 446 static void crtc_updates_info(struct seq_file *m, 447 struct intel_crtc *crtc, 448 const char *hdr) 449 { 450 u64 count; 451 int row; 452 453 count = 0; 454 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) 455 count += crtc->debug.vbl.times[row]; 456 seq_printf(m, "%sUpdates: %llu\n", hdr, count); 457 if (!count) 458 return; 459 460 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) { 461 char columns[80] = " |"; 462 unsigned int x; 463 464 if (row & 1) { 465 const char *units; 466 467 if (row > 10) { 468 x = 1000000; 469 units = "ms"; 470 } else { 471 x = 1000; 472 units = "us"; 473 } 474 475 snprintf(columns, sizeof(columns), "%4ld%s |", 476 DIV_ROUND_CLOSEST(BIT(row + 9), x), units); 477 } 478 479 if (crtc->debug.vbl.times[row]) { 480 x = ilog2(crtc->debug.vbl.times[row]); 481 memset(columns + 8, '*', x); 482 columns[8 + x] = '\0'; 483 } 484 485 seq_printf(m, "%s%s\n", hdr, columns); 486 } 487 488 seq_printf(m, "%sMin update: %lluns\n", 489 hdr, crtc->debug.vbl.min); 490 seq_printf(m, "%sMax update: %lluns\n", 491 hdr, crtc->debug.vbl.max); 492 seq_printf(m, "%sAverage update: %lluns\n", 493 hdr, div64_u64(crtc->debug.vbl.sum, count)); 494 seq_printf(m, "%sOverruns > %uus: %u\n", 495 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over); 496 } 497 498 static int crtc_updates_show(struct seq_file *m, void *data) 499 { 500 crtc_updates_info(m, m->private, ""); 501 return 0; 502 } 503 504 static int crtc_updates_open(struct inode *inode, struct file *file) 505 { 506 return single_open(file, crtc_updates_show, inode->i_private); 507 } 508 509 static ssize_t crtc_updates_write(struct file *file, 510 const char __user *ubuf, 511 size_t len, loff_t *offp) 512 { 513 struct seq_file *m = file->private_data; 514 struct intel_crtc *crtc = m->private; 515 516 /* May race with an update. Meh. */ 517 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl)); 518 519 return len; 520 } 521 522 static const struct file_operations crtc_updates_fops = { 523 .owner = THIS_MODULE, 524 .open = crtc_updates_open, 525 .read = seq_read, 526 .llseek = seq_lseek, 527 .release = single_release, 528 .write = crtc_updates_write 529 }; 530 531 static void crtc_updates_add(struct intel_crtc *crtc) 532 { 533 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry, 534 crtc, &crtc_updates_fops); 535 } 536 537 #else 538 static void crtc_updates_info(struct seq_file *m, 539 struct intel_crtc *crtc, 540 const char *hdr) 541 { 542 } 543 544 static void crtc_updates_add(struct intel_crtc *crtc) 545 { 546 } 547 #endif 548 549 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc) 550 { 551 struct drm_i915_private *dev_priv = node_to_i915(m->private); 552 const struct intel_crtc_state *crtc_state = 553 to_intel_crtc_state(crtc->base.state); 554 struct intel_encoder *encoder; 555 556 seq_printf(m, "[CRTC:%d:%s]:\n", 557 crtc->base.base.id, crtc->base.name); 558 559 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n", 560 str_yes_no(crtc_state->uapi.enable), 561 str_yes_no(crtc_state->uapi.active), 562 DRM_MODE_ARG(&crtc_state->uapi.mode)); 563 564 seq_printf(m, "\thw: enable=%s, active=%s\n", 565 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active)); 566 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n", 567 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode)); 568 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n", 569 DRM_MODE_ARG(&crtc_state->hw.pipe_mode)); 570 571 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n", 572 DRM_RECT_ARG(&crtc_state->pipe_src), 573 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp); 574 575 intel_scaler_info(m, crtc); 576 577 if (crtc_state->bigjoiner_pipes) 578 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n", 579 crtc_state->bigjoiner_pipes, 580 intel_crtc_is_bigjoiner_slave(crtc_state) ? "slave" : "master"); 581 582 for_each_intel_encoder_mask(&dev_priv->drm, encoder, 583 crtc_state->uapi.encoder_mask) 584 intel_encoder_info(m, crtc, encoder); 585 586 intel_plane_info(m, crtc); 587 588 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n", 589 str_yes_no(!crtc->cpu_fifo_underrun_disabled), 590 str_yes_no(!crtc->pch_fifo_underrun_disabled)); 591 592 crtc_updates_info(m, crtc, "\t"); 593 } 594 595 static int i915_display_info(struct seq_file *m, void *unused) 596 { 597 struct drm_i915_private *dev_priv = node_to_i915(m->private); 598 struct intel_crtc *crtc; 599 struct drm_connector *connector; 600 struct drm_connector_list_iter conn_iter; 601 intel_wakeref_t wakeref; 602 603 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); 604 605 drm_modeset_lock_all(&dev_priv->drm); 606 607 seq_printf(m, "CRTC info\n"); 608 seq_printf(m, "---------\n"); 609 for_each_intel_crtc(&dev_priv->drm, crtc) 610 intel_crtc_info(m, crtc); 611 612 seq_printf(m, "\n"); 613 seq_printf(m, "Connector info\n"); 614 seq_printf(m, "--------------\n"); 615 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 616 drm_for_each_connector_iter(connector, &conn_iter) 617 intel_connector_info(m, connector); 618 drm_connector_list_iter_end(&conn_iter); 619 620 drm_modeset_unlock_all(&dev_priv->drm); 621 622 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref); 623 624 return 0; 625 } 626 627 static int i915_display_capabilities(struct seq_file *m, void *unused) 628 { 629 struct drm_i915_private *i915 = node_to_i915(m->private); 630 struct drm_printer p = drm_seq_file_printer(m); 631 632 intel_display_device_info_print(DISPLAY_INFO(i915), 633 DISPLAY_RUNTIME_INFO(i915), &p); 634 635 return 0; 636 } 637 638 static int i915_shared_dplls_info(struct seq_file *m, void *unused) 639 { 640 struct drm_i915_private *dev_priv = node_to_i915(m->private); 641 struct drm_printer p = drm_seq_file_printer(m); 642 struct intel_shared_dpll *pll; 643 int i; 644 645 drm_modeset_lock_all(&dev_priv->drm); 646 647 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n", 648 dev_priv->display.dpll.ref_clks.nssc, 649 dev_priv->display.dpll.ref_clks.ssc); 650 651 for_each_shared_dpll(dev_priv, pll, i) { 652 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index, 653 pll->info->name, pll->info->id); 654 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n", 655 pll->state.pipe_mask, pll->active_mask, 656 str_yes_no(pll->on)); 657 drm_printf(&p, " tracked hardware state:\n"); 658 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state); 659 } 660 drm_modeset_unlock_all(&dev_priv->drm); 661 662 return 0; 663 } 664 665 static int i915_ddb_info(struct seq_file *m, void *unused) 666 { 667 struct drm_i915_private *dev_priv = node_to_i915(m->private); 668 struct skl_ddb_entry *entry; 669 struct intel_crtc *crtc; 670 671 if (DISPLAY_VER(dev_priv) < 9) 672 return -ENODEV; 673 674 drm_modeset_lock_all(&dev_priv->drm); 675 676 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); 677 678 for_each_intel_crtc(&dev_priv->drm, crtc) { 679 struct intel_crtc_state *crtc_state = 680 to_intel_crtc_state(crtc->base.state); 681 enum pipe pipe = crtc->pipe; 682 enum plane_id plane_id; 683 684 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); 685 686 for_each_plane_id_on_crtc(crtc, plane_id) { 687 entry = &crtc_state->wm.skl.plane_ddb[plane_id]; 688 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1, 689 entry->start, entry->end, 690 skl_ddb_entry_size(entry)); 691 } 692 693 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR]; 694 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, 695 entry->end, skl_ddb_entry_size(entry)); 696 } 697 698 drm_modeset_unlock_all(&dev_priv->drm); 699 700 return 0; 701 } 702 703 static bool 704 intel_lpsp_power_well_enabled(struct drm_i915_private *i915, 705 enum i915_power_well_id power_well_id) 706 { 707 intel_wakeref_t wakeref; 708 bool is_enabled; 709 710 wakeref = intel_runtime_pm_get(&i915->runtime_pm); 711 is_enabled = intel_display_power_well_is_enabled(i915, 712 power_well_id); 713 intel_runtime_pm_put(&i915->runtime_pm, wakeref); 714 715 return is_enabled; 716 } 717 718 static int i915_lpsp_status(struct seq_file *m, void *unused) 719 { 720 struct drm_i915_private *i915 = node_to_i915(m->private); 721 bool lpsp_enabled = false; 722 723 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) { 724 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2); 725 } else if (IS_DISPLAY_VER(i915, 11, 12)) { 726 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3); 727 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { 728 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL); 729 } else { 730 seq_puts(m, "LPSP: not supported\n"); 731 return 0; 732 } 733 734 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled)); 735 736 return 0; 737 } 738 739 static int i915_dp_mst_info(struct seq_file *m, void *unused) 740 { 741 struct drm_i915_private *dev_priv = node_to_i915(m->private); 742 struct intel_encoder *intel_encoder; 743 struct intel_digital_port *dig_port; 744 struct drm_connector *connector; 745 struct drm_connector_list_iter conn_iter; 746 747 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 748 drm_for_each_connector_iter(connector, &conn_iter) { 749 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) 750 continue; 751 752 intel_encoder = intel_attached_encoder(to_intel_connector(connector)); 753 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST) 754 continue; 755 756 dig_port = enc_to_dig_port(intel_encoder); 757 if (!intel_dp_mst_source_support(&dig_port->dp)) 758 continue; 759 760 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n", 761 dig_port->base.base.base.id, 762 dig_port->base.base.name); 763 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr); 764 } 765 drm_connector_list_iter_end(&conn_iter); 766 767 return 0; 768 } 769 770 static ssize_t i915_displayport_test_active_write(struct file *file, 771 const char __user *ubuf, 772 size_t len, loff_t *offp) 773 { 774 char *input_buffer; 775 int status = 0; 776 struct drm_device *dev; 777 struct drm_connector *connector; 778 struct drm_connector_list_iter conn_iter; 779 struct intel_dp *intel_dp; 780 int val = 0; 781 782 dev = ((struct seq_file *)file->private_data)->private; 783 784 if (len == 0) 785 return 0; 786 787 input_buffer = memdup_user_nul(ubuf, len); 788 if (IS_ERR(input_buffer)) 789 return PTR_ERR(input_buffer); 790 791 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len); 792 793 drm_connector_list_iter_begin(dev, &conn_iter); 794 drm_for_each_connector_iter(connector, &conn_iter) { 795 struct intel_encoder *encoder; 796 797 if (connector->connector_type != 798 DRM_MODE_CONNECTOR_DisplayPort) 799 continue; 800 801 encoder = to_intel_encoder(connector->encoder); 802 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 803 continue; 804 805 if (encoder && connector->status == connector_status_connected) { 806 intel_dp = enc_to_intel_dp(encoder); 807 status = kstrtoint(input_buffer, 10, &val); 808 if (status < 0) 809 break; 810 drm_dbg(dev, "Got %d for test active\n", val); 811 /* To prevent erroneous activation of the compliance 812 * testing code, only accept an actual value of 1 here 813 */ 814 if (val == 1) 815 intel_dp->compliance.test_active = true; 816 else 817 intel_dp->compliance.test_active = false; 818 } 819 } 820 drm_connector_list_iter_end(&conn_iter); 821 kfree(input_buffer); 822 if (status < 0) 823 return status; 824 825 *offp += len; 826 return len; 827 } 828 829 static int i915_displayport_test_active_show(struct seq_file *m, void *data) 830 { 831 struct drm_i915_private *dev_priv = m->private; 832 struct drm_connector *connector; 833 struct drm_connector_list_iter conn_iter; 834 struct intel_dp *intel_dp; 835 836 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 837 drm_for_each_connector_iter(connector, &conn_iter) { 838 struct intel_encoder *encoder; 839 840 if (connector->connector_type != 841 DRM_MODE_CONNECTOR_DisplayPort) 842 continue; 843 844 encoder = to_intel_encoder(connector->encoder); 845 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 846 continue; 847 848 if (encoder && connector->status == connector_status_connected) { 849 intel_dp = enc_to_intel_dp(encoder); 850 if (intel_dp->compliance.test_active) 851 seq_puts(m, "1"); 852 else 853 seq_puts(m, "0"); 854 } else 855 seq_puts(m, "0"); 856 } 857 drm_connector_list_iter_end(&conn_iter); 858 859 return 0; 860 } 861 862 static int i915_displayport_test_active_open(struct inode *inode, 863 struct file *file) 864 { 865 return single_open(file, i915_displayport_test_active_show, 866 inode->i_private); 867 } 868 869 static const struct file_operations i915_displayport_test_active_fops = { 870 .owner = THIS_MODULE, 871 .open = i915_displayport_test_active_open, 872 .read = seq_read, 873 .llseek = seq_lseek, 874 .release = single_release, 875 .write = i915_displayport_test_active_write 876 }; 877 878 static int i915_displayport_test_data_show(struct seq_file *m, void *data) 879 { 880 struct drm_i915_private *dev_priv = m->private; 881 struct drm_connector *connector; 882 struct drm_connector_list_iter conn_iter; 883 struct intel_dp *intel_dp; 884 885 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 886 drm_for_each_connector_iter(connector, &conn_iter) { 887 struct intel_encoder *encoder; 888 889 if (connector->connector_type != 890 DRM_MODE_CONNECTOR_DisplayPort) 891 continue; 892 893 encoder = to_intel_encoder(connector->encoder); 894 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 895 continue; 896 897 if (encoder && connector->status == connector_status_connected) { 898 intel_dp = enc_to_intel_dp(encoder); 899 if (intel_dp->compliance.test_type == 900 DP_TEST_LINK_EDID_READ) 901 seq_printf(m, "%lx", 902 intel_dp->compliance.test_data.edid); 903 else if (intel_dp->compliance.test_type == 904 DP_TEST_LINK_VIDEO_PATTERN) { 905 seq_printf(m, "hdisplay: %d\n", 906 intel_dp->compliance.test_data.hdisplay); 907 seq_printf(m, "vdisplay: %d\n", 908 intel_dp->compliance.test_data.vdisplay); 909 seq_printf(m, "bpc: %u\n", 910 intel_dp->compliance.test_data.bpc); 911 } else if (intel_dp->compliance.test_type == 912 DP_TEST_LINK_PHY_TEST_PATTERN) { 913 seq_printf(m, "pattern: %d\n", 914 intel_dp->compliance.test_data.phytest.phy_pattern); 915 seq_printf(m, "Number of lanes: %d\n", 916 intel_dp->compliance.test_data.phytest.num_lanes); 917 seq_printf(m, "Link Rate: %d\n", 918 intel_dp->compliance.test_data.phytest.link_rate); 919 seq_printf(m, "level: %02x\n", 920 intel_dp->train_set[0]); 921 } 922 } else 923 seq_puts(m, "0"); 924 } 925 drm_connector_list_iter_end(&conn_iter); 926 927 return 0; 928 } 929 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data); 930 931 static int i915_displayport_test_type_show(struct seq_file *m, void *data) 932 { 933 struct drm_i915_private *dev_priv = m->private; 934 struct drm_connector *connector; 935 struct drm_connector_list_iter conn_iter; 936 struct intel_dp *intel_dp; 937 938 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter); 939 drm_for_each_connector_iter(connector, &conn_iter) { 940 struct intel_encoder *encoder; 941 942 if (connector->connector_type != 943 DRM_MODE_CONNECTOR_DisplayPort) 944 continue; 945 946 encoder = to_intel_encoder(connector->encoder); 947 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST) 948 continue; 949 950 if (encoder && connector->status == connector_status_connected) { 951 intel_dp = enc_to_intel_dp(encoder); 952 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type); 953 } else 954 seq_puts(m, "0"); 955 } 956 drm_connector_list_iter_end(&conn_iter); 957 958 return 0; 959 } 960 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type); 961 962 static ssize_t 963 i915_fifo_underrun_reset_write(struct file *filp, 964 const char __user *ubuf, 965 size_t cnt, loff_t *ppos) 966 { 967 struct drm_i915_private *dev_priv = filp->private_data; 968 struct intel_crtc *crtc; 969 int ret; 970 bool reset; 971 972 ret = kstrtobool_from_user(ubuf, cnt, &reset); 973 if (ret) 974 return ret; 975 976 if (!reset) 977 return cnt; 978 979 for_each_intel_crtc(&dev_priv->drm, crtc) { 980 struct drm_crtc_commit *commit; 981 struct intel_crtc_state *crtc_state; 982 983 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 984 if (ret) 985 return ret; 986 987 crtc_state = to_intel_crtc_state(crtc->base.state); 988 commit = crtc_state->uapi.commit; 989 if (commit) { 990 ret = wait_for_completion_interruptible(&commit->hw_done); 991 if (!ret) 992 ret = wait_for_completion_interruptible(&commit->flip_done); 993 } 994 995 if (!ret && crtc_state->hw.active) { 996 drm_dbg_kms(&dev_priv->drm, 997 "Re-arming FIFO underruns on pipe %c\n", 998 pipe_name(crtc->pipe)); 999 1000 intel_crtc_arm_fifo_underrun(crtc, crtc_state); 1001 } 1002 1003 drm_modeset_unlock(&crtc->base.mutex); 1004 1005 if (ret) 1006 return ret; 1007 } 1008 1009 intel_fbc_reset_underrun(dev_priv); 1010 1011 return cnt; 1012 } 1013 1014 static const struct file_operations i915_fifo_underrun_reset_ops = { 1015 .owner = THIS_MODULE, 1016 .open = simple_open, 1017 .write = i915_fifo_underrun_reset_write, 1018 .llseek = default_llseek, 1019 }; 1020 1021 static const struct drm_info_list intel_display_debugfs_list[] = { 1022 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0}, 1023 {"i915_sr_status", i915_sr_status, 0}, 1024 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0}, 1025 {"i915_power_domain_info", i915_power_domain_info, 0}, 1026 {"i915_display_info", i915_display_info, 0}, 1027 {"i915_display_capabilities", i915_display_capabilities, 0}, 1028 {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, 1029 {"i915_dp_mst_info", i915_dp_mst_info, 0}, 1030 {"i915_ddb_info", i915_ddb_info, 0}, 1031 {"i915_lpsp_status", i915_lpsp_status, 0}, 1032 }; 1033 1034 static const struct { 1035 const char *name; 1036 const struct file_operations *fops; 1037 } intel_display_debugfs_files[] = { 1038 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops}, 1039 {"i915_dp_test_data", &i915_displayport_test_data_fops}, 1040 {"i915_dp_test_type", &i915_displayport_test_type_fops}, 1041 {"i915_dp_test_active", &i915_displayport_test_active_fops}, 1042 }; 1043 1044 void intel_display_debugfs_register(struct drm_i915_private *i915) 1045 { 1046 struct drm_minor *minor = i915->drm.primary; 1047 int i; 1048 1049 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) { 1050 debugfs_create_file(intel_display_debugfs_files[i].name, 1051 0644, 1052 minor->debugfs_root, 1053 to_i915(minor->dev), 1054 intel_display_debugfs_files[i].fops); 1055 } 1056 1057 drm_debugfs_create_files(intel_display_debugfs_list, 1058 ARRAY_SIZE(intel_display_debugfs_list), 1059 minor->debugfs_root, minor); 1060 1061 intel_bios_debugfs_register(i915); 1062 intel_cdclk_debugfs_register(i915); 1063 intel_dmc_debugfs_register(i915); 1064 intel_fbc_debugfs_register(i915); 1065 intel_hpd_debugfs_register(i915); 1066 intel_opregion_debugfs_register(i915); 1067 intel_psr_debugfs_register(i915); 1068 intel_wm_debugfs_register(i915); 1069 intel_display_debugfs_params(i915); 1070 } 1071 1072 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data) 1073 { 1074 struct intel_connector *connector = m->private; 1075 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1076 int ret; 1077 1078 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1079 if (ret) 1080 return ret; 1081 1082 if (!connector->base.encoder || 1083 connector->base.status != connector_status_connected) { 1084 ret = -ENODEV; 1085 goto out; 1086 } 1087 1088 seq_printf(m, "%s:%d HDCP version: ", connector->base.name, 1089 connector->base.base.id); 1090 intel_hdcp_info(m, connector, false); 1091 1092 out: 1093 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1094 1095 return ret; 1096 } 1097 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability); 1098 1099 static int i915_lpsp_capability_show(struct seq_file *m, void *data) 1100 { 1101 struct intel_connector *connector = m->private; 1102 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1103 struct intel_encoder *encoder = intel_attached_encoder(connector); 1104 int connector_type = connector->base.connector_type; 1105 bool lpsp_capable = false; 1106 1107 if (!encoder) 1108 return -ENODEV; 1109 1110 if (connector->base.status != connector_status_connected) 1111 return -ENODEV; 1112 1113 if (DISPLAY_VER(i915) >= 13) 1114 lpsp_capable = encoder->port <= PORT_B; 1115 else if (DISPLAY_VER(i915) >= 12) 1116 /* 1117 * Actually TGL can drive LPSP on port till DDI_C 1118 * but there is no physical connected DDI_C on TGL sku's, 1119 * even driver is not initilizing DDI_C port for gen12. 1120 */ 1121 lpsp_capable = encoder->port <= PORT_B; 1122 else if (DISPLAY_VER(i915) == 11) 1123 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI || 1124 connector_type == DRM_MODE_CONNECTOR_eDP); 1125 else if (IS_DISPLAY_VER(i915, 9, 10)) 1126 lpsp_capable = (encoder->port == PORT_A && 1127 (connector_type == DRM_MODE_CONNECTOR_DSI || 1128 connector_type == DRM_MODE_CONNECTOR_eDP || 1129 connector_type == DRM_MODE_CONNECTOR_DisplayPort)); 1130 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) 1131 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP; 1132 1133 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable"); 1134 1135 return 0; 1136 } 1137 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability); 1138 1139 static int i915_dsc_fec_support_show(struct seq_file *m, void *data) 1140 { 1141 struct intel_connector *connector = m->private; 1142 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1143 struct drm_crtc *crtc; 1144 struct intel_dp *intel_dp; 1145 struct drm_modeset_acquire_ctx ctx; 1146 struct intel_crtc_state *crtc_state = NULL; 1147 int ret = 0; 1148 bool try_again = false; 1149 1150 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); 1151 1152 do { 1153 try_again = false; 1154 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex, 1155 &ctx); 1156 if (ret) { 1157 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) { 1158 try_again = true; 1159 continue; 1160 } 1161 break; 1162 } 1163 crtc = connector->base.state->crtc; 1164 if (connector->base.status != connector_status_connected || !crtc) { 1165 ret = -ENODEV; 1166 break; 1167 } 1168 ret = drm_modeset_lock(&crtc->mutex, &ctx); 1169 if (ret == -EDEADLK) { 1170 ret = drm_modeset_backoff(&ctx); 1171 if (!ret) { 1172 try_again = true; 1173 continue; 1174 } 1175 break; 1176 } else if (ret) { 1177 break; 1178 } 1179 intel_dp = intel_attached_dp(connector); 1180 crtc_state = to_intel_crtc_state(crtc->state); 1181 seq_printf(m, "DSC_Enabled: %s\n", 1182 str_yes_no(crtc_state->dsc.compression_enable)); 1183 seq_printf(m, "DSC_Sink_Support: %s\n", 1184 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd))); 1185 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n", 1186 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1187 DP_DSC_RGB)), 1188 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1189 DP_DSC_YCbCr420_Native)), 1190 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 1191 DP_DSC_YCbCr444))); 1192 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n", 1193 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd)); 1194 seq_printf(m, "Force_DSC_Enable: %s\n", 1195 str_yes_no(intel_dp->force_dsc_en)); 1196 if (!intel_dp_is_edp(intel_dp)) 1197 seq_printf(m, "FEC_Sink_Support: %s\n", 1198 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability))); 1199 } while (try_again); 1200 1201 drm_modeset_drop_locks(&ctx); 1202 drm_modeset_acquire_fini(&ctx); 1203 1204 return ret; 1205 } 1206 1207 static ssize_t i915_dsc_fec_support_write(struct file *file, 1208 const char __user *ubuf, 1209 size_t len, loff_t *offp) 1210 { 1211 struct seq_file *m = file->private_data; 1212 struct intel_connector *connector = m->private; 1213 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1214 struct intel_encoder *encoder = intel_attached_encoder(connector); 1215 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1216 bool dsc_enable = false; 1217 int ret; 1218 1219 if (len == 0) 1220 return 0; 1221 1222 drm_dbg(&i915->drm, 1223 "Copied %zu bytes from user to force DSC\n", len); 1224 1225 ret = kstrtobool_from_user(ubuf, len, &dsc_enable); 1226 if (ret < 0) 1227 return ret; 1228 1229 drm_dbg(&i915->drm, "Got %s for DSC Enable\n", 1230 (dsc_enable) ? "true" : "false"); 1231 intel_dp->force_dsc_en = dsc_enable; 1232 1233 *offp += len; 1234 return len; 1235 } 1236 1237 static int i915_dsc_fec_support_open(struct inode *inode, 1238 struct file *file) 1239 { 1240 return single_open(file, i915_dsc_fec_support_show, 1241 inode->i_private); 1242 } 1243 1244 static const struct file_operations i915_dsc_fec_support_fops = { 1245 .owner = THIS_MODULE, 1246 .open = i915_dsc_fec_support_open, 1247 .read = seq_read, 1248 .llseek = seq_lseek, 1249 .release = single_release, 1250 .write = i915_dsc_fec_support_write 1251 }; 1252 1253 static int i915_dsc_bpc_show(struct seq_file *m, void *data) 1254 { 1255 struct intel_connector *connector = m->private; 1256 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1257 struct intel_encoder *encoder = intel_attached_encoder(connector); 1258 struct drm_crtc *crtc; 1259 struct intel_crtc_state *crtc_state; 1260 int ret; 1261 1262 if (!encoder) 1263 return -ENODEV; 1264 1265 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1266 if (ret) 1267 return ret; 1268 1269 crtc = connector->base.state->crtc; 1270 if (connector->base.status != connector_status_connected || !crtc) { 1271 ret = -ENODEV; 1272 goto out; 1273 } 1274 1275 crtc_state = to_intel_crtc_state(crtc->state); 1276 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); 1277 1278 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1279 1280 return ret; 1281 } 1282 1283 static ssize_t i915_dsc_bpc_write(struct file *file, 1284 const char __user *ubuf, 1285 size_t len, loff_t *offp) 1286 { 1287 struct seq_file *m = file->private_data; 1288 struct intel_connector *connector = m->private; 1289 struct intel_encoder *encoder = intel_attached_encoder(connector); 1290 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1291 int dsc_bpc = 0; 1292 int ret; 1293 1294 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc); 1295 if (ret < 0) 1296 return ret; 1297 1298 intel_dp->force_dsc_bpc = dsc_bpc; 1299 *offp += len; 1300 1301 return len; 1302 } 1303 1304 static int i915_dsc_bpc_open(struct inode *inode, 1305 struct file *file) 1306 { 1307 return single_open(file, i915_dsc_bpc_show, inode->i_private); 1308 } 1309 1310 static const struct file_operations i915_dsc_bpc_fops = { 1311 .owner = THIS_MODULE, 1312 .open = i915_dsc_bpc_open, 1313 .read = seq_read, 1314 .llseek = seq_lseek, 1315 .release = single_release, 1316 .write = i915_dsc_bpc_write 1317 }; 1318 1319 static int i915_dsc_output_format_show(struct seq_file *m, void *data) 1320 { 1321 struct intel_connector *connector = m->private; 1322 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1323 struct intel_encoder *encoder = intel_attached_encoder(connector); 1324 struct drm_crtc *crtc; 1325 struct intel_crtc_state *crtc_state; 1326 int ret; 1327 1328 if (!encoder) 1329 return -ENODEV; 1330 1331 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1332 if (ret) 1333 return ret; 1334 1335 crtc = connector->base.state->crtc; 1336 if (connector->base.status != connector_status_connected || !crtc) { 1337 ret = -ENODEV; 1338 goto out; 1339 } 1340 1341 crtc_state = to_intel_crtc_state(crtc->state); 1342 seq_printf(m, "DSC_Output_Format: %s\n", 1343 intel_output_format_name(crtc_state->output_format)); 1344 1345 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1346 1347 return ret; 1348 } 1349 1350 static ssize_t i915_dsc_output_format_write(struct file *file, 1351 const char __user *ubuf, 1352 size_t len, loff_t *offp) 1353 { 1354 struct seq_file *m = file->private_data; 1355 struct intel_connector *connector = m->private; 1356 struct intel_encoder *encoder = intel_attached_encoder(connector); 1357 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1358 int dsc_output_format = 0; 1359 int ret; 1360 1361 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format); 1362 if (ret < 0) 1363 return ret; 1364 1365 intel_dp->force_dsc_output_format = dsc_output_format; 1366 *offp += len; 1367 1368 return len; 1369 } 1370 1371 static int i915_dsc_output_format_open(struct inode *inode, 1372 struct file *file) 1373 { 1374 return single_open(file, i915_dsc_output_format_show, inode->i_private); 1375 } 1376 1377 static const struct file_operations i915_dsc_output_format_fops = { 1378 .owner = THIS_MODULE, 1379 .open = i915_dsc_output_format_open, 1380 .read = seq_read, 1381 .llseek = seq_lseek, 1382 .release = single_release, 1383 .write = i915_dsc_output_format_write 1384 }; 1385 1386 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data) 1387 { 1388 struct intel_connector *connector = m->private; 1389 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1390 struct intel_encoder *encoder = intel_attached_encoder(connector); 1391 struct drm_crtc *crtc; 1392 struct intel_dp *intel_dp; 1393 int ret; 1394 1395 if (!encoder) 1396 return -ENODEV; 1397 1398 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex); 1399 if (ret) 1400 return ret; 1401 1402 crtc = connector->base.state->crtc; 1403 if (connector->base.status != connector_status_connected || !crtc) { 1404 ret = -ENODEV; 1405 goto out; 1406 } 1407 1408 intel_dp = intel_attached_dp(connector); 1409 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n", 1410 str_yes_no(intel_dp->force_dsc_fractional_bpp_en)); 1411 1412 out: 1413 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex); 1414 1415 return ret; 1416 } 1417 1418 static ssize_t i915_dsc_fractional_bpp_write(struct file *file, 1419 const char __user *ubuf, 1420 size_t len, loff_t *offp) 1421 { 1422 struct seq_file *m = file->private_data; 1423 struct intel_connector *connector = m->private; 1424 struct intel_encoder *encoder = intel_attached_encoder(connector); 1425 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1426 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 1427 bool dsc_fractional_bpp_enable = false; 1428 int ret; 1429 1430 if (len == 0) 1431 return 0; 1432 1433 drm_dbg(&i915->drm, 1434 "Copied %zu bytes from user to force fractional bpp for DSC\n", len); 1435 1436 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable); 1437 if (ret < 0) 1438 return ret; 1439 1440 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n", 1441 (dsc_fractional_bpp_enable) ? "true" : "false"); 1442 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable; 1443 1444 *offp += len; 1445 1446 return len; 1447 } 1448 1449 static int i915_dsc_fractional_bpp_open(struct inode *inode, 1450 struct file *file) 1451 { 1452 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private); 1453 } 1454 1455 static const struct file_operations i915_dsc_fractional_bpp_fops = { 1456 .owner = THIS_MODULE, 1457 .open = i915_dsc_fractional_bpp_open, 1458 .read = seq_read, 1459 .llseek = seq_lseek, 1460 .release = single_release, 1461 .write = i915_dsc_fractional_bpp_write 1462 }; 1463 1464 /* 1465 * Returns the Current CRTC's bpc. 1466 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc 1467 */ 1468 static int i915_current_bpc_show(struct seq_file *m, void *data) 1469 { 1470 struct intel_crtc *crtc = m->private; 1471 struct intel_crtc_state *crtc_state; 1472 int ret; 1473 1474 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex); 1475 if (ret) 1476 return ret; 1477 1478 crtc_state = to_intel_crtc_state(crtc->base.state); 1479 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3); 1480 1481 drm_modeset_unlock(&crtc->base.mutex); 1482 1483 return ret; 1484 } 1485 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc); 1486 1487 /* Pipe may differ from crtc index if pipes are fused off */ 1488 static int intel_crtc_pipe_show(struct seq_file *m, void *unused) 1489 { 1490 struct intel_crtc *crtc = m->private; 1491 1492 seq_printf(m, "%c\n", pipe_name(crtc->pipe)); 1493 1494 return 0; 1495 } 1496 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe); 1497 1498 /** 1499 * intel_connector_debugfs_add - add i915 specific connector debugfs files 1500 * @connector: pointer to a registered intel_connector 1501 * 1502 * Cleanup will be done by drm_connector_unregister() through a call to 1503 * drm_debugfs_connector_remove(). 1504 */ 1505 void intel_connector_debugfs_add(struct intel_connector *connector) 1506 { 1507 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1508 struct dentry *root = connector->base.debugfs_entry; 1509 int connector_type = connector->base.connector_type; 1510 1511 /* The connector must have been registered beforehands. */ 1512 if (!root) 1513 return; 1514 1515 intel_drrs_connector_debugfs_add(connector); 1516 intel_pps_connector_debugfs_add(connector); 1517 intel_psr_connector_debugfs_add(connector); 1518 1519 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1520 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1521 connector_type == DRM_MODE_CONNECTOR_HDMIB) { 1522 debugfs_create_file("i915_hdcp_sink_capability", 0444, root, 1523 connector, &i915_hdcp_sink_capability_fops); 1524 } 1525 1526 if (DISPLAY_VER(i915) >= 11 && 1527 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) || 1528 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1529 debugfs_create_file("i915_dsc_fec_support", 0644, root, 1530 connector, &i915_dsc_fec_support_fops); 1531 1532 debugfs_create_file("i915_dsc_bpc", 0644, root, 1533 connector, &i915_dsc_bpc_fops); 1534 1535 debugfs_create_file("i915_dsc_output_format", 0644, root, 1536 connector, &i915_dsc_output_format_fops); 1537 1538 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root, 1539 connector, &i915_dsc_fractional_bpp_fops); 1540 } 1541 1542 if (DISPLAY_VER(i915) >= 11 && 1543 (connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1544 connector_type == DRM_MODE_CONNECTOR_eDP)) { 1545 debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root, 1546 &connector->force_bigjoiner_enable); 1547 } 1548 1549 if (connector_type == DRM_MODE_CONNECTOR_DSI || 1550 connector_type == DRM_MODE_CONNECTOR_eDP || 1551 connector_type == DRM_MODE_CONNECTOR_DisplayPort || 1552 connector_type == DRM_MODE_CONNECTOR_HDMIA || 1553 connector_type == DRM_MODE_CONNECTOR_HDMIB) 1554 debugfs_create_file("i915_lpsp_capability", 0444, root, 1555 connector, &i915_lpsp_capability_fops); 1556 } 1557 1558 /** 1559 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files 1560 * @crtc: pointer to a drm_crtc 1561 * 1562 * Failure to add debugfs entries should generally be ignored. 1563 */ 1564 void intel_crtc_debugfs_add(struct intel_crtc *crtc) 1565 { 1566 struct dentry *root = crtc->base.debugfs_entry; 1567 1568 if (!root) 1569 return; 1570 1571 crtc_updates_add(crtc); 1572 intel_drrs_crtc_debugfs_add(crtc); 1573 intel_fbc_crtc_debugfs_add(crtc); 1574 hsw_ips_crtc_debugfs_add(crtc); 1575 1576 debugfs_create_file("i915_current_bpc", 0444, root, crtc, 1577 &i915_current_bpc_fops); 1578 debugfs_create_file("i915_pipe", 0444, root, crtc, 1579 &intel_crtc_pipe_fops); 1580 } 1581