1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_DDI_H__ 7 #define __INTEL_DDI_H__ 8 9 #include "i915_reg_defs.h" 10 11 struct drm_connector_state; 12 struct drm_i915_private; 13 struct intel_atomic_state; 14 struct intel_bios_encoder_data; 15 struct intel_connector; 16 struct intel_crtc; 17 struct intel_crtc_state; 18 struct intel_display; 19 struct intel_dp; 20 struct intel_dpll_hw_state; 21 struct intel_encoder; 22 struct intel_shared_dpll; 23 enum pipe; 24 enum port; 25 enum transcoder; 26 27 i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder, 28 const struct intel_crtc_state *crtc_state); 29 i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder, 30 const struct intel_crtc_state *crtc_state); 31 i915_reg_t hsw_chicken_trans_reg(struct drm_i915_private *i915, 32 enum transcoder cpu_transcoder); 33 void intel_ddi_fdi_post_disable(struct intel_atomic_state *state, 34 struct intel_encoder *intel_encoder, 35 const struct intel_crtc_state *old_crtc_state, 36 const struct drm_connector_state *old_conn_state); 37 void intel_ddi_enable_clock(struct intel_encoder *encoder, 38 const struct intel_crtc_state *crtc_state); 39 void intel_ddi_disable_clock(struct intel_encoder *encoder); 40 void intel_ddi_get_clock(struct intel_encoder *encoder, 41 struct intel_crtc_state *crtc_state, 42 struct intel_shared_dpll *pll); 43 void hsw_ddi_enable_clock(struct intel_encoder *encoder, 44 const struct intel_crtc_state *crtc_state); 45 void hsw_ddi_disable_clock(struct intel_encoder *encoder); 46 bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder); 47 enum icl_port_dpll_id 48 intel_ddi_port_pll_type(struct intel_encoder *encoder, 49 const struct intel_crtc_state *crtc_state); 50 void hsw_ddi_get_config(struct intel_encoder *encoder, 51 struct intel_crtc_state *crtc_state); 52 struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder); 53 void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder, 54 const struct intel_crtc_state *crtc_state); 55 void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, 56 enum port port); 57 void intel_ddi_init(struct intel_display *display, 58 const struct intel_bios_encoder_data *devdata); 59 bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); 60 void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder, 61 const struct intel_crtc_state *crtc_state); 62 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); 63 void intel_ddi_enable_transcoder_clock(struct intel_encoder *encoder, 64 const struct intel_crtc_state *crtc_state); 65 void intel_ddi_disable_transcoder_clock(const struct intel_crtc_state *crtc_state); 66 void intel_ddi_wait_for_fec_status(struct intel_encoder *encoder, 67 const struct intel_crtc_state *crtc_state, 68 bool enabled); 69 void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, 70 const struct drm_connector_state *conn_state); 71 bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); 72 void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, 73 bool state); 74 void intel_ddi_compute_min_voltage_level(struct intel_crtc_state *crtc_state); 75 int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder, 76 enum transcoder cpu_transcoder, 77 bool enable, u32 hdcp_mask); 78 void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); 79 int intel_ddi_level(struct intel_encoder *encoder, 80 const struct intel_crtc_state *crtc_state, 81 int lane); 82 void intel_ddi_update_active_dpll(struct intel_atomic_state *state, 83 struct intel_encoder *encoder, 84 struct intel_crtc *crtc); 85 86 #endif /* __INTEL_DDI_H__ */ 87