xref: /linux/drivers/gpu/drm/i915/display/intel_ddi.h (revision 02680c23d7b3febe45ea3d4f9818c2b2dc89020a)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2019 Intel Corporation
4  */
5 
6 #ifndef __INTEL_DDI_H__
7 #define __INTEL_DDI_H__
8 
9 #include "intel_display.h"
10 #include "i915_reg.h"
11 
12 struct drm_connector_state;
13 struct drm_i915_private;
14 struct intel_connector;
15 struct intel_crtc;
16 struct intel_crtc_state;
17 struct intel_dp;
18 struct intel_dpll_hw_state;
19 struct intel_encoder;
20 struct intel_shared_dpll;
21 enum transcoder;
22 
23 i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
24 			 const struct intel_crtc_state *crtc_state);
25 i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
26 			    const struct intel_crtc_state *crtc_state);
27 void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
28 				struct intel_encoder *intel_encoder,
29 				const struct intel_crtc_state *old_crtc_state,
30 				const struct drm_connector_state *old_conn_state);
31 void intel_ddi_enable_clock(struct intel_encoder *encoder,
32 			    const struct intel_crtc_state *crtc_state);
33 void intel_ddi_get_clock(struct intel_encoder *encoder,
34 			 struct intel_crtc_state *crtc_state,
35 			 struct intel_shared_dpll *pll);
36 void hsw_ddi_enable_clock(struct intel_encoder *encoder,
37 			  const struct intel_crtc_state *crtc_state);
38 void hsw_ddi_disable_clock(struct intel_encoder *encoder);
39 bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
40 void hsw_ddi_get_config(struct intel_encoder *encoder,
41 			struct intel_crtc_state *crtc_state);
42 struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
43 void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
44 				  const struct intel_crtc_state *crtc_state);
45 void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
46 			     enum port port);
47 void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
48 bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
49 void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
50 				      const struct intel_crtc_state *crtc_state);
51 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
52 void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
53 				 const struct intel_crtc_state *crtc_state);
54 void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);
55 void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
56 			  const struct drm_connector_state *conn_state);
57 bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
58 void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
59 				    bool state);
60 void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
61 					 struct intel_crtc_state *crtc_state);
62 u32 bxt_signal_levels(struct intel_dp *intel_dp,
63 		      const struct intel_crtc_state *crtc_state);
64 u32 ddi_signal_levels(struct intel_dp *intel_dp,
65 		      const struct intel_crtc_state *crtc_state);
66 int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
67 			       enum transcoder cpu_transcoder,
68 			       bool enable, u32 hdcp_mask);
69 void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
70 
71 #endif /* __INTEL_DDI_H__ */
72