xref: /linux/drivers/gpu/drm/i915/display/intel_cx0_phy.h (revision 79d2e1919a2728ef49d938eb20ebd5903c14dfb0)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2023 Intel Corporation
4  */
5 
6 #ifndef __INTEL_CX0_PHY_H__
7 #define __INTEL_CX0_PHY_H__
8 
9 #include <linux/types.h>
10 
11 enum icl_port_dpll_id;
12 struct intel_atomic_state;
13 struct intel_c10pll_state;
14 struct intel_c20pll_state;
15 struct intel_crtc;
16 struct intel_crtc_state;
17 struct intel_cx0pll_state;
18 struct intel_display;
19 struct intel_encoder;
20 struct intel_hdmi;
21 
22 bool intel_encoder_is_c10phy(struct intel_encoder *encoder);
23 void intel_mtl_pll_enable(struct intel_encoder *encoder,
24 			  const struct intel_crtc_state *crtc_state);
25 void intel_mtl_pll_disable(struct intel_encoder *encoder);
26 enum icl_port_dpll_id
27 intel_mtl_port_pll_type(struct intel_encoder *encoder,
28 			const struct intel_crtc_state *crtc_state);
29 
30 int intel_cx0pll_calc_state(struct intel_crtc_state *crtc_state, struct intel_encoder *encoder);
31 void intel_cx0pll_readout_hw_state(struct intel_encoder *encoder,
32 				   struct intel_cx0pll_state *pll_state);
33 int intel_cx0pll_calc_port_clock(struct intel_encoder *encoder,
34 				 const struct intel_cx0pll_state *pll_state);
35 
36 void intel_cx0pll_dump_hw_state(struct intel_display *display,
37 				const struct intel_cx0pll_state *hw_state);
38 void intel_cx0pll_state_verify(struct intel_atomic_state *state,
39 			       struct intel_crtc *crtc);
40 bool intel_cx0pll_compare_hw_state(const struct intel_cx0pll_state *a,
41 				   const struct intel_cx0pll_state *b);
42 void intel_cx0_phy_set_signal_levels(struct intel_encoder *encoder,
43 				     const struct intel_crtc_state *crtc_state);
44 int intel_cx0_phy_check_hdmi_link_rate(struct intel_hdmi *hdmi, int clock);
45 int intel_mtl_tbt_calc_port_clock(struct intel_encoder *encoder);
46 
47 #endif /* __INTEL_CX0_PHY_H__ */
48