1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_CDCLK_H__ 7 #define __INTEL_CDCLK_H__ 8 9 #include <linux/types.h> 10 11 enum pipe; 12 struct intel_atomic_state; 13 struct intel_cdclk_state; 14 struct intel_crtc; 15 struct intel_crtc_state; 16 struct intel_display; 17 18 struct intel_cdclk_config { 19 unsigned int cdclk, vco, ref, bypass; 20 u8 voltage_level; 21 /* This field is only valid for Xe2LPD and above. */ 22 bool joined_mbus; 23 }; 24 25 void intel_cdclk_init_hw(struct intel_display *display); 26 void intel_cdclk_uninit_hw(struct intel_display *display); 27 void intel_init_cdclk_hooks(struct intel_display *display); 28 void intel_update_max_cdclk(struct intel_display *display); 29 void intel_update_cdclk(struct intel_display *display); 30 u32 intel_read_rawclk(struct intel_display *display); 31 bool intel_cdclk_clock_changed(const struct intel_cdclk_config *a, 32 const struct intel_cdclk_config *b); 33 int intel_mdclk_cdclk_ratio(struct intel_display *display, 34 const struct intel_cdclk_config *cdclk_config); 35 bool intel_cdclk_is_decreasing_later(struct intel_atomic_state *state); 36 void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state); 37 void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state); 38 void intel_cdclk_dump_config(struct intel_display *display, 39 const struct intel_cdclk_config *cdclk_config, 40 const char *context); 41 void intel_cdclk_get_cdclk(struct intel_display *display, 42 struct intel_cdclk_config *cdclk_config); 43 int intel_cdclk_atomic_check(struct intel_atomic_state *state); 44 int intel_cdclk_state_set_joined_mbus(struct intel_atomic_state *state, bool joined_mbus); 45 struct intel_cdclk_state * 46 intel_atomic_get_cdclk_state(struct intel_atomic_state *state); 47 void intel_cdclk_update_hw_state(struct intel_display *display); 48 void intel_cdclk_crtc_disable_noatomic(struct intel_crtc *crtc); 49 int intel_cdclk_update_dbuf_bw_min_cdclk(struct intel_atomic_state *state, 50 int old_min_cdclk, int new_min_cdclk, 51 bool *need_cdclk_calc); 52 53 #define to_intel_cdclk_state(global_state) \ 54 container_of_const((global_state), struct intel_cdclk_state, base) 55 56 #define intel_atomic_get_old_cdclk_state(state) \ 57 to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->cdclk.obj)) 58 #define intel_atomic_get_new_cdclk_state(state) \ 59 to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->cdclk.obj)) 60 61 int intel_cdclk_init(struct intel_display *display); 62 void intel_cdclk_debugfs_register(struct intel_display *display); 63 64 int intel_cdclk_logical(const struct intel_cdclk_state *cdclk_state); 65 int intel_cdclk_actual(const struct intel_cdclk_state *cdclk_state); 66 int intel_cdclk_actual_voltage_level(const struct intel_cdclk_state *cdclk_state); 67 int intel_cdclk_min_cdclk(const struct intel_cdclk_state *cdclk_state, enum pipe pipe); 68 bool intel_cdclk_pmdemand_needs_update(struct intel_atomic_state *state); 69 void intel_cdclk_force_min_cdclk(struct intel_cdclk_state *cdclk_state, int force_min_cdclk); 70 void intel_cdclk_read_hw(struct intel_display *display); 71 72 unsigned int intel_cdclk_prefill_adjustment(const struct intel_crtc_state *crtc_state); 73 unsigned int intel_cdclk_prefill_adjustment_worst(const struct intel_crtc_state *crtc_state); 74 int intel_cdclk_min_cdclk_for_prefill(const struct intel_crtc_state *crtc_state, 75 unsigned int prefill_lines_unadjusted, 76 unsigned int prefill_lines_available); 77 78 int intel_crtc_min_cdclk(const struct intel_crtc_state *crtc_state); 79 80 #endif /* __INTEL_CDCLK_H__ */ 81