1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_BW_H__ 7 #define __INTEL_BW_H__ 8 9 #include <drm/drm_atomic.h> 10 11 struct intel_atomic_state; 12 struct intel_bw_state; 13 struct intel_crtc; 14 struct intel_crtc_state; 15 struct intel_display; 16 struct intel_global_state; 17 18 struct intel_bw_state *to_intel_bw_state(struct intel_global_state *obj_state); 19 20 struct intel_bw_state * 21 intel_atomic_get_old_bw_state(struct intel_atomic_state *state); 22 23 struct intel_bw_state * 24 intel_atomic_get_new_bw_state(struct intel_atomic_state *state); 25 26 struct intel_bw_state * 27 intel_atomic_get_bw_state(struct intel_atomic_state *state); 28 29 void intel_bw_init_hw(struct intel_display *display); 30 int intel_bw_init(struct intel_display *display); 31 int intel_bw_atomic_check(struct intel_atomic_state *state, bool any_ms); 32 int intel_bw_calc_min_cdclk(struct intel_atomic_state *state, 33 bool *need_cdclk_calc); 34 int intel_bw_min_cdclk(struct intel_display *display, 35 const struct intel_bw_state *bw_state); 36 void intel_bw_update_hw_state(struct intel_display *display); 37 void intel_bw_crtc_disable_noatomic(struct intel_crtc *crtc); 38 39 bool intel_bw_pmdemand_needs_update(struct intel_atomic_state *state); 40 bool intel_bw_can_enable_sagv(struct intel_display *display, 41 const struct intel_bw_state *bw_state); 42 void icl_sagv_pre_plane_update(struct intel_atomic_state *state); 43 void icl_sagv_post_plane_update(struct intel_atomic_state *state); 44 int intel_bw_qgv_point_peakbw(const struct intel_bw_state *bw_state); 45 46 #endif /* __INTEL_BW_H__ */ 47