1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <linux/debugfs.h> 29 #include <linux/firmware.h> 30 31 #include <drm/display/drm_dp_helper.h> 32 #include <drm/display/drm_dsc_helper.h> 33 #include <drm/drm_edid.h> 34 #include <drm/drm_fixed.h> 35 36 #include "soc/intel_rom.h" 37 38 #include "i915_drv.h" 39 #include "intel_display.h" 40 #include "intel_display_types.h" 41 #include "intel_gmbus.h" 42 43 #define _INTEL_BIOS_PRIVATE 44 #include "intel_vbt_defs.h" 45 46 /** 47 * DOC: Video BIOS Table (VBT) 48 * 49 * The Video BIOS Table, or VBT, provides platform and board specific 50 * configuration information to the driver that is not discoverable or available 51 * through other means. The configuration is mostly related to display 52 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 53 * the PCI ROM. 54 * 55 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 56 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 57 * contain the actual configuration information. The VBT Header, and thus the 58 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 59 * BDB Header. The data blocks are concatenated after the BDB Header. The data 60 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 61 * data. (Block 53, the MIPI Sequence Block is an exception.) 62 * 63 * The driver parses the VBT during load. The relevant information is stored in 64 * driver private data for ease of use, and the actual VBT is not read after 65 * that. 66 */ 67 68 /* Wrapper for VBT child device config */ 69 struct intel_bios_encoder_data { 70 struct intel_display *display; 71 72 struct child_device_config child; 73 struct dsc_compression_parameters_entry *dsc; 74 struct list_head node; 75 }; 76 77 #define TARGET_ADDR1 0x70 78 #define TARGET_ADDR2 0x72 79 80 /* Get BDB block size given a pointer to Block ID. */ 81 static u32 _get_blocksize(const u8 *block_base) 82 { 83 /* The MIPI Sequence Block v3+ has a separate size field. */ 84 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 85 return *((const u32 *)(block_base + 4)); 86 else 87 return *((const u16 *)(block_base + 1)); 88 } 89 90 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 91 static u32 get_blocksize(const void *block_data) 92 { 93 return _get_blocksize(block_data - 3); 94 } 95 96 static const void * 97 find_raw_section(const void *_bdb, enum bdb_block_id section_id) 98 { 99 const struct bdb_header *bdb = _bdb; 100 const u8 *base = _bdb; 101 int index = 0; 102 u32 total, current_size; 103 enum bdb_block_id current_id; 104 105 /* skip to first section */ 106 index += bdb->header_size; 107 total = bdb->bdb_size; 108 109 /* walk the sections looking for section_id */ 110 while (index + 3 < total) { 111 current_id = *(base + index); 112 current_size = _get_blocksize(base + index); 113 index += 3; 114 115 if (index + current_size > total) 116 return NULL; 117 118 if (current_id == section_id) 119 return base + index; 120 121 index += current_size; 122 } 123 124 return NULL; 125 } 126 127 /* 128 * Offset from the start of BDB to the start of the 129 * block data (just past the block header). 130 */ 131 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id) 132 { 133 const void *block; 134 135 block = find_raw_section(bdb, section_id); 136 if (!block) 137 return 0; 138 139 return block - bdb; 140 } 141 142 struct bdb_block_entry { 143 struct list_head node; 144 enum bdb_block_id section_id; 145 u8 data[]; 146 }; 147 148 static const void * 149 bdb_find_section(struct intel_display *display, 150 enum bdb_block_id section_id) 151 { 152 struct bdb_block_entry *entry; 153 154 list_for_each_entry(entry, &display->vbt.bdb_blocks, node) { 155 if (entry->section_id == section_id) 156 return entry->data + 3; 157 } 158 159 return NULL; 160 } 161 162 static const struct { 163 enum bdb_block_id section_id; 164 size_t min_size; 165 } bdb_blocks[] = { 166 { .section_id = BDB_GENERAL_FEATURES, 167 .min_size = sizeof(struct bdb_general_features), }, 168 { .section_id = BDB_GENERAL_DEFINITIONS, 169 .min_size = sizeof(struct bdb_general_definitions), }, 170 { .section_id = BDB_PSR, 171 .min_size = sizeof(struct bdb_psr), }, 172 { .section_id = BDB_DRIVER_FEATURES, 173 .min_size = sizeof(struct bdb_driver_features), }, 174 { .section_id = BDB_SDVO_LVDS_OPTIONS, 175 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 176 { .section_id = BDB_SDVO_LVDS_DTD, 177 .min_size = sizeof(struct bdb_sdvo_lvds_dtd), }, 178 { .section_id = BDB_EDP, 179 .min_size = sizeof(struct bdb_edp), }, 180 { .section_id = BDB_LFP_OPTIONS, 181 .min_size = sizeof(struct bdb_lfp_options), }, 182 /* 183 * BDB_LFP_DATA depends on BDB_LFP_DATA_PTRS, 184 * so keep the two ordered. 185 */ 186 { .section_id = BDB_LFP_DATA_PTRS, 187 .min_size = sizeof(struct bdb_lfp_data_ptrs), }, 188 { .section_id = BDB_LFP_DATA, 189 .min_size = 0, /* special case */ }, 190 { .section_id = BDB_LFP_BACKLIGHT, 191 .min_size = sizeof(struct bdb_lfp_backlight), }, 192 { .section_id = BDB_LFP_POWER, 193 .min_size = sizeof(struct bdb_lfp_power), }, 194 { .section_id = BDB_MIPI_CONFIG, 195 .min_size = sizeof(struct bdb_mipi_config), }, 196 { .section_id = BDB_MIPI_SEQUENCE, 197 .min_size = sizeof(struct bdb_mipi_sequence) }, 198 { .section_id = BDB_COMPRESSION_PARAMETERS, 199 .min_size = sizeof(struct bdb_compression_parameters), }, 200 { .section_id = BDB_GENERIC_DTD, 201 .min_size = sizeof(struct bdb_generic_dtd), }, 202 }; 203 204 static size_t lfp_data_min_size(struct intel_display *display) 205 { 206 const struct bdb_lfp_data_ptrs *ptrs; 207 size_t size; 208 209 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 210 if (!ptrs) 211 return 0; 212 213 size = sizeof(struct bdb_lfp_data); 214 if (ptrs->panel_name.table_size) 215 size = max(size, ptrs->panel_name.offset + 216 sizeof(struct bdb_lfp_data_tail)); 217 218 return size; 219 } 220 221 static bool validate_lfp_data_ptrs(const void *bdb, 222 const struct bdb_lfp_data_ptrs *ptrs) 223 { 224 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 225 int data_block_size, lfp_data_size; 226 const void *data_block; 227 int i; 228 229 data_block = find_raw_section(bdb, BDB_LFP_DATA); 230 if (!data_block) 231 return false; 232 233 data_block_size = get_blocksize(data_block); 234 if (data_block_size == 0) 235 return false; 236 237 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 238 if (ptrs->num_entries != 3) 239 return false; 240 241 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 242 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 243 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 244 panel_name_size = ptrs->panel_name.table_size; 245 246 /* fp_timing has variable size */ 247 if (fp_timing_size < 32 || 248 dvo_timing_size != sizeof(struct bdb_edid_dtd) || 249 panel_pnp_id_size != sizeof(struct bdb_edid_pnp_id)) 250 return false; 251 252 /* panel_name is not present in old VBTs */ 253 if (panel_name_size != 0 && 254 panel_name_size != sizeof(struct bdb_edid_product_name)) 255 return false; 256 257 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 258 if (16 * lfp_data_size > data_block_size) 259 return false; 260 261 /* make sure the table entries have uniform size */ 262 for (i = 1; i < 16; i++) { 263 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 264 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 265 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 266 return false; 267 268 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 269 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 270 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 271 return false; 272 } 273 274 /* 275 * Except for vlv/chv machines all real VBTs seem to have 6 276 * unaccounted bytes in the fp_timing table. And it doesn't 277 * appear to be a really intentional hole as the fp_timing 278 * 0xffff terminator is always within those 6 missing bytes. 279 */ 280 if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size) 281 fp_timing_size += 6; 282 283 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 284 return false; 285 286 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset || 287 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 288 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 289 return false; 290 291 /* make sure the tables fit inside the data block */ 292 for (i = 0; i < 16; i++) { 293 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 294 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 295 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 296 return false; 297 } 298 299 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 300 return false; 301 302 /* make sure fp_timing terminators are present at expected locations */ 303 for (i = 0; i < 16; i++) { 304 const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset + 305 fp_timing_size - 2; 306 307 if (*t != 0xffff) 308 return false; 309 } 310 311 return true; 312 } 313 314 /* make the data table offsets relative to the data block */ 315 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 316 { 317 struct bdb_lfp_data_ptrs *ptrs = ptrs_block; 318 u32 offset; 319 int i; 320 321 offset = raw_block_offset(bdb, BDB_LFP_DATA); 322 323 for (i = 0; i < 16; i++) { 324 if (ptrs->ptr[i].fp_timing.offset < offset || 325 ptrs->ptr[i].dvo_timing.offset < offset || 326 ptrs->ptr[i].panel_pnp_id.offset < offset) 327 return false; 328 329 ptrs->ptr[i].fp_timing.offset -= offset; 330 ptrs->ptr[i].dvo_timing.offset -= offset; 331 ptrs->ptr[i].panel_pnp_id.offset -= offset; 332 } 333 334 if (ptrs->panel_name.table_size) { 335 if (ptrs->panel_name.offset < offset) 336 return false; 337 338 ptrs->panel_name.offset -= offset; 339 } 340 341 return validate_lfp_data_ptrs(bdb, ptrs); 342 } 343 344 static int make_lfp_data_ptr(struct lfp_data_ptr_table *table, 345 int table_size, int total_size) 346 { 347 if (total_size < table_size) 348 return total_size; 349 350 table->table_size = table_size; 351 table->offset = total_size - table_size; 352 353 return total_size - table_size; 354 } 355 356 static void next_lfp_data_ptr(struct lfp_data_ptr_table *next, 357 const struct lfp_data_ptr_table *prev, 358 int size) 359 { 360 next->table_size = prev->table_size; 361 next->offset = prev->offset + size; 362 } 363 364 static void *generate_lfp_data_ptrs(struct intel_display *display, 365 const void *bdb) 366 { 367 int i, size, table_size, block_size, offset, fp_timing_size; 368 struct bdb_lfp_data_ptrs *ptrs; 369 const void *block; 370 void *ptrs_block; 371 372 /* 373 * The hardcoded fp_timing_size is only valid for 374 * modernish VBTs. All older VBTs definitely should 375 * include block 41 and thus we don't need to 376 * generate one. 377 */ 378 if (display->vbt.version < 155) 379 return NULL; 380 381 fp_timing_size = 38; 382 383 block = find_raw_section(bdb, BDB_LFP_DATA); 384 if (!block) 385 return NULL; 386 387 drm_dbg_kms(display->drm, "Generating LFP data table pointers\n"); 388 389 block_size = get_blocksize(block); 390 391 size = fp_timing_size + sizeof(struct bdb_edid_dtd) + 392 sizeof(struct bdb_edid_pnp_id); 393 if (size * 16 > block_size) 394 return NULL; 395 396 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 397 if (!ptrs_block) 398 return NULL; 399 400 *(u8 *)(ptrs_block + 0) = BDB_LFP_DATA_PTRS; 401 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 402 ptrs = ptrs_block + 3; 403 404 table_size = sizeof(struct bdb_edid_pnp_id); 405 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 406 407 table_size = sizeof(struct bdb_edid_dtd); 408 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 409 410 table_size = fp_timing_size; 411 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 412 413 if (ptrs->ptr[0].fp_timing.table_size) 414 ptrs->num_entries++; 415 if (ptrs->ptr[0].dvo_timing.table_size) 416 ptrs->num_entries++; 417 if (ptrs->ptr[0].panel_pnp_id.table_size) 418 ptrs->num_entries++; 419 420 if (size != 0 || ptrs->num_entries != 3) { 421 kfree(ptrs_block); 422 return NULL; 423 } 424 425 size = fp_timing_size + sizeof(struct bdb_edid_dtd) + 426 sizeof(struct bdb_edid_pnp_id); 427 for (i = 1; i < 16; i++) { 428 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 429 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 430 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 431 } 432 433 table_size = sizeof(struct bdb_edid_product_name); 434 435 if (16 * (size + table_size) <= block_size) { 436 ptrs->panel_name.table_size = table_size; 437 ptrs->panel_name.offset = size * 16; 438 } 439 440 offset = block - bdb; 441 442 for (i = 0; i < 16; i++) { 443 ptrs->ptr[i].fp_timing.offset += offset; 444 ptrs->ptr[i].dvo_timing.offset += offset; 445 ptrs->ptr[i].panel_pnp_id.offset += offset; 446 } 447 448 if (ptrs->panel_name.table_size) 449 ptrs->panel_name.offset += offset; 450 451 return ptrs_block; 452 } 453 454 static void 455 init_bdb_block(struct intel_display *display, 456 const void *bdb, enum bdb_block_id section_id, 457 size_t min_size) 458 { 459 struct bdb_block_entry *entry; 460 void *temp_block = NULL; 461 const void *block; 462 size_t block_size; 463 464 block = find_raw_section(bdb, section_id); 465 466 /* Modern VBTs lack the LFP data table pointers block, make one up */ 467 if (!block && section_id == BDB_LFP_DATA_PTRS) { 468 temp_block = generate_lfp_data_ptrs(display, bdb); 469 if (temp_block) 470 block = temp_block + 3; 471 } 472 if (!block) 473 return; 474 475 drm_WARN(display->drm, min_size == 0, 476 "Block %d min_size is zero\n", section_id); 477 478 block_size = get_blocksize(block); 479 480 /* 481 * Version number and new block size are considered 482 * part of the header for MIPI sequenece block v3+. 483 */ 484 if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3) 485 block_size += 5; 486 487 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 488 GFP_KERNEL); 489 if (!entry) { 490 kfree(temp_block); 491 return; 492 } 493 494 entry->section_id = section_id; 495 memcpy(entry->data, block - 3, block_size + 3); 496 497 kfree(temp_block); 498 499 drm_dbg_kms(display->drm, 500 "Found BDB block %d (size %zu, min size %zu)\n", 501 section_id, block_size, min_size); 502 503 if (section_id == BDB_LFP_DATA_PTRS && 504 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 505 drm_err(display->drm, 506 "VBT has malformed LFP data table pointers\n"); 507 kfree(entry); 508 return; 509 } 510 511 list_add_tail(&entry->node, &display->vbt.bdb_blocks); 512 } 513 514 static void init_bdb_blocks(struct intel_display *display, 515 const void *bdb) 516 { 517 int i; 518 519 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 520 enum bdb_block_id section_id = bdb_blocks[i].section_id; 521 size_t min_size = bdb_blocks[i].min_size; 522 523 if (section_id == BDB_LFP_DATA) 524 min_size = lfp_data_min_size(display); 525 526 init_bdb_block(display, bdb, section_id, min_size); 527 } 528 } 529 530 static void 531 fill_detail_timing_data(struct intel_display *display, 532 struct drm_display_mode *panel_fixed_mode, 533 const struct bdb_edid_dtd *dvo_timing) 534 { 535 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 536 dvo_timing->hactive_lo; 537 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 538 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 539 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 540 ((dvo_timing->hsync_pulse_width_hi << 8) | 541 dvo_timing->hsync_pulse_width_lo); 542 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 543 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 544 545 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 546 dvo_timing->vactive_lo; 547 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 548 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 549 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 550 ((dvo_timing->vsync_pulse_width_hi << 4) | 551 dvo_timing->vsync_pulse_width_lo); 552 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 553 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 554 panel_fixed_mode->clock = dvo_timing->clock * 10; 555 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 556 557 if (dvo_timing->hsync_positive) 558 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 559 else 560 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 561 562 if (dvo_timing->vsync_positive) 563 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 564 else 565 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 566 567 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 568 dvo_timing->himage_lo; 569 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 570 dvo_timing->vimage_lo; 571 572 /* Some VBTs have bogus h/vsync_end values */ 573 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) { 574 drm_dbg_kms(display->drm, "reducing hsync_end %d->%d\n", 575 panel_fixed_mode->hsync_end, panel_fixed_mode->htotal); 576 panel_fixed_mode->hsync_end = panel_fixed_mode->htotal; 577 } 578 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) { 579 drm_dbg_kms(display->drm, "reducing vsync_end %d->%d\n", 580 panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal); 581 panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal; 582 } 583 584 drm_mode_set_name(panel_fixed_mode); 585 } 586 587 static const struct bdb_edid_dtd * 588 get_lfp_dvo_timing(const struct bdb_lfp_data *data, 589 const struct bdb_lfp_data_ptrs *ptrs, 590 int index) 591 { 592 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 593 } 594 595 static const struct fp_timing * 596 get_lfp_fp_timing(const struct bdb_lfp_data *data, 597 const struct bdb_lfp_data_ptrs *ptrs, 598 int index) 599 { 600 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 601 } 602 603 static const struct drm_edid_product_id * 604 get_lfp_pnp_id(const struct bdb_lfp_data *data, 605 const struct bdb_lfp_data_ptrs *ptrs, 606 int index) 607 { 608 /* These two are supposed to have the same layout in memory. */ 609 BUILD_BUG_ON(sizeof(struct bdb_edid_pnp_id) != sizeof(struct drm_edid_product_id)); 610 611 return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset; 612 } 613 614 static const struct bdb_lfp_data_tail * 615 get_lfp_data_tail(const struct bdb_lfp_data *data, 616 const struct bdb_lfp_data_ptrs *ptrs) 617 { 618 if (ptrs->panel_name.table_size) 619 return (const void *)data + ptrs->panel_name.offset; 620 else 621 return NULL; 622 } 623 624 static int opregion_get_panel_type(struct intel_display *display, 625 const struct intel_bios_encoder_data *devdata, 626 const struct drm_edid *drm_edid, bool use_fallback) 627 { 628 return intel_opregion_get_panel_type(display); 629 } 630 631 static int vbt_get_panel_type(struct intel_display *display, 632 const struct intel_bios_encoder_data *devdata, 633 const struct drm_edid *drm_edid, bool use_fallback) 634 { 635 const struct bdb_lfp_options *lfp_options; 636 637 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS); 638 if (!lfp_options) 639 return -1; 640 641 if (lfp_options->panel_type > 0xf && 642 lfp_options->panel_type != 0xff) { 643 drm_dbg_kms(display->drm, "Invalid VBT panel type 0x%x\n", 644 lfp_options->panel_type); 645 return -1; 646 } 647 648 if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2) 649 return lfp_options->panel_type2; 650 651 drm_WARN_ON(display->drm, 652 devdata && devdata->child.handle != DEVICE_HANDLE_LFP1); 653 654 return lfp_options->panel_type; 655 } 656 657 static int pnpid_get_panel_type(struct intel_display *display, 658 const struct intel_bios_encoder_data *devdata, 659 const struct drm_edid *drm_edid, bool use_fallback) 660 { 661 const struct bdb_lfp_data *data; 662 const struct bdb_lfp_data_ptrs *ptrs; 663 struct drm_edid_product_id product_id, product_id_nodate; 664 struct drm_printer p; 665 int i, best = -1; 666 667 if (!drm_edid) 668 return -1; 669 670 drm_edid_get_product_id(drm_edid, &product_id); 671 672 product_id_nodate = product_id; 673 product_id_nodate.week_of_manufacture = 0; 674 product_id_nodate.year_of_manufacture = 0; 675 676 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "EDID"); 677 drm_edid_print_product_id(&p, &product_id, true); 678 679 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 680 if (!ptrs) 681 return -1; 682 683 data = bdb_find_section(display, BDB_LFP_DATA); 684 if (!data) 685 return -1; 686 687 for (i = 0; i < 16; i++) { 688 const struct drm_edid_product_id *vbt_id = 689 get_lfp_pnp_id(data, ptrs, i); 690 691 /* full match? */ 692 if (!memcmp(vbt_id, &product_id, sizeof(*vbt_id))) 693 return i; 694 695 /* 696 * Accept a match w/o date if no full match is found, 697 * and the VBT entry does not specify a date. 698 */ 699 if (best < 0 && 700 !memcmp(vbt_id, &product_id_nodate, sizeof(*vbt_id))) 701 best = i; 702 } 703 704 return best; 705 } 706 707 static int fallback_get_panel_type(struct intel_display *display, 708 const struct intel_bios_encoder_data *devdata, 709 const struct drm_edid *drm_edid, bool use_fallback) 710 { 711 return use_fallback ? 0 : -1; 712 } 713 714 enum panel_type { 715 PANEL_TYPE_OPREGION, 716 PANEL_TYPE_VBT, 717 PANEL_TYPE_PNPID, 718 PANEL_TYPE_FALLBACK, 719 }; 720 721 static int get_panel_type(struct intel_display *display, 722 const struct intel_bios_encoder_data *devdata, 723 const struct drm_edid *drm_edid, bool use_fallback) 724 { 725 struct { 726 const char *name; 727 int (*get_panel_type)(struct intel_display *display, 728 const struct intel_bios_encoder_data *devdata, 729 const struct drm_edid *drm_edid, bool use_fallback); 730 int panel_type; 731 } panel_types[] = { 732 [PANEL_TYPE_OPREGION] = { 733 .name = "OpRegion", 734 .get_panel_type = opregion_get_panel_type, 735 }, 736 [PANEL_TYPE_VBT] = { 737 .name = "VBT", 738 .get_panel_type = vbt_get_panel_type, 739 }, 740 [PANEL_TYPE_PNPID] = { 741 .name = "PNPID", 742 .get_panel_type = pnpid_get_panel_type, 743 }, 744 [PANEL_TYPE_FALLBACK] = { 745 .name = "fallback", 746 .get_panel_type = fallback_get_panel_type, 747 }, 748 }; 749 int i; 750 751 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 752 panel_types[i].panel_type = panel_types[i].get_panel_type(display, devdata, 753 drm_edid, use_fallback); 754 755 drm_WARN_ON(display->drm, panel_types[i].panel_type > 0xf && 756 panel_types[i].panel_type != 0xff); 757 758 if (panel_types[i].panel_type >= 0) 759 drm_dbg_kms(display->drm, "Panel type (%s): %d\n", 760 panel_types[i].name, panel_types[i].panel_type); 761 } 762 763 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 764 i = PANEL_TYPE_OPREGION; 765 else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff && 766 panel_types[PANEL_TYPE_PNPID].panel_type >= 0) 767 i = PANEL_TYPE_PNPID; 768 else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff && 769 panel_types[PANEL_TYPE_VBT].panel_type >= 0) 770 i = PANEL_TYPE_VBT; 771 else 772 i = PANEL_TYPE_FALLBACK; 773 774 drm_dbg_kms(display->drm, "Selected panel type (%s): %d\n", 775 panel_types[i].name, panel_types[i].panel_type); 776 777 return panel_types[i].panel_type; 778 } 779 780 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits) 781 { 782 return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1); 783 } 784 785 static bool panel_bool(unsigned int value, int panel_type) 786 { 787 return panel_bits(value, panel_type, 1); 788 } 789 790 /* Parse general panel options */ 791 static void 792 parse_panel_options(struct intel_display *display, 793 struct intel_panel *panel) 794 { 795 const struct bdb_lfp_options *lfp_options; 796 int panel_type = panel->vbt.panel_type; 797 int drrs_mode; 798 799 lfp_options = bdb_find_section(display, BDB_LFP_OPTIONS); 800 if (!lfp_options) 801 return; 802 803 panel->vbt.lvds_dither = lfp_options->pixel_dither; 804 805 /* 806 * Empirical evidence indicates the block size can be 807 * either 4,14,16,24+ bytes. For older VBTs no clear 808 * relationship between the block size vs. BDB version. 809 */ 810 if (get_blocksize(lfp_options) < 16) 811 return; 812 813 drrs_mode = panel_bits(lfp_options->dps_panel_type_bits, 814 panel_type, 2); 815 /* 816 * VBT has static DRRS = 0 and seamless DRRS = 2. 817 * The below piece of code is required to adjust vbt.drrs_type 818 * to match the enum drrs_support_type. 819 */ 820 switch (drrs_mode) { 821 case 0: 822 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 823 drm_dbg_kms(display->drm, "DRRS supported mode is static\n"); 824 break; 825 case 2: 826 panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 827 drm_dbg_kms(display->drm, 828 "DRRS supported mode is seamless\n"); 829 break; 830 default: 831 panel->vbt.drrs_type = DRRS_TYPE_NONE; 832 drm_dbg_kms(display->drm, 833 "DRRS not supported (VBT input)\n"); 834 break; 835 } 836 } 837 838 static void 839 parse_lfp_panel_dtd(struct intel_display *display, 840 struct intel_panel *panel, 841 const struct bdb_lfp_data *lfp_data, 842 const struct bdb_lfp_data_ptrs *lfp_data_ptrs) 843 { 844 const struct bdb_edid_dtd *panel_dvo_timing; 845 const struct fp_timing *fp_timing; 846 struct drm_display_mode *panel_fixed_mode; 847 int panel_type = panel->vbt.panel_type; 848 849 panel_dvo_timing = get_lfp_dvo_timing(lfp_data, 850 lfp_data_ptrs, 851 panel_type); 852 853 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 854 if (!panel_fixed_mode) 855 return; 856 857 fill_detail_timing_data(display, panel_fixed_mode, panel_dvo_timing); 858 859 panel->vbt.lfp_vbt_mode = panel_fixed_mode; 860 861 drm_dbg_kms(display->drm, 862 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 863 DRM_MODE_ARG(panel_fixed_mode)); 864 865 fp_timing = get_lfp_fp_timing(lfp_data, 866 lfp_data_ptrs, 867 panel_type); 868 869 /* check the resolution, just to be sure */ 870 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 871 fp_timing->y_res == panel_fixed_mode->vdisplay) { 872 panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 873 drm_dbg_kms(display->drm, 874 "VBT initial LVDS value %x\n", 875 panel->vbt.bios_lvds_val); 876 } 877 } 878 879 static void 880 parse_lfp_data(struct intel_display *display, 881 struct intel_panel *panel) 882 { 883 const struct bdb_lfp_data *data; 884 const struct bdb_lfp_data_tail *tail; 885 const struct bdb_lfp_data_ptrs *ptrs; 886 const struct drm_edid_product_id *pnp_id; 887 struct drm_printer p; 888 int panel_type = panel->vbt.panel_type; 889 890 ptrs = bdb_find_section(display, BDB_LFP_DATA_PTRS); 891 if (!ptrs) 892 return; 893 894 data = bdb_find_section(display, BDB_LFP_DATA); 895 if (!data) 896 return; 897 898 if (!panel->vbt.lfp_vbt_mode) 899 parse_lfp_panel_dtd(display, panel, data, ptrs); 900 901 pnp_id = get_lfp_pnp_id(data, ptrs, panel_type); 902 903 p = drm_dbg_printer(display->drm, DRM_UT_KMS, "Panel"); 904 drm_edid_print_product_id(&p, pnp_id, false); 905 906 tail = get_lfp_data_tail(data, ptrs); 907 if (!tail) 908 return; 909 910 drm_dbg_kms(display->drm, "Panel name: %.*s\n", 911 (int)sizeof(tail->panel_name[0].name), 912 tail->panel_name[panel_type].name); 913 914 if (display->vbt.version >= 188) { 915 panel->vbt.seamless_drrs_min_refresh_rate = 916 tail->seamless_drrs_min_refresh_rate[panel_type]; 917 drm_dbg_kms(display->drm, 918 "Seamless DRRS min refresh rate: %d Hz\n", 919 panel->vbt.seamless_drrs_min_refresh_rate); 920 } 921 } 922 923 static void 924 parse_generic_dtd(struct intel_display *display, 925 struct intel_panel *panel) 926 { 927 const struct bdb_generic_dtd *generic_dtd; 928 const struct generic_dtd_entry *dtd; 929 struct drm_display_mode *panel_fixed_mode; 930 int num_dtd; 931 932 /* 933 * Older VBTs provided DTD information for internal displays through 934 * the "LFP panel tables" block (42). As of VBT revision 229 the 935 * DTD information should be provided via a newer "generic DTD" 936 * block (58). Just to be safe, we'll try the new generic DTD block 937 * first on VBT >= 229, but still fall back to trying the old LFP 938 * block if that fails. 939 */ 940 if (display->vbt.version < 229) 941 return; 942 943 generic_dtd = bdb_find_section(display, BDB_GENERIC_DTD); 944 if (!generic_dtd) 945 return; 946 947 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 948 drm_err(display->drm, "GDTD size %u is too small.\n", 949 generic_dtd->gdtd_size); 950 return; 951 } else if (generic_dtd->gdtd_size != 952 sizeof(struct generic_dtd_entry)) { 953 drm_err(display->drm, "Unexpected GDTD size %u\n", 954 generic_dtd->gdtd_size); 955 /* DTD has unknown fields, but keep going */ 956 } 957 958 num_dtd = (get_blocksize(generic_dtd) - 959 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 960 if (panel->vbt.panel_type >= num_dtd) { 961 drm_err(display->drm, 962 "Panel type %d not found in table of %d DTD's\n", 963 panel->vbt.panel_type, num_dtd); 964 return; 965 } 966 967 dtd = &generic_dtd->dtd[panel->vbt.panel_type]; 968 969 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 970 if (!panel_fixed_mode) 971 return; 972 973 panel_fixed_mode->hdisplay = dtd->hactive; 974 panel_fixed_mode->hsync_start = 975 panel_fixed_mode->hdisplay + dtd->hfront_porch; 976 panel_fixed_mode->hsync_end = 977 panel_fixed_mode->hsync_start + dtd->hsync; 978 panel_fixed_mode->htotal = 979 panel_fixed_mode->hdisplay + dtd->hblank; 980 981 panel_fixed_mode->vdisplay = dtd->vactive; 982 panel_fixed_mode->vsync_start = 983 panel_fixed_mode->vdisplay + dtd->vfront_porch; 984 panel_fixed_mode->vsync_end = 985 panel_fixed_mode->vsync_start + dtd->vsync; 986 panel_fixed_mode->vtotal = 987 panel_fixed_mode->vdisplay + dtd->vblank; 988 989 panel_fixed_mode->clock = dtd->pixel_clock; 990 panel_fixed_mode->width_mm = dtd->width_mm; 991 panel_fixed_mode->height_mm = dtd->height_mm; 992 993 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 994 drm_mode_set_name(panel_fixed_mode); 995 996 if (dtd->hsync_positive_polarity) 997 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 998 else 999 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 1000 1001 if (dtd->vsync_positive_polarity) 1002 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 1003 else 1004 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 1005 1006 drm_dbg_kms(display->drm, 1007 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 1008 DRM_MODE_ARG(panel_fixed_mode)); 1009 1010 panel->vbt.lfp_vbt_mode = panel_fixed_mode; 1011 } 1012 1013 static void 1014 parse_lfp_backlight(struct intel_display *display, 1015 struct intel_panel *panel) 1016 { 1017 const struct bdb_lfp_backlight *backlight_data; 1018 const struct lfp_backlight_data_entry *entry; 1019 int panel_type = panel->vbt.panel_type; 1020 u16 level; 1021 1022 backlight_data = bdb_find_section(display, BDB_LFP_BACKLIGHT); 1023 if (!backlight_data) 1024 return; 1025 1026 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 1027 drm_dbg_kms(display->drm, 1028 "Unsupported backlight data entry size %u\n", 1029 backlight_data->entry_size); 1030 return; 1031 } 1032 1033 entry = &backlight_data->data[panel_type]; 1034 1035 panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 1036 if (!panel->vbt.backlight.present) { 1037 drm_dbg_kms(display->drm, 1038 "PWM backlight not present in VBT (type %u)\n", 1039 entry->type); 1040 return; 1041 } 1042 1043 panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 1044 panel->vbt.backlight.controller = 0; 1045 if (display->vbt.version >= 191) { 1046 const struct lfp_backlight_control_method *method; 1047 1048 method = &backlight_data->backlight_control[panel_type]; 1049 panel->vbt.backlight.type = method->type; 1050 panel->vbt.backlight.controller = method->controller; 1051 } 1052 1053 panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 1054 panel->vbt.backlight.active_low_pwm = entry->active_low_pwm; 1055 1056 if (display->vbt.version >= 234) { 1057 u16 min_level; 1058 bool scale; 1059 1060 level = backlight_data->brightness_level[panel_type].level; 1061 min_level = backlight_data->brightness_min_level[panel_type].level; 1062 1063 if (display->vbt.version >= 236) 1064 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 1065 else 1066 scale = level > 255; 1067 1068 if (scale) 1069 min_level = min_level / 255; 1070 1071 if (min_level > 255) { 1072 drm_warn(display->drm, "Brightness min level > 255\n"); 1073 level = 255; 1074 } 1075 panel->vbt.backlight.min_brightness = min_level; 1076 1077 panel->vbt.backlight.brightness_precision_bits = 1078 backlight_data->brightness_precision_bits[panel_type]; 1079 } else { 1080 level = backlight_data->level[panel_type]; 1081 panel->vbt.backlight.min_brightness = entry->min_brightness; 1082 } 1083 1084 if (display->vbt.version >= 239) 1085 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 1086 DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100); 1087 else 1088 panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30; 1089 1090 drm_dbg_kms(display->drm, 1091 "VBT backlight PWM modulation frequency %u Hz, " 1092 "active %s, min brightness %u, level %u, controller %u\n", 1093 panel->vbt.backlight.pwm_freq_hz, 1094 panel->vbt.backlight.active_low_pwm ? "low" : "high", 1095 panel->vbt.backlight.min_brightness, 1096 level, 1097 panel->vbt.backlight.controller); 1098 } 1099 1100 static void 1101 parse_sdvo_lvds_data(struct intel_display *display, 1102 struct intel_panel *panel) 1103 { 1104 const struct bdb_sdvo_lvds_dtd *dtd; 1105 struct drm_display_mode *panel_fixed_mode; 1106 int index; 1107 1108 index = display->params.vbt_sdvo_panel_type; 1109 if (index == -2) { 1110 drm_dbg_kms(display->drm, 1111 "Ignore SDVO LVDS mode from BIOS VBT tables.\n"); 1112 return; 1113 } 1114 1115 if (index == -1) { 1116 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 1117 1118 sdvo_lvds_options = bdb_find_section(display, BDB_SDVO_LVDS_OPTIONS); 1119 if (!sdvo_lvds_options) 1120 return; 1121 1122 index = sdvo_lvds_options->panel_type; 1123 } 1124 1125 dtd = bdb_find_section(display, BDB_SDVO_LVDS_DTD); 1126 if (!dtd) 1127 return; 1128 1129 /* 1130 * This should not happen, as long as the panel_type 1131 * enumeration doesn't grow over 4 items. But if it does, it 1132 * could lead to hard-to-detect bugs, so better double-check 1133 * it here to be sure. 1134 */ 1135 if (index >= ARRAY_SIZE(dtd->dtd)) { 1136 drm_err(display->drm, 1137 "index %d is larger than dtd->dtd[4] array\n", 1138 index); 1139 return; 1140 } 1141 1142 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 1143 if (!panel_fixed_mode) 1144 return; 1145 1146 fill_detail_timing_data(display, panel_fixed_mode, &dtd->dtd[index]); 1147 1148 panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1149 1150 drm_dbg_kms(display->drm, 1151 "Found SDVO LVDS mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1152 DRM_MODE_ARG(panel_fixed_mode)); 1153 } 1154 1155 static int intel_bios_ssc_frequency(struct intel_display *display, 1156 bool alternate) 1157 { 1158 switch (DISPLAY_VER(display)) { 1159 case 2: 1160 return alternate ? 66667 : 48000; 1161 case 3: 1162 case 4: 1163 return alternate ? 100000 : 96000; 1164 default: 1165 return alternate ? 100000 : 120000; 1166 } 1167 } 1168 1169 static void 1170 parse_general_features(struct intel_display *display) 1171 { 1172 struct drm_i915_private *i915 = to_i915(display->drm); 1173 const struct bdb_general_features *general; 1174 1175 general = bdb_find_section(display, BDB_GENERAL_FEATURES); 1176 if (!general) 1177 return; 1178 1179 display->vbt.int_tv_support = general->int_tv_support; 1180 /* int_crt_support can't be trusted on earlier platforms */ 1181 if (display->vbt.version >= 155 && 1182 (HAS_DDI(display) || IS_VALLEYVIEW(i915))) 1183 display->vbt.int_crt_support = general->int_crt_support; 1184 display->vbt.lvds_use_ssc = general->enable_ssc; 1185 display->vbt.lvds_ssc_freq = 1186 intel_bios_ssc_frequency(display, general->ssc_freq); 1187 display->vbt.display_clock_mode = general->display_clock_mode; 1188 display->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1189 if (display->vbt.version >= 181) { 1190 display->vbt.orientation = general->rotate_180 ? 1191 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1192 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1193 } else { 1194 display->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1195 } 1196 1197 if (display->vbt.version >= 249 && general->afc_startup_config) { 1198 display->vbt.override_afc_startup = true; 1199 display->vbt.override_afc_startup_val = general->afc_startup_config == 1 ? 0 : 7; 1200 } 1201 1202 drm_dbg_kms(display->drm, 1203 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1204 display->vbt.int_tv_support, 1205 display->vbt.int_crt_support, 1206 display->vbt.lvds_use_ssc, 1207 display->vbt.lvds_ssc_freq, 1208 display->vbt.display_clock_mode, 1209 display->vbt.fdi_rx_polarity_inverted); 1210 } 1211 1212 static const struct child_device_config * 1213 child_device_ptr(const struct bdb_general_definitions *defs, int i) 1214 { 1215 return (const void *) &defs->devices[i * defs->child_dev_size]; 1216 } 1217 1218 static void 1219 parse_sdvo_device_mapping(struct intel_display *display) 1220 { 1221 const struct intel_bios_encoder_data *devdata; 1222 int count = 0; 1223 1224 /* 1225 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1226 * accurate and doesn't have to be, as long as it's not too strict. 1227 */ 1228 if (!IS_DISPLAY_VER(display, 3, 7)) { 1229 drm_dbg_kms(display->drm, "Skipping SDVO device mapping\n"); 1230 return; 1231 } 1232 1233 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 1234 const struct child_device_config *child = &devdata->child; 1235 struct sdvo_device_mapping *mapping; 1236 1237 if (child->target_addr != TARGET_ADDR1 && 1238 child->target_addr != TARGET_ADDR2) { 1239 /* 1240 * If the target address is neither 0x70 nor 0x72, 1241 * it is not a SDVO device. Skip it. 1242 */ 1243 continue; 1244 } 1245 if (child->dvo_port != DEVICE_PORT_DVOB && 1246 child->dvo_port != DEVICE_PORT_DVOC) { 1247 /* skip the incorrect SDVO port */ 1248 drm_dbg_kms(display->drm, 1249 "Incorrect SDVO port. Skip it\n"); 1250 continue; 1251 } 1252 drm_dbg_kms(display->drm, 1253 "the SDVO device with target addr %2x is found on" 1254 " %s port\n", 1255 child->target_addr, 1256 (child->dvo_port == DEVICE_PORT_DVOB) ? 1257 "SDVOB" : "SDVOC"); 1258 mapping = &display->vbt.sdvo_mappings[child->dvo_port - 1]; 1259 if (!mapping->initialized) { 1260 mapping->dvo_port = child->dvo_port; 1261 mapping->target_addr = child->target_addr; 1262 mapping->dvo_wiring = child->dvo_wiring; 1263 mapping->ddc_pin = child->ddc_pin; 1264 mapping->i2c_pin = child->i2c_pin; 1265 mapping->initialized = 1; 1266 drm_dbg_kms(display->drm, 1267 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1268 mapping->dvo_port, mapping->target_addr, 1269 mapping->dvo_wiring, mapping->ddc_pin, 1270 mapping->i2c_pin); 1271 } else { 1272 drm_dbg_kms(display->drm, 1273 "Maybe one SDVO port is shared by " 1274 "two SDVO device.\n"); 1275 } 1276 if (child->target2_addr) { 1277 /* Maybe this is a SDVO device with multiple inputs */ 1278 /* And the mapping info is not added */ 1279 drm_dbg_kms(display->drm, 1280 "there exists the target2_addr. Maybe this" 1281 " is a SDVO device with multiple inputs.\n"); 1282 } 1283 count++; 1284 } 1285 1286 if (!count) { 1287 /* No SDVO device info is found */ 1288 drm_dbg_kms(display->drm, 1289 "No SDVO device info is found in VBT\n"); 1290 } 1291 } 1292 1293 static void 1294 parse_driver_features(struct intel_display *display) 1295 { 1296 const struct bdb_driver_features *driver; 1297 1298 driver = bdb_find_section(display, BDB_DRIVER_FEATURES); 1299 if (!driver) 1300 return; 1301 1302 if (DISPLAY_VER(display) >= 5) { 1303 /* 1304 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1305 * to mean "eDP". The VBT spec doesn't agree with that 1306 * interpretation, but real world VBTs seem to. 1307 */ 1308 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1309 display->vbt.int_lvds_support = 0; 1310 } else { 1311 /* 1312 * FIXME it's not clear which BDB version has the LVDS config 1313 * bits defined. Revision history in the VBT spec says: 1314 * "0.92 | Add two definitions for VBT value of LVDS Active 1315 * Config (00b and 11b values defined) | 06/13/2005" 1316 * but does not the specify the BDB version. 1317 * 1318 * So far version 134 (on i945gm) is the oldest VBT observed 1319 * in the wild with the bits correctly populated. Version 1320 * 108 (on i85x) does not have the bits correctly populated. 1321 */ 1322 if (display->vbt.version >= 134 && 1323 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1324 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1325 display->vbt.int_lvds_support = 0; 1326 } 1327 } 1328 1329 static void 1330 parse_panel_driver_features(struct intel_display *display, 1331 struct intel_panel *panel) 1332 { 1333 const struct bdb_driver_features *driver; 1334 1335 driver = bdb_find_section(display, BDB_DRIVER_FEATURES); 1336 if (!driver) 1337 return; 1338 1339 if (display->vbt.version < 228) { 1340 drm_dbg_kms(display->drm, "DRRS State Enabled:%d\n", 1341 driver->drrs_enabled); 1342 /* 1343 * If DRRS is not supported, drrs_type has to be set to 0. 1344 * This is because, VBT is configured in such a way that 1345 * static DRRS is 0 and DRRS not supported is represented by 1346 * driver->drrs_enabled=false 1347 */ 1348 if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1349 /* 1350 * FIXME Should DMRRS perhaps be treated as seamless 1351 * but without the automatic downclocking? 1352 */ 1353 if (driver->dmrrs_enabled) 1354 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1355 else 1356 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1357 } 1358 1359 panel->vbt.psr.enable = driver->psr_enabled; 1360 } 1361 } 1362 1363 static void 1364 parse_power_conservation_features(struct intel_display *display, 1365 struct intel_panel *panel) 1366 { 1367 const struct bdb_lfp_power *power; 1368 u8 panel_type = panel->vbt.panel_type; 1369 1370 panel->vbt.vrr = true; /* matches Windows behaviour */ 1371 1372 if (display->vbt.version < 228) 1373 return; 1374 1375 power = bdb_find_section(display, BDB_LFP_POWER); 1376 if (!power) 1377 return; 1378 1379 panel->vbt.psr.enable = panel_bool(power->psr, panel_type); 1380 1381 /* 1382 * If DRRS is not supported, drrs_type has to be set to 0. 1383 * This is because, VBT is configured in such a way that 1384 * static DRRS is 0 and DRRS not supported is represented by 1385 * power->drrs & BIT(panel_type)=false 1386 */ 1387 if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) { 1388 /* 1389 * FIXME Should DMRRS perhaps be treated as seamless 1390 * but without the automatic downclocking? 1391 */ 1392 if (panel_bool(power->dmrrs, panel_type)) 1393 panel->vbt.drrs_type = DRRS_TYPE_STATIC; 1394 else 1395 panel->vbt.drrs_type = DRRS_TYPE_NONE; 1396 } 1397 1398 if (display->vbt.version >= 232) 1399 panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type); 1400 1401 if (display->vbt.version >= 233) 1402 panel->vbt.vrr = panel_bool(power->vrr_feature_enabled, 1403 panel_type); 1404 } 1405 1406 static void 1407 parse_edp(struct intel_display *display, 1408 struct intel_panel *panel) 1409 { 1410 const struct bdb_edp *edp; 1411 const struct edp_power_seq *edp_pps; 1412 const struct edp_fast_link_params *edp_link_params; 1413 int panel_type = panel->vbt.panel_type; 1414 1415 edp = bdb_find_section(display, BDB_EDP); 1416 if (!edp) 1417 return; 1418 1419 switch (panel_bits(edp->color_depth, panel_type, 2)) { 1420 case EDP_18BPP: 1421 panel->vbt.edp.bpp = 18; 1422 break; 1423 case EDP_24BPP: 1424 panel->vbt.edp.bpp = 24; 1425 break; 1426 case EDP_30BPP: 1427 panel->vbt.edp.bpp = 30; 1428 break; 1429 } 1430 1431 /* Get the eDP sequencing and link info */ 1432 edp_pps = &edp->power_seqs[panel_type]; 1433 edp_link_params = &edp->fast_link_params[panel_type]; 1434 1435 panel->vbt.edp.pps = *edp_pps; 1436 1437 if (display->vbt.version >= 224) { 1438 panel->vbt.edp.rate = 1439 edp->edp_fast_link_training_rate[panel_type] * 20; 1440 } else { 1441 switch (edp_link_params->rate) { 1442 case EDP_RATE_1_62: 1443 panel->vbt.edp.rate = 162000; 1444 break; 1445 case EDP_RATE_2_7: 1446 panel->vbt.edp.rate = 270000; 1447 break; 1448 case EDP_RATE_5_4: 1449 panel->vbt.edp.rate = 540000; 1450 break; 1451 default: 1452 drm_dbg_kms(display->drm, 1453 "VBT has unknown eDP link rate value %u\n", 1454 edp_link_params->rate); 1455 break; 1456 } 1457 } 1458 1459 switch (edp_link_params->lanes) { 1460 case EDP_LANE_1: 1461 panel->vbt.edp.lanes = 1; 1462 break; 1463 case EDP_LANE_2: 1464 panel->vbt.edp.lanes = 2; 1465 break; 1466 case EDP_LANE_4: 1467 panel->vbt.edp.lanes = 4; 1468 break; 1469 default: 1470 drm_dbg_kms(display->drm, 1471 "VBT has unknown eDP lane count value %u\n", 1472 edp_link_params->lanes); 1473 break; 1474 } 1475 1476 switch (edp_link_params->preemphasis) { 1477 case EDP_PREEMPHASIS_NONE: 1478 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1479 break; 1480 case EDP_PREEMPHASIS_3_5dB: 1481 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1482 break; 1483 case EDP_PREEMPHASIS_6dB: 1484 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1485 break; 1486 case EDP_PREEMPHASIS_9_5dB: 1487 panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1488 break; 1489 default: 1490 drm_dbg_kms(display->drm, 1491 "VBT has unknown eDP pre-emphasis value %u\n", 1492 edp_link_params->preemphasis); 1493 break; 1494 } 1495 1496 switch (edp_link_params->vswing) { 1497 case EDP_VSWING_0_4V: 1498 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1499 break; 1500 case EDP_VSWING_0_6V: 1501 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1502 break; 1503 case EDP_VSWING_0_8V: 1504 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1505 break; 1506 case EDP_VSWING_1_2V: 1507 panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1508 break; 1509 default: 1510 drm_dbg_kms(display->drm, 1511 "VBT has unknown eDP voltage swing value %u\n", 1512 edp_link_params->vswing); 1513 break; 1514 } 1515 1516 if (display->vbt.version >= 173) { 1517 u8 vswing; 1518 1519 /* Don't read from VBT if module parameter has valid value*/ 1520 if (display->params.edp_vswing) { 1521 panel->vbt.edp.low_vswing = 1522 display->params.edp_vswing == 1; 1523 } else { 1524 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1525 panel->vbt.edp.low_vswing = vswing == 0; 1526 } 1527 } 1528 1529 panel->vbt.edp.drrs_msa_timing_delay = 1530 panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2); 1531 1532 if (display->vbt.version >= 244) 1533 panel->vbt.edp.max_link_rate = 1534 edp->edp_max_port_link_rate[panel_type] * 20; 1535 1536 if (display->vbt.version >= 251) 1537 panel->vbt.edp.dsc_disable = 1538 panel_bool(edp->edp_dsc_disable, panel_type); 1539 } 1540 1541 static void 1542 parse_psr(struct intel_display *display, 1543 struct intel_panel *panel) 1544 { 1545 struct drm_i915_private *i915 = to_i915(display->drm); 1546 const struct bdb_psr *psr; 1547 const struct psr_table *psr_table; 1548 int panel_type = panel->vbt.panel_type; 1549 1550 psr = bdb_find_section(display, BDB_PSR); 1551 if (!psr) { 1552 drm_dbg_kms(display->drm, "No PSR BDB found.\n"); 1553 return; 1554 } 1555 1556 psr_table = &psr->psr_table[panel_type]; 1557 1558 panel->vbt.psr.full_link = psr_table->full_link; 1559 panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1560 1561 /* Allowed VBT values goes from 0 to 15 */ 1562 panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 1563 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 1564 1565 /* 1566 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1567 * Old decimal value is wake up time in multiples of 100 us. 1568 */ 1569 if (display->vbt.version >= 205 && 1570 (DISPLAY_VER(display) >= 9 && !IS_BROXTON(i915))) { 1571 switch (psr_table->tp1_wakeup_time) { 1572 case 0: 1573 panel->vbt.psr.tp1_wakeup_time_us = 500; 1574 break; 1575 case 1: 1576 panel->vbt.psr.tp1_wakeup_time_us = 100; 1577 break; 1578 case 3: 1579 panel->vbt.psr.tp1_wakeup_time_us = 0; 1580 break; 1581 default: 1582 drm_dbg_kms(display->drm, 1583 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1584 psr_table->tp1_wakeup_time); 1585 fallthrough; 1586 case 2: 1587 panel->vbt.psr.tp1_wakeup_time_us = 2500; 1588 break; 1589 } 1590 1591 switch (psr_table->tp2_tp3_wakeup_time) { 1592 case 0: 1593 panel->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1594 break; 1595 case 1: 1596 panel->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1597 break; 1598 case 3: 1599 panel->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1600 break; 1601 default: 1602 drm_dbg_kms(display->drm, 1603 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1604 psr_table->tp2_tp3_wakeup_time); 1605 fallthrough; 1606 case 2: 1607 panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1608 break; 1609 } 1610 } else { 1611 panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1612 panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1613 } 1614 1615 if (display->vbt.version >= 226) { 1616 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1617 1618 wakeup_time = panel_bits(wakeup_time, panel_type, 2); 1619 switch (wakeup_time) { 1620 case 0: 1621 wakeup_time = 500; 1622 break; 1623 case 1: 1624 wakeup_time = 100; 1625 break; 1626 case 3: 1627 wakeup_time = 50; 1628 break; 1629 default: 1630 case 2: 1631 wakeup_time = 2500; 1632 break; 1633 } 1634 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1635 } else { 1636 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1637 panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us; 1638 } 1639 } 1640 1641 static void parse_dsi_backlight_ports(struct intel_display *display, 1642 struct intel_panel *panel, 1643 enum port port) 1644 { 1645 enum port port_bc = DISPLAY_VER(display) >= 11 ? PORT_B : PORT_C; 1646 1647 if (!panel->vbt.dsi.config->dual_link || display->vbt.version < 197) { 1648 panel->vbt.dsi.bl_ports = BIT(port); 1649 if (panel->vbt.dsi.config->cabc_supported) 1650 panel->vbt.dsi.cabc_ports = BIT(port); 1651 1652 return; 1653 } 1654 1655 switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) { 1656 case DL_DCS_PORT_A: 1657 panel->vbt.dsi.bl_ports = BIT(PORT_A); 1658 break; 1659 case DL_DCS_PORT_C: 1660 panel->vbt.dsi.bl_ports = BIT(port_bc); 1661 break; 1662 default: 1663 case DL_DCS_PORT_A_AND_C: 1664 panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc); 1665 break; 1666 } 1667 1668 if (!panel->vbt.dsi.config->cabc_supported) 1669 return; 1670 1671 switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) { 1672 case DL_DCS_PORT_A: 1673 panel->vbt.dsi.cabc_ports = BIT(PORT_A); 1674 break; 1675 case DL_DCS_PORT_C: 1676 panel->vbt.dsi.cabc_ports = BIT(port_bc); 1677 break; 1678 default: 1679 case DL_DCS_PORT_A_AND_C: 1680 panel->vbt.dsi.cabc_ports = 1681 BIT(PORT_A) | BIT(port_bc); 1682 break; 1683 } 1684 } 1685 1686 static void 1687 parse_mipi_config(struct intel_display *display, 1688 struct intel_panel *panel) 1689 { 1690 const struct bdb_mipi_config *start; 1691 const struct mipi_config *config; 1692 const struct mipi_pps_data *pps; 1693 int panel_type = panel->vbt.panel_type; 1694 enum port port; 1695 1696 /* parse MIPI blocks only if LFP type is MIPI */ 1697 if (!intel_bios_is_dsi_present(display, &port)) 1698 return; 1699 1700 /* Initialize this to undefined indicating no generic MIPI support */ 1701 panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1702 1703 start = bdb_find_section(display, BDB_MIPI_CONFIG); 1704 if (!start) { 1705 drm_dbg_kms(display->drm, "No MIPI config BDB found"); 1706 return; 1707 } 1708 1709 drm_dbg_kms(display->drm, "Found MIPI Config block, panel index = %d\n", 1710 panel_type); 1711 1712 /* 1713 * get hold of the correct configuration block and pps data as per 1714 * the panel_type as index 1715 */ 1716 config = &start->config[panel_type]; 1717 pps = &start->pps[panel_type]; 1718 1719 /* store as of now full data. Trim when we realise all is not needed */ 1720 panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1721 if (!panel->vbt.dsi.config) 1722 return; 1723 1724 panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1725 if (!panel->vbt.dsi.pps) { 1726 kfree(panel->vbt.dsi.config); 1727 return; 1728 } 1729 1730 parse_dsi_backlight_ports(display, panel, port); 1731 1732 /* FIXME is the 90 vs. 270 correct? */ 1733 switch (config->rotation) { 1734 case ENABLE_ROTATION_0: 1735 /* 1736 * Most (all?) VBTs claim 0 degrees despite having 1737 * an upside down panel, thus we do not trust this. 1738 */ 1739 panel->vbt.dsi.orientation = 1740 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1741 break; 1742 case ENABLE_ROTATION_90: 1743 panel->vbt.dsi.orientation = 1744 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1745 break; 1746 case ENABLE_ROTATION_180: 1747 panel->vbt.dsi.orientation = 1748 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1749 break; 1750 case ENABLE_ROTATION_270: 1751 panel->vbt.dsi.orientation = 1752 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1753 break; 1754 } 1755 1756 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1757 panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1758 } 1759 1760 /* Find the sequence block and size for the given panel. */ 1761 static const u8 * 1762 find_panel_sequence_block(struct intel_display *display, 1763 const struct bdb_mipi_sequence *sequence, 1764 u16 panel_id, u32 *seq_size) 1765 { 1766 u32 total = get_blocksize(sequence); 1767 const u8 *data = &sequence->data[0]; 1768 u8 current_id; 1769 u32 current_size; 1770 int header_size = sequence->version >= 3 ? 5 : 3; 1771 int index = 0; 1772 int i; 1773 1774 /* skip new block size */ 1775 if (sequence->version >= 3) 1776 data += 4; 1777 1778 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1779 if (index + header_size > total) { 1780 drm_err(display->drm, 1781 "Invalid sequence block (header)\n"); 1782 return NULL; 1783 } 1784 1785 current_id = *(data + index); 1786 if (sequence->version >= 3) 1787 current_size = *((const u32 *)(data + index + 1)); 1788 else 1789 current_size = *((const u16 *)(data + index + 1)); 1790 1791 index += header_size; 1792 1793 if (index + current_size > total) { 1794 drm_err(display->drm, "Invalid sequence block\n"); 1795 return NULL; 1796 } 1797 1798 if (current_id == panel_id) { 1799 *seq_size = current_size; 1800 return data + index; 1801 } 1802 1803 index += current_size; 1804 } 1805 1806 drm_err(display->drm, 1807 "Sequence block detected but no valid configuration\n"); 1808 1809 return NULL; 1810 } 1811 1812 static int goto_next_sequence(struct intel_display *display, 1813 const u8 *data, int index, int total) 1814 { 1815 u16 len; 1816 1817 /* Skip Sequence Byte. */ 1818 for (index = index + 1; index < total; index += len) { 1819 u8 operation_byte = *(data + index); 1820 index++; 1821 1822 switch (operation_byte) { 1823 case MIPI_SEQ_ELEM_END: 1824 return index; 1825 case MIPI_SEQ_ELEM_SEND_PKT: 1826 if (index + 4 > total) 1827 return 0; 1828 1829 len = *((const u16 *)(data + index + 2)) + 4; 1830 break; 1831 case MIPI_SEQ_ELEM_DELAY: 1832 len = 4; 1833 break; 1834 case MIPI_SEQ_ELEM_GPIO: 1835 len = 2; 1836 break; 1837 case MIPI_SEQ_ELEM_I2C: 1838 if (index + 7 > total) 1839 return 0; 1840 len = *(data + index + 6) + 7; 1841 break; 1842 default: 1843 drm_err(display->drm, "Unknown operation byte\n"); 1844 return 0; 1845 } 1846 } 1847 1848 return 0; 1849 } 1850 1851 static int goto_next_sequence_v3(struct intel_display *display, 1852 const u8 *data, int index, int total) 1853 { 1854 int seq_end; 1855 u16 len; 1856 u32 size_of_sequence; 1857 1858 /* 1859 * Could skip sequence based on Size of Sequence alone, but also do some 1860 * checking on the structure. 1861 */ 1862 if (total < 5) { 1863 drm_err(display->drm, "Too small sequence size\n"); 1864 return 0; 1865 } 1866 1867 /* Skip Sequence Byte. */ 1868 index++; 1869 1870 /* 1871 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1872 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1873 * byte. 1874 */ 1875 size_of_sequence = *((const u32 *)(data + index)); 1876 index += 4; 1877 1878 seq_end = index + size_of_sequence; 1879 if (seq_end > total) { 1880 drm_err(display->drm, "Invalid sequence size\n"); 1881 return 0; 1882 } 1883 1884 for (; index < total; index += len) { 1885 u8 operation_byte = *(data + index); 1886 index++; 1887 1888 if (operation_byte == MIPI_SEQ_ELEM_END) { 1889 if (index != seq_end) { 1890 drm_err(display->drm, 1891 "Invalid element structure\n"); 1892 return 0; 1893 } 1894 return index; 1895 } 1896 1897 len = *(data + index); 1898 index++; 1899 1900 /* 1901 * FIXME: Would be nice to check elements like for v1/v2 in 1902 * goto_next_sequence() above. 1903 */ 1904 switch (operation_byte) { 1905 case MIPI_SEQ_ELEM_SEND_PKT: 1906 case MIPI_SEQ_ELEM_DELAY: 1907 case MIPI_SEQ_ELEM_GPIO: 1908 case MIPI_SEQ_ELEM_I2C: 1909 case MIPI_SEQ_ELEM_SPI: 1910 case MIPI_SEQ_ELEM_PMIC: 1911 break; 1912 default: 1913 drm_err(display->drm, "Unknown operation byte %u\n", 1914 operation_byte); 1915 break; 1916 } 1917 } 1918 1919 return 0; 1920 } 1921 1922 /* 1923 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1924 * skip all delay + gpio operands and stop at the first DSI packet op. 1925 */ 1926 static int get_init_otp_deassert_fragment_len(struct intel_display *display, 1927 struct intel_panel *panel) 1928 { 1929 const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1930 int index, len; 1931 1932 if (drm_WARN_ON(display->drm, 1933 !data || panel->vbt.dsi.seq_version != 1)) 1934 return 0; 1935 1936 /* index = 1 to skip sequence byte */ 1937 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1938 switch (data[index]) { 1939 case MIPI_SEQ_ELEM_SEND_PKT: 1940 return index == 1 ? 0 : index; 1941 case MIPI_SEQ_ELEM_DELAY: 1942 len = 5; /* 1 byte for operand + uint32 */ 1943 break; 1944 case MIPI_SEQ_ELEM_GPIO: 1945 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1946 break; 1947 default: 1948 return 0; 1949 } 1950 } 1951 1952 return 0; 1953 } 1954 1955 /* 1956 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1957 * The deassert must be done before calling intel_dsi_device_ready, so for 1958 * these devices we split the init OTP sequence into a deassert sequence and 1959 * the actual init OTP part. 1960 */ 1961 static void vlv_fixup_mipi_sequences(struct intel_display *display, 1962 struct intel_panel *panel) 1963 { 1964 u8 *init_otp; 1965 int len; 1966 1967 /* Limit this to v1 vid-mode sequences */ 1968 if (panel->vbt.dsi.config->is_cmd_mode || 1969 panel->vbt.dsi.seq_version != 1) 1970 return; 1971 1972 /* Only do this if there are otp and assert seqs and no deassert seq */ 1973 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1974 !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1975 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1976 return; 1977 1978 /* The deassert-sequence ends at the first DSI packet */ 1979 len = get_init_otp_deassert_fragment_len(display, panel); 1980 if (!len) 1981 return; 1982 1983 drm_dbg_kms(display->drm, 1984 "Using init OTP fragment to deassert reset\n"); 1985 1986 /* Copy the fragment, update seq byte and terminate it */ 1987 init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1988 panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1989 if (!panel->vbt.dsi.deassert_seq) 1990 return; 1991 panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1992 panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1993 /* Use the copy for deassert */ 1994 panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1995 panel->vbt.dsi.deassert_seq; 1996 /* Replace the last byte of the fragment with init OTP seq byte */ 1997 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1998 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1999 panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 2000 } 2001 2002 /* 2003 * Some machines (eg. Lenovo 82TQ) appear to have broken 2004 * VBT sequences: 2005 * - INIT_OTP is not present at all 2006 * - what should be in INIT_OTP is in DISPLAY_ON 2007 * - what should be in DISPLAY_ON is in BACKLIGHT_ON 2008 * (along with the actual backlight stuff) 2009 * 2010 * To make those work we simply swap DISPLAY_ON and INIT_OTP. 2011 * 2012 * TODO: Do we need to limit this to specific machines, 2013 * or examine the contents of the sequences to 2014 * avoid false positives? 2015 */ 2016 static void icl_fixup_mipi_sequences(struct intel_display *display, 2017 struct intel_panel *panel) 2018 { 2019 if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] && 2020 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) { 2021 drm_dbg_kms(display->drm, 2022 "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n"); 2023 2024 swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP], 2025 panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]); 2026 } 2027 } 2028 2029 static void fixup_mipi_sequences(struct intel_display *display, 2030 struct intel_panel *panel) 2031 { 2032 struct drm_i915_private *i915 = to_i915(display->drm); 2033 2034 if (DISPLAY_VER(display) >= 11) 2035 icl_fixup_mipi_sequences(display, panel); 2036 else if (IS_VALLEYVIEW(i915)) 2037 vlv_fixup_mipi_sequences(display, panel); 2038 } 2039 2040 static void 2041 parse_mipi_sequence(struct intel_display *display, 2042 struct intel_panel *panel) 2043 { 2044 int panel_type = panel->vbt.panel_type; 2045 const struct bdb_mipi_sequence *sequence; 2046 const u8 *seq_data; 2047 u32 seq_size; 2048 u8 *data; 2049 int index = 0; 2050 2051 /* Only our generic panel driver uses the sequence block. */ 2052 if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 2053 return; 2054 2055 sequence = bdb_find_section(display, BDB_MIPI_SEQUENCE); 2056 if (!sequence) { 2057 drm_dbg_kms(display->drm, 2058 "No MIPI Sequence found, parsing complete\n"); 2059 return; 2060 } 2061 2062 /* Fail gracefully for forward incompatible sequence block. */ 2063 if (sequence->version >= 4) { 2064 drm_err(display->drm, 2065 "Unable to parse MIPI Sequence Block v%u\n", 2066 sequence->version); 2067 return; 2068 } 2069 2070 drm_dbg_kms(display->drm, "Found MIPI sequence block v%u\n", 2071 sequence->version); 2072 2073 seq_data = find_panel_sequence_block(display, sequence, panel_type, &seq_size); 2074 if (!seq_data) 2075 return; 2076 2077 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 2078 if (!data) 2079 return; 2080 2081 /* Parse the sequences, store pointers to each sequence. */ 2082 for (;;) { 2083 u8 seq_id = *(data + index); 2084 if (seq_id == MIPI_SEQ_END) 2085 break; 2086 2087 if (seq_id >= MIPI_SEQ_MAX) { 2088 drm_err(display->drm, "Unknown sequence %u\n", 2089 seq_id); 2090 goto err; 2091 } 2092 2093 /* Log about presence of sequences we won't run. */ 2094 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 2095 drm_dbg_kms(display->drm, 2096 "Unsupported sequence %u\n", seq_id); 2097 2098 panel->vbt.dsi.sequence[seq_id] = data + index; 2099 2100 if (sequence->version >= 3) 2101 index = goto_next_sequence_v3(display, data, index, seq_size); 2102 else 2103 index = goto_next_sequence(display, data, index, seq_size); 2104 if (!index) { 2105 drm_err(display->drm, "Invalid sequence %u\n", 2106 seq_id); 2107 goto err; 2108 } 2109 } 2110 2111 panel->vbt.dsi.data = data; 2112 panel->vbt.dsi.size = seq_size; 2113 panel->vbt.dsi.seq_version = sequence->version; 2114 2115 fixup_mipi_sequences(display, panel); 2116 2117 drm_dbg_kms(display->drm, "MIPI related VBT parsing complete\n"); 2118 return; 2119 2120 err: 2121 kfree(data); 2122 memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence)); 2123 } 2124 2125 static void 2126 parse_compression_parameters(struct intel_display *display) 2127 { 2128 const struct bdb_compression_parameters *params; 2129 struct intel_bios_encoder_data *devdata; 2130 u16 block_size; 2131 int index; 2132 2133 if (display->vbt.version < 198) 2134 return; 2135 2136 params = bdb_find_section(display, BDB_COMPRESSION_PARAMETERS); 2137 if (params) { 2138 /* Sanity checks */ 2139 if (params->entry_size != sizeof(params->data[0])) { 2140 drm_dbg_kms(display->drm, 2141 "VBT: unsupported compression param entry size\n"); 2142 return; 2143 } 2144 2145 block_size = get_blocksize(params); 2146 if (block_size < sizeof(*params)) { 2147 drm_dbg_kms(display->drm, 2148 "VBT: expected 16 compression param entries\n"); 2149 return; 2150 } 2151 } 2152 2153 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 2154 const struct child_device_config *child = &devdata->child; 2155 2156 if (!child->compression_enable) 2157 continue; 2158 2159 if (!params) { 2160 drm_dbg_kms(display->drm, 2161 "VBT: compression params not available\n"); 2162 continue; 2163 } 2164 2165 if (child->compression_method_cps) { 2166 drm_dbg_kms(display->drm, 2167 "VBT: CPS compression not supported\n"); 2168 continue; 2169 } 2170 2171 index = child->compression_structure_index; 2172 2173 devdata->dsc = kmemdup(¶ms->data[index], 2174 sizeof(*devdata->dsc), GFP_KERNEL); 2175 } 2176 } 2177 2178 static u8 translate_iboost(struct intel_display *display, u8 val) 2179 { 2180 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 2181 2182 if (val >= ARRAY_SIZE(mapping)) { 2183 drm_dbg_kms(display->drm, 2184 "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 2185 return 0; 2186 } 2187 return mapping[val]; 2188 } 2189 2190 static const u8 cnp_ddc_pin_map[] = { 2191 [0] = 0, /* N/A */ 2192 [GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B, 2193 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C, 2194 [GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */ 2195 [GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */ 2196 }; 2197 2198 static const u8 icp_ddc_pin_map[] = { 2199 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2200 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2201 [GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C, 2202 [GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1, 2203 [GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2, 2204 [GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3, 2205 [GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4, 2206 [GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5, 2207 [GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6, 2208 }; 2209 2210 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 2211 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2212 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2213 [GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D, 2214 [GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E, 2215 }; 2216 2217 static const u8 adls_ddc_pin_map[] = { 2218 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2219 [GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1, 2220 [GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2, 2221 [GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3, 2222 [GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4, 2223 }; 2224 2225 static const u8 gen9bc_tgp_ddc_pin_map[] = { 2226 [GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B, 2227 [GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C, 2228 [GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D, 2229 }; 2230 2231 static const u8 adlp_ddc_pin_map[] = { 2232 [GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A, 2233 [GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B, 2234 [GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1, 2235 [GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2, 2236 [GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3, 2237 [GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4, 2238 }; 2239 2240 static u8 map_ddc_pin(struct intel_display *display, u8 vbt_pin) 2241 { 2242 struct drm_i915_private *i915 = to_i915(display->drm); 2243 const u8 *ddc_pin_map; 2244 int i, n_entries; 2245 2246 if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) { 2247 ddc_pin_map = adlp_ddc_pin_map; 2248 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2249 } else if (IS_ALDERLAKE_S(i915)) { 2250 ddc_pin_map = adls_ddc_pin_map; 2251 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2252 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 2253 return vbt_pin; 2254 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 2255 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2256 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2257 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(display) == 9) { 2258 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2259 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2260 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 2261 ddc_pin_map = icp_ddc_pin_map; 2262 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2263 } else if (HAS_PCH_CNP(i915)) { 2264 ddc_pin_map = cnp_ddc_pin_map; 2265 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2266 } else { 2267 /* Assuming direct map */ 2268 return vbt_pin; 2269 } 2270 2271 for (i = 0; i < n_entries; i++) { 2272 if (ddc_pin_map[i] == vbt_pin) 2273 return i; 2274 } 2275 2276 drm_dbg_kms(display->drm, 2277 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2278 vbt_pin); 2279 return 0; 2280 } 2281 2282 static u8 dvo_port_type(u8 dvo_port) 2283 { 2284 switch (dvo_port) { 2285 case DVO_PORT_HDMIA: 2286 case DVO_PORT_HDMIB: 2287 case DVO_PORT_HDMIC: 2288 case DVO_PORT_HDMID: 2289 case DVO_PORT_HDMIE: 2290 case DVO_PORT_HDMIF: 2291 case DVO_PORT_HDMIG: 2292 case DVO_PORT_HDMIH: 2293 case DVO_PORT_HDMII: 2294 return DVO_PORT_HDMIA; 2295 case DVO_PORT_DPA: 2296 case DVO_PORT_DPB: 2297 case DVO_PORT_DPC: 2298 case DVO_PORT_DPD: 2299 case DVO_PORT_DPE: 2300 case DVO_PORT_DPF: 2301 case DVO_PORT_DPG: 2302 case DVO_PORT_DPH: 2303 case DVO_PORT_DPI: 2304 return DVO_PORT_DPA; 2305 case DVO_PORT_MIPIA: 2306 case DVO_PORT_MIPIB: 2307 case DVO_PORT_MIPIC: 2308 case DVO_PORT_MIPID: 2309 return DVO_PORT_MIPIA; 2310 default: 2311 return dvo_port; 2312 } 2313 } 2314 2315 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2316 const int port_mapping[][3], u8 dvo_port) 2317 { 2318 enum port port; 2319 int i; 2320 2321 for (port = PORT_A; port < n_ports; port++) { 2322 for (i = 0; i < n_dvo; i++) { 2323 if (port_mapping[port][i] == -1) 2324 break; 2325 2326 if (dvo_port == port_mapping[port][i]) 2327 return port; 2328 } 2329 } 2330 2331 return PORT_NONE; 2332 } 2333 2334 static enum port dvo_port_to_port(struct intel_display *display, 2335 u8 dvo_port) 2336 { 2337 struct drm_i915_private *i915 = to_i915(display->drm); 2338 /* 2339 * Each DDI port can have more than one value on the "DVO Port" field, 2340 * so look for all the possible values for each port. 2341 */ 2342 static const int port_mapping[][3] = { 2343 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2344 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2345 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2346 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2347 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2348 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2349 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2350 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2351 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2352 }; 2353 /* 2354 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2355 * map to DDI A,B,TC1,TC2 respectively. 2356 */ 2357 static const int rkl_port_mapping[][3] = { 2358 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2359 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2360 [PORT_C] = { -1 }, 2361 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2362 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2363 }; 2364 /* 2365 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2366 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2367 */ 2368 static const int adls_port_mapping[][3] = { 2369 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2370 [PORT_B] = { -1 }, 2371 [PORT_C] = { -1 }, 2372 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2373 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2374 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2375 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2376 }; 2377 static const int xelpd_port_mapping[][3] = { 2378 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2379 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2380 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2381 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2382 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2383 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2384 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2385 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2386 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2387 }; 2388 2389 if (DISPLAY_VER(display) >= 13) 2390 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2391 ARRAY_SIZE(xelpd_port_mapping[0]), 2392 xelpd_port_mapping, 2393 dvo_port); 2394 else if (IS_ALDERLAKE_S(i915)) 2395 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2396 ARRAY_SIZE(adls_port_mapping[0]), 2397 adls_port_mapping, 2398 dvo_port); 2399 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2400 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2401 ARRAY_SIZE(rkl_port_mapping[0]), 2402 rkl_port_mapping, 2403 dvo_port); 2404 else 2405 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2406 ARRAY_SIZE(port_mapping[0]), 2407 port_mapping, 2408 dvo_port); 2409 } 2410 2411 static enum port 2412 dsi_dvo_port_to_port(struct intel_display *display, u8 dvo_port) 2413 { 2414 switch (dvo_port) { 2415 case DVO_PORT_MIPIA: 2416 return PORT_A; 2417 case DVO_PORT_MIPIC: 2418 if (DISPLAY_VER(display) >= 11) 2419 return PORT_B; 2420 else 2421 return PORT_C; 2422 default: 2423 return PORT_NONE; 2424 } 2425 } 2426 2427 enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata) 2428 { 2429 struct intel_display *display = devdata->display; 2430 const struct child_device_config *child = &devdata->child; 2431 enum port port; 2432 2433 port = dvo_port_to_port(display, child->dvo_port); 2434 if (port == PORT_NONE && DISPLAY_VER(display) >= 11) 2435 port = dsi_dvo_port_to_port(display, child->dvo_port); 2436 2437 return port; 2438 } 2439 2440 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2441 { 2442 switch (vbt_max_link_rate) { 2443 default: 2444 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2445 return 0; 2446 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2447 return 2000000; 2448 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2449 return 1350000; 2450 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2451 return 1000000; 2452 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2453 return 810000; 2454 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2455 return 540000; 2456 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2457 return 270000; 2458 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2459 return 162000; 2460 } 2461 } 2462 2463 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2464 { 2465 switch (vbt_max_link_rate) { 2466 default: 2467 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2468 return 810000; 2469 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2470 return 540000; 2471 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2472 return 270000; 2473 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2474 return 162000; 2475 } 2476 } 2477 2478 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2479 { 2480 if (!devdata || devdata->display->vbt.version < 216) 2481 return 0; 2482 2483 if (devdata->display->vbt.version >= 230) 2484 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2485 else 2486 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2487 } 2488 2489 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata) 2490 { 2491 if (!devdata || devdata->display->vbt.version < 244) 2492 return 0; 2493 2494 return devdata->child.dp_max_lane_count + 1; 2495 } 2496 2497 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2498 enum port port) 2499 { 2500 struct intel_display *display = devdata->display; 2501 bool is_hdmi; 2502 2503 if (port != PORT_A || DISPLAY_VER(display) >= 12) 2504 return; 2505 2506 if (!intel_bios_encoder_supports_dvi(devdata)) 2507 return; 2508 2509 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2510 2511 drm_dbg_kms(display->drm, "VBT claims port A supports DVI%s, ignoring\n", 2512 is_hdmi ? "/HDMI" : ""); 2513 2514 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2515 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2516 } 2517 2518 static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata, 2519 enum port port) 2520 { 2521 struct intel_display *display = devdata->display; 2522 struct drm_i915_private *i915 = to_i915(display->drm); 2523 2524 if (!intel_bios_encoder_supports_dvi(devdata)) 2525 return; 2526 2527 /* 2528 * Some BDW machines (eg. HP Pavilion 15-ab) shipped 2529 * with a HSW VBT where the level shifter value goes 2530 * up to 11, whereas the BDW max is 9. 2531 */ 2532 if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) { 2533 drm_dbg_kms(display->drm, 2534 "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n", 2535 port_name(port), devdata->child.hdmi_level_shifter_value, 9); 2536 2537 devdata->child.hdmi_level_shifter_value = 9; 2538 } 2539 } 2540 2541 static bool 2542 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2543 { 2544 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2545 } 2546 2547 bool 2548 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2549 { 2550 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2551 } 2552 2553 bool 2554 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2555 { 2556 return intel_bios_encoder_supports_dvi(devdata) && 2557 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2558 } 2559 2560 bool 2561 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2562 { 2563 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2564 } 2565 2566 bool 2567 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2568 { 2569 return intel_bios_encoder_supports_dp(devdata) && 2570 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2571 } 2572 2573 bool 2574 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata) 2575 { 2576 return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT; 2577 } 2578 2579 bool 2580 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata) 2581 { 2582 return devdata && HAS_LSPCON(devdata->display) && devdata->child.lspcon; 2583 } 2584 2585 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 2586 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2587 { 2588 if (!devdata || devdata->display->vbt.version < 158 || 2589 DISPLAY_VER(devdata->display) >= 14) 2590 return -1; 2591 2592 return devdata->child.hdmi_level_shifter_value; 2593 } 2594 2595 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2596 { 2597 if (!devdata || devdata->display->vbt.version < 204) 2598 return 0; 2599 2600 switch (devdata->child.hdmi_max_data_rate) { 2601 default: 2602 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2603 fallthrough; 2604 case HDMI_MAX_DATA_RATE_PLATFORM: 2605 return 0; 2606 case HDMI_MAX_DATA_RATE_594: 2607 return 594000; 2608 case HDMI_MAX_DATA_RATE_340: 2609 return 340000; 2610 case HDMI_MAX_DATA_RATE_300: 2611 return 300000; 2612 case HDMI_MAX_DATA_RATE_297: 2613 return 297000; 2614 case HDMI_MAX_DATA_RATE_165: 2615 return 165000; 2616 } 2617 } 2618 2619 static bool is_port_valid(struct intel_display *display, enum port port) 2620 { 2621 struct drm_i915_private *i915 = to_i915(display->drm); 2622 /* 2623 * On some ICL SKUs port F is not present, but broken VBTs mark 2624 * the port as present. Only try to initialize port F for the 2625 * SKUs that may actually have it. 2626 */ 2627 if (port == PORT_F && IS_ICELAKE(i915)) 2628 return IS_ICL_WITH_PORT_F(i915); 2629 2630 return true; 2631 } 2632 2633 static void print_ddi_port(const struct intel_bios_encoder_data *devdata) 2634 { 2635 struct intel_display *display = devdata->display; 2636 const struct child_device_config *child = &devdata->child; 2637 bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt; 2638 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2639 enum port port; 2640 2641 port = intel_bios_encoder_port(devdata); 2642 if (port == PORT_NONE) 2643 return; 2644 2645 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2646 is_dp = intel_bios_encoder_supports_dp(devdata); 2647 is_crt = intel_bios_encoder_supports_crt(devdata); 2648 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2649 is_edp = intel_bios_encoder_supports_edp(devdata); 2650 is_dsi = intel_bios_encoder_supports_dsi(devdata); 2651 2652 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2653 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2654 2655 drm_dbg_kms(display->drm, 2656 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2657 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi, 2658 intel_bios_encoder_supports_dp_dual_mode(devdata), 2659 intel_bios_encoder_is_lspcon(devdata), 2660 supports_typec_usb, supports_tbt, 2661 devdata->dsc != NULL); 2662 2663 hdmi_level_shift = intel_bios_hdmi_level_shift(devdata); 2664 if (hdmi_level_shift >= 0) { 2665 drm_dbg_kms(display->drm, 2666 "Port %c VBT HDMI level shift: %d\n", 2667 port_name(port), hdmi_level_shift); 2668 } 2669 2670 max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata); 2671 if (max_tmds_clock) 2672 drm_dbg_kms(display->drm, 2673 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2674 port_name(port), max_tmds_clock); 2675 2676 /* I_boost config for SKL and above */ 2677 dp_boost_level = intel_bios_dp_boost_level(devdata); 2678 if (dp_boost_level) 2679 drm_dbg_kms(display->drm, 2680 "Port %c VBT (e)DP boost level: %d\n", 2681 port_name(port), dp_boost_level); 2682 2683 hdmi_boost_level = intel_bios_hdmi_boost_level(devdata); 2684 if (hdmi_boost_level) 2685 drm_dbg_kms(display->drm, 2686 "Port %c VBT HDMI boost level: %d\n", 2687 port_name(port), hdmi_boost_level); 2688 2689 dp_max_link_rate = intel_bios_dp_max_link_rate(devdata); 2690 if (dp_max_link_rate) 2691 drm_dbg_kms(display->drm, 2692 "Port %c VBT DP max link rate: %d\n", 2693 port_name(port), dp_max_link_rate); 2694 2695 /* 2696 * FIXME need to implement support for VBT 2697 * vswing/preemph tables should this ever trigger. 2698 */ 2699 drm_WARN(display->drm, child->use_vbt_vswing, 2700 "Port %c asks to use VBT vswing/preemph tables\n", 2701 port_name(port)); 2702 } 2703 2704 static void parse_ddi_port(struct intel_bios_encoder_data *devdata) 2705 { 2706 struct intel_display *display = devdata->display; 2707 enum port port; 2708 2709 port = intel_bios_encoder_port(devdata); 2710 if (port == PORT_NONE) 2711 return; 2712 2713 if (!is_port_valid(display, port)) { 2714 drm_dbg_kms(display->drm, 2715 "VBT reports port %c as supported, but that can't be true: skipping\n", 2716 port_name(port)); 2717 return; 2718 } 2719 2720 sanitize_device_type(devdata, port); 2721 sanitize_hdmi_level_shift(devdata, port); 2722 } 2723 2724 static bool has_ddi_port_info(struct intel_display *display) 2725 { 2726 struct drm_i915_private *i915 = to_i915(display->drm); 2727 2728 return DISPLAY_VER(display) >= 5 || IS_G4X(i915); 2729 } 2730 2731 static void parse_ddi_ports(struct intel_display *display) 2732 { 2733 struct intel_bios_encoder_data *devdata; 2734 2735 if (!has_ddi_port_info(display)) 2736 return; 2737 2738 list_for_each_entry(devdata, &display->vbt.display_devices, node) 2739 parse_ddi_port(devdata); 2740 2741 list_for_each_entry(devdata, &display->vbt.display_devices, node) 2742 print_ddi_port(devdata); 2743 } 2744 2745 static int child_device_expected_size(u16 version) 2746 { 2747 BUILD_BUG_ON(sizeof(struct child_device_config) < 40); 2748 2749 if (version > 256) 2750 return -ENOENT; 2751 else if (version >= 256) 2752 return 40; 2753 else if (version >= 216) 2754 return 39; 2755 else if (version >= 196) 2756 return 38; 2757 else if (version >= 195) 2758 return 37; 2759 else if (version >= 111) 2760 return LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2761 else if (version >= 106) 2762 return 27; 2763 else 2764 return 22; 2765 } 2766 2767 static bool child_device_size_valid(struct intel_display *display, int size) 2768 { 2769 int expected_size; 2770 2771 expected_size = child_device_expected_size(display->vbt.version); 2772 if (expected_size < 0) { 2773 expected_size = sizeof(struct child_device_config); 2774 drm_dbg_kms(display->drm, 2775 "Expected child device config size for VBT version %u not known; assuming %d\n", 2776 display->vbt.version, expected_size); 2777 } 2778 2779 /* Flag an error for unexpected size, but continue anyway. */ 2780 if (size != expected_size) 2781 drm_err(display->drm, 2782 "Unexpected child device config size %d (expected %d for VBT version %u)\n", 2783 size, expected_size, display->vbt.version); 2784 2785 /* The legacy sized child device config is the minimum we need. */ 2786 if (size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2787 drm_dbg_kms(display->drm, 2788 "Child device config size %d is too small.\n", 2789 size); 2790 return false; 2791 } 2792 2793 return true; 2794 } 2795 2796 static void 2797 parse_general_definitions(struct intel_display *display) 2798 { 2799 struct drm_i915_private *i915 = to_i915(display->drm); 2800 const struct bdb_general_definitions *defs; 2801 struct intel_bios_encoder_data *devdata; 2802 const struct child_device_config *child; 2803 int i, child_device_num; 2804 u16 block_size; 2805 int bus_pin; 2806 2807 defs = bdb_find_section(display, BDB_GENERAL_DEFINITIONS); 2808 if (!defs) { 2809 drm_dbg_kms(display->drm, 2810 "No general definition block is found, no devices defined.\n"); 2811 return; 2812 } 2813 2814 block_size = get_blocksize(defs); 2815 if (block_size < sizeof(*defs)) { 2816 drm_dbg_kms(display->drm, 2817 "General definitions block too small (%u)\n", 2818 block_size); 2819 return; 2820 } 2821 2822 bus_pin = defs->crt_ddc_gmbus_pin; 2823 drm_dbg_kms(display->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2824 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2825 display->vbt.crt_ddc_pin = bus_pin; 2826 2827 if (!child_device_size_valid(display, defs->child_dev_size)) 2828 return; 2829 2830 /* get the number of child device */ 2831 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2832 2833 for (i = 0; i < child_device_num; i++) { 2834 child = child_device_ptr(defs, i); 2835 if (!child->device_type) 2836 continue; 2837 2838 drm_dbg_kms(display->drm, 2839 "Found VBT child device with type 0x%x\n", 2840 child->device_type); 2841 2842 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2843 if (!devdata) 2844 break; 2845 2846 devdata->display = display; 2847 2848 /* 2849 * Copy as much as we know (sizeof) and is available 2850 * (child_dev_size) of the child device config. Accessing the 2851 * data must depend on VBT version. 2852 */ 2853 memcpy(&devdata->child, child, 2854 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2855 2856 list_add_tail(&devdata->node, &display->vbt.display_devices); 2857 } 2858 2859 if (list_empty(&display->vbt.display_devices)) 2860 drm_dbg_kms(display->drm, 2861 "no child dev is parsed from VBT\n"); 2862 } 2863 2864 /* Common defaults which may be overridden by VBT. */ 2865 static void 2866 init_vbt_defaults(struct intel_display *display) 2867 { 2868 struct drm_i915_private *i915 = to_i915(display->drm); 2869 2870 display->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2871 2872 /* general features */ 2873 display->vbt.int_tv_support = 1; 2874 display->vbt.int_crt_support = 1; 2875 2876 /* driver features */ 2877 display->vbt.int_lvds_support = 1; 2878 2879 /* Default to using SSC */ 2880 display->vbt.lvds_use_ssc = 1; 2881 /* 2882 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2883 * clock for LVDS. 2884 */ 2885 display->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(display, 2886 !HAS_PCH_SPLIT(i915)); 2887 drm_dbg_kms(display->drm, "Set default to SSC at %d kHz\n", 2888 display->vbt.lvds_ssc_freq); 2889 } 2890 2891 /* Common defaults which may be overridden by VBT. */ 2892 static void 2893 init_vbt_panel_defaults(struct intel_panel *panel) 2894 { 2895 /* Default to having backlight */ 2896 panel->vbt.backlight.present = true; 2897 2898 /* LFP panel data */ 2899 panel->vbt.lvds_dither = true; 2900 } 2901 2902 /* Defaults to initialize only if there is no VBT. */ 2903 static void 2904 init_vbt_missing_defaults(struct intel_display *display) 2905 { 2906 struct drm_i915_private *i915 = to_i915(display->drm); 2907 unsigned int ports = DISPLAY_RUNTIME_INFO(display)->port_mask; 2908 enum port port; 2909 2910 if (!HAS_DDI(display) && !IS_CHERRYVIEW(i915)) 2911 return; 2912 2913 for_each_port_masked(port, ports) { 2914 struct intel_bios_encoder_data *devdata; 2915 struct child_device_config *child; 2916 enum phy phy = intel_port_to_phy(i915, port); 2917 2918 /* 2919 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2920 * to detect it. 2921 */ 2922 if (intel_phy_is_tc(i915, phy)) 2923 continue; 2924 2925 /* Create fake child device config */ 2926 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2927 if (!devdata) 2928 break; 2929 2930 devdata->display = display; 2931 child = &devdata->child; 2932 2933 if (port == PORT_F) 2934 child->dvo_port = DVO_PORT_HDMIF; 2935 else if (port == PORT_E) 2936 child->dvo_port = DVO_PORT_HDMIE; 2937 else 2938 child->dvo_port = DVO_PORT_HDMIA + port; 2939 2940 if (port != PORT_A && port != PORT_E) 2941 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2942 2943 if (port != PORT_E) 2944 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2945 2946 if (port == PORT_A) 2947 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2948 2949 list_add_tail(&devdata->node, &display->vbt.display_devices); 2950 2951 drm_dbg_kms(display->drm, 2952 "Generating default VBT child device with type 0x%04x on port %c\n", 2953 child->device_type, port_name(port)); 2954 } 2955 2956 /* Bypass some minimum baseline VBT version checks */ 2957 display->vbt.version = 155; 2958 } 2959 2960 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2961 { 2962 const void *_vbt = vbt; 2963 2964 return _vbt + vbt->bdb_offset; 2965 } 2966 2967 static const char vbt_signature[] = "$VBT"; 2968 static const int vbt_signature_len = 4; 2969 2970 /** 2971 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2972 * @display: display device 2973 * @buf: pointer to a buffer to validate 2974 * @size: size of the buffer 2975 * 2976 * Returns true on valid VBT. 2977 */ 2978 bool intel_bios_is_valid_vbt(struct intel_display *display, 2979 const void *buf, size_t size) 2980 { 2981 const struct vbt_header *vbt = buf; 2982 const struct bdb_header *bdb; 2983 2984 if (!vbt) 2985 return false; 2986 2987 if (sizeof(struct vbt_header) > size) { 2988 drm_dbg_kms(display->drm, "VBT header incomplete\n"); 2989 return false; 2990 } 2991 2992 if (memcmp(vbt->signature, vbt_signature, vbt_signature_len)) { 2993 drm_dbg_kms(display->drm, "VBT invalid signature\n"); 2994 return false; 2995 } 2996 2997 if (vbt->vbt_size > size) { 2998 drm_dbg_kms(display->drm, 2999 "VBT incomplete (vbt_size overflows)\n"); 3000 return false; 3001 } 3002 3003 size = vbt->vbt_size; 3004 3005 if (range_overflows_t(size_t, 3006 vbt->bdb_offset, 3007 sizeof(struct bdb_header), 3008 size)) { 3009 drm_dbg_kms(display->drm, "BDB header incomplete\n"); 3010 return false; 3011 } 3012 3013 bdb = get_bdb_header(vbt); 3014 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 3015 drm_dbg_kms(display->drm, "BDB incomplete\n"); 3016 return false; 3017 } 3018 3019 return vbt; 3020 } 3021 3022 static struct vbt_header *firmware_get_vbt(struct intel_display *display, 3023 size_t *size) 3024 { 3025 struct vbt_header *vbt = NULL; 3026 const struct firmware *fw = NULL; 3027 const char *name = display->params.vbt_firmware; 3028 int ret; 3029 3030 if (!name || !*name) 3031 return NULL; 3032 3033 ret = request_firmware(&fw, name, display->drm->dev); 3034 if (ret) { 3035 drm_err(display->drm, 3036 "Requesting VBT firmware \"%s\" failed (%d)\n", 3037 name, ret); 3038 return NULL; 3039 } 3040 3041 if (intel_bios_is_valid_vbt(display, fw->data, fw->size)) { 3042 vbt = kmemdup(fw->data, fw->size, GFP_KERNEL); 3043 if (vbt) { 3044 drm_dbg_kms(display->drm, 3045 "Found valid VBT firmware \"%s\"\n", name); 3046 if (size) 3047 *size = fw->size; 3048 } 3049 } else { 3050 drm_dbg_kms(display->drm, "Invalid VBT firmware \"%s\"\n", 3051 name); 3052 } 3053 3054 release_firmware(fw); 3055 3056 return vbt; 3057 } 3058 3059 static struct vbt_header *oprom_get_vbt(struct intel_display *display, 3060 struct intel_rom *rom, 3061 size_t *size, const char *type) 3062 { 3063 struct vbt_header *vbt; 3064 size_t vbt_size; 3065 loff_t offset; 3066 3067 if (!rom) 3068 return NULL; 3069 3070 BUILD_BUG_ON(vbt_signature_len != sizeof(vbt_signature) - 1); 3071 BUILD_BUG_ON(vbt_signature_len != sizeof(u32)); 3072 3073 offset = intel_rom_find(rom, *(const u32 *)vbt_signature); 3074 if (offset < 0) 3075 goto err_free_rom; 3076 3077 if (sizeof(struct vbt_header) > intel_rom_size(rom) - offset) { 3078 drm_dbg_kms(display->drm, "VBT header incomplete\n"); 3079 goto err_free_rom; 3080 } 3081 3082 BUILD_BUG_ON(sizeof(vbt->vbt_size) != sizeof(u16)); 3083 3084 vbt_size = intel_rom_read16(rom, offset + offsetof(struct vbt_header, vbt_size)); 3085 if (vbt_size > intel_rom_size(rom) - offset) { 3086 drm_dbg_kms(display->drm, "VBT incomplete (vbt_size overflows)\n"); 3087 goto err_free_rom; 3088 } 3089 3090 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 3091 if (!vbt) 3092 goto err_free_rom; 3093 3094 intel_rom_read_block(rom, vbt, offset, vbt_size); 3095 3096 if (!intel_bios_is_valid_vbt(display, vbt, vbt_size)) 3097 goto err_free_vbt; 3098 3099 drm_dbg_kms(display->drm, "Found valid VBT in %s\n", type); 3100 3101 if (size) 3102 *size = vbt_size; 3103 3104 intel_rom_free(rom); 3105 3106 return vbt; 3107 3108 err_free_vbt: 3109 kfree(vbt); 3110 err_free_rom: 3111 intel_rom_free(rom); 3112 return NULL; 3113 } 3114 3115 static const struct vbt_header *intel_bios_get_vbt(struct intel_display *display, 3116 size_t *sizep) 3117 { 3118 struct drm_i915_private *i915 = to_i915(display->drm); 3119 const struct vbt_header *vbt = NULL; 3120 intel_wakeref_t wakeref; 3121 3122 vbt = firmware_get_vbt(display, sizep); 3123 3124 if (!vbt) 3125 vbt = intel_opregion_get_vbt(display, sizep); 3126 3127 /* 3128 * If the OpRegion does not have VBT, look in SPI flash 3129 * through MMIO or PCI mapping 3130 */ 3131 if (!vbt && IS_DGFX(i915)) 3132 with_intel_runtime_pm(&i915->runtime_pm, wakeref) 3133 vbt = oprom_get_vbt(display, intel_rom_spi(i915), sizep, "SPI flash"); 3134 3135 if (!vbt) 3136 with_intel_runtime_pm(&i915->runtime_pm, wakeref) 3137 vbt = oprom_get_vbt(display, intel_rom_pci(i915), sizep, "PCI ROM"); 3138 3139 return vbt; 3140 } 3141 3142 /** 3143 * intel_bios_init - find VBT and initialize settings from the BIOS 3144 * @display: display device instance 3145 * 3146 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 3147 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 3148 * initialize some defaults if the VBT is not present at all. 3149 */ 3150 void intel_bios_init(struct intel_display *display) 3151 { 3152 const struct vbt_header *vbt; 3153 const struct bdb_header *bdb; 3154 3155 INIT_LIST_HEAD(&display->vbt.display_devices); 3156 INIT_LIST_HEAD(&display->vbt.bdb_blocks); 3157 3158 if (!HAS_DISPLAY(display)) { 3159 drm_dbg_kms(display->drm, 3160 "Skipping VBT init due to disabled display.\n"); 3161 return; 3162 } 3163 3164 init_vbt_defaults(display); 3165 3166 vbt = intel_bios_get_vbt(display, NULL); 3167 3168 if (!vbt) 3169 goto out; 3170 3171 bdb = get_bdb_header(vbt); 3172 display->vbt.version = bdb->version; 3173 3174 drm_dbg_kms(display->drm, 3175 "VBT signature \"%.*s\", BDB version %d\n", 3176 (int)sizeof(vbt->signature), vbt->signature, 3177 display->vbt.version); 3178 3179 init_bdb_blocks(display, bdb); 3180 3181 /* Grab useful general definitions */ 3182 parse_general_features(display); 3183 parse_general_definitions(display); 3184 parse_driver_features(display); 3185 3186 /* Depends on child device list */ 3187 parse_compression_parameters(display); 3188 3189 out: 3190 if (!vbt) { 3191 drm_info(display->drm, 3192 "Failed to find VBIOS tables (VBT)\n"); 3193 init_vbt_missing_defaults(display); 3194 } 3195 3196 /* Further processing on pre-parsed or generated child device data */ 3197 parse_sdvo_device_mapping(display); 3198 parse_ddi_ports(display); 3199 3200 kfree(vbt); 3201 } 3202 3203 static void intel_bios_init_panel(struct intel_display *display, 3204 struct intel_panel *panel, 3205 const struct intel_bios_encoder_data *devdata, 3206 const struct drm_edid *drm_edid, 3207 bool use_fallback) 3208 { 3209 /* already have it? */ 3210 if (panel->vbt.panel_type >= 0) { 3211 drm_WARN_ON(display->drm, !use_fallback); 3212 return; 3213 } 3214 3215 panel->vbt.panel_type = get_panel_type(display, devdata, 3216 drm_edid, use_fallback); 3217 if (panel->vbt.panel_type < 0) { 3218 drm_WARN_ON(display->drm, use_fallback); 3219 return; 3220 } 3221 3222 init_vbt_panel_defaults(panel); 3223 3224 parse_panel_options(display, panel); 3225 parse_generic_dtd(display, panel); 3226 parse_lfp_data(display, panel); 3227 parse_lfp_backlight(display, panel); 3228 parse_sdvo_lvds_data(display, panel); 3229 parse_panel_driver_features(display, panel); 3230 parse_power_conservation_features(display, panel); 3231 parse_edp(display, panel); 3232 parse_psr(display, panel); 3233 parse_mipi_config(display, panel); 3234 parse_mipi_sequence(display, panel); 3235 } 3236 3237 void intel_bios_init_panel_early(struct intel_display *display, 3238 struct intel_panel *panel, 3239 const struct intel_bios_encoder_data *devdata) 3240 { 3241 intel_bios_init_panel(display, panel, devdata, NULL, false); 3242 } 3243 3244 void intel_bios_init_panel_late(struct intel_display *display, 3245 struct intel_panel *panel, 3246 const struct intel_bios_encoder_data *devdata, 3247 const struct drm_edid *drm_edid) 3248 { 3249 intel_bios_init_panel(display, panel, devdata, drm_edid, true); 3250 } 3251 3252 /** 3253 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 3254 * @display: display device instance 3255 */ 3256 void intel_bios_driver_remove(struct intel_display *display) 3257 { 3258 struct intel_bios_encoder_data *devdata, *nd; 3259 struct bdb_block_entry *entry, *ne; 3260 3261 list_for_each_entry_safe(devdata, nd, &display->vbt.display_devices, 3262 node) { 3263 list_del(&devdata->node); 3264 kfree(devdata->dsc); 3265 kfree(devdata); 3266 } 3267 3268 list_for_each_entry_safe(entry, ne, &display->vbt.bdb_blocks, node) { 3269 list_del(&entry->node); 3270 kfree(entry); 3271 } 3272 } 3273 3274 void intel_bios_fini_panel(struct intel_panel *panel) 3275 { 3276 kfree(panel->vbt.sdvo_lvds_vbt_mode); 3277 panel->vbt.sdvo_lvds_vbt_mode = NULL; 3278 kfree(panel->vbt.lfp_vbt_mode); 3279 panel->vbt.lfp_vbt_mode = NULL; 3280 kfree(panel->vbt.dsi.data); 3281 panel->vbt.dsi.data = NULL; 3282 kfree(panel->vbt.dsi.pps); 3283 panel->vbt.dsi.pps = NULL; 3284 kfree(panel->vbt.dsi.config); 3285 panel->vbt.dsi.config = NULL; 3286 kfree(panel->vbt.dsi.deassert_seq); 3287 panel->vbt.dsi.deassert_seq = NULL; 3288 } 3289 3290 /** 3291 * intel_bios_is_tv_present - is integrated TV present in VBT 3292 * @display: display device instance 3293 * 3294 * Return true if TV is present. If no child devices were parsed from VBT, 3295 * assume TV is present. 3296 */ 3297 bool intel_bios_is_tv_present(struct intel_display *display) 3298 { 3299 const struct intel_bios_encoder_data *devdata; 3300 3301 if (!display->vbt.int_tv_support) 3302 return false; 3303 3304 if (list_empty(&display->vbt.display_devices)) 3305 return true; 3306 3307 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3308 const struct child_device_config *child = &devdata->child; 3309 3310 /* 3311 * If the device type is not TV, continue. 3312 */ 3313 switch (child->device_type) { 3314 case DEVICE_TYPE_INT_TV: 3315 case DEVICE_TYPE_TV: 3316 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3317 break; 3318 default: 3319 continue; 3320 } 3321 /* Only when the addin_offset is non-zero, it is regarded 3322 * as present. 3323 */ 3324 if (child->addin_offset) 3325 return true; 3326 } 3327 3328 return false; 3329 } 3330 3331 /** 3332 * intel_bios_is_lvds_present - is LVDS present in VBT 3333 * @display: display device instance 3334 * @i2c_pin: i2c pin for LVDS if present 3335 * 3336 * Return true if LVDS is present. If no child devices were parsed from VBT, 3337 * assume LVDS is present. 3338 */ 3339 bool intel_bios_is_lvds_present(struct intel_display *display, u8 *i2c_pin) 3340 { 3341 struct drm_i915_private *i915 = to_i915(display->drm); 3342 const struct intel_bios_encoder_data *devdata; 3343 3344 if (list_empty(&display->vbt.display_devices)) 3345 return true; 3346 3347 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3348 const struct child_device_config *child = &devdata->child; 3349 3350 /* If the device type is not LFP, continue. 3351 * We have to check both the new identifiers as well as the 3352 * old for compatibility with some BIOSes. 3353 */ 3354 if (child->device_type != DEVICE_TYPE_INT_LFP && 3355 child->device_type != DEVICE_TYPE_LFP) 3356 continue; 3357 3358 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 3359 *i2c_pin = child->i2c_pin; 3360 3361 /* However, we cannot trust the BIOS writers to populate 3362 * the VBT correctly. Since LVDS requires additional 3363 * information from AIM blocks, a non-zero addin offset is 3364 * a good indicator that the LVDS is actually present. 3365 */ 3366 if (child->addin_offset) 3367 return true; 3368 3369 /* But even then some BIOS writers perform some black magic 3370 * and instantiate the device without reference to any 3371 * additional data. Trust that if the VBT was written into 3372 * the OpRegion then they have validated the LVDS's existence. 3373 */ 3374 return intel_opregion_vbt_present(display); 3375 } 3376 3377 return false; 3378 } 3379 3380 /** 3381 * intel_bios_is_port_present - is the specified digital port present 3382 * @display: display device instance 3383 * @port: port to check 3384 * 3385 * Return true if the device in %port is present. 3386 */ 3387 bool intel_bios_is_port_present(struct intel_display *display, enum port port) 3388 { 3389 const struct intel_bios_encoder_data *devdata; 3390 3391 if (WARN_ON(!has_ddi_port_info(display))) 3392 return true; 3393 3394 if (!is_port_valid(display, port)) 3395 return false; 3396 3397 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3398 const struct child_device_config *child = &devdata->child; 3399 3400 if (dvo_port_to_port(display, child->dvo_port) == port) 3401 return true; 3402 } 3403 3404 return false; 3405 } 3406 3407 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3408 { 3409 const struct child_device_config *child = &devdata->child; 3410 3411 if (!devdata) 3412 return false; 3413 3414 if (!intel_bios_encoder_supports_dp(devdata) || 3415 !intel_bios_encoder_supports_hdmi(devdata)) 3416 return false; 3417 3418 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3419 return true; 3420 3421 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3422 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3423 child->aux_channel != 0) 3424 return true; 3425 3426 return false; 3427 } 3428 3429 /** 3430 * intel_bios_is_dsi_present - is DSI present in VBT 3431 * @display: display device instance 3432 * @port: port for DSI if present 3433 * 3434 * Return true if DSI is present, and return the port in %port. 3435 */ 3436 bool intel_bios_is_dsi_present(struct intel_display *display, 3437 enum port *port) 3438 { 3439 const struct intel_bios_encoder_data *devdata; 3440 3441 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3442 const struct child_device_config *child = &devdata->child; 3443 u8 dvo_port = child->dvo_port; 3444 3445 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3446 continue; 3447 3448 if (dsi_dvo_port_to_port(display, dvo_port) == PORT_NONE) { 3449 drm_dbg_kms(display->drm, 3450 "VBT has unsupported DSI port %c\n", 3451 port_name(dvo_port - DVO_PORT_MIPIA)); 3452 continue; 3453 } 3454 3455 if (port) 3456 *port = dsi_dvo_port_to_port(display, dvo_port); 3457 return true; 3458 } 3459 3460 return false; 3461 } 3462 3463 static void fill_dsc(struct intel_crtc_state *crtc_state, 3464 struct dsc_compression_parameters_entry *dsc, 3465 int dsc_max_bpc) 3466 { 3467 struct intel_display *display = to_intel_display(crtc_state); 3468 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3469 int bpc = 8; 3470 3471 vdsc_cfg->dsc_version_major = dsc->version_major; 3472 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3473 3474 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3475 bpc = 12; 3476 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3477 bpc = 10; 3478 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3479 bpc = 8; 3480 else 3481 drm_dbg_kms(display->drm, "VBT: Unsupported BPC %d for DCS\n", 3482 dsc_max_bpc); 3483 3484 crtc_state->pipe_bpp = bpc * 3; 3485 3486 crtc_state->dsc.compressed_bpp_x16 = fxp_q4_from_int(min(crtc_state->pipe_bpp, 3487 VBT_DSC_MAX_BPP(dsc->max_bpp))); 3488 3489 /* 3490 * FIXME: This is ugly, and slice count should take DSC engine 3491 * throughput etc. into account. 3492 * 3493 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3494 */ 3495 if (dsc->slices_per_line & BIT(2)) { 3496 crtc_state->dsc.slice_count = 4; 3497 } else if (dsc->slices_per_line & BIT(1)) { 3498 crtc_state->dsc.slice_count = 2; 3499 } else { 3500 /* FIXME */ 3501 if (!(dsc->slices_per_line & BIT(0))) 3502 drm_dbg_kms(display->drm, 3503 "VBT: Unsupported DSC slice count for DSI\n"); 3504 3505 crtc_state->dsc.slice_count = 1; 3506 } 3507 3508 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3509 crtc_state->dsc.slice_count != 0) 3510 drm_dbg_kms(display->drm, 3511 "VBT: DSC hdisplay %d not divisible by slice count %d\n", 3512 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3513 crtc_state->dsc.slice_count); 3514 3515 /* 3516 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3517 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3518 */ 3519 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3520 dsc->rc_buffer_size); 3521 3522 /* FIXME: DSI spec says bpc + 1 for this one */ 3523 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3524 3525 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3526 3527 vdsc_cfg->slice_height = dsc->slice_height; 3528 } 3529 3530 /* FIXME: initially DSI specific */ 3531 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3532 struct intel_crtc_state *crtc_state, 3533 int dsc_max_bpc) 3534 { 3535 struct intel_display *display = to_intel_display(encoder); 3536 const struct intel_bios_encoder_data *devdata; 3537 3538 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3539 const struct child_device_config *child = &devdata->child; 3540 3541 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3542 continue; 3543 3544 if (dsi_dvo_port_to_port(display, child->dvo_port) == encoder->port) { 3545 if (!devdata->dsc) 3546 return false; 3547 3548 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3549 3550 return true; 3551 } 3552 } 3553 3554 return false; 3555 } 3556 3557 static const u8 adlp_aux_ch_map[] = { 3558 [AUX_CH_A] = DP_AUX_A, 3559 [AUX_CH_B] = DP_AUX_B, 3560 [AUX_CH_C] = DP_AUX_C, 3561 [AUX_CH_D_XELPD] = DP_AUX_D, 3562 [AUX_CH_E_XELPD] = DP_AUX_E, 3563 [AUX_CH_USBC1] = DP_AUX_F, 3564 [AUX_CH_USBC2] = DP_AUX_G, 3565 [AUX_CH_USBC3] = DP_AUX_H, 3566 [AUX_CH_USBC4] = DP_AUX_I, 3567 }; 3568 3569 /* 3570 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3571 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3572 */ 3573 static const u8 adls_aux_ch_map[] = { 3574 [AUX_CH_A] = DP_AUX_A, 3575 [AUX_CH_USBC1] = DP_AUX_B, 3576 [AUX_CH_USBC2] = DP_AUX_C, 3577 [AUX_CH_USBC3] = DP_AUX_D, 3578 [AUX_CH_USBC4] = DP_AUX_E, 3579 }; 3580 3581 /* 3582 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3583 * map to DDI A,B,TC1,TC2 respectively. 3584 */ 3585 static const u8 rkl_aux_ch_map[] = { 3586 [AUX_CH_A] = DP_AUX_A, 3587 [AUX_CH_B] = DP_AUX_B, 3588 [AUX_CH_USBC1] = DP_AUX_C, 3589 [AUX_CH_USBC2] = DP_AUX_D, 3590 }; 3591 3592 static const u8 direct_aux_ch_map[] = { 3593 [AUX_CH_A] = DP_AUX_A, 3594 [AUX_CH_B] = DP_AUX_B, 3595 [AUX_CH_C] = DP_AUX_C, 3596 [AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */ 3597 [AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */ 3598 [AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */ 3599 [AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */ 3600 [AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */ 3601 [AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */ 3602 }; 3603 3604 static enum aux_ch map_aux_ch(struct intel_display *display, u8 aux_channel) 3605 { 3606 struct drm_i915_private *i915 = to_i915(display->drm); 3607 const u8 *aux_ch_map; 3608 int i, n_entries; 3609 3610 if (DISPLAY_VER(display) >= 13) { 3611 aux_ch_map = adlp_aux_ch_map; 3612 n_entries = ARRAY_SIZE(adlp_aux_ch_map); 3613 } else if (IS_ALDERLAKE_S(i915)) { 3614 aux_ch_map = adls_aux_ch_map; 3615 n_entries = ARRAY_SIZE(adls_aux_ch_map); 3616 } else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) { 3617 aux_ch_map = rkl_aux_ch_map; 3618 n_entries = ARRAY_SIZE(rkl_aux_ch_map); 3619 } else { 3620 aux_ch_map = direct_aux_ch_map; 3621 n_entries = ARRAY_SIZE(direct_aux_ch_map); 3622 } 3623 3624 for (i = 0; i < n_entries; i++) { 3625 if (aux_ch_map[i] == aux_channel) 3626 return i; 3627 } 3628 3629 drm_dbg_kms(display->drm, 3630 "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n", 3631 aux_channel); 3632 3633 return AUX_CH_NONE; 3634 } 3635 3636 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata) 3637 { 3638 if (!devdata || !devdata->child.aux_channel) 3639 return AUX_CH_NONE; 3640 3641 return map_aux_ch(devdata->display, devdata->child.aux_channel); 3642 } 3643 3644 bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata) 3645 { 3646 struct intel_display *display; 3647 u8 aux_channel; 3648 int count = 0; 3649 3650 if (!devdata || !devdata->child.aux_channel) 3651 return false; 3652 3653 display = devdata->display; 3654 aux_channel = devdata->child.aux_channel; 3655 3656 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3657 if (intel_bios_encoder_supports_dp(devdata) && 3658 aux_channel == devdata->child.aux_channel) 3659 count++; 3660 } 3661 3662 return count > 1; 3663 } 3664 3665 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3666 { 3667 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost) 3668 return 0; 3669 3670 return translate_iboost(devdata->display, devdata->child.dp_iboost_level); 3671 } 3672 3673 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3674 { 3675 if (!devdata || devdata->display->vbt.version < 196 || !devdata->child.iboost) 3676 return 0; 3677 3678 return translate_iboost(devdata->display, devdata->child.hdmi_iboost_level); 3679 } 3680 3681 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata) 3682 { 3683 if (!devdata || !devdata->child.ddc_pin) 3684 return 0; 3685 3686 return map_ddc_pin(devdata->display, devdata->child.ddc_pin); 3687 } 3688 3689 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3690 { 3691 return devdata->display->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3692 } 3693 3694 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3695 { 3696 return devdata->display->vbt.version >= 209 && devdata->child.tbt; 3697 } 3698 3699 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata) 3700 { 3701 return devdata && devdata->child.lane_reversal; 3702 } 3703 3704 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata) 3705 { 3706 return devdata && devdata->child.hpd_invert; 3707 } 3708 3709 const struct intel_bios_encoder_data * 3710 intel_bios_encoder_data_lookup(struct intel_display *display, enum port port) 3711 { 3712 struct intel_bios_encoder_data *devdata; 3713 3714 list_for_each_entry(devdata, &display->vbt.display_devices, node) { 3715 if (intel_bios_encoder_port(devdata) == port) 3716 return devdata; 3717 } 3718 3719 return NULL; 3720 } 3721 3722 void intel_bios_for_each_encoder(struct intel_display *display, 3723 void (*func)(struct intel_display *display, 3724 const struct intel_bios_encoder_data *devdata)) 3725 { 3726 struct intel_bios_encoder_data *devdata; 3727 3728 list_for_each_entry(devdata, &display->vbt.display_devices, node) 3729 func(display, devdata); 3730 } 3731 3732 static int intel_bios_vbt_show(struct seq_file *m, void *unused) 3733 { 3734 struct intel_display *display = m->private; 3735 const void *vbt; 3736 size_t vbt_size; 3737 3738 vbt = intel_bios_get_vbt(display, &vbt_size); 3739 3740 if (vbt) { 3741 seq_write(m, vbt, vbt_size); 3742 kfree(vbt); 3743 } 3744 3745 return 0; 3746 } 3747 3748 DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt); 3749 3750 void intel_bios_debugfs_register(struct intel_display *display) 3751 { 3752 struct drm_minor *minor = display->drm->primary; 3753 3754 debugfs_create_file("i915_vbt", 0444, minor->debugfs_root, 3755 display, &intel_bios_vbt_fops); 3756 } 3757