1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/dp/drm_dp_helper.h> 29 30 #include "display/intel_display.h" 31 #include "display/intel_display_types.h" 32 #include "display/intel_gmbus.h" 33 34 #include "i915_drv.h" 35 #include "i915_reg.h" 36 37 #define _INTEL_BIOS_PRIVATE 38 #include "intel_vbt_defs.h" 39 40 /** 41 * DOC: Video BIOS Table (VBT) 42 * 43 * The Video BIOS Table, or VBT, provides platform and board specific 44 * configuration information to the driver that is not discoverable or available 45 * through other means. The configuration is mostly related to display 46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 47 * the PCI ROM. 48 * 49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 51 * contain the actual configuration information. The VBT Header, and thus the 52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 53 * BDB Header. The data blocks are concatenated after the BDB Header. The data 54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 55 * data. (Block 53, the MIPI Sequence Block is an exception.) 56 * 57 * The driver parses the VBT during load. The relevant information is stored in 58 * driver private data for ease of use, and the actual VBT is not read after 59 * that. 60 */ 61 62 /* Wrapper for VBT child device config */ 63 struct intel_bios_encoder_data { 64 struct drm_i915_private *i915; 65 66 struct child_device_config child; 67 struct dsc_compression_parameters_entry *dsc; 68 struct list_head node; 69 }; 70 71 #define SLAVE_ADDR1 0x70 72 #define SLAVE_ADDR2 0x72 73 74 /* Get BDB block size given a pointer to Block ID. */ 75 static u32 _get_blocksize(const u8 *block_base) 76 { 77 /* The MIPI Sequence Block v3+ has a separate size field. */ 78 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 79 return *((const u32 *)(block_base + 4)); 80 else 81 return *((const u16 *)(block_base + 1)); 82 } 83 84 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 85 static u32 get_blocksize(const void *block_data) 86 { 87 return _get_blocksize(block_data - 3); 88 } 89 90 static const void * 91 find_section(const void *_bdb, enum bdb_block_id section_id) 92 { 93 const struct bdb_header *bdb = _bdb; 94 const u8 *base = _bdb; 95 int index = 0; 96 u32 total, current_size; 97 enum bdb_block_id current_id; 98 99 /* skip to first section */ 100 index += bdb->header_size; 101 total = bdb->bdb_size; 102 103 /* walk the sections looking for section_id */ 104 while (index + 3 < total) { 105 current_id = *(base + index); 106 current_size = _get_blocksize(base + index); 107 index += 3; 108 109 if (index + current_size > total) 110 return NULL; 111 112 if (current_id == section_id) 113 return base + index; 114 115 index += current_size; 116 } 117 118 return NULL; 119 } 120 121 static void 122 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 123 const struct lvds_dvo_timing *dvo_timing) 124 { 125 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 126 dvo_timing->hactive_lo; 127 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 128 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 129 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 130 ((dvo_timing->hsync_pulse_width_hi << 8) | 131 dvo_timing->hsync_pulse_width_lo); 132 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 133 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 134 135 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 136 dvo_timing->vactive_lo; 137 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 138 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 139 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 140 ((dvo_timing->vsync_pulse_width_hi << 4) | 141 dvo_timing->vsync_pulse_width_lo); 142 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 143 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 144 panel_fixed_mode->clock = dvo_timing->clock * 10; 145 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 146 147 if (dvo_timing->hsync_positive) 148 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 149 else 150 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 151 152 if (dvo_timing->vsync_positive) 153 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 154 else 155 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 156 157 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 158 dvo_timing->himage_lo; 159 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 160 dvo_timing->vimage_lo; 161 162 /* Some VBTs have bogus h/vtotal values */ 163 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 164 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 165 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 166 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 167 168 drm_mode_set_name(panel_fixed_mode); 169 } 170 171 static const struct lvds_dvo_timing * 172 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 173 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 174 int index) 175 { 176 /* 177 * the size of fp_timing varies on the different platform. 178 * So calculate the DVO timing relative offset in LVDS data 179 * entry to get the DVO timing entry 180 */ 181 182 int lfp_data_size = 183 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 184 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 185 int dvo_timing_offset = 186 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 187 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 188 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 189 190 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 191 } 192 193 /* get lvds_fp_timing entry 194 * this function may return NULL if the corresponding entry is invalid 195 */ 196 static const struct lvds_fp_timing * 197 get_lvds_fp_timing(const struct bdb_header *bdb, 198 const struct bdb_lvds_lfp_data *data, 199 const struct bdb_lvds_lfp_data_ptrs *ptrs, 200 int index) 201 { 202 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 203 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 204 size_t ofs; 205 206 if (index >= ARRAY_SIZE(ptrs->ptr)) 207 return NULL; 208 ofs = ptrs->ptr[index].fp_timing_offset; 209 if (ofs < data_ofs || 210 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 211 return NULL; 212 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 213 } 214 215 /* Parse general panel options */ 216 static void 217 parse_panel_options(struct drm_i915_private *i915, 218 const struct bdb_header *bdb) 219 { 220 const struct bdb_lvds_options *lvds_options; 221 int panel_type; 222 int drrs_mode; 223 int ret; 224 225 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 226 if (!lvds_options) 227 return; 228 229 i915->vbt.lvds_dither = lvds_options->pixel_dither; 230 231 ret = intel_opregion_get_panel_type(i915); 232 if (ret >= 0) { 233 drm_WARN_ON(&i915->drm, ret > 0xf); 234 panel_type = ret; 235 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n", 236 panel_type); 237 } else { 238 if (lvds_options->panel_type > 0xf) { 239 drm_dbg_kms(&i915->drm, 240 "Invalid VBT panel type 0x%x\n", 241 lvds_options->panel_type); 242 return; 243 } 244 panel_type = lvds_options->panel_type; 245 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n", 246 panel_type); 247 } 248 249 i915->vbt.panel_type = panel_type; 250 251 drrs_mode = (lvds_options->dps_panel_type_bits 252 >> (panel_type * 2)) & MODE_MASK; 253 /* 254 * VBT has static DRRS = 0 and seamless DRRS = 2. 255 * The below piece of code is required to adjust vbt.drrs_type 256 * to match the enum drrs_support_type. 257 */ 258 switch (drrs_mode) { 259 case 0: 260 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT; 261 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 262 break; 263 case 2: 264 i915->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 265 drm_dbg_kms(&i915->drm, 266 "DRRS supported mode is seamless\n"); 267 break; 268 default: 269 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED; 270 drm_dbg_kms(&i915->drm, 271 "DRRS not supported (VBT input)\n"); 272 break; 273 } 274 } 275 276 /* Try to find integrated panel timing data */ 277 static void 278 parse_lfp_panel_dtd(struct drm_i915_private *i915, 279 const struct bdb_header *bdb) 280 { 281 const struct bdb_lvds_lfp_data *lvds_lfp_data; 282 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 283 const struct lvds_dvo_timing *panel_dvo_timing; 284 const struct lvds_fp_timing *fp_timing; 285 struct drm_display_mode *panel_fixed_mode; 286 int panel_type = i915->vbt.panel_type; 287 288 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 289 if (!lvds_lfp_data) 290 return; 291 292 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 293 if (!lvds_lfp_data_ptrs) 294 return; 295 296 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 297 lvds_lfp_data_ptrs, 298 panel_type); 299 300 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 301 if (!panel_fixed_mode) 302 return; 303 304 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 305 306 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 307 308 drm_dbg_kms(&i915->drm, 309 "Found panel mode in BIOS VBT legacy lfp table:\n"); 310 drm_mode_debug_printmodeline(panel_fixed_mode); 311 312 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 313 lvds_lfp_data_ptrs, 314 panel_type); 315 if (fp_timing) { 316 /* check the resolution, just to be sure */ 317 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 318 fp_timing->y_res == panel_fixed_mode->vdisplay) { 319 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 320 drm_dbg_kms(&i915->drm, 321 "VBT initial LVDS value %x\n", 322 i915->vbt.bios_lvds_val); 323 } 324 } 325 } 326 327 static void 328 parse_generic_dtd(struct drm_i915_private *i915, 329 const struct bdb_header *bdb) 330 { 331 const struct bdb_generic_dtd *generic_dtd; 332 const struct generic_dtd_entry *dtd; 333 struct drm_display_mode *panel_fixed_mode; 334 int num_dtd; 335 336 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 337 if (!generic_dtd) 338 return; 339 340 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 341 drm_err(&i915->drm, "GDTD size %u is too small.\n", 342 generic_dtd->gdtd_size); 343 return; 344 } else if (generic_dtd->gdtd_size != 345 sizeof(struct generic_dtd_entry)) { 346 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 347 generic_dtd->gdtd_size); 348 /* DTD has unknown fields, but keep going */ 349 } 350 351 num_dtd = (get_blocksize(generic_dtd) - 352 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 353 if (i915->vbt.panel_type >= num_dtd) { 354 drm_err(&i915->drm, 355 "Panel type %d not found in table of %d DTD's\n", 356 i915->vbt.panel_type, num_dtd); 357 return; 358 } 359 360 dtd = &generic_dtd->dtd[i915->vbt.panel_type]; 361 362 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 363 if (!panel_fixed_mode) 364 return; 365 366 panel_fixed_mode->hdisplay = dtd->hactive; 367 panel_fixed_mode->hsync_start = 368 panel_fixed_mode->hdisplay + dtd->hfront_porch; 369 panel_fixed_mode->hsync_end = 370 panel_fixed_mode->hsync_start + dtd->hsync; 371 panel_fixed_mode->htotal = 372 panel_fixed_mode->hdisplay + dtd->hblank; 373 374 panel_fixed_mode->vdisplay = dtd->vactive; 375 panel_fixed_mode->vsync_start = 376 panel_fixed_mode->vdisplay + dtd->vfront_porch; 377 panel_fixed_mode->vsync_end = 378 panel_fixed_mode->vsync_start + dtd->vsync; 379 panel_fixed_mode->vtotal = 380 panel_fixed_mode->vdisplay + dtd->vblank; 381 382 panel_fixed_mode->clock = dtd->pixel_clock; 383 panel_fixed_mode->width_mm = dtd->width_mm; 384 panel_fixed_mode->height_mm = dtd->height_mm; 385 386 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 387 drm_mode_set_name(panel_fixed_mode); 388 389 if (dtd->hsync_positive_polarity) 390 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 391 else 392 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 393 394 if (dtd->vsync_positive_polarity) 395 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 396 else 397 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 398 399 drm_dbg_kms(&i915->drm, 400 "Found panel mode in BIOS VBT generic dtd table:\n"); 401 drm_mode_debug_printmodeline(panel_fixed_mode); 402 403 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 404 } 405 406 static void 407 parse_panel_dtd(struct drm_i915_private *i915, 408 const struct bdb_header *bdb) 409 { 410 /* 411 * Older VBTs provided provided DTD information for internal displays 412 * through the "LFP panel DTD" block (42). As of VBT revision 229, 413 * that block is now deprecated and DTD information should be provided 414 * via a newer "generic DTD" block (58). Just to be safe, we'll 415 * try the new generic DTD block first on VBT >= 229, but still fall 416 * back to trying the old LFP block if that fails. 417 */ 418 if (bdb->version >= 229) 419 parse_generic_dtd(i915, bdb); 420 if (!i915->vbt.lfp_lvds_vbt_mode) 421 parse_lfp_panel_dtd(i915, bdb); 422 } 423 424 static void 425 parse_lfp_backlight(struct drm_i915_private *i915, 426 const struct bdb_header *bdb) 427 { 428 const struct bdb_lfp_backlight_data *backlight_data; 429 const struct lfp_backlight_data_entry *entry; 430 int panel_type = i915->vbt.panel_type; 431 u16 level; 432 433 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 434 if (!backlight_data) 435 return; 436 437 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 438 drm_dbg_kms(&i915->drm, 439 "Unsupported backlight data entry size %u\n", 440 backlight_data->entry_size); 441 return; 442 } 443 444 entry = &backlight_data->data[panel_type]; 445 446 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 447 if (!i915->vbt.backlight.present) { 448 drm_dbg_kms(&i915->drm, 449 "PWM backlight not present in VBT (type %u)\n", 450 entry->type); 451 return; 452 } 453 454 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 455 if (bdb->version >= 191) { 456 size_t exp_size; 457 458 if (bdb->version >= 236) 459 exp_size = sizeof(struct bdb_lfp_backlight_data); 460 else if (bdb->version >= 234) 461 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; 462 else 463 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; 464 465 if (get_blocksize(backlight_data) >= exp_size) { 466 const struct lfp_backlight_control_method *method; 467 468 method = &backlight_data->backlight_control[panel_type]; 469 i915->vbt.backlight.type = method->type; 470 i915->vbt.backlight.controller = method->controller; 471 } 472 } 473 474 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 475 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm; 476 477 if (bdb->version >= 234) { 478 u16 min_level; 479 bool scale; 480 481 level = backlight_data->brightness_level[panel_type].level; 482 min_level = backlight_data->brightness_min_level[panel_type].level; 483 484 if (bdb->version >= 236) 485 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 486 else 487 scale = level > 255; 488 489 if (scale) 490 min_level = min_level / 255; 491 492 if (min_level > 255) { 493 drm_warn(&i915->drm, "Brightness min level > 255\n"); 494 level = 255; 495 } 496 i915->vbt.backlight.min_brightness = min_level; 497 498 i915->vbt.backlight.brightness_precision_bits = 499 backlight_data->brightness_precision_bits[panel_type]; 500 } else { 501 level = backlight_data->level[panel_type]; 502 i915->vbt.backlight.min_brightness = entry->min_brightness; 503 } 504 505 drm_dbg_kms(&i915->drm, 506 "VBT backlight PWM modulation frequency %u Hz, " 507 "active %s, min brightness %u, level %u, controller %u\n", 508 i915->vbt.backlight.pwm_freq_hz, 509 i915->vbt.backlight.active_low_pwm ? "low" : "high", 510 i915->vbt.backlight.min_brightness, 511 level, 512 i915->vbt.backlight.controller); 513 } 514 515 /* Try to find sdvo panel data */ 516 static void 517 parse_sdvo_panel_data(struct drm_i915_private *i915, 518 const struct bdb_header *bdb) 519 { 520 const struct bdb_sdvo_panel_dtds *dtds; 521 struct drm_display_mode *panel_fixed_mode; 522 int index; 523 524 index = i915->params.vbt_sdvo_panel_type; 525 if (index == -2) { 526 drm_dbg_kms(&i915->drm, 527 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 528 return; 529 } 530 531 if (index == -1) { 532 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 533 534 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 535 if (!sdvo_lvds_options) 536 return; 537 538 index = sdvo_lvds_options->panel_type; 539 } 540 541 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 542 if (!dtds) 543 return; 544 545 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 546 if (!panel_fixed_mode) 547 return; 548 549 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 550 551 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 552 553 drm_dbg_kms(&i915->drm, 554 "Found SDVO panel mode in BIOS VBT tables:\n"); 555 drm_mode_debug_printmodeline(panel_fixed_mode); 556 } 557 558 static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 559 bool alternate) 560 { 561 switch (DISPLAY_VER(i915)) { 562 case 2: 563 return alternate ? 66667 : 48000; 564 case 3: 565 case 4: 566 return alternate ? 100000 : 96000; 567 default: 568 return alternate ? 100000 : 120000; 569 } 570 } 571 572 static void 573 parse_general_features(struct drm_i915_private *i915, 574 const struct bdb_header *bdb) 575 { 576 const struct bdb_general_features *general; 577 578 general = find_section(bdb, BDB_GENERAL_FEATURES); 579 if (!general) 580 return; 581 582 i915->vbt.int_tv_support = general->int_tv_support; 583 /* int_crt_support can't be trusted on earlier platforms */ 584 if (bdb->version >= 155 && 585 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 586 i915->vbt.int_crt_support = general->int_crt_support; 587 i915->vbt.lvds_use_ssc = general->enable_ssc; 588 i915->vbt.lvds_ssc_freq = 589 intel_bios_ssc_frequency(i915, general->ssc_freq); 590 i915->vbt.display_clock_mode = general->display_clock_mode; 591 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 592 if (bdb->version >= 181) { 593 i915->vbt.orientation = general->rotate_180 ? 594 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 595 DRM_MODE_PANEL_ORIENTATION_NORMAL; 596 } else { 597 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 598 } 599 drm_dbg_kms(&i915->drm, 600 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 601 i915->vbt.int_tv_support, 602 i915->vbt.int_crt_support, 603 i915->vbt.lvds_use_ssc, 604 i915->vbt.lvds_ssc_freq, 605 i915->vbt.display_clock_mode, 606 i915->vbt.fdi_rx_polarity_inverted); 607 } 608 609 static const struct child_device_config * 610 child_device_ptr(const struct bdb_general_definitions *defs, int i) 611 { 612 return (const void *) &defs->devices[i * defs->child_dev_size]; 613 } 614 615 static void 616 parse_sdvo_device_mapping(struct drm_i915_private *i915) 617 { 618 struct sdvo_device_mapping *mapping; 619 const struct intel_bios_encoder_data *devdata; 620 const struct child_device_config *child; 621 int count = 0; 622 623 /* 624 * Only parse SDVO mappings on gens that could have SDVO. This isn't 625 * accurate and doesn't have to be, as long as it's not too strict. 626 */ 627 if (!IS_DISPLAY_VER(i915, 3, 7)) { 628 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 629 return; 630 } 631 632 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 633 child = &devdata->child; 634 635 if (child->slave_addr != SLAVE_ADDR1 && 636 child->slave_addr != SLAVE_ADDR2) { 637 /* 638 * If the slave address is neither 0x70 nor 0x72, 639 * it is not a SDVO device. Skip it. 640 */ 641 continue; 642 } 643 if (child->dvo_port != DEVICE_PORT_DVOB && 644 child->dvo_port != DEVICE_PORT_DVOC) { 645 /* skip the incorrect SDVO port */ 646 drm_dbg_kms(&i915->drm, 647 "Incorrect SDVO port. Skip it\n"); 648 continue; 649 } 650 drm_dbg_kms(&i915->drm, 651 "the SDVO device with slave addr %2x is found on" 652 " %s port\n", 653 child->slave_addr, 654 (child->dvo_port == DEVICE_PORT_DVOB) ? 655 "SDVOB" : "SDVOC"); 656 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1]; 657 if (!mapping->initialized) { 658 mapping->dvo_port = child->dvo_port; 659 mapping->slave_addr = child->slave_addr; 660 mapping->dvo_wiring = child->dvo_wiring; 661 mapping->ddc_pin = child->ddc_pin; 662 mapping->i2c_pin = child->i2c_pin; 663 mapping->initialized = 1; 664 drm_dbg_kms(&i915->drm, 665 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 666 mapping->dvo_port, mapping->slave_addr, 667 mapping->dvo_wiring, mapping->ddc_pin, 668 mapping->i2c_pin); 669 } else { 670 drm_dbg_kms(&i915->drm, 671 "Maybe one SDVO port is shared by " 672 "two SDVO device.\n"); 673 } 674 if (child->slave2_addr) { 675 /* Maybe this is a SDVO device with multiple inputs */ 676 /* And the mapping info is not added */ 677 drm_dbg_kms(&i915->drm, 678 "there exists the slave2_addr. Maybe this" 679 " is a SDVO device with multiple inputs.\n"); 680 } 681 count++; 682 } 683 684 if (!count) { 685 /* No SDVO device info is found */ 686 drm_dbg_kms(&i915->drm, 687 "No SDVO device info is found in VBT\n"); 688 } 689 } 690 691 static void 692 parse_driver_features(struct drm_i915_private *i915, 693 const struct bdb_header *bdb) 694 { 695 const struct bdb_driver_features *driver; 696 697 driver = find_section(bdb, BDB_DRIVER_FEATURES); 698 if (!driver) 699 return; 700 701 if (DISPLAY_VER(i915) >= 5) { 702 /* 703 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 704 * to mean "eDP". The VBT spec doesn't agree with that 705 * interpretation, but real world VBTs seem to. 706 */ 707 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 708 i915->vbt.int_lvds_support = 0; 709 } else { 710 /* 711 * FIXME it's not clear which BDB version has the LVDS config 712 * bits defined. Revision history in the VBT spec says: 713 * "0.92 | Add two definitions for VBT value of LVDS Active 714 * Config (00b and 11b values defined) | 06/13/2005" 715 * but does not the specify the BDB version. 716 * 717 * So far version 134 (on i945gm) is the oldest VBT observed 718 * in the wild with the bits correctly populated. Version 719 * 108 (on i85x) does not have the bits correctly populated. 720 */ 721 if (bdb->version >= 134 && 722 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 723 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 724 i915->vbt.int_lvds_support = 0; 725 } 726 727 if (bdb->version < 228) { 728 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 729 driver->drrs_enabled); 730 /* 731 * If DRRS is not supported, drrs_type has to be set to 0. 732 * This is because, VBT is configured in such a way that 733 * static DRRS is 0 and DRRS not supported is represented by 734 * driver->drrs_enabled=false 735 */ 736 if (!driver->drrs_enabled) 737 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED; 738 739 i915->vbt.psr.enable = driver->psr_enabled; 740 } 741 } 742 743 static void 744 parse_power_conservation_features(struct drm_i915_private *i915, 745 const struct bdb_header *bdb) 746 { 747 const struct bdb_lfp_power *power; 748 u8 panel_type = i915->vbt.panel_type; 749 750 if (bdb->version < 228) 751 return; 752 753 power = find_section(bdb, BDB_LFP_POWER); 754 if (!power) 755 return; 756 757 i915->vbt.psr.enable = power->psr & BIT(panel_type); 758 759 /* 760 * If DRRS is not supported, drrs_type has to be set to 0. 761 * This is because, VBT is configured in such a way that 762 * static DRRS is 0 and DRRS not supported is represented by 763 * power->drrs & BIT(panel_type)=false 764 */ 765 if (!(power->drrs & BIT(panel_type))) 766 i915->vbt.drrs_type = DRRS_NOT_SUPPORTED; 767 768 if (bdb->version >= 232) 769 i915->vbt.edp.hobl = power->hobl & BIT(panel_type); 770 } 771 772 static void 773 parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb) 774 { 775 const struct bdb_edp *edp; 776 const struct edp_power_seq *edp_pps; 777 const struct edp_fast_link_params *edp_link_params; 778 int panel_type = i915->vbt.panel_type; 779 780 edp = find_section(bdb, BDB_EDP); 781 if (!edp) 782 return; 783 784 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 785 case EDP_18BPP: 786 i915->vbt.edp.bpp = 18; 787 break; 788 case EDP_24BPP: 789 i915->vbt.edp.bpp = 24; 790 break; 791 case EDP_30BPP: 792 i915->vbt.edp.bpp = 30; 793 break; 794 } 795 796 /* Get the eDP sequencing and link info */ 797 edp_pps = &edp->power_seqs[panel_type]; 798 edp_link_params = &edp->fast_link_params[panel_type]; 799 800 i915->vbt.edp.pps = *edp_pps; 801 802 switch (edp_link_params->rate) { 803 case EDP_RATE_1_62: 804 i915->vbt.edp.rate = DP_LINK_BW_1_62; 805 break; 806 case EDP_RATE_2_7: 807 i915->vbt.edp.rate = DP_LINK_BW_2_7; 808 break; 809 default: 810 drm_dbg_kms(&i915->drm, 811 "VBT has unknown eDP link rate value %u\n", 812 edp_link_params->rate); 813 break; 814 } 815 816 switch (edp_link_params->lanes) { 817 case EDP_LANE_1: 818 i915->vbt.edp.lanes = 1; 819 break; 820 case EDP_LANE_2: 821 i915->vbt.edp.lanes = 2; 822 break; 823 case EDP_LANE_4: 824 i915->vbt.edp.lanes = 4; 825 break; 826 default: 827 drm_dbg_kms(&i915->drm, 828 "VBT has unknown eDP lane count value %u\n", 829 edp_link_params->lanes); 830 break; 831 } 832 833 switch (edp_link_params->preemphasis) { 834 case EDP_PREEMPHASIS_NONE: 835 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 836 break; 837 case EDP_PREEMPHASIS_3_5dB: 838 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 839 break; 840 case EDP_PREEMPHASIS_6dB: 841 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 842 break; 843 case EDP_PREEMPHASIS_9_5dB: 844 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 845 break; 846 default: 847 drm_dbg_kms(&i915->drm, 848 "VBT has unknown eDP pre-emphasis value %u\n", 849 edp_link_params->preemphasis); 850 break; 851 } 852 853 switch (edp_link_params->vswing) { 854 case EDP_VSWING_0_4V: 855 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 856 break; 857 case EDP_VSWING_0_6V: 858 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 859 break; 860 case EDP_VSWING_0_8V: 861 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 862 break; 863 case EDP_VSWING_1_2V: 864 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 865 break; 866 default: 867 drm_dbg_kms(&i915->drm, 868 "VBT has unknown eDP voltage swing value %u\n", 869 edp_link_params->vswing); 870 break; 871 } 872 873 if (bdb->version >= 173) { 874 u8 vswing; 875 876 /* Don't read from VBT if module parameter has valid value*/ 877 if (i915->params.edp_vswing) { 878 i915->vbt.edp.low_vswing = 879 i915->params.edp_vswing == 1; 880 } else { 881 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 882 i915->vbt.edp.low_vswing = vswing == 0; 883 } 884 } 885 } 886 887 static void 888 parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb) 889 { 890 const struct bdb_psr *psr; 891 const struct psr_table *psr_table; 892 int panel_type = i915->vbt.panel_type; 893 894 psr = find_section(bdb, BDB_PSR); 895 if (!psr) { 896 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 897 return; 898 } 899 900 psr_table = &psr->psr_table[panel_type]; 901 902 i915->vbt.psr.full_link = psr_table->full_link; 903 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 904 905 /* Allowed VBT values goes from 0 to 15 */ 906 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 907 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 908 909 /* 910 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 911 * Old decimal value is wake up time in multiples of 100 us. 912 */ 913 if (bdb->version >= 205 && 914 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 915 switch (psr_table->tp1_wakeup_time) { 916 case 0: 917 i915->vbt.psr.tp1_wakeup_time_us = 500; 918 break; 919 case 1: 920 i915->vbt.psr.tp1_wakeup_time_us = 100; 921 break; 922 case 3: 923 i915->vbt.psr.tp1_wakeup_time_us = 0; 924 break; 925 default: 926 drm_dbg_kms(&i915->drm, 927 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 928 psr_table->tp1_wakeup_time); 929 fallthrough; 930 case 2: 931 i915->vbt.psr.tp1_wakeup_time_us = 2500; 932 break; 933 } 934 935 switch (psr_table->tp2_tp3_wakeup_time) { 936 case 0: 937 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500; 938 break; 939 case 1: 940 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100; 941 break; 942 case 3: 943 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0; 944 break; 945 default: 946 drm_dbg_kms(&i915->drm, 947 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 948 psr_table->tp2_tp3_wakeup_time); 949 fallthrough; 950 case 2: 951 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 952 break; 953 } 954 } else { 955 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 956 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 957 } 958 959 if (bdb->version >= 226) { 960 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 961 962 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 963 switch (wakeup_time) { 964 case 0: 965 wakeup_time = 500; 966 break; 967 case 1: 968 wakeup_time = 100; 969 break; 970 case 3: 971 wakeup_time = 50; 972 break; 973 default: 974 case 2: 975 wakeup_time = 2500; 976 break; 977 } 978 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 979 } else { 980 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 981 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us; 982 } 983 } 984 985 static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 986 u16 version, enum port port) 987 { 988 if (!i915->vbt.dsi.config->dual_link || version < 197) { 989 i915->vbt.dsi.bl_ports = BIT(port); 990 if (i915->vbt.dsi.config->cabc_supported) 991 i915->vbt.dsi.cabc_ports = BIT(port); 992 993 return; 994 } 995 996 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) { 997 case DL_DCS_PORT_A: 998 i915->vbt.dsi.bl_ports = BIT(PORT_A); 999 break; 1000 case DL_DCS_PORT_C: 1001 i915->vbt.dsi.bl_ports = BIT(PORT_C); 1002 break; 1003 default: 1004 case DL_DCS_PORT_A_AND_C: 1005 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 1006 break; 1007 } 1008 1009 if (!i915->vbt.dsi.config->cabc_supported) 1010 return; 1011 1012 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) { 1013 case DL_DCS_PORT_A: 1014 i915->vbt.dsi.cabc_ports = BIT(PORT_A); 1015 break; 1016 case DL_DCS_PORT_C: 1017 i915->vbt.dsi.cabc_ports = BIT(PORT_C); 1018 break; 1019 default: 1020 case DL_DCS_PORT_A_AND_C: 1021 i915->vbt.dsi.cabc_ports = 1022 BIT(PORT_A) | BIT(PORT_C); 1023 break; 1024 } 1025 } 1026 1027 static void 1028 parse_mipi_config(struct drm_i915_private *i915, 1029 const struct bdb_header *bdb) 1030 { 1031 const struct bdb_mipi_config *start; 1032 const struct mipi_config *config; 1033 const struct mipi_pps_data *pps; 1034 int panel_type = i915->vbt.panel_type; 1035 enum port port; 1036 1037 /* parse MIPI blocks only if LFP type is MIPI */ 1038 if (!intel_bios_is_dsi_present(i915, &port)) 1039 return; 1040 1041 /* Initialize this to undefined indicating no generic MIPI support */ 1042 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1043 1044 /* Block #40 is already parsed and panel_fixed_mode is 1045 * stored in i915->lfp_lvds_vbt_mode 1046 * resuse this when needed 1047 */ 1048 1049 /* Parse #52 for panel index used from panel_type already 1050 * parsed 1051 */ 1052 start = find_section(bdb, BDB_MIPI_CONFIG); 1053 if (!start) { 1054 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1055 return; 1056 } 1057 1058 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1059 panel_type); 1060 1061 /* 1062 * get hold of the correct configuration block and pps data as per 1063 * the panel_type as index 1064 */ 1065 config = &start->config[panel_type]; 1066 pps = &start->pps[panel_type]; 1067 1068 /* store as of now full data. Trim when we realise all is not needed */ 1069 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1070 if (!i915->vbt.dsi.config) 1071 return; 1072 1073 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1074 if (!i915->vbt.dsi.pps) { 1075 kfree(i915->vbt.dsi.config); 1076 return; 1077 } 1078 1079 parse_dsi_backlight_ports(i915, bdb->version, port); 1080 1081 /* FIXME is the 90 vs. 270 correct? */ 1082 switch (config->rotation) { 1083 case ENABLE_ROTATION_0: 1084 /* 1085 * Most (all?) VBTs claim 0 degrees despite having 1086 * an upside down panel, thus we do not trust this. 1087 */ 1088 i915->vbt.dsi.orientation = 1089 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1090 break; 1091 case ENABLE_ROTATION_90: 1092 i915->vbt.dsi.orientation = 1093 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1094 break; 1095 case ENABLE_ROTATION_180: 1096 i915->vbt.dsi.orientation = 1097 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1098 break; 1099 case ENABLE_ROTATION_270: 1100 i915->vbt.dsi.orientation = 1101 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1102 break; 1103 } 1104 1105 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1106 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1107 } 1108 1109 /* Find the sequence block and size for the given panel. */ 1110 static const u8 * 1111 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1112 u16 panel_id, u32 *seq_size) 1113 { 1114 u32 total = get_blocksize(sequence); 1115 const u8 *data = &sequence->data[0]; 1116 u8 current_id; 1117 u32 current_size; 1118 int header_size = sequence->version >= 3 ? 5 : 3; 1119 int index = 0; 1120 int i; 1121 1122 /* skip new block size */ 1123 if (sequence->version >= 3) 1124 data += 4; 1125 1126 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1127 if (index + header_size > total) { 1128 DRM_ERROR("Invalid sequence block (header)\n"); 1129 return NULL; 1130 } 1131 1132 current_id = *(data + index); 1133 if (sequence->version >= 3) 1134 current_size = *((const u32 *)(data + index + 1)); 1135 else 1136 current_size = *((const u16 *)(data + index + 1)); 1137 1138 index += header_size; 1139 1140 if (index + current_size > total) { 1141 DRM_ERROR("Invalid sequence block\n"); 1142 return NULL; 1143 } 1144 1145 if (current_id == panel_id) { 1146 *seq_size = current_size; 1147 return data + index; 1148 } 1149 1150 index += current_size; 1151 } 1152 1153 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1154 1155 return NULL; 1156 } 1157 1158 static int goto_next_sequence(const u8 *data, int index, int total) 1159 { 1160 u16 len; 1161 1162 /* Skip Sequence Byte. */ 1163 for (index = index + 1; index < total; index += len) { 1164 u8 operation_byte = *(data + index); 1165 index++; 1166 1167 switch (operation_byte) { 1168 case MIPI_SEQ_ELEM_END: 1169 return index; 1170 case MIPI_SEQ_ELEM_SEND_PKT: 1171 if (index + 4 > total) 1172 return 0; 1173 1174 len = *((const u16 *)(data + index + 2)) + 4; 1175 break; 1176 case MIPI_SEQ_ELEM_DELAY: 1177 len = 4; 1178 break; 1179 case MIPI_SEQ_ELEM_GPIO: 1180 len = 2; 1181 break; 1182 case MIPI_SEQ_ELEM_I2C: 1183 if (index + 7 > total) 1184 return 0; 1185 len = *(data + index + 6) + 7; 1186 break; 1187 default: 1188 DRM_ERROR("Unknown operation byte\n"); 1189 return 0; 1190 } 1191 } 1192 1193 return 0; 1194 } 1195 1196 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1197 { 1198 int seq_end; 1199 u16 len; 1200 u32 size_of_sequence; 1201 1202 /* 1203 * Could skip sequence based on Size of Sequence alone, but also do some 1204 * checking on the structure. 1205 */ 1206 if (total < 5) { 1207 DRM_ERROR("Too small sequence size\n"); 1208 return 0; 1209 } 1210 1211 /* Skip Sequence Byte. */ 1212 index++; 1213 1214 /* 1215 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1216 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1217 * byte. 1218 */ 1219 size_of_sequence = *((const u32 *)(data + index)); 1220 index += 4; 1221 1222 seq_end = index + size_of_sequence; 1223 if (seq_end > total) { 1224 DRM_ERROR("Invalid sequence size\n"); 1225 return 0; 1226 } 1227 1228 for (; index < total; index += len) { 1229 u8 operation_byte = *(data + index); 1230 index++; 1231 1232 if (operation_byte == MIPI_SEQ_ELEM_END) { 1233 if (index != seq_end) { 1234 DRM_ERROR("Invalid element structure\n"); 1235 return 0; 1236 } 1237 return index; 1238 } 1239 1240 len = *(data + index); 1241 index++; 1242 1243 /* 1244 * FIXME: Would be nice to check elements like for v1/v2 in 1245 * goto_next_sequence() above. 1246 */ 1247 switch (operation_byte) { 1248 case MIPI_SEQ_ELEM_SEND_PKT: 1249 case MIPI_SEQ_ELEM_DELAY: 1250 case MIPI_SEQ_ELEM_GPIO: 1251 case MIPI_SEQ_ELEM_I2C: 1252 case MIPI_SEQ_ELEM_SPI: 1253 case MIPI_SEQ_ELEM_PMIC: 1254 break; 1255 default: 1256 DRM_ERROR("Unknown operation byte %u\n", 1257 operation_byte); 1258 break; 1259 } 1260 } 1261 1262 return 0; 1263 } 1264 1265 /* 1266 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1267 * skip all delay + gpio operands and stop at the first DSI packet op. 1268 */ 1269 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915) 1270 { 1271 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1272 int index, len; 1273 1274 if (drm_WARN_ON(&i915->drm, 1275 !data || i915->vbt.dsi.seq_version != 1)) 1276 return 0; 1277 1278 /* index = 1 to skip sequence byte */ 1279 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1280 switch (data[index]) { 1281 case MIPI_SEQ_ELEM_SEND_PKT: 1282 return index == 1 ? 0 : index; 1283 case MIPI_SEQ_ELEM_DELAY: 1284 len = 5; /* 1 byte for operand + uint32 */ 1285 break; 1286 case MIPI_SEQ_ELEM_GPIO: 1287 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1288 break; 1289 default: 1290 return 0; 1291 } 1292 } 1293 1294 return 0; 1295 } 1296 1297 /* 1298 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1299 * The deassert must be done before calling intel_dsi_device_ready, so for 1300 * these devices we split the init OTP sequence into a deassert sequence and 1301 * the actual init OTP part. 1302 */ 1303 static void fixup_mipi_sequences(struct drm_i915_private *i915) 1304 { 1305 u8 *init_otp; 1306 int len; 1307 1308 /* Limit this to VLV for now. */ 1309 if (!IS_VALLEYVIEW(i915)) 1310 return; 1311 1312 /* Limit this to v1 vid-mode sequences */ 1313 if (i915->vbt.dsi.config->is_cmd_mode || 1314 i915->vbt.dsi.seq_version != 1) 1315 return; 1316 1317 /* Only do this if there are otp and assert seqs and no deassert seq */ 1318 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1319 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1320 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1321 return; 1322 1323 /* The deassert-sequence ends at the first DSI packet */ 1324 len = get_init_otp_deassert_fragment_len(i915); 1325 if (!len) 1326 return; 1327 1328 drm_dbg_kms(&i915->drm, 1329 "Using init OTP fragment to deassert reset\n"); 1330 1331 /* Copy the fragment, update seq byte and terminate it */ 1332 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1333 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1334 if (!i915->vbt.dsi.deassert_seq) 1335 return; 1336 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1337 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1338 /* Use the copy for deassert */ 1339 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1340 i915->vbt.dsi.deassert_seq; 1341 /* Replace the last byte of the fragment with init OTP seq byte */ 1342 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1343 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1344 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1345 } 1346 1347 static void 1348 parse_mipi_sequence(struct drm_i915_private *i915, 1349 const struct bdb_header *bdb) 1350 { 1351 int panel_type = i915->vbt.panel_type; 1352 const struct bdb_mipi_sequence *sequence; 1353 const u8 *seq_data; 1354 u32 seq_size; 1355 u8 *data; 1356 int index = 0; 1357 1358 /* Only our generic panel driver uses the sequence block. */ 1359 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1360 return; 1361 1362 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1363 if (!sequence) { 1364 drm_dbg_kms(&i915->drm, 1365 "No MIPI Sequence found, parsing complete\n"); 1366 return; 1367 } 1368 1369 /* Fail gracefully for forward incompatible sequence block. */ 1370 if (sequence->version >= 4) { 1371 drm_err(&i915->drm, 1372 "Unable to parse MIPI Sequence Block v%u\n", 1373 sequence->version); 1374 return; 1375 } 1376 1377 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 1378 sequence->version); 1379 1380 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1381 if (!seq_data) 1382 return; 1383 1384 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1385 if (!data) 1386 return; 1387 1388 /* Parse the sequences, store pointers to each sequence. */ 1389 for (;;) { 1390 u8 seq_id = *(data + index); 1391 if (seq_id == MIPI_SEQ_END) 1392 break; 1393 1394 if (seq_id >= MIPI_SEQ_MAX) { 1395 drm_err(&i915->drm, "Unknown sequence %u\n", 1396 seq_id); 1397 goto err; 1398 } 1399 1400 /* Log about presence of sequences we won't run. */ 1401 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1402 drm_dbg_kms(&i915->drm, 1403 "Unsupported sequence %u\n", seq_id); 1404 1405 i915->vbt.dsi.sequence[seq_id] = data + index; 1406 1407 if (sequence->version >= 3) 1408 index = goto_next_sequence_v3(data, index, seq_size); 1409 else 1410 index = goto_next_sequence(data, index, seq_size); 1411 if (!index) { 1412 drm_err(&i915->drm, "Invalid sequence %u\n", 1413 seq_id); 1414 goto err; 1415 } 1416 } 1417 1418 i915->vbt.dsi.data = data; 1419 i915->vbt.dsi.size = seq_size; 1420 i915->vbt.dsi.seq_version = sequence->version; 1421 1422 fixup_mipi_sequences(i915); 1423 1424 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 1425 return; 1426 1427 err: 1428 kfree(data); 1429 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence)); 1430 } 1431 1432 static void 1433 parse_compression_parameters(struct drm_i915_private *i915, 1434 const struct bdb_header *bdb) 1435 { 1436 const struct bdb_compression_parameters *params; 1437 struct intel_bios_encoder_data *devdata; 1438 const struct child_device_config *child; 1439 u16 block_size; 1440 int index; 1441 1442 if (bdb->version < 198) 1443 return; 1444 1445 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1446 if (params) { 1447 /* Sanity checks */ 1448 if (params->entry_size != sizeof(params->data[0])) { 1449 drm_dbg_kms(&i915->drm, 1450 "VBT: unsupported compression param entry size\n"); 1451 return; 1452 } 1453 1454 block_size = get_blocksize(params); 1455 if (block_size < sizeof(*params)) { 1456 drm_dbg_kms(&i915->drm, 1457 "VBT: expected 16 compression param entries\n"); 1458 return; 1459 } 1460 } 1461 1462 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1463 child = &devdata->child; 1464 1465 if (!child->compression_enable) 1466 continue; 1467 1468 if (!params) { 1469 drm_dbg_kms(&i915->drm, 1470 "VBT: compression params not available\n"); 1471 continue; 1472 } 1473 1474 if (child->compression_method_cps) { 1475 drm_dbg_kms(&i915->drm, 1476 "VBT: CPS compression not supported\n"); 1477 continue; 1478 } 1479 1480 index = child->compression_structure_index; 1481 1482 devdata->dsc = kmemdup(¶ms->data[index], 1483 sizeof(*devdata->dsc), GFP_KERNEL); 1484 } 1485 } 1486 1487 static u8 translate_iboost(u8 val) 1488 { 1489 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1490 1491 if (val >= ARRAY_SIZE(mapping)) { 1492 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1493 return 0; 1494 } 1495 return mapping[val]; 1496 } 1497 1498 static const u8 cnp_ddc_pin_map[] = { 1499 [0] = 0, /* N/A */ 1500 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1501 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1502 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1503 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1504 }; 1505 1506 static const u8 icp_ddc_pin_map[] = { 1507 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1508 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1509 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1510 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1511 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1512 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1513 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1514 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1515 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1516 }; 1517 1518 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 1519 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1520 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1521 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, 1522 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, 1523 }; 1524 1525 static const u8 adls_ddc_pin_map[] = { 1526 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1527 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1528 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1529 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1530 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1531 }; 1532 1533 static const u8 gen9bc_tgp_ddc_pin_map[] = { 1534 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1535 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, 1536 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP, 1537 }; 1538 1539 static const u8 adlp_ddc_pin_map[] = { 1540 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1541 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1542 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1543 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1544 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1545 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1546 }; 1547 1548 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 1549 { 1550 const u8 *ddc_pin_map; 1551 int n_entries; 1552 1553 if (IS_ALDERLAKE_P(i915)) { 1554 ddc_pin_map = adlp_ddc_pin_map; 1555 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 1556 } else if (IS_ALDERLAKE_S(i915)) { 1557 ddc_pin_map = adls_ddc_pin_map; 1558 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 1559 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 1560 return vbt_pin; 1561 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 1562 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 1563 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 1564 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 1565 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 1566 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 1567 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 1568 ddc_pin_map = icp_ddc_pin_map; 1569 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1570 } else if (HAS_PCH_CNP(i915)) { 1571 ddc_pin_map = cnp_ddc_pin_map; 1572 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1573 } else { 1574 /* Assuming direct map */ 1575 return vbt_pin; 1576 } 1577 1578 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1579 return ddc_pin_map[vbt_pin]; 1580 1581 drm_dbg_kms(&i915->drm, 1582 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1583 vbt_pin); 1584 return 0; 1585 } 1586 1587 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1588 { 1589 const struct intel_bios_encoder_data *devdata; 1590 enum port port; 1591 1592 if (!ddc_pin) 1593 return PORT_NONE; 1594 1595 for_each_port(port) { 1596 devdata = i915->vbt.ports[port]; 1597 1598 if (devdata && ddc_pin == devdata->child.ddc_pin) 1599 return port; 1600 } 1601 1602 return PORT_NONE; 1603 } 1604 1605 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata, 1606 enum port port) 1607 { 1608 struct drm_i915_private *i915 = devdata->i915; 1609 struct child_device_config *child; 1610 u8 mapped_ddc_pin; 1611 enum port p; 1612 1613 if (!devdata->child.ddc_pin) 1614 return; 1615 1616 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin); 1617 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) { 1618 drm_dbg_kms(&i915->drm, 1619 "Port %c has invalid DDC pin %d, " 1620 "sticking to defaults\n", 1621 port_name(port), mapped_ddc_pin); 1622 devdata->child.ddc_pin = 0; 1623 return; 1624 } 1625 1626 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin); 1627 if (p == PORT_NONE) 1628 return; 1629 1630 drm_dbg_kms(&i915->drm, 1631 "port %c trying to use the same DDC pin (0x%x) as port %c, " 1632 "disabling port %c DVI/HDMI support\n", 1633 port_name(port), mapped_ddc_pin, 1634 port_name(p), port_name(p)); 1635 1636 /* 1637 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi 1638 * couldn't exist on the shared port. Otherwise they share the same ddc 1639 * pin and system couldn't communicate with them separately. 1640 * 1641 * Give inverse child device order the priority, last one wins. Yes, 1642 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 1643 * port A and port E with the same AUX ch and we must pick port E :( 1644 */ 1645 child = &i915->vbt.ports[p]->child; 1646 1647 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 1648 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 1649 1650 child->ddc_pin = 0; 1651 } 1652 1653 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1654 { 1655 const struct intel_bios_encoder_data *devdata; 1656 enum port port; 1657 1658 if (!aux_ch) 1659 return PORT_NONE; 1660 1661 for_each_port(port) { 1662 devdata = i915->vbt.ports[port]; 1663 1664 if (devdata && aux_ch == devdata->child.aux_channel) 1665 return port; 1666 } 1667 1668 return PORT_NONE; 1669 } 1670 1671 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata, 1672 enum port port) 1673 { 1674 struct drm_i915_private *i915 = devdata->i915; 1675 struct child_device_config *child; 1676 enum port p; 1677 1678 p = get_port_by_aux_ch(i915, devdata->child.aux_channel); 1679 if (p == PORT_NONE) 1680 return; 1681 1682 drm_dbg_kms(&i915->drm, 1683 "port %c trying to use the same AUX CH (0x%x) as port %c, " 1684 "disabling port %c DP support\n", 1685 port_name(port), devdata->child.aux_channel, 1686 port_name(p), port_name(p)); 1687 1688 /* 1689 * If we have multiple ports supposedly sharing the aux channel, then DP 1690 * couldn't exist on the shared port. Otherwise they share the same aux 1691 * channel and system couldn't communicate with them separately. 1692 * 1693 * Give inverse child device order the priority, last one wins. Yes, 1694 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 1695 * port A and port E with the same AUX ch and we must pick port E :( 1696 */ 1697 child = &i915->vbt.ports[p]->child; 1698 1699 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1700 child->aux_channel = 0; 1701 } 1702 1703 static u8 dvo_port_type(u8 dvo_port) 1704 { 1705 switch (dvo_port) { 1706 case DVO_PORT_HDMIA: 1707 case DVO_PORT_HDMIB: 1708 case DVO_PORT_HDMIC: 1709 case DVO_PORT_HDMID: 1710 case DVO_PORT_HDMIE: 1711 case DVO_PORT_HDMIF: 1712 case DVO_PORT_HDMIG: 1713 case DVO_PORT_HDMIH: 1714 case DVO_PORT_HDMII: 1715 return DVO_PORT_HDMIA; 1716 case DVO_PORT_DPA: 1717 case DVO_PORT_DPB: 1718 case DVO_PORT_DPC: 1719 case DVO_PORT_DPD: 1720 case DVO_PORT_DPE: 1721 case DVO_PORT_DPF: 1722 case DVO_PORT_DPG: 1723 case DVO_PORT_DPH: 1724 case DVO_PORT_DPI: 1725 return DVO_PORT_DPA; 1726 case DVO_PORT_MIPIA: 1727 case DVO_PORT_MIPIB: 1728 case DVO_PORT_MIPIC: 1729 case DVO_PORT_MIPID: 1730 return DVO_PORT_MIPIA; 1731 default: 1732 return dvo_port; 1733 } 1734 } 1735 1736 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 1737 const int port_mapping[][3], u8 dvo_port) 1738 { 1739 enum port port; 1740 int i; 1741 1742 for (port = PORT_A; port < n_ports; port++) { 1743 for (i = 0; i < n_dvo; i++) { 1744 if (port_mapping[port][i] == -1) 1745 break; 1746 1747 if (dvo_port == port_mapping[port][i]) 1748 return port; 1749 } 1750 } 1751 1752 return PORT_NONE; 1753 } 1754 1755 static enum port dvo_port_to_port(struct drm_i915_private *i915, 1756 u8 dvo_port) 1757 { 1758 /* 1759 * Each DDI port can have more than one value on the "DVO Port" field, 1760 * so look for all the possible values for each port. 1761 */ 1762 static const int port_mapping[][3] = { 1763 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1764 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1765 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1766 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1767 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 1768 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1769 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1770 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 1771 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 1772 }; 1773 /* 1774 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 1775 * map to DDI A,B,TC1,TC2 respectively. 1776 */ 1777 static const int rkl_port_mapping[][3] = { 1778 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1779 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1780 [PORT_C] = { -1 }, 1781 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1782 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1783 }; 1784 /* 1785 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 1786 * PORT_F and PORT_G, we need to map that to correct VBT sections. 1787 */ 1788 static const int adls_port_mapping[][3] = { 1789 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1790 [PORT_B] = { -1 }, 1791 [PORT_C] = { -1 }, 1792 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1793 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1794 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1795 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 1796 }; 1797 static const int xelpd_port_mapping[][3] = { 1798 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1799 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1800 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1801 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1802 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 1803 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1804 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1805 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 1806 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 1807 }; 1808 1809 if (DISPLAY_VER(i915) == 13) 1810 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 1811 ARRAY_SIZE(xelpd_port_mapping[0]), 1812 xelpd_port_mapping, 1813 dvo_port); 1814 else if (IS_ALDERLAKE_S(i915)) 1815 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 1816 ARRAY_SIZE(adls_port_mapping[0]), 1817 adls_port_mapping, 1818 dvo_port); 1819 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 1820 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 1821 ARRAY_SIZE(rkl_port_mapping[0]), 1822 rkl_port_mapping, 1823 dvo_port); 1824 else 1825 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 1826 ARRAY_SIZE(port_mapping[0]), 1827 port_mapping, 1828 dvo_port); 1829 } 1830 1831 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 1832 { 1833 switch (vbt_max_link_rate) { 1834 default: 1835 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 1836 return 0; 1837 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 1838 return 2000000; 1839 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 1840 return 1350000; 1841 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 1842 return 1000000; 1843 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 1844 return 810000; 1845 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 1846 return 540000; 1847 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 1848 return 270000; 1849 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 1850 return 162000; 1851 } 1852 } 1853 1854 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 1855 { 1856 switch (vbt_max_link_rate) { 1857 default: 1858 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 1859 return 810000; 1860 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 1861 return 540000; 1862 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 1863 return 270000; 1864 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 1865 return 162000; 1866 } 1867 } 1868 1869 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 1870 { 1871 if (!devdata || devdata->i915->vbt.version < 216) 1872 return 0; 1873 1874 if (devdata->i915->vbt.version >= 230) 1875 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 1876 else 1877 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 1878 } 1879 1880 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 1881 enum port port) 1882 { 1883 struct drm_i915_private *i915 = devdata->i915; 1884 bool is_hdmi; 1885 1886 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 1887 return; 1888 1889 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING)) 1890 return; 1891 1892 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT); 1893 1894 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 1895 is_hdmi ? "/HDMI" : ""); 1896 1897 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 1898 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 1899 } 1900 1901 static bool 1902 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 1903 { 1904 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1905 } 1906 1907 bool 1908 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 1909 { 1910 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1911 } 1912 1913 bool 1914 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 1915 { 1916 return intel_bios_encoder_supports_dvi(devdata) && 1917 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1918 } 1919 1920 bool 1921 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 1922 { 1923 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1924 } 1925 1926 static bool 1927 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 1928 { 1929 return intel_bios_encoder_supports_dp(devdata) && 1930 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 1931 } 1932 1933 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 1934 { 1935 if (!devdata || devdata->i915->vbt.version < 158) 1936 return -1; 1937 1938 return devdata->child.hdmi_level_shifter_value; 1939 } 1940 1941 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 1942 { 1943 if (!devdata || devdata->i915->vbt.version < 204) 1944 return 0; 1945 1946 switch (devdata->child.hdmi_max_data_rate) { 1947 default: 1948 MISSING_CASE(devdata->child.hdmi_max_data_rate); 1949 fallthrough; 1950 case HDMI_MAX_DATA_RATE_PLATFORM: 1951 return 0; 1952 case HDMI_MAX_DATA_RATE_297: 1953 return 297000; 1954 case HDMI_MAX_DATA_RATE_165: 1955 return 165000; 1956 } 1957 } 1958 1959 static bool is_port_valid(struct drm_i915_private *i915, enum port port) 1960 { 1961 /* 1962 * On some ICL SKUs port F is not present, but broken VBTs mark 1963 * the port as present. Only try to initialize port F for the 1964 * SKUs that may actually have it. 1965 */ 1966 if (port == PORT_F && IS_ICELAKE(i915)) 1967 return IS_ICL_WITH_PORT_F(i915); 1968 1969 return true; 1970 } 1971 1972 static void parse_ddi_port(struct drm_i915_private *i915, 1973 struct intel_bios_encoder_data *devdata) 1974 { 1975 const struct child_device_config *child = &devdata->child; 1976 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt; 1977 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 1978 enum port port; 1979 1980 port = dvo_port_to_port(i915, child->dvo_port); 1981 if (port == PORT_NONE) 1982 return; 1983 1984 if (!is_port_valid(i915, port)) { 1985 drm_dbg_kms(&i915->drm, 1986 "VBT reports port %c as supported, but that can't be true: skipping\n", 1987 port_name(port)); 1988 return; 1989 } 1990 1991 if (i915->vbt.ports[port]) { 1992 drm_dbg_kms(&i915->drm, 1993 "More than one child device for port %c in VBT, using the first.\n", 1994 port_name(port)); 1995 return; 1996 } 1997 1998 sanitize_device_type(devdata, port); 1999 2000 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2001 is_dp = intel_bios_encoder_supports_dp(devdata); 2002 is_crt = intel_bios_encoder_supports_crt(devdata); 2003 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2004 is_edp = intel_bios_encoder_supports_edp(devdata); 2005 2006 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2007 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2008 2009 drm_dbg_kms(&i915->drm, 2010 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2011 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 2012 HAS_LSPCON(i915) && child->lspcon, 2013 supports_typec_usb, supports_tbt, 2014 devdata->dsc != NULL); 2015 2016 if (is_dvi) 2017 sanitize_ddc_pin(devdata, port); 2018 2019 if (is_dp) 2020 sanitize_aux_ch(devdata, port); 2021 2022 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata); 2023 if (hdmi_level_shift >= 0) { 2024 drm_dbg_kms(&i915->drm, 2025 "Port %c VBT HDMI level shift: %d\n", 2026 port_name(port), hdmi_level_shift); 2027 } 2028 2029 max_tmds_clock = _intel_bios_max_tmds_clock(devdata); 2030 if (max_tmds_clock) 2031 drm_dbg_kms(&i915->drm, 2032 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2033 port_name(port), max_tmds_clock); 2034 2035 /* I_boost config for SKL and above */ 2036 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata); 2037 if (dp_boost_level) 2038 drm_dbg_kms(&i915->drm, 2039 "Port %c VBT (e)DP boost level: %d\n", 2040 port_name(port), dp_boost_level); 2041 2042 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata); 2043 if (hdmi_boost_level) 2044 drm_dbg_kms(&i915->drm, 2045 "Port %c VBT HDMI boost level: %d\n", 2046 port_name(port), hdmi_boost_level); 2047 2048 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata); 2049 if (dp_max_link_rate) 2050 drm_dbg_kms(&i915->drm, 2051 "Port %c VBT DP max link rate: %d\n", 2052 port_name(port), dp_max_link_rate); 2053 2054 i915->vbt.ports[port] = devdata; 2055 } 2056 2057 static bool has_ddi_port_info(struct drm_i915_private *i915) 2058 { 2059 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915); 2060 } 2061 2062 static void parse_ddi_ports(struct drm_i915_private *i915) 2063 { 2064 struct intel_bios_encoder_data *devdata; 2065 2066 if (!has_ddi_port_info(i915)) 2067 return; 2068 2069 list_for_each_entry(devdata, &i915->vbt.display_devices, node) 2070 parse_ddi_port(i915, devdata); 2071 } 2072 2073 static void 2074 parse_general_definitions(struct drm_i915_private *i915, 2075 const struct bdb_header *bdb) 2076 { 2077 const struct bdb_general_definitions *defs; 2078 struct intel_bios_encoder_data *devdata; 2079 const struct child_device_config *child; 2080 int i, child_device_num; 2081 u8 expected_size; 2082 u16 block_size; 2083 int bus_pin; 2084 2085 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 2086 if (!defs) { 2087 drm_dbg_kms(&i915->drm, 2088 "No general definition block is found, no devices defined.\n"); 2089 return; 2090 } 2091 2092 block_size = get_blocksize(defs); 2093 if (block_size < sizeof(*defs)) { 2094 drm_dbg_kms(&i915->drm, 2095 "General definitions block too small (%u)\n", 2096 block_size); 2097 return; 2098 } 2099 2100 bus_pin = defs->crt_ddc_gmbus_pin; 2101 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2102 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2103 i915->vbt.crt_ddc_pin = bus_pin; 2104 2105 if (bdb->version < 106) { 2106 expected_size = 22; 2107 } else if (bdb->version < 111) { 2108 expected_size = 27; 2109 } else if (bdb->version < 195) { 2110 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2111 } else if (bdb->version == 195) { 2112 expected_size = 37; 2113 } else if (bdb->version <= 215) { 2114 expected_size = 38; 2115 } else if (bdb->version <= 237) { 2116 expected_size = 39; 2117 } else { 2118 expected_size = sizeof(*child); 2119 BUILD_BUG_ON(sizeof(*child) < 39); 2120 drm_dbg(&i915->drm, 2121 "Expected child device config size for VBT version %u not known; assuming %u\n", 2122 bdb->version, expected_size); 2123 } 2124 2125 /* Flag an error for unexpected size, but continue anyway. */ 2126 if (defs->child_dev_size != expected_size) 2127 drm_err(&i915->drm, 2128 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2129 defs->child_dev_size, expected_size, bdb->version); 2130 2131 /* The legacy sized child device config is the minimum we need. */ 2132 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2133 drm_dbg_kms(&i915->drm, 2134 "Child device config size %u is too small.\n", 2135 defs->child_dev_size); 2136 return; 2137 } 2138 2139 /* get the number of child device */ 2140 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2141 2142 for (i = 0; i < child_device_num; i++) { 2143 child = child_device_ptr(defs, i); 2144 if (!child->device_type) 2145 continue; 2146 2147 drm_dbg_kms(&i915->drm, 2148 "Found VBT child device with type 0x%x\n", 2149 child->device_type); 2150 2151 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2152 if (!devdata) 2153 break; 2154 2155 devdata->i915 = i915; 2156 2157 /* 2158 * Copy as much as we know (sizeof) and is available 2159 * (child_dev_size) of the child device config. Accessing the 2160 * data must depend on VBT version. 2161 */ 2162 memcpy(&devdata->child, child, 2163 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2164 2165 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2166 } 2167 2168 if (list_empty(&i915->vbt.display_devices)) 2169 drm_dbg_kms(&i915->drm, 2170 "no child dev is parsed from VBT\n"); 2171 } 2172 2173 /* Common defaults which may be overridden by VBT. */ 2174 static void 2175 init_vbt_defaults(struct drm_i915_private *i915) 2176 { 2177 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2178 2179 /* Default to having backlight */ 2180 i915->vbt.backlight.present = true; 2181 2182 /* LFP panel data */ 2183 i915->vbt.lvds_dither = 1; 2184 2185 /* SDVO panel data */ 2186 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2187 2188 /* general features */ 2189 i915->vbt.int_tv_support = 1; 2190 i915->vbt.int_crt_support = 1; 2191 2192 /* driver features */ 2193 i915->vbt.int_lvds_support = 1; 2194 2195 /* Default to using SSC */ 2196 i915->vbt.lvds_use_ssc = 1; 2197 /* 2198 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2199 * clock for LVDS. 2200 */ 2201 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2202 !HAS_PCH_SPLIT(i915)); 2203 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2204 i915->vbt.lvds_ssc_freq); 2205 } 2206 2207 /* Defaults to initialize only if there is no VBT. */ 2208 static void 2209 init_vbt_missing_defaults(struct drm_i915_private *i915) 2210 { 2211 enum port port; 2212 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2213 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2214 2215 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2216 return; 2217 2218 for_each_port_masked(port, ports) { 2219 struct intel_bios_encoder_data *devdata; 2220 struct child_device_config *child; 2221 enum phy phy = intel_port_to_phy(i915, port); 2222 2223 /* 2224 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2225 * to detect it. 2226 */ 2227 if (intel_phy_is_tc(i915, phy)) 2228 continue; 2229 2230 /* Create fake child device config */ 2231 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2232 if (!devdata) 2233 break; 2234 2235 devdata->i915 = i915; 2236 child = &devdata->child; 2237 2238 if (port == PORT_F) 2239 child->dvo_port = DVO_PORT_HDMIF; 2240 else if (port == PORT_E) 2241 child->dvo_port = DVO_PORT_HDMIE; 2242 else 2243 child->dvo_port = DVO_PORT_HDMIA + port; 2244 2245 if (port != PORT_A && port != PORT_E) 2246 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2247 2248 if (port != PORT_E) 2249 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2250 2251 if (port == PORT_A) 2252 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2253 2254 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2255 2256 drm_dbg_kms(&i915->drm, 2257 "Generating default VBT child device with type 0x04%x on port %c\n", 2258 child->device_type, port_name(port)); 2259 } 2260 2261 /* Bypass some minimum baseline VBT version checks */ 2262 i915->vbt.version = 155; 2263 } 2264 2265 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2266 { 2267 const void *_vbt = vbt; 2268 2269 return _vbt + vbt->bdb_offset; 2270 } 2271 2272 /** 2273 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2274 * @buf: pointer to a buffer to validate 2275 * @size: size of the buffer 2276 * 2277 * Returns true on valid VBT. 2278 */ 2279 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2280 { 2281 const struct vbt_header *vbt = buf; 2282 const struct bdb_header *bdb; 2283 2284 if (!vbt) 2285 return false; 2286 2287 if (sizeof(struct vbt_header) > size) { 2288 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2289 return false; 2290 } 2291 2292 if (memcmp(vbt->signature, "$VBT", 4)) { 2293 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2294 return false; 2295 } 2296 2297 if (vbt->vbt_size > size) { 2298 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2299 return false; 2300 } 2301 2302 size = vbt->vbt_size; 2303 2304 if (range_overflows_t(size_t, 2305 vbt->bdb_offset, 2306 sizeof(struct bdb_header), 2307 size)) { 2308 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2309 return false; 2310 } 2311 2312 bdb = get_bdb_header(vbt); 2313 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2314 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2315 return false; 2316 } 2317 2318 return vbt; 2319 } 2320 2321 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) 2322 { 2323 u32 count, data, found, store = 0; 2324 u32 static_region, oprom_offset; 2325 u32 oprom_size = 0x200000; 2326 u16 vbt_size; 2327 u32 *vbt; 2328 2329 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); 2330 static_region &= OPTIONROM_SPI_REGIONID_MASK; 2331 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); 2332 2333 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); 2334 oprom_offset &= OROM_OFFSET_MASK; 2335 2336 for (count = 0; count < oprom_size; count += 4) { 2337 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count); 2338 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2339 2340 if (data == *((const u32 *)"$VBT")) { 2341 found = oprom_offset + count; 2342 break; 2343 } 2344 } 2345 2346 if (count >= oprom_size) 2347 goto err_not_found; 2348 2349 /* Get VBT size and allocate space for the VBT */ 2350 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + 2351 offsetof(struct vbt_header, vbt_size)); 2352 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2353 vbt_size &= 0xffff; 2354 2355 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 2356 if (!vbt) 2357 goto err_not_found; 2358 2359 for (count = 0; count < vbt_size; count += 4) { 2360 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count); 2361 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2362 *(vbt + store++) = data; 2363 } 2364 2365 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2366 goto err_free_vbt; 2367 2368 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); 2369 2370 return (struct vbt_header *)vbt; 2371 2372 err_free_vbt: 2373 kfree(vbt); 2374 err_not_found: 2375 return NULL; 2376 } 2377 2378 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 2379 { 2380 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 2381 void __iomem *p = NULL, *oprom; 2382 struct vbt_header *vbt; 2383 u16 vbt_size; 2384 size_t i, size; 2385 2386 oprom = pci_map_rom(pdev, &size); 2387 if (!oprom) 2388 return NULL; 2389 2390 /* Scour memory looking for the VBT signature. */ 2391 for (i = 0; i + 4 < size; i += 4) { 2392 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2393 continue; 2394 2395 p = oprom + i; 2396 size -= i; 2397 break; 2398 } 2399 2400 if (!p) 2401 goto err_unmap_oprom; 2402 2403 if (sizeof(struct vbt_header) > size) { 2404 drm_dbg(&i915->drm, "VBT header incomplete\n"); 2405 goto err_unmap_oprom; 2406 } 2407 2408 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2409 if (vbt_size > size) { 2410 drm_dbg(&i915->drm, 2411 "VBT incomplete (vbt_size overflows)\n"); 2412 goto err_unmap_oprom; 2413 } 2414 2415 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2416 vbt = kmalloc(vbt_size, GFP_KERNEL); 2417 if (!vbt) 2418 goto err_unmap_oprom; 2419 2420 memcpy_fromio(vbt, p, vbt_size); 2421 2422 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2423 goto err_free_vbt; 2424 2425 pci_unmap_rom(pdev, oprom); 2426 2427 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 2428 2429 return vbt; 2430 2431 err_free_vbt: 2432 kfree(vbt); 2433 err_unmap_oprom: 2434 pci_unmap_rom(pdev, oprom); 2435 2436 return NULL; 2437 } 2438 2439 /** 2440 * intel_bios_init - find VBT and initialize settings from the BIOS 2441 * @i915: i915 device instance 2442 * 2443 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2444 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2445 * initialize some defaults if the VBT is not present at all. 2446 */ 2447 void intel_bios_init(struct drm_i915_private *i915) 2448 { 2449 const struct vbt_header *vbt = i915->opregion.vbt; 2450 struct vbt_header *oprom_vbt = NULL; 2451 const struct bdb_header *bdb; 2452 2453 INIT_LIST_HEAD(&i915->vbt.display_devices); 2454 2455 if (!HAS_DISPLAY(i915)) { 2456 drm_dbg_kms(&i915->drm, 2457 "Skipping VBT init due to disabled display.\n"); 2458 return; 2459 } 2460 2461 init_vbt_defaults(i915); 2462 2463 /* 2464 * If the OpRegion does not have VBT, look in SPI flash through MMIO or 2465 * PCI mapping 2466 */ 2467 if (!vbt && IS_DGFX(i915)) { 2468 oprom_vbt = spi_oprom_get_vbt(i915); 2469 vbt = oprom_vbt; 2470 } 2471 2472 if (!vbt) { 2473 oprom_vbt = oprom_get_vbt(i915); 2474 vbt = oprom_vbt; 2475 } 2476 2477 if (!vbt) 2478 goto out; 2479 2480 bdb = get_bdb_header(vbt); 2481 i915->vbt.version = bdb->version; 2482 2483 drm_dbg_kms(&i915->drm, 2484 "VBT signature \"%.*s\", BDB version %d\n", 2485 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2486 2487 /* Grab useful general definitions */ 2488 parse_general_features(i915, bdb); 2489 parse_general_definitions(i915, bdb); 2490 parse_panel_options(i915, bdb); 2491 parse_panel_dtd(i915, bdb); 2492 parse_lfp_backlight(i915, bdb); 2493 parse_sdvo_panel_data(i915, bdb); 2494 parse_driver_features(i915, bdb); 2495 parse_power_conservation_features(i915, bdb); 2496 parse_edp(i915, bdb); 2497 parse_psr(i915, bdb); 2498 parse_mipi_config(i915, bdb); 2499 parse_mipi_sequence(i915, bdb); 2500 2501 /* Depends on child device list */ 2502 parse_compression_parameters(i915, bdb); 2503 2504 out: 2505 if (!vbt) { 2506 drm_info(&i915->drm, 2507 "Failed to find VBIOS tables (VBT)\n"); 2508 init_vbt_missing_defaults(i915); 2509 } 2510 2511 /* Further processing on pre-parsed or generated child device data */ 2512 parse_sdvo_device_mapping(i915); 2513 parse_ddi_ports(i915); 2514 2515 kfree(oprom_vbt); 2516 } 2517 2518 /** 2519 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2520 * @i915: i915 device instance 2521 */ 2522 void intel_bios_driver_remove(struct drm_i915_private *i915) 2523 { 2524 struct intel_bios_encoder_data *devdata, *n; 2525 2526 list_for_each_entry_safe(devdata, n, &i915->vbt.display_devices, node) { 2527 list_del(&devdata->node); 2528 kfree(devdata->dsc); 2529 kfree(devdata); 2530 } 2531 2532 kfree(i915->vbt.sdvo_lvds_vbt_mode); 2533 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2534 kfree(i915->vbt.lfp_lvds_vbt_mode); 2535 i915->vbt.lfp_lvds_vbt_mode = NULL; 2536 kfree(i915->vbt.dsi.data); 2537 i915->vbt.dsi.data = NULL; 2538 kfree(i915->vbt.dsi.pps); 2539 i915->vbt.dsi.pps = NULL; 2540 kfree(i915->vbt.dsi.config); 2541 i915->vbt.dsi.config = NULL; 2542 kfree(i915->vbt.dsi.deassert_seq); 2543 i915->vbt.dsi.deassert_seq = NULL; 2544 } 2545 2546 /** 2547 * intel_bios_is_tv_present - is integrated TV present in VBT 2548 * @i915: i915 device instance 2549 * 2550 * Return true if TV is present. If no child devices were parsed from VBT, 2551 * assume TV is present. 2552 */ 2553 bool intel_bios_is_tv_present(struct drm_i915_private *i915) 2554 { 2555 const struct intel_bios_encoder_data *devdata; 2556 const struct child_device_config *child; 2557 2558 if (!i915->vbt.int_tv_support) 2559 return false; 2560 2561 if (list_empty(&i915->vbt.display_devices)) 2562 return true; 2563 2564 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2565 child = &devdata->child; 2566 2567 /* 2568 * If the device type is not TV, continue. 2569 */ 2570 switch (child->device_type) { 2571 case DEVICE_TYPE_INT_TV: 2572 case DEVICE_TYPE_TV: 2573 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2574 break; 2575 default: 2576 continue; 2577 } 2578 /* Only when the addin_offset is non-zero, it is regarded 2579 * as present. 2580 */ 2581 if (child->addin_offset) 2582 return true; 2583 } 2584 2585 return false; 2586 } 2587 2588 /** 2589 * intel_bios_is_lvds_present - is LVDS present in VBT 2590 * @i915: i915 device instance 2591 * @i2c_pin: i2c pin for LVDS if present 2592 * 2593 * Return true if LVDS is present. If no child devices were parsed from VBT, 2594 * assume LVDS is present. 2595 */ 2596 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 2597 { 2598 const struct intel_bios_encoder_data *devdata; 2599 const struct child_device_config *child; 2600 2601 if (list_empty(&i915->vbt.display_devices)) 2602 return true; 2603 2604 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2605 child = &devdata->child; 2606 2607 /* If the device type is not LFP, continue. 2608 * We have to check both the new identifiers as well as the 2609 * old for compatibility with some BIOSes. 2610 */ 2611 if (child->device_type != DEVICE_TYPE_INT_LFP && 2612 child->device_type != DEVICE_TYPE_LFP) 2613 continue; 2614 2615 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 2616 *i2c_pin = child->i2c_pin; 2617 2618 /* However, we cannot trust the BIOS writers to populate 2619 * the VBT correctly. Since LVDS requires additional 2620 * information from AIM blocks, a non-zero addin offset is 2621 * a good indicator that the LVDS is actually present. 2622 */ 2623 if (child->addin_offset) 2624 return true; 2625 2626 /* But even then some BIOS writers perform some black magic 2627 * and instantiate the device without reference to any 2628 * additional data. Trust that if the VBT was written into 2629 * the OpRegion then they have validated the LVDS's existence. 2630 */ 2631 if (i915->opregion.vbt) 2632 return true; 2633 } 2634 2635 return false; 2636 } 2637 2638 /** 2639 * intel_bios_is_port_present - is the specified digital port present 2640 * @i915: i915 device instance 2641 * @port: port to check 2642 * 2643 * Return true if the device in %port is present. 2644 */ 2645 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 2646 { 2647 if (WARN_ON(!has_ddi_port_info(i915))) 2648 return true; 2649 2650 return i915->vbt.ports[port]; 2651 } 2652 2653 /** 2654 * intel_bios_is_port_edp - is the device in given port eDP 2655 * @i915: i915 device instance 2656 * @port: port to check 2657 * 2658 * Return true if the device in %port is eDP. 2659 */ 2660 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) 2661 { 2662 const struct intel_bios_encoder_data *devdata = 2663 intel_bios_encoder_data_lookup(i915, port); 2664 2665 return devdata && intel_bios_encoder_supports_edp(devdata); 2666 } 2667 2668 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 2669 { 2670 const struct child_device_config *child = &devdata->child; 2671 2672 if (!intel_bios_encoder_supports_dp(devdata) || 2673 !intel_bios_encoder_supports_hdmi(devdata)) 2674 return false; 2675 2676 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 2677 return true; 2678 2679 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2680 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 2681 child->aux_channel != 0) 2682 return true; 2683 2684 return false; 2685 } 2686 2687 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915, 2688 enum port port) 2689 { 2690 const struct intel_bios_encoder_data *devdata = 2691 intel_bios_encoder_data_lookup(i915, port); 2692 2693 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata); 2694 } 2695 2696 /** 2697 * intel_bios_is_dsi_present - is DSI present in VBT 2698 * @i915: i915 device instance 2699 * @port: port for DSI if present 2700 * 2701 * Return true if DSI is present, and return the port in %port. 2702 */ 2703 bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 2704 enum port *port) 2705 { 2706 const struct intel_bios_encoder_data *devdata; 2707 const struct child_device_config *child; 2708 u8 dvo_port; 2709 2710 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2711 child = &devdata->child; 2712 2713 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2714 continue; 2715 2716 dvo_port = child->dvo_port; 2717 2718 if (dvo_port == DVO_PORT_MIPIA || 2719 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) || 2720 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) { 2721 if (port) 2722 *port = dvo_port - DVO_PORT_MIPIA; 2723 return true; 2724 } else if (dvo_port == DVO_PORT_MIPIB || 2725 dvo_port == DVO_PORT_MIPIC || 2726 dvo_port == DVO_PORT_MIPID) { 2727 drm_dbg_kms(&i915->drm, 2728 "VBT has unsupported DSI port %c\n", 2729 port_name(dvo_port - DVO_PORT_MIPIA)); 2730 } 2731 } 2732 2733 return false; 2734 } 2735 2736 static void fill_dsc(struct intel_crtc_state *crtc_state, 2737 struct dsc_compression_parameters_entry *dsc, 2738 int dsc_max_bpc) 2739 { 2740 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2741 int bpc = 8; 2742 2743 vdsc_cfg->dsc_version_major = dsc->version_major; 2744 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2745 2746 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2747 bpc = 12; 2748 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2749 bpc = 10; 2750 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2751 bpc = 8; 2752 else 2753 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2754 dsc_max_bpc); 2755 2756 crtc_state->pipe_bpp = bpc * 3; 2757 2758 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2759 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2760 2761 /* 2762 * FIXME: This is ugly, and slice count should take DSC engine 2763 * throughput etc. into account. 2764 * 2765 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2766 */ 2767 if (dsc->slices_per_line & BIT(2)) { 2768 crtc_state->dsc.slice_count = 4; 2769 } else if (dsc->slices_per_line & BIT(1)) { 2770 crtc_state->dsc.slice_count = 2; 2771 } else { 2772 /* FIXME */ 2773 if (!(dsc->slices_per_line & BIT(0))) 2774 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2775 2776 crtc_state->dsc.slice_count = 1; 2777 } 2778 2779 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2780 crtc_state->dsc.slice_count != 0) 2781 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2782 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2783 crtc_state->dsc.slice_count); 2784 2785 /* 2786 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2787 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 2788 */ 2789 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 2790 dsc->rc_buffer_size); 2791 2792 /* FIXME: DSI spec says bpc + 1 for this one */ 2793 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2794 2795 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2796 2797 vdsc_cfg->slice_height = dsc->slice_height; 2798 } 2799 2800 /* FIXME: initially DSI specific */ 2801 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2802 struct intel_crtc_state *crtc_state, 2803 int dsc_max_bpc) 2804 { 2805 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2806 const struct intel_bios_encoder_data *devdata; 2807 const struct child_device_config *child; 2808 2809 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2810 child = &devdata->child; 2811 2812 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2813 continue; 2814 2815 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2816 if (!devdata->dsc) 2817 return false; 2818 2819 if (crtc_state) 2820 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2821 2822 return true; 2823 } 2824 } 2825 2826 return false; 2827 } 2828 2829 /** 2830 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2831 * @i915: i915 device instance 2832 * @port: port to check 2833 * 2834 * Return true if HPD should be inverted for %port. 2835 */ 2836 bool 2837 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2838 enum port port) 2839 { 2840 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2841 2842 if (drm_WARN_ON_ONCE(&i915->drm, 2843 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915))) 2844 return false; 2845 2846 return devdata && devdata->child.hpd_invert; 2847 } 2848 2849 /** 2850 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2851 * @i915: i915 device instance 2852 * @port: port to check 2853 * 2854 * Return true if LSPCON is present on this port 2855 */ 2856 bool 2857 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2858 enum port port) 2859 { 2860 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2861 2862 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon; 2863 } 2864 2865 /** 2866 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port 2867 * @i915: i915 device instance 2868 * @port: port to check 2869 * 2870 * Return true if port requires lane reversal 2871 */ 2872 bool 2873 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915, 2874 enum port port) 2875 { 2876 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2877 2878 return devdata && devdata->child.lane_reversal; 2879 } 2880 2881 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915, 2882 enum port port) 2883 { 2884 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 2885 enum aux_ch aux_ch; 2886 2887 if (!devdata || !devdata->child.aux_channel) { 2888 aux_ch = (enum aux_ch)port; 2889 2890 drm_dbg_kms(&i915->drm, 2891 "using AUX %c for port %c (platform default)\n", 2892 aux_ch_name(aux_ch), port_name(port)); 2893 return aux_ch; 2894 } 2895 2896 /* 2897 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 2898 * map to DDI A,B,TC1,TC2 respectively. 2899 * 2900 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 2901 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 2902 */ 2903 switch (devdata->child.aux_channel) { 2904 case DP_AUX_A: 2905 aux_ch = AUX_CH_A; 2906 break; 2907 case DP_AUX_B: 2908 if (IS_ALDERLAKE_S(i915)) 2909 aux_ch = AUX_CH_USBC1; 2910 else 2911 aux_ch = AUX_CH_B; 2912 break; 2913 case DP_AUX_C: 2914 if (IS_ALDERLAKE_S(i915)) 2915 aux_ch = AUX_CH_USBC2; 2916 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2917 aux_ch = AUX_CH_USBC1; 2918 else 2919 aux_ch = AUX_CH_C; 2920 break; 2921 case DP_AUX_D: 2922 if (DISPLAY_VER(i915) == 13) 2923 aux_ch = AUX_CH_D_XELPD; 2924 else if (IS_ALDERLAKE_S(i915)) 2925 aux_ch = AUX_CH_USBC3; 2926 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2927 aux_ch = AUX_CH_USBC2; 2928 else 2929 aux_ch = AUX_CH_D; 2930 break; 2931 case DP_AUX_E: 2932 if (DISPLAY_VER(i915) == 13) 2933 aux_ch = AUX_CH_E_XELPD; 2934 else if (IS_ALDERLAKE_S(i915)) 2935 aux_ch = AUX_CH_USBC4; 2936 else 2937 aux_ch = AUX_CH_E; 2938 break; 2939 case DP_AUX_F: 2940 if (DISPLAY_VER(i915) == 13) 2941 aux_ch = AUX_CH_USBC1; 2942 else 2943 aux_ch = AUX_CH_F; 2944 break; 2945 case DP_AUX_G: 2946 if (DISPLAY_VER(i915) == 13) 2947 aux_ch = AUX_CH_USBC2; 2948 else 2949 aux_ch = AUX_CH_G; 2950 break; 2951 case DP_AUX_H: 2952 if (DISPLAY_VER(i915) == 13) 2953 aux_ch = AUX_CH_USBC3; 2954 else 2955 aux_ch = AUX_CH_H; 2956 break; 2957 case DP_AUX_I: 2958 if (DISPLAY_VER(i915) == 13) 2959 aux_ch = AUX_CH_USBC4; 2960 else 2961 aux_ch = AUX_CH_I; 2962 break; 2963 default: 2964 MISSING_CASE(devdata->child.aux_channel); 2965 aux_ch = AUX_CH_A; 2966 break; 2967 } 2968 2969 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n", 2970 aux_ch_name(aux_ch), port_name(port)); 2971 2972 return aux_ch; 2973 } 2974 2975 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 2976 { 2977 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2978 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 2979 2980 return _intel_bios_max_tmds_clock(devdata); 2981 } 2982 2983 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 2984 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 2985 { 2986 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2987 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 2988 2989 return _intel_bios_hdmi_level_shift(devdata); 2990 } 2991 2992 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata) 2993 { 2994 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 2995 return 0; 2996 2997 return translate_iboost(devdata->child.dp_iboost_level); 2998 } 2999 3000 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3001 { 3002 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3003 return 0; 3004 3005 return translate_iboost(devdata->child.hdmi_iboost_level); 3006 } 3007 3008 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 3009 { 3010 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3011 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3012 3013 return _intel_bios_dp_max_link_rate(devdata); 3014 } 3015 3016 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 3017 { 3018 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3019 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3020 3021 if (!devdata || !devdata->child.ddc_pin) 3022 return 0; 3023 3024 return map_ddc_pin(i915, devdata->child.ddc_pin); 3025 } 3026 3027 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3028 { 3029 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3030 } 3031 3032 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3033 { 3034 return devdata->i915->vbt.version >= 209 && devdata->child.tbt; 3035 } 3036 3037 const struct intel_bios_encoder_data * 3038 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3039 { 3040 return i915->vbt.ports[port]; 3041 } 3042