xref: /linux/drivers/gpu/drm/i915/display/intel_bios.c (revision 8195136669661fdfe54e9a8923c33b31c92fc1da)
1 /*
2  * Copyright © 2006 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 #include <linux/firmware.h>
29 
30 #include <drm/display/drm_dp_helper.h>
31 #include <drm/display/drm_dsc_helper.h>
32 #include <drm/drm_edid.h>
33 
34 #include "i915_drv.h"
35 #include "i915_reg.h"
36 #include "intel_display.h"
37 #include "intel_display_types.h"
38 #include "intel_gmbus.h"
39 #include "intel_uncore.h"
40 
41 #define _INTEL_BIOS_PRIVATE
42 #include "intel_vbt_defs.h"
43 
44 /**
45  * DOC: Video BIOS Table (VBT)
46  *
47  * The Video BIOS Table, or VBT, provides platform and board specific
48  * configuration information to the driver that is not discoverable or available
49  * through other means. The configuration is mostly related to display
50  * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
51  * the PCI ROM.
52  *
53  * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
54  * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
55  * contain the actual configuration information. The VBT Header, and thus the
56  * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
57  * BDB Header. The data blocks are concatenated after the BDB Header. The data
58  * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
59  * data. (Block 53, the MIPI Sequence Block is an exception.)
60  *
61  * The driver parses the VBT during load. The relevant information is stored in
62  * driver private data for ease of use, and the actual VBT is not read after
63  * that.
64  */
65 
66 /* Wrapper for VBT child device config */
67 struct intel_bios_encoder_data {
68 	struct drm_i915_private *i915;
69 
70 	struct child_device_config child;
71 	struct dsc_compression_parameters_entry *dsc;
72 	struct list_head node;
73 };
74 
75 #define	SLAVE_ADDR1	0x70
76 #define	SLAVE_ADDR2	0x72
77 
78 /* Get BDB block size given a pointer to Block ID. */
79 static u32 _get_blocksize(const u8 *block_base)
80 {
81 	/* The MIPI Sequence Block v3+ has a separate size field. */
82 	if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
83 		return *((const u32 *)(block_base + 4));
84 	else
85 		return *((const u16 *)(block_base + 1));
86 }
87 
88 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
89 static u32 get_blocksize(const void *block_data)
90 {
91 	return _get_blocksize(block_data - 3);
92 }
93 
94 static const void *
95 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
96 {
97 	const struct bdb_header *bdb = _bdb;
98 	const u8 *base = _bdb;
99 	int index = 0;
100 	u32 total, current_size;
101 	enum bdb_block_id current_id;
102 
103 	/* skip to first section */
104 	index += bdb->header_size;
105 	total = bdb->bdb_size;
106 
107 	/* walk the sections looking for section_id */
108 	while (index + 3 < total) {
109 		current_id = *(base + index);
110 		current_size = _get_blocksize(base + index);
111 		index += 3;
112 
113 		if (index + current_size > total)
114 			return NULL;
115 
116 		if (current_id == section_id)
117 			return base + index;
118 
119 		index += current_size;
120 	}
121 
122 	return NULL;
123 }
124 
125 /*
126  * Offset from the start of BDB to the start of the
127  * block data (just past the block header).
128  */
129 static u32 raw_block_offset(const void *bdb, enum bdb_block_id section_id)
130 {
131 	const void *block;
132 
133 	block = find_raw_section(bdb, section_id);
134 	if (!block)
135 		return 0;
136 
137 	return block - bdb;
138 }
139 
140 struct bdb_block_entry {
141 	struct list_head node;
142 	enum bdb_block_id section_id;
143 	u8 data[];
144 };
145 
146 static const void *
147 bdb_find_section(struct drm_i915_private *i915,
148 		 enum bdb_block_id section_id)
149 {
150 	struct bdb_block_entry *entry;
151 
152 	list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) {
153 		if (entry->section_id == section_id)
154 			return entry->data + 3;
155 	}
156 
157 	return NULL;
158 }
159 
160 static const struct {
161 	enum bdb_block_id section_id;
162 	size_t min_size;
163 } bdb_blocks[] = {
164 	{ .section_id = BDB_GENERAL_FEATURES,
165 	  .min_size = sizeof(struct bdb_general_features), },
166 	{ .section_id = BDB_GENERAL_DEFINITIONS,
167 	  .min_size = sizeof(struct bdb_general_definitions), },
168 	{ .section_id = BDB_PSR,
169 	  .min_size = sizeof(struct bdb_psr), },
170 	{ .section_id = BDB_DRIVER_FEATURES,
171 	  .min_size = sizeof(struct bdb_driver_features), },
172 	{ .section_id = BDB_SDVO_LVDS_OPTIONS,
173 	  .min_size = sizeof(struct bdb_sdvo_lvds_options), },
174 	{ .section_id = BDB_SDVO_LVDS_DTD,
175 	  .min_size = sizeof(struct bdb_sdvo_lvds_dtd), },
176 	{ .section_id = BDB_EDP,
177 	  .min_size = sizeof(struct bdb_edp), },
178 	{ .section_id = BDB_LFP_OPTIONS,
179 	  .min_size = sizeof(struct bdb_lfp_options), },
180 	/*
181 	 * BDB_LFP_DATA depends on BDB_LFP_DATA_PTRS,
182 	 * so keep the two ordered.
183 	 */
184 	{ .section_id = BDB_LFP_DATA_PTRS,
185 	  .min_size = sizeof(struct bdb_lfp_data_ptrs), },
186 	{ .section_id = BDB_LFP_DATA,
187 	  .min_size = 0, /* special case */ },
188 	{ .section_id = BDB_LFP_BACKLIGHT,
189 	  .min_size = sizeof(struct bdb_lfp_backlight), },
190 	{ .section_id = BDB_LFP_POWER,
191 	  .min_size = sizeof(struct bdb_lfp_power), },
192 	{ .section_id = BDB_MIPI_CONFIG,
193 	  .min_size = sizeof(struct bdb_mipi_config), },
194 	{ .section_id = BDB_MIPI_SEQUENCE,
195 	  .min_size = sizeof(struct bdb_mipi_sequence) },
196 	{ .section_id = BDB_COMPRESSION_PARAMETERS,
197 	  .min_size = sizeof(struct bdb_compression_parameters), },
198 	{ .section_id = BDB_GENERIC_DTD,
199 	  .min_size = sizeof(struct bdb_generic_dtd), },
200 };
201 
202 static size_t lfp_data_min_size(struct drm_i915_private *i915)
203 {
204 	const struct bdb_lfp_data_ptrs *ptrs;
205 	size_t size;
206 
207 	ptrs = bdb_find_section(i915, BDB_LFP_DATA_PTRS);
208 	if (!ptrs)
209 		return 0;
210 
211 	size = sizeof(struct bdb_lfp_data);
212 	if (ptrs->panel_name.table_size)
213 		size = max(size, ptrs->panel_name.offset +
214 			   sizeof(struct bdb_lfp_data_tail));
215 
216 	return size;
217 }
218 
219 static bool validate_lfp_data_ptrs(const void *bdb,
220 				   const struct bdb_lfp_data_ptrs *ptrs)
221 {
222 	int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
223 	int data_block_size, lfp_data_size;
224 	const void *data_block;
225 	int i;
226 
227 	data_block = find_raw_section(bdb, BDB_LFP_DATA);
228 	if (!data_block)
229 		return false;
230 
231 	data_block_size = get_blocksize(data_block);
232 	if (data_block_size == 0)
233 		return false;
234 
235 	/* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
236 	if (ptrs->num_entries != 3)
237 		return false;
238 
239 	fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
240 	dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
241 	panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
242 	panel_name_size = ptrs->panel_name.table_size;
243 
244 	/* fp_timing has variable size */
245 	if (fp_timing_size < 32 ||
246 	    dvo_timing_size != sizeof(struct bdb_edid_dtd) ||
247 	    panel_pnp_id_size != sizeof(struct bdb_edid_pnp_id))
248 		return false;
249 
250 	/* panel_name is not present in old VBTs */
251 	if (panel_name_size != 0 &&
252 	    panel_name_size != sizeof(struct bdb_edid_product_name))
253 		return false;
254 
255 	lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
256 	if (16 * lfp_data_size > data_block_size)
257 		return false;
258 
259 	/* make sure the table entries have uniform size */
260 	for (i = 1; i < 16; i++) {
261 		if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
262 		    ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
263 		    ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
264 			return false;
265 
266 		if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
267 		    ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
268 		    ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
269 			return false;
270 	}
271 
272 	/*
273 	 * Except for vlv/chv machines all real VBTs seem to have 6
274 	 * unaccounted bytes in the fp_timing table. And it doesn't
275 	 * appear to be a really intentional hole as the fp_timing
276 	 * 0xffff terminator is always within those 6 missing bytes.
277 	 */
278 	if (fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size == lfp_data_size)
279 		fp_timing_size += 6;
280 
281 	if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
282 		return false;
283 
284 	if (ptrs->ptr[0].fp_timing.offset + fp_timing_size != ptrs->ptr[0].dvo_timing.offset ||
285 	    ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
286 	    ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
287 		return false;
288 
289 	/* make sure the tables fit inside the data block */
290 	for (i = 0; i < 16; i++) {
291 		if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
292 		    ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
293 		    ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
294 			return false;
295 	}
296 
297 	if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
298 		return false;
299 
300 	/* make sure fp_timing terminators are present at expected locations */
301 	for (i = 0; i < 16; i++) {
302 		const u16 *t = data_block + ptrs->ptr[i].fp_timing.offset +
303 			fp_timing_size - 2;
304 
305 		if (*t != 0xffff)
306 			return false;
307 	}
308 
309 	return true;
310 }
311 
312 /* make the data table offsets relative to the data block */
313 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
314 {
315 	struct bdb_lfp_data_ptrs *ptrs = ptrs_block;
316 	u32 offset;
317 	int i;
318 
319 	offset = raw_block_offset(bdb, BDB_LFP_DATA);
320 
321 	for (i = 0; i < 16; i++) {
322 		if (ptrs->ptr[i].fp_timing.offset < offset ||
323 		    ptrs->ptr[i].dvo_timing.offset < offset ||
324 		    ptrs->ptr[i].panel_pnp_id.offset < offset)
325 			return false;
326 
327 		ptrs->ptr[i].fp_timing.offset -= offset;
328 		ptrs->ptr[i].dvo_timing.offset -= offset;
329 		ptrs->ptr[i].panel_pnp_id.offset -= offset;
330 	}
331 
332 	if (ptrs->panel_name.table_size) {
333 		if (ptrs->panel_name.offset < offset)
334 			return false;
335 
336 		ptrs->panel_name.offset -= offset;
337 	}
338 
339 	return validate_lfp_data_ptrs(bdb, ptrs);
340 }
341 
342 static int make_lfp_data_ptr(struct lfp_data_ptr_table *table,
343 			     int table_size, int total_size)
344 {
345 	if (total_size < table_size)
346 		return total_size;
347 
348 	table->table_size = table_size;
349 	table->offset = total_size - table_size;
350 
351 	return total_size - table_size;
352 }
353 
354 static void next_lfp_data_ptr(struct lfp_data_ptr_table *next,
355 			      const struct lfp_data_ptr_table *prev,
356 			      int size)
357 {
358 	next->table_size = prev->table_size;
359 	next->offset = prev->offset + size;
360 }
361 
362 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
363 				    const void *bdb)
364 {
365 	int i, size, table_size, block_size, offset, fp_timing_size;
366 	struct bdb_lfp_data_ptrs *ptrs;
367 	const void *block;
368 	void *ptrs_block;
369 
370 	/*
371 	 * The hardcoded fp_timing_size is only valid for
372 	 * modernish VBTs. All older VBTs definitely should
373 	 * include block 41 and thus we don't need to
374 	 * generate one.
375 	 */
376 	if (i915->display.vbt.version < 155)
377 		return NULL;
378 
379 	fp_timing_size = 38;
380 
381 	block = find_raw_section(bdb, BDB_LFP_DATA);
382 	if (!block)
383 		return NULL;
384 
385 	drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
386 
387 	block_size = get_blocksize(block);
388 
389 	size = fp_timing_size + sizeof(struct bdb_edid_dtd) +
390 		sizeof(struct bdb_edid_pnp_id);
391 	if (size * 16 > block_size)
392 		return NULL;
393 
394 	ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
395 	if (!ptrs_block)
396 		return NULL;
397 
398 	*(u8 *)(ptrs_block + 0) = BDB_LFP_DATA_PTRS;
399 	*(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
400 	ptrs = ptrs_block + 3;
401 
402 	table_size = sizeof(struct bdb_edid_pnp_id);
403 	size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
404 
405 	table_size = sizeof(struct bdb_edid_dtd);
406 	size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
407 
408 	table_size = fp_timing_size;
409 	size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
410 
411 	if (ptrs->ptr[0].fp_timing.table_size)
412 		ptrs->num_entries++;
413 	if (ptrs->ptr[0].dvo_timing.table_size)
414 		ptrs->num_entries++;
415 	if (ptrs->ptr[0].panel_pnp_id.table_size)
416 		ptrs->num_entries++;
417 
418 	if (size != 0 || ptrs->num_entries != 3) {
419 		kfree(ptrs_block);
420 		return NULL;
421 	}
422 
423 	size = fp_timing_size + sizeof(struct bdb_edid_dtd) +
424 		sizeof(struct bdb_edid_pnp_id);
425 	for (i = 1; i < 16; i++) {
426 		next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
427 		next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
428 		next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
429 	}
430 
431 	table_size = sizeof(struct bdb_edid_product_name);
432 
433 	if (16 * (size + table_size) <= block_size) {
434 		ptrs->panel_name.table_size = table_size;
435 		ptrs->panel_name.offset = size * 16;
436 	}
437 
438 	offset = block - bdb;
439 
440 	for (i = 0; i < 16; i++) {
441 		ptrs->ptr[i].fp_timing.offset += offset;
442 		ptrs->ptr[i].dvo_timing.offset += offset;
443 		ptrs->ptr[i].panel_pnp_id.offset += offset;
444 	}
445 
446 	if (ptrs->panel_name.table_size)
447 		ptrs->panel_name.offset += offset;
448 
449 	return ptrs_block;
450 }
451 
452 static void
453 init_bdb_block(struct drm_i915_private *i915,
454 	       const void *bdb, enum bdb_block_id section_id,
455 	       size_t min_size)
456 {
457 	struct bdb_block_entry *entry;
458 	void *temp_block = NULL;
459 	const void *block;
460 	size_t block_size;
461 
462 	block = find_raw_section(bdb, section_id);
463 
464 	/* Modern VBTs lack the LFP data table pointers block, make one up */
465 	if (!block && section_id == BDB_LFP_DATA_PTRS) {
466 		temp_block = generate_lfp_data_ptrs(i915, bdb);
467 		if (temp_block)
468 			block = temp_block + 3;
469 	}
470 	if (!block)
471 		return;
472 
473 	drm_WARN(&i915->drm, min_size == 0,
474 		 "Block %d min_size is zero\n", section_id);
475 
476 	block_size = get_blocksize(block);
477 
478 	/*
479 	 * Version number and new block size are considered
480 	 * part of the header for MIPI sequenece block v3+.
481 	 */
482 	if (section_id == BDB_MIPI_SEQUENCE && *(const u8 *)block >= 3)
483 		block_size += 5;
484 
485 	entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
486 			GFP_KERNEL);
487 	if (!entry) {
488 		kfree(temp_block);
489 		return;
490 	}
491 
492 	entry->section_id = section_id;
493 	memcpy(entry->data, block - 3, block_size + 3);
494 
495 	kfree(temp_block);
496 
497 	drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
498 		    section_id, block_size, min_size);
499 
500 	if (section_id == BDB_LFP_DATA_PTRS &&
501 	    !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
502 		drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
503 		kfree(entry);
504 		return;
505 	}
506 
507 	list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks);
508 }
509 
510 static void init_bdb_blocks(struct drm_i915_private *i915,
511 			    const void *bdb)
512 {
513 	int i;
514 
515 	for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
516 		enum bdb_block_id section_id = bdb_blocks[i].section_id;
517 		size_t min_size = bdb_blocks[i].min_size;
518 
519 		if (section_id == BDB_LFP_DATA)
520 			min_size = lfp_data_min_size(i915);
521 
522 		init_bdb_block(i915, bdb, section_id, min_size);
523 	}
524 }
525 
526 static void
527 fill_detail_timing_data(struct drm_i915_private *i915,
528 			struct drm_display_mode *panel_fixed_mode,
529 			const struct bdb_edid_dtd *dvo_timing)
530 {
531 	panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
532 		dvo_timing->hactive_lo;
533 	panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
534 		((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
535 	panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
536 		((dvo_timing->hsync_pulse_width_hi << 8) |
537 			dvo_timing->hsync_pulse_width_lo);
538 	panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
539 		((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
540 
541 	panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
542 		dvo_timing->vactive_lo;
543 	panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
544 		((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
545 	panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
546 		((dvo_timing->vsync_pulse_width_hi << 4) |
547 			dvo_timing->vsync_pulse_width_lo);
548 	panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
549 		((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
550 	panel_fixed_mode->clock = dvo_timing->clock * 10;
551 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
552 
553 	if (dvo_timing->hsync_positive)
554 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
555 	else
556 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
557 
558 	if (dvo_timing->vsync_positive)
559 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
560 	else
561 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
562 
563 	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
564 		dvo_timing->himage_lo;
565 	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
566 		dvo_timing->vimage_lo;
567 
568 	/* Some VBTs have bogus h/vsync_end values */
569 	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) {
570 		drm_dbg_kms(&i915->drm, "reducing hsync_end %d->%d\n",
571 			    panel_fixed_mode->hsync_end, panel_fixed_mode->htotal);
572 		panel_fixed_mode->hsync_end = panel_fixed_mode->htotal;
573 	}
574 	if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) {
575 		drm_dbg_kms(&i915->drm, "reducing vsync_end %d->%d\n",
576 			    panel_fixed_mode->vsync_end, panel_fixed_mode->vtotal);
577 		panel_fixed_mode->vsync_end = panel_fixed_mode->vtotal;
578 	}
579 
580 	drm_mode_set_name(panel_fixed_mode);
581 }
582 
583 static const struct bdb_edid_dtd *
584 get_lfp_dvo_timing(const struct bdb_lfp_data *data,
585 		   const struct bdb_lfp_data_ptrs *ptrs,
586 		   int index)
587 {
588 	return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
589 }
590 
591 static const struct fp_timing *
592 get_lfp_fp_timing(const struct bdb_lfp_data *data,
593 		  const struct bdb_lfp_data_ptrs *ptrs,
594 		  int index)
595 {
596 	return (const void *)data + ptrs->ptr[index].fp_timing.offset;
597 }
598 
599 static const struct drm_edid_product_id *
600 get_lfp_pnp_id(const struct bdb_lfp_data *data,
601 	       const struct bdb_lfp_data_ptrs *ptrs,
602 	       int index)
603 {
604 	/* These two are supposed to have the same layout in memory. */
605 	BUILD_BUG_ON(sizeof(struct bdb_edid_pnp_id) != sizeof(struct drm_edid_product_id));
606 
607 	return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
608 }
609 
610 static const struct bdb_lfp_data_tail *
611 get_lfp_data_tail(const struct bdb_lfp_data *data,
612 		  const struct bdb_lfp_data_ptrs *ptrs)
613 {
614 	if (ptrs->panel_name.table_size)
615 		return (const void *)data + ptrs->panel_name.offset;
616 	else
617 		return NULL;
618 }
619 
620 static int opregion_get_panel_type(struct drm_i915_private *i915,
621 				   const struct intel_bios_encoder_data *devdata,
622 				   const struct drm_edid *drm_edid, bool use_fallback)
623 {
624 	return intel_opregion_get_panel_type(i915);
625 }
626 
627 static int vbt_get_panel_type(struct drm_i915_private *i915,
628 			      const struct intel_bios_encoder_data *devdata,
629 			      const struct drm_edid *drm_edid, bool use_fallback)
630 {
631 	const struct bdb_lfp_options *lfp_options;
632 
633 	lfp_options = bdb_find_section(i915, BDB_LFP_OPTIONS);
634 	if (!lfp_options)
635 		return -1;
636 
637 	if (lfp_options->panel_type > 0xf &&
638 	    lfp_options->panel_type != 0xff) {
639 		drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
640 			    lfp_options->panel_type);
641 		return -1;
642 	}
643 
644 	if (devdata && devdata->child.handle == DEVICE_HANDLE_LFP2)
645 		return lfp_options->panel_type2;
646 
647 	drm_WARN_ON(&i915->drm, devdata && devdata->child.handle != DEVICE_HANDLE_LFP1);
648 
649 	return lfp_options->panel_type;
650 }
651 
652 static int pnpid_get_panel_type(struct drm_i915_private *i915,
653 				const struct intel_bios_encoder_data *devdata,
654 				const struct drm_edid *drm_edid, bool use_fallback)
655 {
656 	const struct bdb_lfp_data *data;
657 	const struct bdb_lfp_data_ptrs *ptrs;
658 	struct drm_edid_product_id product_id, product_id_nodate;
659 	struct drm_printer p;
660 	int i, best = -1;
661 
662 	if (!drm_edid)
663 		return -1;
664 
665 	drm_edid_get_product_id(drm_edid, &product_id);
666 
667 	product_id_nodate = product_id;
668 	product_id_nodate.week_of_manufacture = 0;
669 	product_id_nodate.year_of_manufacture = 0;
670 
671 	p = drm_dbg_printer(&i915->drm, DRM_UT_KMS, "EDID");
672 	drm_edid_print_product_id(&p, &product_id, true);
673 
674 	ptrs = bdb_find_section(i915, BDB_LFP_DATA_PTRS);
675 	if (!ptrs)
676 		return -1;
677 
678 	data = bdb_find_section(i915, BDB_LFP_DATA);
679 	if (!data)
680 		return -1;
681 
682 	for (i = 0; i < 16; i++) {
683 		const struct drm_edid_product_id *vbt_id =
684 			get_lfp_pnp_id(data, ptrs, i);
685 
686 		/* full match? */
687 		if (!memcmp(vbt_id, &product_id, sizeof(*vbt_id)))
688 			return i;
689 
690 		/*
691 		 * Accept a match w/o date if no full match is found,
692 		 * and the VBT entry does not specify a date.
693 		 */
694 		if (best < 0 &&
695 		    !memcmp(vbt_id, &product_id_nodate, sizeof(*vbt_id)))
696 			best = i;
697 	}
698 
699 	return best;
700 }
701 
702 static int fallback_get_panel_type(struct drm_i915_private *i915,
703 				   const struct intel_bios_encoder_data *devdata,
704 				   const struct drm_edid *drm_edid, bool use_fallback)
705 {
706 	return use_fallback ? 0 : -1;
707 }
708 
709 enum panel_type {
710 	PANEL_TYPE_OPREGION,
711 	PANEL_TYPE_VBT,
712 	PANEL_TYPE_PNPID,
713 	PANEL_TYPE_FALLBACK,
714 };
715 
716 static int get_panel_type(struct drm_i915_private *i915,
717 			  const struct intel_bios_encoder_data *devdata,
718 			  const struct drm_edid *drm_edid, bool use_fallback)
719 {
720 	struct {
721 		const char *name;
722 		int (*get_panel_type)(struct drm_i915_private *i915,
723 				      const struct intel_bios_encoder_data *devdata,
724 				      const struct drm_edid *drm_edid, bool use_fallback);
725 		int panel_type;
726 	} panel_types[] = {
727 		[PANEL_TYPE_OPREGION] = {
728 			.name = "OpRegion",
729 			.get_panel_type = opregion_get_panel_type,
730 		},
731 		[PANEL_TYPE_VBT] = {
732 			.name = "VBT",
733 			.get_panel_type = vbt_get_panel_type,
734 		},
735 		[PANEL_TYPE_PNPID] = {
736 			.name = "PNPID",
737 			.get_panel_type = pnpid_get_panel_type,
738 		},
739 		[PANEL_TYPE_FALLBACK] = {
740 			.name = "fallback",
741 			.get_panel_type = fallback_get_panel_type,
742 		},
743 	};
744 	int i;
745 
746 	for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
747 		panel_types[i].panel_type = panel_types[i].get_panel_type(i915, devdata,
748 									  drm_edid, use_fallback);
749 
750 		drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf &&
751 			    panel_types[i].panel_type != 0xff);
752 
753 		if (panel_types[i].panel_type >= 0)
754 			drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
755 				    panel_types[i].name, panel_types[i].panel_type);
756 	}
757 
758 	if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
759 		i = PANEL_TYPE_OPREGION;
760 	else if (panel_types[PANEL_TYPE_VBT].panel_type == 0xff &&
761 		 panel_types[PANEL_TYPE_PNPID].panel_type >= 0)
762 		i = PANEL_TYPE_PNPID;
763 	else if (panel_types[PANEL_TYPE_VBT].panel_type != 0xff &&
764 		 panel_types[PANEL_TYPE_VBT].panel_type >= 0)
765 		i = PANEL_TYPE_VBT;
766 	else
767 		i = PANEL_TYPE_FALLBACK;
768 
769 	drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
770 		    panel_types[i].name, panel_types[i].panel_type);
771 
772 	return panel_types[i].panel_type;
773 }
774 
775 static unsigned int panel_bits(unsigned int value, int panel_type, int num_bits)
776 {
777 	return (value >> (panel_type * num_bits)) & (BIT(num_bits) - 1);
778 }
779 
780 static bool panel_bool(unsigned int value, int panel_type)
781 {
782 	return panel_bits(value, panel_type, 1);
783 }
784 
785 /* Parse general panel options */
786 static void
787 parse_panel_options(struct drm_i915_private *i915,
788 		    struct intel_panel *panel)
789 {
790 	const struct bdb_lfp_options *lfp_options;
791 	int panel_type = panel->vbt.panel_type;
792 	int drrs_mode;
793 
794 	lfp_options = bdb_find_section(i915, BDB_LFP_OPTIONS);
795 	if (!lfp_options)
796 		return;
797 
798 	panel->vbt.lvds_dither = lfp_options->pixel_dither;
799 
800 	/*
801 	 * Empirical evidence indicates the block size can be
802 	 * either 4,14,16,24+ bytes. For older VBTs no clear
803 	 * relationship between the block size vs. BDB version.
804 	 */
805 	if (get_blocksize(lfp_options) < 16)
806 		return;
807 
808 	drrs_mode = panel_bits(lfp_options->dps_panel_type_bits,
809 			       panel_type, 2);
810 	/*
811 	 * VBT has static DRRS = 0 and seamless DRRS = 2.
812 	 * The below piece of code is required to adjust vbt.drrs_type
813 	 * to match the enum drrs_support_type.
814 	 */
815 	switch (drrs_mode) {
816 	case 0:
817 		panel->vbt.drrs_type = DRRS_TYPE_STATIC;
818 		drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
819 		break;
820 	case 2:
821 		panel->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
822 		drm_dbg_kms(&i915->drm,
823 			    "DRRS supported mode is seamless\n");
824 		break;
825 	default:
826 		panel->vbt.drrs_type = DRRS_TYPE_NONE;
827 		drm_dbg_kms(&i915->drm,
828 			    "DRRS not supported (VBT input)\n");
829 		break;
830 	}
831 }
832 
833 static void
834 parse_lfp_panel_dtd(struct drm_i915_private *i915,
835 		    struct intel_panel *panel,
836 		    const struct bdb_lfp_data *lfp_data,
837 		    const struct bdb_lfp_data_ptrs *lfp_data_ptrs)
838 {
839 	const struct bdb_edid_dtd *panel_dvo_timing;
840 	const struct fp_timing *fp_timing;
841 	struct drm_display_mode *panel_fixed_mode;
842 	int panel_type = panel->vbt.panel_type;
843 
844 	panel_dvo_timing = get_lfp_dvo_timing(lfp_data,
845 					      lfp_data_ptrs,
846 					      panel_type);
847 
848 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
849 	if (!panel_fixed_mode)
850 		return;
851 
852 	fill_detail_timing_data(i915, panel_fixed_mode, panel_dvo_timing);
853 
854 	panel->vbt.lfp_vbt_mode = panel_fixed_mode;
855 
856 	drm_dbg_kms(&i915->drm,
857 		    "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
858 		    DRM_MODE_ARG(panel_fixed_mode));
859 
860 	fp_timing = get_lfp_fp_timing(lfp_data,
861 				      lfp_data_ptrs,
862 				      panel_type);
863 
864 	/* check the resolution, just to be sure */
865 	if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
866 	    fp_timing->y_res == panel_fixed_mode->vdisplay) {
867 		panel->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
868 		drm_dbg_kms(&i915->drm,
869 			    "VBT initial LVDS value %x\n",
870 			    panel->vbt.bios_lvds_val);
871 	}
872 }
873 
874 static void
875 parse_lfp_data(struct drm_i915_private *i915,
876 	       struct intel_panel *panel)
877 {
878 	const struct bdb_lfp_data *data;
879 	const struct bdb_lfp_data_tail *tail;
880 	const struct bdb_lfp_data_ptrs *ptrs;
881 	const struct drm_edid_product_id *pnp_id;
882 	struct drm_printer p;
883 	int panel_type = panel->vbt.panel_type;
884 
885 	ptrs = bdb_find_section(i915, BDB_LFP_DATA_PTRS);
886 	if (!ptrs)
887 		return;
888 
889 	data = bdb_find_section(i915, BDB_LFP_DATA);
890 	if (!data)
891 		return;
892 
893 	if (!panel->vbt.lfp_vbt_mode)
894 		parse_lfp_panel_dtd(i915, panel, data, ptrs);
895 
896 	pnp_id = get_lfp_pnp_id(data, ptrs, panel_type);
897 
898 	p = drm_dbg_printer(&i915->drm, DRM_UT_KMS, "Panel");
899 	drm_edid_print_product_id(&p, pnp_id, false);
900 
901 	tail = get_lfp_data_tail(data, ptrs);
902 	if (!tail)
903 		return;
904 
905 	drm_dbg_kms(&i915->drm, "Panel name: %.*s\n",
906 		    (int)sizeof(tail->panel_name[0].name),
907 		    tail->panel_name[panel_type].name);
908 
909 	if (i915->display.vbt.version >= 188) {
910 		panel->vbt.seamless_drrs_min_refresh_rate =
911 			tail->seamless_drrs_min_refresh_rate[panel_type];
912 		drm_dbg_kms(&i915->drm,
913 			    "Seamless DRRS min refresh rate: %d Hz\n",
914 			    panel->vbt.seamless_drrs_min_refresh_rate);
915 	}
916 }
917 
918 static void
919 parse_generic_dtd(struct drm_i915_private *i915,
920 		  struct intel_panel *panel)
921 {
922 	const struct bdb_generic_dtd *generic_dtd;
923 	const struct generic_dtd_entry *dtd;
924 	struct drm_display_mode *panel_fixed_mode;
925 	int num_dtd;
926 
927 	/*
928 	 * Older VBTs provided DTD information for internal displays through
929 	 * the "LFP panel tables" block (42).  As of VBT revision 229 the
930 	 * DTD information should be provided via a newer "generic DTD"
931 	 * block (58).  Just to be safe, we'll try the new generic DTD block
932 	 * first on VBT >= 229, but still fall back to trying the old LFP
933 	 * block if that fails.
934 	 */
935 	if (i915->display.vbt.version < 229)
936 		return;
937 
938 	generic_dtd = bdb_find_section(i915, BDB_GENERIC_DTD);
939 	if (!generic_dtd)
940 		return;
941 
942 	if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
943 		drm_err(&i915->drm, "GDTD size %u is too small.\n",
944 			generic_dtd->gdtd_size);
945 		return;
946 	} else if (generic_dtd->gdtd_size !=
947 		   sizeof(struct generic_dtd_entry)) {
948 		drm_err(&i915->drm, "Unexpected GDTD size %u\n",
949 			generic_dtd->gdtd_size);
950 		/* DTD has unknown fields, but keep going */
951 	}
952 
953 	num_dtd = (get_blocksize(generic_dtd) -
954 		   sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
955 	if (panel->vbt.panel_type >= num_dtd) {
956 		drm_err(&i915->drm,
957 			"Panel type %d not found in table of %d DTD's\n",
958 			panel->vbt.panel_type, num_dtd);
959 		return;
960 	}
961 
962 	dtd = &generic_dtd->dtd[panel->vbt.panel_type];
963 
964 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
965 	if (!panel_fixed_mode)
966 		return;
967 
968 	panel_fixed_mode->hdisplay = dtd->hactive;
969 	panel_fixed_mode->hsync_start =
970 		panel_fixed_mode->hdisplay + dtd->hfront_porch;
971 	panel_fixed_mode->hsync_end =
972 		panel_fixed_mode->hsync_start + dtd->hsync;
973 	panel_fixed_mode->htotal =
974 		panel_fixed_mode->hdisplay + dtd->hblank;
975 
976 	panel_fixed_mode->vdisplay = dtd->vactive;
977 	panel_fixed_mode->vsync_start =
978 		panel_fixed_mode->vdisplay + dtd->vfront_porch;
979 	panel_fixed_mode->vsync_end =
980 		panel_fixed_mode->vsync_start + dtd->vsync;
981 	panel_fixed_mode->vtotal =
982 		panel_fixed_mode->vdisplay + dtd->vblank;
983 
984 	panel_fixed_mode->clock = dtd->pixel_clock;
985 	panel_fixed_mode->width_mm = dtd->width_mm;
986 	panel_fixed_mode->height_mm = dtd->height_mm;
987 
988 	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
989 	drm_mode_set_name(panel_fixed_mode);
990 
991 	if (dtd->hsync_positive_polarity)
992 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
993 	else
994 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
995 
996 	if (dtd->vsync_positive_polarity)
997 		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
998 	else
999 		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
1000 
1001 	drm_dbg_kms(&i915->drm,
1002 		    "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
1003 		    DRM_MODE_ARG(panel_fixed_mode));
1004 
1005 	panel->vbt.lfp_vbt_mode = panel_fixed_mode;
1006 }
1007 
1008 static void
1009 parse_lfp_backlight(struct drm_i915_private *i915,
1010 		    struct intel_panel *panel)
1011 {
1012 	const struct bdb_lfp_backlight *backlight_data;
1013 	const struct lfp_backlight_data_entry *entry;
1014 	int panel_type = panel->vbt.panel_type;
1015 	u16 level;
1016 
1017 	backlight_data = bdb_find_section(i915, BDB_LFP_BACKLIGHT);
1018 	if (!backlight_data)
1019 		return;
1020 
1021 	if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
1022 		drm_dbg_kms(&i915->drm,
1023 			    "Unsupported backlight data entry size %u\n",
1024 			    backlight_data->entry_size);
1025 		return;
1026 	}
1027 
1028 	entry = &backlight_data->data[panel_type];
1029 
1030 	panel->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
1031 	if (!panel->vbt.backlight.present) {
1032 		drm_dbg_kms(&i915->drm,
1033 			    "PWM backlight not present in VBT (type %u)\n",
1034 			    entry->type);
1035 		return;
1036 	}
1037 
1038 	panel->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
1039 	panel->vbt.backlight.controller = 0;
1040 	if (i915->display.vbt.version >= 191) {
1041 		const struct lfp_backlight_control_method *method;
1042 
1043 		method = &backlight_data->backlight_control[panel_type];
1044 		panel->vbt.backlight.type = method->type;
1045 		panel->vbt.backlight.controller = method->controller;
1046 	}
1047 
1048 	panel->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
1049 	panel->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1050 
1051 	if (i915->display.vbt.version >= 234) {
1052 		u16 min_level;
1053 		bool scale;
1054 
1055 		level = backlight_data->brightness_level[panel_type].level;
1056 		min_level = backlight_data->brightness_min_level[panel_type].level;
1057 
1058 		if (i915->display.vbt.version >= 236)
1059 			scale = backlight_data->brightness_precision_bits[panel_type] == 16;
1060 		else
1061 			scale = level > 255;
1062 
1063 		if (scale)
1064 			min_level = min_level / 255;
1065 
1066 		if (min_level > 255) {
1067 			drm_warn(&i915->drm, "Brightness min level > 255\n");
1068 			level = 255;
1069 		}
1070 		panel->vbt.backlight.min_brightness = min_level;
1071 
1072 		panel->vbt.backlight.brightness_precision_bits =
1073 			backlight_data->brightness_precision_bits[panel_type];
1074 	} else {
1075 		level = backlight_data->level[panel_type];
1076 		panel->vbt.backlight.min_brightness = entry->min_brightness;
1077 	}
1078 
1079 	if (i915->display.vbt.version >= 239)
1080 		panel->vbt.backlight.hdr_dpcd_refresh_timeout =
1081 			DIV_ROUND_UP(backlight_data->hdr_dpcd_refresh_timeout[panel_type], 100);
1082 	else
1083 		panel->vbt.backlight.hdr_dpcd_refresh_timeout = 30;
1084 
1085 	drm_dbg_kms(&i915->drm,
1086 		    "VBT backlight PWM modulation frequency %u Hz, "
1087 		    "active %s, min brightness %u, level %u, controller %u\n",
1088 		    panel->vbt.backlight.pwm_freq_hz,
1089 		    panel->vbt.backlight.active_low_pwm ? "low" : "high",
1090 		    panel->vbt.backlight.min_brightness,
1091 		    level,
1092 		    panel->vbt.backlight.controller);
1093 }
1094 
1095 static void
1096 parse_sdvo_lvds_data(struct drm_i915_private *i915,
1097 		     struct intel_panel *panel)
1098 {
1099 	const struct bdb_sdvo_lvds_dtd *dtd;
1100 	struct drm_display_mode *panel_fixed_mode;
1101 	int index;
1102 
1103 	index = i915->display.params.vbt_sdvo_panel_type;
1104 	if (index == -2) {
1105 		drm_dbg_kms(&i915->drm,
1106 			    "Ignore SDVO LVDS mode from BIOS VBT tables.\n");
1107 		return;
1108 	}
1109 
1110 	if (index == -1) {
1111 		const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
1112 
1113 		sdvo_lvds_options = bdb_find_section(i915, BDB_SDVO_LVDS_OPTIONS);
1114 		if (!sdvo_lvds_options)
1115 			return;
1116 
1117 		index = sdvo_lvds_options->panel_type;
1118 	}
1119 
1120 	dtd = bdb_find_section(i915, BDB_SDVO_LVDS_DTD);
1121 	if (!dtd)
1122 		return;
1123 
1124 	/*
1125 	 * This should not happen, as long as the panel_type
1126 	 * enumeration doesn't grow over 4 items.  But if it does, it
1127 	 * could lead to hard-to-detect bugs, so better double-check
1128 	 * it here to be sure.
1129 	 */
1130 	if (index >= ARRAY_SIZE(dtd->dtd)) {
1131 		drm_err(&i915->drm, "index %d is larger than dtd->dtd[4] array\n",
1132 			index);
1133 		return;
1134 	}
1135 
1136 	panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
1137 	if (!panel_fixed_mode)
1138 		return;
1139 
1140 	fill_detail_timing_data(i915, panel_fixed_mode, &dtd->dtd[index]);
1141 
1142 	panel->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1143 
1144 	drm_dbg_kms(&i915->drm,
1145 		    "Found SDVO LVDS mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1146 		    DRM_MODE_ARG(panel_fixed_mode));
1147 }
1148 
1149 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1150 				    bool alternate)
1151 {
1152 	switch (DISPLAY_VER(i915)) {
1153 	case 2:
1154 		return alternate ? 66667 : 48000;
1155 	case 3:
1156 	case 4:
1157 		return alternate ? 100000 : 96000;
1158 	default:
1159 		return alternate ? 100000 : 120000;
1160 	}
1161 }
1162 
1163 static void
1164 parse_general_features(struct drm_i915_private *i915)
1165 {
1166 	const struct bdb_general_features *general;
1167 
1168 	general = bdb_find_section(i915, BDB_GENERAL_FEATURES);
1169 	if (!general)
1170 		return;
1171 
1172 	i915->display.vbt.int_tv_support = general->int_tv_support;
1173 	/* int_crt_support can't be trusted on earlier platforms */
1174 	if (i915->display.vbt.version >= 155 &&
1175 	    (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1176 		i915->display.vbt.int_crt_support = general->int_crt_support;
1177 	i915->display.vbt.lvds_use_ssc = general->enable_ssc;
1178 	i915->display.vbt.lvds_ssc_freq =
1179 		intel_bios_ssc_frequency(i915, general->ssc_freq);
1180 	i915->display.vbt.display_clock_mode = general->display_clock_mode;
1181 	i915->display.vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1182 	if (i915->display.vbt.version >= 181) {
1183 		i915->display.vbt.orientation = general->rotate_180 ?
1184 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1185 			DRM_MODE_PANEL_ORIENTATION_NORMAL;
1186 	} else {
1187 		i915->display.vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1188 	}
1189 
1190 	if (i915->display.vbt.version >= 249 && general->afc_startup_config) {
1191 		i915->display.vbt.override_afc_startup = true;
1192 		i915->display.vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1193 	}
1194 
1195 	drm_dbg_kms(&i915->drm,
1196 		    "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1197 		    i915->display.vbt.int_tv_support,
1198 		    i915->display.vbt.int_crt_support,
1199 		    i915->display.vbt.lvds_use_ssc,
1200 		    i915->display.vbt.lvds_ssc_freq,
1201 		    i915->display.vbt.display_clock_mode,
1202 		    i915->display.vbt.fdi_rx_polarity_inverted);
1203 }
1204 
1205 static const struct child_device_config *
1206 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1207 {
1208 	return (const void *) &defs->devices[i * defs->child_dev_size];
1209 }
1210 
1211 static void
1212 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1213 {
1214 	const struct intel_bios_encoder_data *devdata;
1215 	int count = 0;
1216 
1217 	/*
1218 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1219 	 * accurate and doesn't have to be, as long as it's not too strict.
1220 	 */
1221 	if (!IS_DISPLAY_VER(i915, 3, 7)) {
1222 		drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1223 		return;
1224 	}
1225 
1226 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
1227 		const struct child_device_config *child = &devdata->child;
1228 		struct sdvo_device_mapping *mapping;
1229 
1230 		if (child->slave_addr != SLAVE_ADDR1 &&
1231 		    child->slave_addr != SLAVE_ADDR2) {
1232 			/*
1233 			 * If the slave address is neither 0x70 nor 0x72,
1234 			 * it is not a SDVO device. Skip it.
1235 			 */
1236 			continue;
1237 		}
1238 		if (child->dvo_port != DEVICE_PORT_DVOB &&
1239 		    child->dvo_port != DEVICE_PORT_DVOC) {
1240 			/* skip the incorrect SDVO port */
1241 			drm_dbg_kms(&i915->drm,
1242 				    "Incorrect SDVO port. Skip it\n");
1243 			continue;
1244 		}
1245 		drm_dbg_kms(&i915->drm,
1246 			    "the SDVO device with slave addr %2x is found on"
1247 			    " %s port\n",
1248 			    child->slave_addr,
1249 			    (child->dvo_port == DEVICE_PORT_DVOB) ?
1250 			    "SDVOB" : "SDVOC");
1251 		mapping = &i915->display.vbt.sdvo_mappings[child->dvo_port - 1];
1252 		if (!mapping->initialized) {
1253 			mapping->dvo_port = child->dvo_port;
1254 			mapping->slave_addr = child->slave_addr;
1255 			mapping->dvo_wiring = child->dvo_wiring;
1256 			mapping->ddc_pin = child->ddc_pin;
1257 			mapping->i2c_pin = child->i2c_pin;
1258 			mapping->initialized = 1;
1259 			drm_dbg_kms(&i915->drm,
1260 				    "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1261 				    mapping->dvo_port, mapping->slave_addr,
1262 				    mapping->dvo_wiring, mapping->ddc_pin,
1263 				    mapping->i2c_pin);
1264 		} else {
1265 			drm_dbg_kms(&i915->drm,
1266 				    "Maybe one SDVO port is shared by "
1267 				    "two SDVO device.\n");
1268 		}
1269 		if (child->slave2_addr) {
1270 			/* Maybe this is a SDVO device with multiple inputs */
1271 			/* And the mapping info is not added */
1272 			drm_dbg_kms(&i915->drm,
1273 				    "there exists the slave2_addr. Maybe this"
1274 				    " is a SDVO device with multiple inputs.\n");
1275 		}
1276 		count++;
1277 	}
1278 
1279 	if (!count) {
1280 		/* No SDVO device info is found */
1281 		drm_dbg_kms(&i915->drm,
1282 			    "No SDVO device info is found in VBT\n");
1283 	}
1284 }
1285 
1286 static void
1287 parse_driver_features(struct drm_i915_private *i915)
1288 {
1289 	const struct bdb_driver_features *driver;
1290 
1291 	driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1292 	if (!driver)
1293 		return;
1294 
1295 	if (DISPLAY_VER(i915) >= 5) {
1296 		/*
1297 		 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1298 		 * to mean "eDP". The VBT spec doesn't agree with that
1299 		 * interpretation, but real world VBTs seem to.
1300 		 */
1301 		if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1302 			i915->display.vbt.int_lvds_support = 0;
1303 	} else {
1304 		/*
1305 		 * FIXME it's not clear which BDB version has the LVDS config
1306 		 * bits defined. Revision history in the VBT spec says:
1307 		 * "0.92 | Add two definitions for VBT value of LVDS Active
1308 		 *  Config (00b and 11b values defined) | 06/13/2005"
1309 		 * but does not the specify the BDB version.
1310 		 *
1311 		 * So far version 134 (on i945gm) is the oldest VBT observed
1312 		 * in the wild with the bits correctly populated. Version
1313 		 * 108 (on i85x) does not have the bits correctly populated.
1314 		 */
1315 		if (i915->display.vbt.version >= 134 &&
1316 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1317 		    driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1318 			i915->display.vbt.int_lvds_support = 0;
1319 	}
1320 }
1321 
1322 static void
1323 parse_panel_driver_features(struct drm_i915_private *i915,
1324 			    struct intel_panel *panel)
1325 {
1326 	const struct bdb_driver_features *driver;
1327 
1328 	driver = bdb_find_section(i915, BDB_DRIVER_FEATURES);
1329 	if (!driver)
1330 		return;
1331 
1332 	if (i915->display.vbt.version < 228) {
1333 		drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1334 			    driver->drrs_enabled);
1335 		/*
1336 		 * If DRRS is not supported, drrs_type has to be set to 0.
1337 		 * This is because, VBT is configured in such a way that
1338 		 * static DRRS is 0 and DRRS not supported is represented by
1339 		 * driver->drrs_enabled=false
1340 		 */
1341 		if (!driver->drrs_enabled && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1342 			/*
1343 			 * FIXME Should DMRRS perhaps be treated as seamless
1344 			 * but without the automatic downclocking?
1345 			 */
1346 			if (driver->dmrrs_enabled)
1347 				panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1348 			else
1349 				panel->vbt.drrs_type = DRRS_TYPE_NONE;
1350 		}
1351 
1352 		panel->vbt.psr.enable = driver->psr_enabled;
1353 	}
1354 }
1355 
1356 static void
1357 parse_power_conservation_features(struct drm_i915_private *i915,
1358 				  struct intel_panel *panel)
1359 {
1360 	const struct bdb_lfp_power *power;
1361 	u8 panel_type = panel->vbt.panel_type;
1362 
1363 	panel->vbt.vrr = true; /* matches Windows behaviour */
1364 
1365 	if (i915->display.vbt.version < 228)
1366 		return;
1367 
1368 	power = bdb_find_section(i915, BDB_LFP_POWER);
1369 	if (!power)
1370 		return;
1371 
1372 	panel->vbt.psr.enable = panel_bool(power->psr, panel_type);
1373 
1374 	/*
1375 	 * If DRRS is not supported, drrs_type has to be set to 0.
1376 	 * This is because, VBT is configured in such a way that
1377 	 * static DRRS is 0 and DRRS not supported is represented by
1378 	 * power->drrs & BIT(panel_type)=false
1379 	 */
1380 	if (!panel_bool(power->drrs, panel_type) && panel->vbt.drrs_type != DRRS_TYPE_NONE) {
1381 		/*
1382 		 * FIXME Should DMRRS perhaps be treated as seamless
1383 		 * but without the automatic downclocking?
1384 		 */
1385 		if (panel_bool(power->dmrrs, panel_type))
1386 			panel->vbt.drrs_type = DRRS_TYPE_STATIC;
1387 		else
1388 			panel->vbt.drrs_type = DRRS_TYPE_NONE;
1389 	}
1390 
1391 	if (i915->display.vbt.version >= 232)
1392 		panel->vbt.edp.hobl = panel_bool(power->hobl, panel_type);
1393 
1394 	if (i915->display.vbt.version >= 233)
1395 		panel->vbt.vrr = panel_bool(power->vrr_feature_enabled,
1396 					    panel_type);
1397 }
1398 
1399 static void
1400 parse_edp(struct drm_i915_private *i915,
1401 	  struct intel_panel *panel)
1402 {
1403 	const struct bdb_edp *edp;
1404 	const struct edp_power_seq *edp_pps;
1405 	const struct edp_fast_link_params *edp_link_params;
1406 	int panel_type = panel->vbt.panel_type;
1407 
1408 	edp = bdb_find_section(i915, BDB_EDP);
1409 	if (!edp)
1410 		return;
1411 
1412 	switch (panel_bits(edp->color_depth, panel_type, 2)) {
1413 	case EDP_18BPP:
1414 		panel->vbt.edp.bpp = 18;
1415 		break;
1416 	case EDP_24BPP:
1417 		panel->vbt.edp.bpp = 24;
1418 		break;
1419 	case EDP_30BPP:
1420 		panel->vbt.edp.bpp = 30;
1421 		break;
1422 	}
1423 
1424 	/* Get the eDP sequencing and link info */
1425 	edp_pps = &edp->power_seqs[panel_type];
1426 	edp_link_params = &edp->fast_link_params[panel_type];
1427 
1428 	panel->vbt.edp.pps = *edp_pps;
1429 
1430 	if (i915->display.vbt.version >= 224) {
1431 		panel->vbt.edp.rate =
1432 			edp->edp_fast_link_training_rate[panel_type] * 20;
1433 	} else {
1434 		switch (edp_link_params->rate) {
1435 		case EDP_RATE_1_62:
1436 			panel->vbt.edp.rate = 162000;
1437 			break;
1438 		case EDP_RATE_2_7:
1439 			panel->vbt.edp.rate = 270000;
1440 			break;
1441 		case EDP_RATE_5_4:
1442 			panel->vbt.edp.rate = 540000;
1443 			break;
1444 		default:
1445 			drm_dbg_kms(&i915->drm,
1446 				    "VBT has unknown eDP link rate value %u\n",
1447 				    edp_link_params->rate);
1448 			break;
1449 		}
1450 	}
1451 
1452 	switch (edp_link_params->lanes) {
1453 	case EDP_LANE_1:
1454 		panel->vbt.edp.lanes = 1;
1455 		break;
1456 	case EDP_LANE_2:
1457 		panel->vbt.edp.lanes = 2;
1458 		break;
1459 	case EDP_LANE_4:
1460 		panel->vbt.edp.lanes = 4;
1461 		break;
1462 	default:
1463 		drm_dbg_kms(&i915->drm,
1464 			    "VBT has unknown eDP lane count value %u\n",
1465 			    edp_link_params->lanes);
1466 		break;
1467 	}
1468 
1469 	switch (edp_link_params->preemphasis) {
1470 	case EDP_PREEMPHASIS_NONE:
1471 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1472 		break;
1473 	case EDP_PREEMPHASIS_3_5dB:
1474 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1475 		break;
1476 	case EDP_PREEMPHASIS_6dB:
1477 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1478 		break;
1479 	case EDP_PREEMPHASIS_9_5dB:
1480 		panel->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1481 		break;
1482 	default:
1483 		drm_dbg_kms(&i915->drm,
1484 			    "VBT has unknown eDP pre-emphasis value %u\n",
1485 			    edp_link_params->preemphasis);
1486 		break;
1487 	}
1488 
1489 	switch (edp_link_params->vswing) {
1490 	case EDP_VSWING_0_4V:
1491 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1492 		break;
1493 	case EDP_VSWING_0_6V:
1494 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1495 		break;
1496 	case EDP_VSWING_0_8V:
1497 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1498 		break;
1499 	case EDP_VSWING_1_2V:
1500 		panel->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1501 		break;
1502 	default:
1503 		drm_dbg_kms(&i915->drm,
1504 			    "VBT has unknown eDP voltage swing value %u\n",
1505 			    edp_link_params->vswing);
1506 		break;
1507 	}
1508 
1509 	if (i915->display.vbt.version >= 173) {
1510 		u8 vswing;
1511 
1512 		/* Don't read from VBT if module parameter has valid value*/
1513 		if (i915->display.params.edp_vswing) {
1514 			panel->vbt.edp.low_vswing =
1515 				i915->display.params.edp_vswing == 1;
1516 		} else {
1517 			vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1518 			panel->vbt.edp.low_vswing = vswing == 0;
1519 		}
1520 	}
1521 
1522 	panel->vbt.edp.drrs_msa_timing_delay =
1523 		panel_bits(edp->sdrrs_msa_timing_delay, panel_type, 2);
1524 
1525 	if (i915->display.vbt.version >= 244)
1526 		panel->vbt.edp.max_link_rate =
1527 			edp->edp_max_port_link_rate[panel_type] * 20;
1528 
1529 	if (i915->display.vbt.version >= 251)
1530 		panel->vbt.edp.dsc_disable =
1531 			panel_bool(edp->edp_dsc_disable, panel_type);
1532 }
1533 
1534 static void
1535 parse_psr(struct drm_i915_private *i915,
1536 	  struct intel_panel *panel)
1537 {
1538 	const struct bdb_psr *psr;
1539 	const struct psr_table *psr_table;
1540 	int panel_type = panel->vbt.panel_type;
1541 
1542 	psr = bdb_find_section(i915, BDB_PSR);
1543 	if (!psr) {
1544 		drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1545 		return;
1546 	}
1547 
1548 	psr_table = &psr->psr_table[panel_type];
1549 
1550 	panel->vbt.psr.full_link = psr_table->full_link;
1551 	panel->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1552 
1553 	/* Allowed VBT values goes from 0 to 15 */
1554 	panel->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1555 		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1556 
1557 	/*
1558 	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1559 	 * Old decimal value is wake up time in multiples of 100 us.
1560 	 */
1561 	if (i915->display.vbt.version >= 205 &&
1562 	    (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1563 		switch (psr_table->tp1_wakeup_time) {
1564 		case 0:
1565 			panel->vbt.psr.tp1_wakeup_time_us = 500;
1566 			break;
1567 		case 1:
1568 			panel->vbt.psr.tp1_wakeup_time_us = 100;
1569 			break;
1570 		case 3:
1571 			panel->vbt.psr.tp1_wakeup_time_us = 0;
1572 			break;
1573 		default:
1574 			drm_dbg_kms(&i915->drm,
1575 				    "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1576 				    psr_table->tp1_wakeup_time);
1577 			fallthrough;
1578 		case 2:
1579 			panel->vbt.psr.tp1_wakeup_time_us = 2500;
1580 			break;
1581 		}
1582 
1583 		switch (psr_table->tp2_tp3_wakeup_time) {
1584 		case 0:
1585 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1586 			break;
1587 		case 1:
1588 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1589 			break;
1590 		case 3:
1591 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1592 			break;
1593 		default:
1594 			drm_dbg_kms(&i915->drm,
1595 				    "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1596 				    psr_table->tp2_tp3_wakeup_time);
1597 			fallthrough;
1598 		case 2:
1599 			panel->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1600 		break;
1601 		}
1602 	} else {
1603 		panel->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1604 		panel->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1605 	}
1606 
1607 	if (i915->display.vbt.version >= 226) {
1608 		u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1609 
1610 		wakeup_time = panel_bits(wakeup_time, panel_type, 2);
1611 		switch (wakeup_time) {
1612 		case 0:
1613 			wakeup_time = 500;
1614 			break;
1615 		case 1:
1616 			wakeup_time = 100;
1617 			break;
1618 		case 3:
1619 			wakeup_time = 50;
1620 			break;
1621 		default:
1622 		case 2:
1623 			wakeup_time = 2500;
1624 			break;
1625 		}
1626 		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1627 	} else {
1628 		/* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1629 		panel->vbt.psr.psr2_tp2_tp3_wakeup_time_us = panel->vbt.psr.tp2_tp3_wakeup_time_us;
1630 	}
1631 }
1632 
1633 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1634 				      struct intel_panel *panel,
1635 				      enum port port)
1636 {
1637 	enum port port_bc = DISPLAY_VER(i915) >= 11 ? PORT_B : PORT_C;
1638 
1639 	if (!panel->vbt.dsi.config->dual_link || i915->display.vbt.version < 197) {
1640 		panel->vbt.dsi.bl_ports = BIT(port);
1641 		if (panel->vbt.dsi.config->cabc_supported)
1642 			panel->vbt.dsi.cabc_ports = BIT(port);
1643 
1644 		return;
1645 	}
1646 
1647 	switch (panel->vbt.dsi.config->dl_dcs_backlight_ports) {
1648 	case DL_DCS_PORT_A:
1649 		panel->vbt.dsi.bl_ports = BIT(PORT_A);
1650 		break;
1651 	case DL_DCS_PORT_C:
1652 		panel->vbt.dsi.bl_ports = BIT(port_bc);
1653 		break;
1654 	default:
1655 	case DL_DCS_PORT_A_AND_C:
1656 		panel->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(port_bc);
1657 		break;
1658 	}
1659 
1660 	if (!panel->vbt.dsi.config->cabc_supported)
1661 		return;
1662 
1663 	switch (panel->vbt.dsi.config->dl_dcs_cabc_ports) {
1664 	case DL_DCS_PORT_A:
1665 		panel->vbt.dsi.cabc_ports = BIT(PORT_A);
1666 		break;
1667 	case DL_DCS_PORT_C:
1668 		panel->vbt.dsi.cabc_ports = BIT(port_bc);
1669 		break;
1670 	default:
1671 	case DL_DCS_PORT_A_AND_C:
1672 		panel->vbt.dsi.cabc_ports =
1673 					BIT(PORT_A) | BIT(port_bc);
1674 		break;
1675 	}
1676 }
1677 
1678 static void
1679 parse_mipi_config(struct drm_i915_private *i915,
1680 		  struct intel_panel *panel)
1681 {
1682 	const struct bdb_mipi_config *start;
1683 	const struct mipi_config *config;
1684 	const struct mipi_pps_data *pps;
1685 	int panel_type = panel->vbt.panel_type;
1686 	enum port port;
1687 
1688 	/* parse MIPI blocks only if LFP type is MIPI */
1689 	if (!intel_bios_is_dsi_present(i915, &port))
1690 		return;
1691 
1692 	/* Initialize this to undefined indicating no generic MIPI support */
1693 	panel->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1694 
1695 	/* Block #40 is already parsed and panel_fixed_mode is
1696 	 * stored in i915->lfp_vbt_mode
1697 	 * resuse this when needed
1698 	 */
1699 
1700 	/* Parse #52 for panel index used from panel_type already
1701 	 * parsed
1702 	 */
1703 	start = bdb_find_section(i915, BDB_MIPI_CONFIG);
1704 	if (!start) {
1705 		drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1706 		return;
1707 	}
1708 
1709 	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1710 		panel_type);
1711 
1712 	/*
1713 	 * get hold of the correct configuration block and pps data as per
1714 	 * the panel_type as index
1715 	 */
1716 	config = &start->config[panel_type];
1717 	pps = &start->pps[panel_type];
1718 
1719 	/* store as of now full data. Trim when we realise all is not needed */
1720 	panel->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1721 	if (!panel->vbt.dsi.config)
1722 		return;
1723 
1724 	panel->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1725 	if (!panel->vbt.dsi.pps) {
1726 		kfree(panel->vbt.dsi.config);
1727 		return;
1728 	}
1729 
1730 	parse_dsi_backlight_ports(i915, panel, port);
1731 
1732 	/* FIXME is the 90 vs. 270 correct? */
1733 	switch (config->rotation) {
1734 	case ENABLE_ROTATION_0:
1735 		/*
1736 		 * Most (all?) VBTs claim 0 degrees despite having
1737 		 * an upside down panel, thus we do not trust this.
1738 		 */
1739 		panel->vbt.dsi.orientation =
1740 			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1741 		break;
1742 	case ENABLE_ROTATION_90:
1743 		panel->vbt.dsi.orientation =
1744 			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1745 		break;
1746 	case ENABLE_ROTATION_180:
1747 		panel->vbt.dsi.orientation =
1748 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1749 		break;
1750 	case ENABLE_ROTATION_270:
1751 		panel->vbt.dsi.orientation =
1752 			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1753 		break;
1754 	}
1755 
1756 	/* We have mandatory mipi config blocks. Initialize as generic panel */
1757 	panel->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1758 }
1759 
1760 /* Find the sequence block and size for the given panel. */
1761 static const u8 *
1762 find_panel_sequence_block(struct drm_i915_private *i915,
1763 			  const struct bdb_mipi_sequence *sequence,
1764 			  u16 panel_id, u32 *seq_size)
1765 {
1766 	u32 total = get_blocksize(sequence);
1767 	const u8 *data = &sequence->data[0];
1768 	u8 current_id;
1769 	u32 current_size;
1770 	int header_size = sequence->version >= 3 ? 5 : 3;
1771 	int index = 0;
1772 	int i;
1773 
1774 	/* skip new block size */
1775 	if (sequence->version >= 3)
1776 		data += 4;
1777 
1778 	for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1779 		if (index + header_size > total) {
1780 			drm_err(&i915->drm, "Invalid sequence block (header)\n");
1781 			return NULL;
1782 		}
1783 
1784 		current_id = *(data + index);
1785 		if (sequence->version >= 3)
1786 			current_size = *((const u32 *)(data + index + 1));
1787 		else
1788 			current_size = *((const u16 *)(data + index + 1));
1789 
1790 		index += header_size;
1791 
1792 		if (index + current_size > total) {
1793 			drm_err(&i915->drm, "Invalid sequence block\n");
1794 			return NULL;
1795 		}
1796 
1797 		if (current_id == panel_id) {
1798 			*seq_size = current_size;
1799 			return data + index;
1800 		}
1801 
1802 		index += current_size;
1803 	}
1804 
1805 	drm_err(&i915->drm, "Sequence block detected but no valid configuration\n");
1806 
1807 	return NULL;
1808 }
1809 
1810 static int goto_next_sequence(struct drm_i915_private *i915,
1811 			      const u8 *data, int index, int total)
1812 {
1813 	u16 len;
1814 
1815 	/* Skip Sequence Byte. */
1816 	for (index = index + 1; index < total; index += len) {
1817 		u8 operation_byte = *(data + index);
1818 		index++;
1819 
1820 		switch (operation_byte) {
1821 		case MIPI_SEQ_ELEM_END:
1822 			return index;
1823 		case MIPI_SEQ_ELEM_SEND_PKT:
1824 			if (index + 4 > total)
1825 				return 0;
1826 
1827 			len = *((const u16 *)(data + index + 2)) + 4;
1828 			break;
1829 		case MIPI_SEQ_ELEM_DELAY:
1830 			len = 4;
1831 			break;
1832 		case MIPI_SEQ_ELEM_GPIO:
1833 			len = 2;
1834 			break;
1835 		case MIPI_SEQ_ELEM_I2C:
1836 			if (index + 7 > total)
1837 				return 0;
1838 			len = *(data + index + 6) + 7;
1839 			break;
1840 		default:
1841 			drm_err(&i915->drm, "Unknown operation byte\n");
1842 			return 0;
1843 		}
1844 	}
1845 
1846 	return 0;
1847 }
1848 
1849 static int goto_next_sequence_v3(struct drm_i915_private *i915,
1850 				 const u8 *data, int index, int total)
1851 {
1852 	int seq_end;
1853 	u16 len;
1854 	u32 size_of_sequence;
1855 
1856 	/*
1857 	 * Could skip sequence based on Size of Sequence alone, but also do some
1858 	 * checking on the structure.
1859 	 */
1860 	if (total < 5) {
1861 		drm_err(&i915->drm, "Too small sequence size\n");
1862 		return 0;
1863 	}
1864 
1865 	/* Skip Sequence Byte. */
1866 	index++;
1867 
1868 	/*
1869 	 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1870 	 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1871 	 * byte.
1872 	 */
1873 	size_of_sequence = *((const u32 *)(data + index));
1874 	index += 4;
1875 
1876 	seq_end = index + size_of_sequence;
1877 	if (seq_end > total) {
1878 		drm_err(&i915->drm, "Invalid sequence size\n");
1879 		return 0;
1880 	}
1881 
1882 	for (; index < total; index += len) {
1883 		u8 operation_byte = *(data + index);
1884 		index++;
1885 
1886 		if (operation_byte == MIPI_SEQ_ELEM_END) {
1887 			if (index != seq_end) {
1888 				drm_err(&i915->drm, "Invalid element structure\n");
1889 				return 0;
1890 			}
1891 			return index;
1892 		}
1893 
1894 		len = *(data + index);
1895 		index++;
1896 
1897 		/*
1898 		 * FIXME: Would be nice to check elements like for v1/v2 in
1899 		 * goto_next_sequence() above.
1900 		 */
1901 		switch (operation_byte) {
1902 		case MIPI_SEQ_ELEM_SEND_PKT:
1903 		case MIPI_SEQ_ELEM_DELAY:
1904 		case MIPI_SEQ_ELEM_GPIO:
1905 		case MIPI_SEQ_ELEM_I2C:
1906 		case MIPI_SEQ_ELEM_SPI:
1907 		case MIPI_SEQ_ELEM_PMIC:
1908 			break;
1909 		default:
1910 			drm_err(&i915->drm, "Unknown operation byte %u\n",
1911 				operation_byte);
1912 			break;
1913 		}
1914 	}
1915 
1916 	return 0;
1917 }
1918 
1919 /*
1920  * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1921  * skip all delay + gpio operands and stop at the first DSI packet op.
1922  */
1923 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
1924 					      struct intel_panel *panel)
1925 {
1926 	const u8 *data = panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1927 	int index, len;
1928 
1929 	if (drm_WARN_ON(&i915->drm,
1930 			!data || panel->vbt.dsi.seq_version != 1))
1931 		return 0;
1932 
1933 	/* index = 1 to skip sequence byte */
1934 	for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1935 		switch (data[index]) {
1936 		case MIPI_SEQ_ELEM_SEND_PKT:
1937 			return index == 1 ? 0 : index;
1938 		case MIPI_SEQ_ELEM_DELAY:
1939 			len = 5; /* 1 byte for operand + uint32 */
1940 			break;
1941 		case MIPI_SEQ_ELEM_GPIO:
1942 			len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1943 			break;
1944 		default:
1945 			return 0;
1946 		}
1947 	}
1948 
1949 	return 0;
1950 }
1951 
1952 /*
1953  * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1954  * The deassert must be done before calling intel_dsi_device_ready, so for
1955  * these devices we split the init OTP sequence into a deassert sequence and
1956  * the actual init OTP part.
1957  */
1958 static void vlv_fixup_mipi_sequences(struct drm_i915_private *i915,
1959 				     struct intel_panel *panel)
1960 {
1961 	u8 *init_otp;
1962 	int len;
1963 
1964 	/* Limit this to v1 vid-mode sequences */
1965 	if (panel->vbt.dsi.config->is_cmd_mode ||
1966 	    panel->vbt.dsi.seq_version != 1)
1967 		return;
1968 
1969 	/* Only do this if there are otp and assert seqs and no deassert seq */
1970 	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1971 	    !panel->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1972 	    panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1973 		return;
1974 
1975 	/* The deassert-sequence ends at the first DSI packet */
1976 	len = get_init_otp_deassert_fragment_len(i915, panel);
1977 	if (!len)
1978 		return;
1979 
1980 	drm_dbg_kms(&i915->drm,
1981 		    "Using init OTP fragment to deassert reset\n");
1982 
1983 	/* Copy the fragment, update seq byte and terminate it */
1984 	init_otp = (u8 *)panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1985 	panel->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1986 	if (!panel->vbt.dsi.deassert_seq)
1987 		return;
1988 	panel->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1989 	panel->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1990 	/* Use the copy for deassert */
1991 	panel->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1992 		panel->vbt.dsi.deassert_seq;
1993 	/* Replace the last byte of the fragment with init OTP seq byte */
1994 	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1995 	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1996 	panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1997 }
1998 
1999 /*
2000  * Some machines (eg. Lenovo 82TQ) appear to have broken
2001  * VBT sequences:
2002  * - INIT_OTP is not present at all
2003  * - what should be in INIT_OTP is in DISPLAY_ON
2004  * - what should be in DISPLAY_ON is in BACKLIGHT_ON
2005  *   (along with the actual backlight stuff)
2006  *
2007  * To make those work we simply swap DISPLAY_ON and INIT_OTP.
2008  *
2009  * TODO: Do we need to limit this to specific machines,
2010  *       or examine the contents of the sequences to
2011  *       avoid false positives?
2012  */
2013 static void icl_fixup_mipi_sequences(struct drm_i915_private *i915,
2014 				     struct intel_panel *panel)
2015 {
2016 	if (!panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] &&
2017 	    panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]) {
2018 		drm_dbg_kms(&i915->drm, "Broken VBT: Swapping INIT_OTP and DISPLAY_ON sequences\n");
2019 
2020 		swap(panel->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP],
2021 		     panel->vbt.dsi.sequence[MIPI_SEQ_DISPLAY_ON]);
2022 	}
2023 }
2024 
2025 static void fixup_mipi_sequences(struct drm_i915_private *i915,
2026 				 struct intel_panel *panel)
2027 {
2028 	if (DISPLAY_VER(i915) >= 11)
2029 		icl_fixup_mipi_sequences(i915, panel);
2030 	else if (IS_VALLEYVIEW(i915))
2031 		vlv_fixup_mipi_sequences(i915, panel);
2032 }
2033 
2034 static void
2035 parse_mipi_sequence(struct drm_i915_private *i915,
2036 		    struct intel_panel *panel)
2037 {
2038 	int panel_type = panel->vbt.panel_type;
2039 	const struct bdb_mipi_sequence *sequence;
2040 	const u8 *seq_data;
2041 	u32 seq_size;
2042 	u8 *data;
2043 	int index = 0;
2044 
2045 	/* Only our generic panel driver uses the sequence block. */
2046 	if (panel->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
2047 		return;
2048 
2049 	sequence = bdb_find_section(i915, BDB_MIPI_SEQUENCE);
2050 	if (!sequence) {
2051 		drm_dbg_kms(&i915->drm,
2052 			    "No MIPI Sequence found, parsing complete\n");
2053 		return;
2054 	}
2055 
2056 	/* Fail gracefully for forward incompatible sequence block. */
2057 	if (sequence->version >= 4) {
2058 		drm_err(&i915->drm,
2059 			"Unable to parse MIPI Sequence Block v%u\n",
2060 			sequence->version);
2061 		return;
2062 	}
2063 
2064 	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
2065 		sequence->version);
2066 
2067 	seq_data = find_panel_sequence_block(i915, sequence, panel_type, &seq_size);
2068 	if (!seq_data)
2069 		return;
2070 
2071 	data = kmemdup(seq_data, seq_size, GFP_KERNEL);
2072 	if (!data)
2073 		return;
2074 
2075 	/* Parse the sequences, store pointers to each sequence. */
2076 	for (;;) {
2077 		u8 seq_id = *(data + index);
2078 		if (seq_id == MIPI_SEQ_END)
2079 			break;
2080 
2081 		if (seq_id >= MIPI_SEQ_MAX) {
2082 			drm_err(&i915->drm, "Unknown sequence %u\n",
2083 				seq_id);
2084 			goto err;
2085 		}
2086 
2087 		/* Log about presence of sequences we won't run. */
2088 		if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
2089 			drm_dbg_kms(&i915->drm,
2090 				    "Unsupported sequence %u\n", seq_id);
2091 
2092 		panel->vbt.dsi.sequence[seq_id] = data + index;
2093 
2094 		if (sequence->version >= 3)
2095 			index = goto_next_sequence_v3(i915, data, index, seq_size);
2096 		else
2097 			index = goto_next_sequence(i915, data, index, seq_size);
2098 		if (!index) {
2099 			drm_err(&i915->drm, "Invalid sequence %u\n",
2100 				seq_id);
2101 			goto err;
2102 		}
2103 	}
2104 
2105 	panel->vbt.dsi.data = data;
2106 	panel->vbt.dsi.size = seq_size;
2107 	panel->vbt.dsi.seq_version = sequence->version;
2108 
2109 	fixup_mipi_sequences(i915, panel);
2110 
2111 	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
2112 	return;
2113 
2114 err:
2115 	kfree(data);
2116 	memset(panel->vbt.dsi.sequence, 0, sizeof(panel->vbt.dsi.sequence));
2117 }
2118 
2119 static void
2120 parse_compression_parameters(struct drm_i915_private *i915)
2121 {
2122 	const struct bdb_compression_parameters *params;
2123 	struct intel_bios_encoder_data *devdata;
2124 	u16 block_size;
2125 	int index;
2126 
2127 	if (i915->display.vbt.version < 198)
2128 		return;
2129 
2130 	params = bdb_find_section(i915, BDB_COMPRESSION_PARAMETERS);
2131 	if (params) {
2132 		/* Sanity checks */
2133 		if (params->entry_size != sizeof(params->data[0])) {
2134 			drm_dbg_kms(&i915->drm,
2135 				    "VBT: unsupported compression param entry size\n");
2136 			return;
2137 		}
2138 
2139 		block_size = get_blocksize(params);
2140 		if (block_size < sizeof(*params)) {
2141 			drm_dbg_kms(&i915->drm,
2142 				    "VBT: expected 16 compression param entries\n");
2143 			return;
2144 		}
2145 	}
2146 
2147 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
2148 		const struct child_device_config *child = &devdata->child;
2149 
2150 		if (!child->compression_enable)
2151 			continue;
2152 
2153 		if (!params) {
2154 			drm_dbg_kms(&i915->drm,
2155 				    "VBT: compression params not available\n");
2156 			continue;
2157 		}
2158 
2159 		if (child->compression_method_cps) {
2160 			drm_dbg_kms(&i915->drm,
2161 				    "VBT: CPS compression not supported\n");
2162 			continue;
2163 		}
2164 
2165 		index = child->compression_structure_index;
2166 
2167 		devdata->dsc = kmemdup(&params->data[index],
2168 				       sizeof(*devdata->dsc), GFP_KERNEL);
2169 	}
2170 }
2171 
2172 static u8 translate_iboost(struct drm_i915_private *i915, u8 val)
2173 {
2174 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
2175 
2176 	if (val >= ARRAY_SIZE(mapping)) {
2177 		drm_dbg_kms(&i915->drm,
2178 			    "Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
2179 		return 0;
2180 	}
2181 	return mapping[val];
2182 }
2183 
2184 static const u8 cnp_ddc_pin_map[] = {
2185 	[0] = 0, /* N/A */
2186 	[GMBUS_PIN_1_BXT] = DDC_BUS_DDI_B,
2187 	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_C,
2188 	[GMBUS_PIN_4_CNP] = DDC_BUS_DDI_D, /* sic */
2189 	[GMBUS_PIN_3_BXT] = DDC_BUS_DDI_F, /* sic */
2190 };
2191 
2192 static const u8 icp_ddc_pin_map[] = {
2193 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2194 	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2195 	[GMBUS_PIN_3_BXT] = TGL_DDC_BUS_DDI_C,
2196 	[GMBUS_PIN_9_TC1_ICP] = ICL_DDC_BUS_PORT_1,
2197 	[GMBUS_PIN_10_TC2_ICP] = ICL_DDC_BUS_PORT_2,
2198 	[GMBUS_PIN_11_TC3_ICP] = ICL_DDC_BUS_PORT_3,
2199 	[GMBUS_PIN_12_TC4_ICP] = ICL_DDC_BUS_PORT_4,
2200 	[GMBUS_PIN_13_TC5_TGP] = TGL_DDC_BUS_PORT_5,
2201 	[GMBUS_PIN_14_TC6_TGP] = TGL_DDC_BUS_PORT_6,
2202 };
2203 
2204 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
2205 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2206 	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2207 	[GMBUS_PIN_9_TC1_ICP] = RKL_DDC_BUS_DDI_D,
2208 	[GMBUS_PIN_10_TC2_ICP] = RKL_DDC_BUS_DDI_E,
2209 };
2210 
2211 static const u8 adls_ddc_pin_map[] = {
2212 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2213 	[GMBUS_PIN_9_TC1_ICP] = ADLS_DDC_BUS_PORT_TC1,
2214 	[GMBUS_PIN_10_TC2_ICP] = ADLS_DDC_BUS_PORT_TC2,
2215 	[GMBUS_PIN_11_TC3_ICP] = ADLS_DDC_BUS_PORT_TC3,
2216 	[GMBUS_PIN_12_TC4_ICP] = ADLS_DDC_BUS_PORT_TC4,
2217 };
2218 
2219 static const u8 gen9bc_tgp_ddc_pin_map[] = {
2220 	[GMBUS_PIN_2_BXT] = DDC_BUS_DDI_B,
2221 	[GMBUS_PIN_9_TC1_ICP] = DDC_BUS_DDI_C,
2222 	[GMBUS_PIN_10_TC2_ICP] = DDC_BUS_DDI_D,
2223 };
2224 
2225 static const u8 adlp_ddc_pin_map[] = {
2226 	[GMBUS_PIN_1_BXT] = ICL_DDC_BUS_DDI_A,
2227 	[GMBUS_PIN_2_BXT] = ICL_DDC_BUS_DDI_B,
2228 	[GMBUS_PIN_9_TC1_ICP] = ADLP_DDC_BUS_PORT_TC1,
2229 	[GMBUS_PIN_10_TC2_ICP] = ADLP_DDC_BUS_PORT_TC2,
2230 	[GMBUS_PIN_11_TC3_ICP] = ADLP_DDC_BUS_PORT_TC3,
2231 	[GMBUS_PIN_12_TC4_ICP] = ADLP_DDC_BUS_PORT_TC4,
2232 };
2233 
2234 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2235 {
2236 	const u8 *ddc_pin_map;
2237 	int i, n_entries;
2238 
2239 	if (INTEL_PCH_TYPE(i915) >= PCH_MTL || IS_ALDERLAKE_P(i915)) {
2240 		ddc_pin_map = adlp_ddc_pin_map;
2241 		n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2242 	} else if (IS_ALDERLAKE_S(i915)) {
2243 		ddc_pin_map = adls_ddc_pin_map;
2244 		n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2245 	} else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2246 		return vbt_pin;
2247 	} else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2248 		ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2249 		n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2250 	} else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2251 		ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2252 		n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2253 	} else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2254 		ddc_pin_map = icp_ddc_pin_map;
2255 		n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2256 	} else if (HAS_PCH_CNP(i915)) {
2257 		ddc_pin_map = cnp_ddc_pin_map;
2258 		n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2259 	} else {
2260 		/* Assuming direct map */
2261 		return vbt_pin;
2262 	}
2263 
2264 	for (i = 0; i < n_entries; i++) {
2265 		if (ddc_pin_map[i] == vbt_pin)
2266 			return i;
2267 	}
2268 
2269 	drm_dbg_kms(&i915->drm,
2270 		    "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2271 		    vbt_pin);
2272 	return 0;
2273 }
2274 
2275 static u8 dvo_port_type(u8 dvo_port)
2276 {
2277 	switch (dvo_port) {
2278 	case DVO_PORT_HDMIA:
2279 	case DVO_PORT_HDMIB:
2280 	case DVO_PORT_HDMIC:
2281 	case DVO_PORT_HDMID:
2282 	case DVO_PORT_HDMIE:
2283 	case DVO_PORT_HDMIF:
2284 	case DVO_PORT_HDMIG:
2285 	case DVO_PORT_HDMIH:
2286 	case DVO_PORT_HDMII:
2287 		return DVO_PORT_HDMIA;
2288 	case DVO_PORT_DPA:
2289 	case DVO_PORT_DPB:
2290 	case DVO_PORT_DPC:
2291 	case DVO_PORT_DPD:
2292 	case DVO_PORT_DPE:
2293 	case DVO_PORT_DPF:
2294 	case DVO_PORT_DPG:
2295 	case DVO_PORT_DPH:
2296 	case DVO_PORT_DPI:
2297 		return DVO_PORT_DPA;
2298 	case DVO_PORT_MIPIA:
2299 	case DVO_PORT_MIPIB:
2300 	case DVO_PORT_MIPIC:
2301 	case DVO_PORT_MIPID:
2302 		return DVO_PORT_MIPIA;
2303 	default:
2304 		return dvo_port;
2305 	}
2306 }
2307 
2308 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2309 				    const int port_mapping[][3], u8 dvo_port)
2310 {
2311 	enum port port;
2312 	int i;
2313 
2314 	for (port = PORT_A; port < n_ports; port++) {
2315 		for (i = 0; i < n_dvo; i++) {
2316 			if (port_mapping[port][i] == -1)
2317 				break;
2318 
2319 			if (dvo_port == port_mapping[port][i])
2320 				return port;
2321 		}
2322 	}
2323 
2324 	return PORT_NONE;
2325 }
2326 
2327 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2328 				  u8 dvo_port)
2329 {
2330 	/*
2331 	 * Each DDI port can have more than one value on the "DVO Port" field,
2332 	 * so look for all the possible values for each port.
2333 	 */
2334 	static const int port_mapping[][3] = {
2335 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2336 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2337 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2338 		[PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2339 		[PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2340 		[PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2341 		[PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2342 		[PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2343 		[PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2344 	};
2345 	/*
2346 	 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2347 	 * map to DDI A,B,TC1,TC2 respectively.
2348 	 */
2349 	static const int rkl_port_mapping[][3] = {
2350 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2351 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2352 		[PORT_C] = { -1 },
2353 		[PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2354 		[PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2355 	};
2356 	/*
2357 	 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2358 	 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2359 	 */
2360 	static const int adls_port_mapping[][3] = {
2361 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2362 		[PORT_B] = { -1 },
2363 		[PORT_C] = { -1 },
2364 		[PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2365 		[PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2366 		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2367 		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2368 	};
2369 	static const int xelpd_port_mapping[][3] = {
2370 		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2371 		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2372 		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2373 		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2374 		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2375 		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2376 		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2377 		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2378 		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2379 	};
2380 
2381 	if (DISPLAY_VER(i915) >= 13)
2382 		return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2383 					  ARRAY_SIZE(xelpd_port_mapping[0]),
2384 					  xelpd_port_mapping,
2385 					  dvo_port);
2386 	else if (IS_ALDERLAKE_S(i915))
2387 		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2388 					  ARRAY_SIZE(adls_port_mapping[0]),
2389 					  adls_port_mapping,
2390 					  dvo_port);
2391 	else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2392 		return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2393 					  ARRAY_SIZE(rkl_port_mapping[0]),
2394 					  rkl_port_mapping,
2395 					  dvo_port);
2396 	else
2397 		return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2398 					  ARRAY_SIZE(port_mapping[0]),
2399 					  port_mapping,
2400 					  dvo_port);
2401 }
2402 
2403 static enum port
2404 dsi_dvo_port_to_port(struct drm_i915_private *i915, u8 dvo_port)
2405 {
2406 	switch (dvo_port) {
2407 	case DVO_PORT_MIPIA:
2408 		return PORT_A;
2409 	case DVO_PORT_MIPIC:
2410 		if (DISPLAY_VER(i915) >= 11)
2411 			return PORT_B;
2412 		else
2413 			return PORT_C;
2414 	default:
2415 		return PORT_NONE;
2416 	}
2417 }
2418 
2419 enum port intel_bios_encoder_port(const struct intel_bios_encoder_data *devdata)
2420 {
2421 	struct drm_i915_private *i915 = devdata->i915;
2422 	const struct child_device_config *child = &devdata->child;
2423 	enum port port;
2424 
2425 	port = dvo_port_to_port(i915, child->dvo_port);
2426 	if (port == PORT_NONE && DISPLAY_VER(i915) >= 11)
2427 		port = dsi_dvo_port_to_port(i915, child->dvo_port);
2428 
2429 	return port;
2430 }
2431 
2432 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2433 {
2434 	switch (vbt_max_link_rate) {
2435 	default:
2436 	case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2437 		return 0;
2438 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2439 		return 2000000;
2440 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2441 		return 1350000;
2442 	case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2443 		return 1000000;
2444 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2445 		return 810000;
2446 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2447 		return 540000;
2448 	case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2449 		return 270000;
2450 	case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2451 		return 162000;
2452 	}
2453 }
2454 
2455 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2456 {
2457 	switch (vbt_max_link_rate) {
2458 	default:
2459 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2460 		return 810000;
2461 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2462 		return 540000;
2463 	case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2464 		return 270000;
2465 	case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2466 		return 162000;
2467 	}
2468 }
2469 
2470 int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2471 {
2472 	if (!devdata || devdata->i915->display.vbt.version < 216)
2473 		return 0;
2474 
2475 	if (devdata->i915->display.vbt.version >= 230)
2476 		return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2477 	else
2478 		return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2479 }
2480 
2481 int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata)
2482 {
2483 	if (!devdata || devdata->i915->display.vbt.version < 244)
2484 		return 0;
2485 
2486 	return devdata->child.dp_max_lane_count + 1;
2487 }
2488 
2489 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2490 				 enum port port)
2491 {
2492 	struct drm_i915_private *i915 = devdata->i915;
2493 	bool is_hdmi;
2494 
2495 	if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2496 		return;
2497 
2498 	if (!intel_bios_encoder_supports_dvi(devdata))
2499 		return;
2500 
2501 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2502 
2503 	drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2504 		    is_hdmi ? "/HDMI" : "");
2505 
2506 	devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2507 	devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2508 }
2509 
2510 static void sanitize_hdmi_level_shift(struct intel_bios_encoder_data *devdata,
2511 				      enum port port)
2512 {
2513 	struct drm_i915_private *i915 = devdata->i915;
2514 
2515 	if (!intel_bios_encoder_supports_dvi(devdata))
2516 		return;
2517 
2518 	/*
2519 	 * Some BDW machines (eg. HP Pavilion 15-ab) shipped
2520 	 * with a HSW VBT where the level shifter value goes
2521 	 * up to 11, whereas the BDW max is 9.
2522 	 */
2523 	if (IS_BROADWELL(i915) && devdata->child.hdmi_level_shifter_value > 9) {
2524 		drm_dbg_kms(&i915->drm, "Bogus port %c VBT HDMI level shift %d, adjusting to %d\n",
2525 			    port_name(port), devdata->child.hdmi_level_shifter_value, 9);
2526 
2527 		devdata->child.hdmi_level_shifter_value = 9;
2528 	}
2529 }
2530 
2531 static bool
2532 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2533 {
2534 	return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2535 }
2536 
2537 bool
2538 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2539 {
2540 	return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2541 }
2542 
2543 bool
2544 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2545 {
2546 	return intel_bios_encoder_supports_dvi(devdata) &&
2547 		(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2548 }
2549 
2550 bool
2551 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2552 {
2553 	return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2554 }
2555 
2556 bool
2557 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2558 {
2559 	return intel_bios_encoder_supports_dp(devdata) &&
2560 		devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2561 }
2562 
2563 bool
2564 intel_bios_encoder_supports_dsi(const struct intel_bios_encoder_data *devdata)
2565 {
2566 	return devdata->child.device_type & DEVICE_TYPE_MIPI_OUTPUT;
2567 }
2568 
2569 bool
2570 intel_bios_encoder_is_lspcon(const struct intel_bios_encoder_data *devdata)
2571 {
2572 	return devdata && HAS_LSPCON(devdata->i915) && devdata->child.lspcon;
2573 }
2574 
2575 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
2576 int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2577 {
2578 	if (!devdata || devdata->i915->display.vbt.version < 158 ||
2579 	    DISPLAY_VER(devdata->i915) >= 14)
2580 		return -1;
2581 
2582 	return devdata->child.hdmi_level_shifter_value;
2583 }
2584 
2585 int intel_bios_hdmi_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2586 {
2587 	if (!devdata || devdata->i915->display.vbt.version < 204)
2588 		return 0;
2589 
2590 	switch (devdata->child.hdmi_max_data_rate) {
2591 	default:
2592 		MISSING_CASE(devdata->child.hdmi_max_data_rate);
2593 		fallthrough;
2594 	case HDMI_MAX_DATA_RATE_PLATFORM:
2595 		return 0;
2596 	case HDMI_MAX_DATA_RATE_594:
2597 		return 594000;
2598 	case HDMI_MAX_DATA_RATE_340:
2599 		return 340000;
2600 	case HDMI_MAX_DATA_RATE_300:
2601 		return 300000;
2602 	case HDMI_MAX_DATA_RATE_297:
2603 		return 297000;
2604 	case HDMI_MAX_DATA_RATE_165:
2605 		return 165000;
2606 	}
2607 }
2608 
2609 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2610 {
2611 	/*
2612 	 * On some ICL SKUs port F is not present, but broken VBTs mark
2613 	 * the port as present. Only try to initialize port F for the
2614 	 * SKUs that may actually have it.
2615 	 */
2616 	if (port == PORT_F && IS_ICELAKE(i915))
2617 		return IS_ICL_WITH_PORT_F(i915);
2618 
2619 	return true;
2620 }
2621 
2622 static void print_ddi_port(const struct intel_bios_encoder_data *devdata)
2623 {
2624 	struct drm_i915_private *i915 = devdata->i915;
2625 	const struct child_device_config *child = &devdata->child;
2626 	bool is_dvi, is_hdmi, is_dp, is_edp, is_dsi, is_crt, supports_typec_usb, supports_tbt;
2627 	int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2628 	enum port port;
2629 
2630 	port = intel_bios_encoder_port(devdata);
2631 	if (port == PORT_NONE)
2632 		return;
2633 
2634 	is_dvi = intel_bios_encoder_supports_dvi(devdata);
2635 	is_dp = intel_bios_encoder_supports_dp(devdata);
2636 	is_crt = intel_bios_encoder_supports_crt(devdata);
2637 	is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2638 	is_edp = intel_bios_encoder_supports_edp(devdata);
2639 	is_dsi = intel_bios_encoder_supports_dsi(devdata);
2640 
2641 	supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2642 	supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2643 
2644 	drm_dbg_kms(&i915->drm,
2645 		    "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d DSI:%d DP++:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2646 		    port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, is_dsi,
2647 		    intel_bios_encoder_supports_dp_dual_mode(devdata),
2648 		    intel_bios_encoder_is_lspcon(devdata),
2649 		    supports_typec_usb, supports_tbt,
2650 		    devdata->dsc != NULL);
2651 
2652 	hdmi_level_shift = intel_bios_hdmi_level_shift(devdata);
2653 	if (hdmi_level_shift >= 0) {
2654 		drm_dbg_kms(&i915->drm,
2655 			    "Port %c VBT HDMI level shift: %d\n",
2656 			    port_name(port), hdmi_level_shift);
2657 	}
2658 
2659 	max_tmds_clock = intel_bios_hdmi_max_tmds_clock(devdata);
2660 	if (max_tmds_clock)
2661 		drm_dbg_kms(&i915->drm,
2662 			    "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2663 			    port_name(port), max_tmds_clock);
2664 
2665 	/* I_boost config for SKL and above */
2666 	dp_boost_level = intel_bios_dp_boost_level(devdata);
2667 	if (dp_boost_level)
2668 		drm_dbg_kms(&i915->drm,
2669 			    "Port %c VBT (e)DP boost level: %d\n",
2670 			    port_name(port), dp_boost_level);
2671 
2672 	hdmi_boost_level = intel_bios_hdmi_boost_level(devdata);
2673 	if (hdmi_boost_level)
2674 		drm_dbg_kms(&i915->drm,
2675 			    "Port %c VBT HDMI boost level: %d\n",
2676 			    port_name(port), hdmi_boost_level);
2677 
2678 	dp_max_link_rate = intel_bios_dp_max_link_rate(devdata);
2679 	if (dp_max_link_rate)
2680 		drm_dbg_kms(&i915->drm,
2681 			    "Port %c VBT DP max link rate: %d\n",
2682 			    port_name(port), dp_max_link_rate);
2683 
2684 	/*
2685 	 * FIXME need to implement support for VBT
2686 	 * vswing/preemph tables should this ever trigger.
2687 	 */
2688 	drm_WARN(&i915->drm, child->use_vbt_vswing,
2689 		 "Port %c asks to use VBT vswing/preemph tables\n",
2690 		 port_name(port));
2691 }
2692 
2693 static void parse_ddi_port(struct intel_bios_encoder_data *devdata)
2694 {
2695 	struct drm_i915_private *i915 = devdata->i915;
2696 	enum port port;
2697 
2698 	port = intel_bios_encoder_port(devdata);
2699 	if (port == PORT_NONE)
2700 		return;
2701 
2702 	if (!is_port_valid(i915, port)) {
2703 		drm_dbg_kms(&i915->drm,
2704 			    "VBT reports port %c as supported, but that can't be true: skipping\n",
2705 			    port_name(port));
2706 		return;
2707 	}
2708 
2709 	sanitize_device_type(devdata, port);
2710 	sanitize_hdmi_level_shift(devdata, port);
2711 }
2712 
2713 static bool has_ddi_port_info(struct drm_i915_private *i915)
2714 {
2715 	return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2716 }
2717 
2718 static void parse_ddi_ports(struct drm_i915_private *i915)
2719 {
2720 	struct intel_bios_encoder_data *devdata;
2721 
2722 	if (!has_ddi_port_info(i915))
2723 		return;
2724 
2725 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2726 		parse_ddi_port(devdata);
2727 
2728 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
2729 		print_ddi_port(devdata);
2730 }
2731 
2732 static int child_device_expected_size(u16 version)
2733 {
2734 	BUILD_BUG_ON(sizeof(struct child_device_config) < 40);
2735 
2736 	if (version > 256)
2737 		return -ENOENT;
2738 	else if (version >= 256)
2739 		return 40;
2740 	else if (version >= 216)
2741 		return 39;
2742 	else if (version >= 196)
2743 		return 38;
2744 	else if (version >= 195)
2745 		return 37;
2746 	else if (version >= 111)
2747 		return LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2748 	else if (version >= 106)
2749 		return 27;
2750 	else
2751 		return 22;
2752 }
2753 
2754 static bool child_device_size_valid(struct drm_i915_private *i915, int size)
2755 {
2756 	int expected_size;
2757 
2758 	expected_size = child_device_expected_size(i915->display.vbt.version);
2759 	if (expected_size < 0) {
2760 		expected_size = sizeof(struct child_device_config);
2761 		drm_dbg(&i915->drm,
2762 			"Expected child device config size for VBT version %u not known; assuming %d\n",
2763 			i915->display.vbt.version, expected_size);
2764 	}
2765 
2766 	/* Flag an error for unexpected size, but continue anyway. */
2767 	if (size != expected_size)
2768 		drm_err(&i915->drm,
2769 			"Unexpected child device config size %d (expected %d for VBT version %u)\n",
2770 			size, expected_size, i915->display.vbt.version);
2771 
2772 	/* The legacy sized child device config is the minimum we need. */
2773 	if (size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2774 		drm_dbg_kms(&i915->drm,
2775 			    "Child device config size %d is too small.\n",
2776 			    size);
2777 		return false;
2778 	}
2779 
2780 	return true;
2781 }
2782 
2783 static void
2784 parse_general_definitions(struct drm_i915_private *i915)
2785 {
2786 	const struct bdb_general_definitions *defs;
2787 	struct intel_bios_encoder_data *devdata;
2788 	const struct child_device_config *child;
2789 	int i, child_device_num;
2790 	u16 block_size;
2791 	int bus_pin;
2792 
2793 	defs = bdb_find_section(i915, BDB_GENERAL_DEFINITIONS);
2794 	if (!defs) {
2795 		drm_dbg_kms(&i915->drm,
2796 			    "No general definition block is found, no devices defined.\n");
2797 		return;
2798 	}
2799 
2800 	block_size = get_blocksize(defs);
2801 	if (block_size < sizeof(*defs)) {
2802 		drm_dbg_kms(&i915->drm,
2803 			    "General definitions block too small (%u)\n",
2804 			    block_size);
2805 		return;
2806 	}
2807 
2808 	bus_pin = defs->crt_ddc_gmbus_pin;
2809 	drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2810 	if (intel_gmbus_is_valid_pin(i915, bus_pin))
2811 		i915->display.vbt.crt_ddc_pin = bus_pin;
2812 
2813 	if (!child_device_size_valid(i915, defs->child_dev_size))
2814 		return;
2815 
2816 	/* get the number of child device */
2817 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2818 
2819 	for (i = 0; i < child_device_num; i++) {
2820 		child = child_device_ptr(defs, i);
2821 		if (!child->device_type)
2822 			continue;
2823 
2824 		drm_dbg_kms(&i915->drm,
2825 			    "Found VBT child device with type 0x%x\n",
2826 			    child->device_type);
2827 
2828 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2829 		if (!devdata)
2830 			break;
2831 
2832 		devdata->i915 = i915;
2833 
2834 		/*
2835 		 * Copy as much as we know (sizeof) and is available
2836 		 * (child_dev_size) of the child device config. Accessing the
2837 		 * data must depend on VBT version.
2838 		 */
2839 		memcpy(&devdata->child, child,
2840 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
2841 
2842 		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2843 	}
2844 
2845 	if (list_empty(&i915->display.vbt.display_devices))
2846 		drm_dbg_kms(&i915->drm,
2847 			    "no child dev is parsed from VBT\n");
2848 }
2849 
2850 /* Common defaults which may be overridden by VBT. */
2851 static void
2852 init_vbt_defaults(struct drm_i915_private *i915)
2853 {
2854 	i915->display.vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2855 
2856 	/* general features */
2857 	i915->display.vbt.int_tv_support = 1;
2858 	i915->display.vbt.int_crt_support = 1;
2859 
2860 	/* driver features */
2861 	i915->display.vbt.int_lvds_support = 1;
2862 
2863 	/* Default to using SSC */
2864 	i915->display.vbt.lvds_use_ssc = 1;
2865 	/*
2866 	 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2867 	 * clock for LVDS.
2868 	 */
2869 	i915->display.vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2870 								   !HAS_PCH_SPLIT(i915));
2871 	drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2872 		    i915->display.vbt.lvds_ssc_freq);
2873 }
2874 
2875 /* Common defaults which may be overridden by VBT. */
2876 static void
2877 init_vbt_panel_defaults(struct intel_panel *panel)
2878 {
2879 	/* Default to having backlight */
2880 	panel->vbt.backlight.present = true;
2881 
2882 	/* LFP panel data */
2883 	panel->vbt.lvds_dither = true;
2884 }
2885 
2886 /* Defaults to initialize only if there is no VBT. */
2887 static void
2888 init_vbt_missing_defaults(struct drm_i915_private *i915)
2889 {
2890 	unsigned int ports = DISPLAY_RUNTIME_INFO(i915)->port_mask;
2891 	enum port port;
2892 
2893 	if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2894 		return;
2895 
2896 	for_each_port_masked(port, ports) {
2897 		struct intel_bios_encoder_data *devdata;
2898 		struct child_device_config *child;
2899 		enum phy phy = intel_port_to_phy(i915, port);
2900 
2901 		/*
2902 		 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2903 		 * to detect it.
2904 		 */
2905 		if (intel_phy_is_tc(i915, phy))
2906 			continue;
2907 
2908 		/* Create fake child device config */
2909 		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2910 		if (!devdata)
2911 			break;
2912 
2913 		devdata->i915 = i915;
2914 		child = &devdata->child;
2915 
2916 		if (port == PORT_F)
2917 			child->dvo_port = DVO_PORT_HDMIF;
2918 		else if (port == PORT_E)
2919 			child->dvo_port = DVO_PORT_HDMIE;
2920 		else
2921 			child->dvo_port = DVO_PORT_HDMIA + port;
2922 
2923 		if (port != PORT_A && port != PORT_E)
2924 			child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2925 
2926 		if (port != PORT_E)
2927 			child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2928 
2929 		if (port == PORT_A)
2930 			child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2931 
2932 		list_add_tail(&devdata->node, &i915->display.vbt.display_devices);
2933 
2934 		drm_dbg_kms(&i915->drm,
2935 			    "Generating default VBT child device with type 0x04%x on port %c\n",
2936 			    child->device_type, port_name(port));
2937 	}
2938 
2939 	/* Bypass some minimum baseline VBT version checks */
2940 	i915->display.vbt.version = 155;
2941 }
2942 
2943 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2944 {
2945 	const void *_vbt = vbt;
2946 
2947 	return _vbt + vbt->bdb_offset;
2948 }
2949 
2950 /**
2951  * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2952  * @i915:	the device
2953  * @buf:	pointer to a buffer to validate
2954  * @size:	size of the buffer
2955  *
2956  * Returns true on valid VBT.
2957  */
2958 bool intel_bios_is_valid_vbt(struct drm_i915_private *i915,
2959 			     const void *buf, size_t size)
2960 {
2961 	const struct vbt_header *vbt = buf;
2962 	const struct bdb_header *bdb;
2963 
2964 	if (!vbt)
2965 		return false;
2966 
2967 	if (sizeof(struct vbt_header) > size) {
2968 		drm_dbg_kms(&i915->drm, "VBT header incomplete\n");
2969 		return false;
2970 	}
2971 
2972 	if (memcmp(vbt->signature, "$VBT", 4)) {
2973 		drm_dbg_kms(&i915->drm, "VBT invalid signature\n");
2974 		return false;
2975 	}
2976 
2977 	if (vbt->vbt_size > size) {
2978 		drm_dbg_kms(&i915->drm, "VBT incomplete (vbt_size overflows)\n");
2979 		return false;
2980 	}
2981 
2982 	size = vbt->vbt_size;
2983 
2984 	if (range_overflows_t(size_t,
2985 			      vbt->bdb_offset,
2986 			      sizeof(struct bdb_header),
2987 			      size)) {
2988 		drm_dbg_kms(&i915->drm, "BDB header incomplete\n");
2989 		return false;
2990 	}
2991 
2992 	bdb = get_bdb_header(vbt);
2993 	if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2994 		drm_dbg_kms(&i915->drm, "BDB incomplete\n");
2995 		return false;
2996 	}
2997 
2998 	return vbt;
2999 }
3000 
3001 static struct vbt_header *firmware_get_vbt(struct drm_i915_private *i915,
3002 					   size_t *size)
3003 {
3004 	struct vbt_header *vbt = NULL;
3005 	const struct firmware *fw = NULL;
3006 	const char *name = i915->display.params.vbt_firmware;
3007 	int ret;
3008 
3009 	if (!name || !*name)
3010 		return NULL;
3011 
3012 	ret = request_firmware(&fw, name, i915->drm.dev);
3013 	if (ret) {
3014 		drm_err(&i915->drm,
3015 			"Requesting VBT firmware \"%s\" failed (%d)\n",
3016 			name, ret);
3017 		return NULL;
3018 	}
3019 
3020 	if (intel_bios_is_valid_vbt(i915, fw->data, fw->size)) {
3021 		vbt = kmemdup(fw->data, fw->size, GFP_KERNEL);
3022 		if (vbt) {
3023 			drm_dbg_kms(&i915->drm,
3024 				    "Found valid VBT firmware \"%s\"\n", name);
3025 			if (size)
3026 				*size = fw->size;
3027 		}
3028 	} else {
3029 		drm_dbg_kms(&i915->drm, "Invalid VBT firmware \"%s\"\n",
3030 			    name);
3031 	}
3032 
3033 	release_firmware(fw);
3034 
3035 	return vbt;
3036 }
3037 
3038 static u32 intel_spi_read(struct intel_uncore *uncore, u32 offset)
3039 {
3040 	intel_uncore_write(uncore, PRIMARY_SPI_ADDRESS, offset);
3041 
3042 	return intel_uncore_read(uncore, PRIMARY_SPI_TRIGGER);
3043 }
3044 
3045 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915,
3046 					    size_t *size)
3047 {
3048 	u32 count, data, found, store = 0;
3049 	u32 static_region, oprom_offset;
3050 	u32 oprom_size = 0x200000;
3051 	u16 vbt_size;
3052 	u32 *vbt;
3053 
3054 	static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
3055 	static_region &= OPTIONROM_SPI_REGIONID_MASK;
3056 	intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
3057 
3058 	oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
3059 	oprom_offset &= OROM_OFFSET_MASK;
3060 
3061 	for (count = 0; count < oprom_size; count += 4) {
3062 		data = intel_spi_read(&i915->uncore, oprom_offset + count);
3063 		if (data == *((const u32 *)"$VBT")) {
3064 			found = oprom_offset + count;
3065 			break;
3066 		}
3067 	}
3068 
3069 	if (count >= oprom_size)
3070 		goto err_not_found;
3071 
3072 	/* Get VBT size and allocate space for the VBT */
3073 	vbt_size = intel_spi_read(&i915->uncore,
3074 				  found + offsetof(struct vbt_header, vbt_size));
3075 	vbt_size &= 0xffff;
3076 
3077 	vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
3078 	if (!vbt)
3079 		goto err_not_found;
3080 
3081 	for (count = 0; count < vbt_size; count += 4)
3082 		*(vbt + store++) = intel_spi_read(&i915->uncore, found + count);
3083 
3084 	if (!intel_bios_is_valid_vbt(i915, vbt, vbt_size))
3085 		goto err_free_vbt;
3086 
3087 	drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
3088 
3089 	if (size)
3090 		*size = vbt_size;
3091 
3092 	return (struct vbt_header *)vbt;
3093 
3094 err_free_vbt:
3095 	kfree(vbt);
3096 err_not_found:
3097 	return NULL;
3098 }
3099 
3100 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915,
3101 					size_t *sizep)
3102 {
3103 	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
3104 	void __iomem *p = NULL, *oprom;
3105 	struct vbt_header *vbt;
3106 	u16 vbt_size;
3107 	size_t i, size;
3108 
3109 	oprom = pci_map_rom(pdev, &size);
3110 	if (!oprom)
3111 		return NULL;
3112 
3113 	/* Scour memory looking for the VBT signature. */
3114 	for (i = 0; i + 4 < size; i += 4) {
3115 		if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
3116 			continue;
3117 
3118 		p = oprom + i;
3119 		size -= i;
3120 		break;
3121 	}
3122 
3123 	if (!p)
3124 		goto err_unmap_oprom;
3125 
3126 	if (sizeof(struct vbt_header) > size) {
3127 		drm_dbg(&i915->drm, "VBT header incomplete\n");
3128 		goto err_unmap_oprom;
3129 	}
3130 
3131 	vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
3132 	if (vbt_size > size) {
3133 		drm_dbg(&i915->drm,
3134 			"VBT incomplete (vbt_size overflows)\n");
3135 		goto err_unmap_oprom;
3136 	}
3137 
3138 	/* The rest will be validated by intel_bios_is_valid_vbt() */
3139 	vbt = kmalloc(vbt_size, GFP_KERNEL);
3140 	if (!vbt)
3141 		goto err_unmap_oprom;
3142 
3143 	memcpy_fromio(vbt, p, vbt_size);
3144 
3145 	if (!intel_bios_is_valid_vbt(i915, vbt, vbt_size))
3146 		goto err_free_vbt;
3147 
3148 	pci_unmap_rom(pdev, oprom);
3149 
3150 	if (sizep)
3151 		*sizep = vbt_size;
3152 
3153 	drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
3154 
3155 	return vbt;
3156 
3157 err_free_vbt:
3158 	kfree(vbt);
3159 err_unmap_oprom:
3160 	pci_unmap_rom(pdev, oprom);
3161 
3162 	return NULL;
3163 }
3164 
3165 static const struct vbt_header *intel_bios_get_vbt(struct drm_i915_private *i915,
3166 						   size_t *sizep)
3167 {
3168 	const struct vbt_header *vbt = NULL;
3169 	intel_wakeref_t wakeref;
3170 
3171 	vbt = firmware_get_vbt(i915, sizep);
3172 
3173 	if (!vbt)
3174 		vbt = intel_opregion_get_vbt(i915, sizep);
3175 
3176 	/*
3177 	 * If the OpRegion does not have VBT, look in SPI flash
3178 	 * through MMIO or PCI mapping
3179 	 */
3180 	if (!vbt && IS_DGFX(i915))
3181 		with_intel_runtime_pm(&i915->runtime_pm, wakeref)
3182 			vbt = spi_oprom_get_vbt(i915, sizep);
3183 
3184 	if (!vbt)
3185 		with_intel_runtime_pm(&i915->runtime_pm, wakeref)
3186 			vbt = oprom_get_vbt(i915, sizep);
3187 
3188 	return vbt;
3189 }
3190 
3191 /**
3192  * intel_bios_init - find VBT and initialize settings from the BIOS
3193  * @i915: i915 device instance
3194  *
3195  * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
3196  * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
3197  * initialize some defaults if the VBT is not present at all.
3198  */
3199 void intel_bios_init(struct drm_i915_private *i915)
3200 {
3201 	const struct vbt_header *vbt;
3202 	const struct bdb_header *bdb;
3203 
3204 	INIT_LIST_HEAD(&i915->display.vbt.display_devices);
3205 	INIT_LIST_HEAD(&i915->display.vbt.bdb_blocks);
3206 
3207 	if (!HAS_DISPLAY(i915)) {
3208 		drm_dbg_kms(&i915->drm,
3209 			    "Skipping VBT init due to disabled display.\n");
3210 		return;
3211 	}
3212 
3213 	init_vbt_defaults(i915);
3214 
3215 	vbt = intel_bios_get_vbt(i915, NULL);
3216 
3217 	if (!vbt)
3218 		goto out;
3219 
3220 	bdb = get_bdb_header(vbt);
3221 	i915->display.vbt.version = bdb->version;
3222 
3223 	drm_dbg_kms(&i915->drm,
3224 		    "VBT signature \"%.*s\", BDB version %d\n",
3225 		    (int)sizeof(vbt->signature), vbt->signature, i915->display.vbt.version);
3226 
3227 	init_bdb_blocks(i915, bdb);
3228 
3229 	/* Grab useful general definitions */
3230 	parse_general_features(i915);
3231 	parse_general_definitions(i915);
3232 	parse_driver_features(i915);
3233 
3234 	/* Depends on child device list */
3235 	parse_compression_parameters(i915);
3236 
3237 out:
3238 	if (!vbt) {
3239 		drm_info(&i915->drm,
3240 			 "Failed to find VBIOS tables (VBT)\n");
3241 		init_vbt_missing_defaults(i915);
3242 	}
3243 
3244 	/* Further processing on pre-parsed or generated child device data */
3245 	parse_sdvo_device_mapping(i915);
3246 	parse_ddi_ports(i915);
3247 
3248 	kfree(vbt);
3249 }
3250 
3251 static void intel_bios_init_panel(struct drm_i915_private *i915,
3252 				  struct intel_panel *panel,
3253 				  const struct intel_bios_encoder_data *devdata,
3254 				  const struct drm_edid *drm_edid,
3255 				  bool use_fallback)
3256 {
3257 	/* already have it? */
3258 	if (panel->vbt.panel_type >= 0) {
3259 		drm_WARN_ON(&i915->drm, !use_fallback);
3260 		return;
3261 	}
3262 
3263 	panel->vbt.panel_type = get_panel_type(i915, devdata,
3264 					       drm_edid, use_fallback);
3265 	if (panel->vbt.panel_type < 0) {
3266 		drm_WARN_ON(&i915->drm, use_fallback);
3267 		return;
3268 	}
3269 
3270 	init_vbt_panel_defaults(panel);
3271 
3272 	parse_panel_options(i915, panel);
3273 	parse_generic_dtd(i915, panel);
3274 	parse_lfp_data(i915, panel);
3275 	parse_lfp_backlight(i915, panel);
3276 	parse_sdvo_lvds_data(i915, panel);
3277 	parse_panel_driver_features(i915, panel);
3278 	parse_power_conservation_features(i915, panel);
3279 	parse_edp(i915, panel);
3280 	parse_psr(i915, panel);
3281 	parse_mipi_config(i915, panel);
3282 	parse_mipi_sequence(i915, panel);
3283 }
3284 
3285 void intel_bios_init_panel_early(struct drm_i915_private *i915,
3286 				 struct intel_panel *panel,
3287 				 const struct intel_bios_encoder_data *devdata)
3288 {
3289 	intel_bios_init_panel(i915, panel, devdata, NULL, false);
3290 }
3291 
3292 void intel_bios_init_panel_late(struct drm_i915_private *i915,
3293 				struct intel_panel *panel,
3294 				const struct intel_bios_encoder_data *devdata,
3295 				const struct drm_edid *drm_edid)
3296 {
3297 	intel_bios_init_panel(i915, panel, devdata, drm_edid, true);
3298 }
3299 
3300 /**
3301  * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
3302  * @i915: i915 device instance
3303  */
3304 void intel_bios_driver_remove(struct drm_i915_private *i915)
3305 {
3306 	struct intel_bios_encoder_data *devdata, *nd;
3307 	struct bdb_block_entry *entry, *ne;
3308 
3309 	list_for_each_entry_safe(devdata, nd, &i915->display.vbt.display_devices, node) {
3310 		list_del(&devdata->node);
3311 		kfree(devdata->dsc);
3312 		kfree(devdata);
3313 	}
3314 
3315 	list_for_each_entry_safe(entry, ne, &i915->display.vbt.bdb_blocks, node) {
3316 		list_del(&entry->node);
3317 		kfree(entry);
3318 	}
3319 }
3320 
3321 void intel_bios_fini_panel(struct intel_panel *panel)
3322 {
3323 	kfree(panel->vbt.sdvo_lvds_vbt_mode);
3324 	panel->vbt.sdvo_lvds_vbt_mode = NULL;
3325 	kfree(panel->vbt.lfp_vbt_mode);
3326 	panel->vbt.lfp_vbt_mode = NULL;
3327 	kfree(panel->vbt.dsi.data);
3328 	panel->vbt.dsi.data = NULL;
3329 	kfree(panel->vbt.dsi.pps);
3330 	panel->vbt.dsi.pps = NULL;
3331 	kfree(panel->vbt.dsi.config);
3332 	panel->vbt.dsi.config = NULL;
3333 	kfree(panel->vbt.dsi.deassert_seq);
3334 	panel->vbt.dsi.deassert_seq = NULL;
3335 }
3336 
3337 /**
3338  * intel_bios_is_tv_present - is integrated TV present in VBT
3339  * @i915: i915 device instance
3340  *
3341  * Return true if TV is present. If no child devices were parsed from VBT,
3342  * assume TV is present.
3343  */
3344 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3345 {
3346 	const struct intel_bios_encoder_data *devdata;
3347 
3348 	if (!i915->display.vbt.int_tv_support)
3349 		return false;
3350 
3351 	if (list_empty(&i915->display.vbt.display_devices))
3352 		return true;
3353 
3354 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3355 		const struct child_device_config *child = &devdata->child;
3356 
3357 		/*
3358 		 * If the device type is not TV, continue.
3359 		 */
3360 		switch (child->device_type) {
3361 		case DEVICE_TYPE_INT_TV:
3362 		case DEVICE_TYPE_TV:
3363 		case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3364 			break;
3365 		default:
3366 			continue;
3367 		}
3368 		/* Only when the addin_offset is non-zero, it is regarded
3369 		 * as present.
3370 		 */
3371 		if (child->addin_offset)
3372 			return true;
3373 	}
3374 
3375 	return false;
3376 }
3377 
3378 /**
3379  * intel_bios_is_lvds_present - is LVDS present in VBT
3380  * @i915:	i915 device instance
3381  * @i2c_pin:	i2c pin for LVDS if present
3382  *
3383  * Return true if LVDS is present. If no child devices were parsed from VBT,
3384  * assume LVDS is present.
3385  */
3386 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3387 {
3388 	const struct intel_bios_encoder_data *devdata;
3389 
3390 	if (list_empty(&i915->display.vbt.display_devices))
3391 		return true;
3392 
3393 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3394 		const struct child_device_config *child = &devdata->child;
3395 
3396 		/* If the device type is not LFP, continue.
3397 		 * We have to check both the new identifiers as well as the
3398 		 * old for compatibility with some BIOSes.
3399 		 */
3400 		if (child->device_type != DEVICE_TYPE_INT_LFP &&
3401 		    child->device_type != DEVICE_TYPE_LFP)
3402 			continue;
3403 
3404 		if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3405 			*i2c_pin = child->i2c_pin;
3406 
3407 		/* However, we cannot trust the BIOS writers to populate
3408 		 * the VBT correctly.  Since LVDS requires additional
3409 		 * information from AIM blocks, a non-zero addin offset is
3410 		 * a good indicator that the LVDS is actually present.
3411 		 */
3412 		if (child->addin_offset)
3413 			return true;
3414 
3415 		/* But even then some BIOS writers perform some black magic
3416 		 * and instantiate the device without reference to any
3417 		 * additional data.  Trust that if the VBT was written into
3418 		 * the OpRegion then they have validated the LVDS's existence.
3419 		 */
3420 		return intel_opregion_vbt_present(i915);
3421 	}
3422 
3423 	return false;
3424 }
3425 
3426 /**
3427  * intel_bios_is_port_present - is the specified digital port present
3428  * @i915:	i915 device instance
3429  * @port:	port to check
3430  *
3431  * Return true if the device in %port is present.
3432  */
3433 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3434 {
3435 	const struct intel_bios_encoder_data *devdata;
3436 
3437 	if (WARN_ON(!has_ddi_port_info(i915)))
3438 		return true;
3439 
3440 	if (!is_port_valid(i915, port))
3441 		return false;
3442 
3443 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3444 		const struct child_device_config *child = &devdata->child;
3445 
3446 		if (dvo_port_to_port(i915, child->dvo_port) == port)
3447 			return true;
3448 	}
3449 
3450 	return false;
3451 }
3452 
3453 bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3454 {
3455 	const struct child_device_config *child = &devdata->child;
3456 
3457 	if (!devdata)
3458 		return false;
3459 
3460 	if (!intel_bios_encoder_supports_dp(devdata) ||
3461 	    !intel_bios_encoder_supports_hdmi(devdata))
3462 		return false;
3463 
3464 	if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3465 		return true;
3466 
3467 	/* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3468 	if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3469 	    child->aux_channel != 0)
3470 		return true;
3471 
3472 	return false;
3473 }
3474 
3475 /**
3476  * intel_bios_is_dsi_present - is DSI present in VBT
3477  * @i915:	i915 device instance
3478  * @port:	port for DSI if present
3479  *
3480  * Return true if DSI is present, and return the port in %port.
3481  */
3482 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3483 			       enum port *port)
3484 {
3485 	const struct intel_bios_encoder_data *devdata;
3486 
3487 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3488 		const struct child_device_config *child = &devdata->child;
3489 		u8 dvo_port = child->dvo_port;
3490 
3491 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3492 			continue;
3493 
3494 		if (dsi_dvo_port_to_port(i915, dvo_port) == PORT_NONE) {
3495 			drm_dbg_kms(&i915->drm,
3496 				    "VBT has unsupported DSI port %c\n",
3497 				    port_name(dvo_port - DVO_PORT_MIPIA));
3498 			continue;
3499 		}
3500 
3501 		if (port)
3502 			*port = dsi_dvo_port_to_port(i915, dvo_port);
3503 		return true;
3504 	}
3505 
3506 	return false;
3507 }
3508 
3509 static void fill_dsc(struct intel_crtc_state *crtc_state,
3510 		     struct dsc_compression_parameters_entry *dsc,
3511 		     int dsc_max_bpc)
3512 {
3513 	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
3514 	struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3515 	int bpc = 8;
3516 
3517 	vdsc_cfg->dsc_version_major = dsc->version_major;
3518 	vdsc_cfg->dsc_version_minor = dsc->version_minor;
3519 
3520 	if (dsc->support_12bpc && dsc_max_bpc >= 12)
3521 		bpc = 12;
3522 	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3523 		bpc = 10;
3524 	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3525 		bpc = 8;
3526 	else
3527 		drm_dbg_kms(&i915->drm, "VBT: Unsupported BPC %d for DCS\n",
3528 			    dsc_max_bpc);
3529 
3530 	crtc_state->pipe_bpp = bpc * 3;
3531 
3532 	crtc_state->dsc.compressed_bpp_x16 = to_bpp_x16(min(crtc_state->pipe_bpp,
3533 							    VBT_DSC_MAX_BPP(dsc->max_bpp)));
3534 
3535 	/*
3536 	 * FIXME: This is ugly, and slice count should take DSC engine
3537 	 * throughput etc. into account.
3538 	 *
3539 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3540 	 */
3541 	if (dsc->slices_per_line & BIT(2)) {
3542 		crtc_state->dsc.slice_count = 4;
3543 	} else if (dsc->slices_per_line & BIT(1)) {
3544 		crtc_state->dsc.slice_count = 2;
3545 	} else {
3546 		/* FIXME */
3547 		if (!(dsc->slices_per_line & BIT(0)))
3548 			drm_dbg_kms(&i915->drm, "VBT: Unsupported DSC slice count for DSI\n");
3549 
3550 		crtc_state->dsc.slice_count = 1;
3551 	}
3552 
3553 	if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3554 	    crtc_state->dsc.slice_count != 0)
3555 		drm_dbg_kms(&i915->drm, "VBT: DSC hdisplay %d not divisible by slice count %d\n",
3556 			    crtc_state->hw.adjusted_mode.crtc_hdisplay,
3557 			    crtc_state->dsc.slice_count);
3558 
3559 	/*
3560 	 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3561 	 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3562 	 */
3563 	vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3564 							    dsc->rc_buffer_size);
3565 
3566 	/* FIXME: DSI spec says bpc + 1 for this one */
3567 	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3568 
3569 	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3570 
3571 	vdsc_cfg->slice_height = dsc->slice_height;
3572 }
3573 
3574 /* FIXME: initially DSI specific */
3575 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3576 			       struct intel_crtc_state *crtc_state,
3577 			       int dsc_max_bpc)
3578 {
3579 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3580 	const struct intel_bios_encoder_data *devdata;
3581 
3582 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3583 		const struct child_device_config *child = &devdata->child;
3584 
3585 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3586 			continue;
3587 
3588 		if (dsi_dvo_port_to_port(i915, child->dvo_port) == encoder->port) {
3589 			if (!devdata->dsc)
3590 				return false;
3591 
3592 			fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3593 
3594 			return true;
3595 		}
3596 	}
3597 
3598 	return false;
3599 }
3600 
3601 static const u8 adlp_aux_ch_map[] = {
3602 	[AUX_CH_A] = DP_AUX_A,
3603 	[AUX_CH_B] = DP_AUX_B,
3604 	[AUX_CH_C] = DP_AUX_C,
3605 	[AUX_CH_D_XELPD] = DP_AUX_D,
3606 	[AUX_CH_E_XELPD] = DP_AUX_E,
3607 	[AUX_CH_USBC1] = DP_AUX_F,
3608 	[AUX_CH_USBC2] = DP_AUX_G,
3609 	[AUX_CH_USBC3] = DP_AUX_H,
3610 	[AUX_CH_USBC4] = DP_AUX_I,
3611 };
3612 
3613 /*
3614  * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3615  * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3616  */
3617 static const u8 adls_aux_ch_map[] = {
3618 	[AUX_CH_A] = DP_AUX_A,
3619 	[AUX_CH_USBC1] = DP_AUX_B,
3620 	[AUX_CH_USBC2] = DP_AUX_C,
3621 	[AUX_CH_USBC3] = DP_AUX_D,
3622 	[AUX_CH_USBC4] = DP_AUX_E,
3623 };
3624 
3625 /*
3626  * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3627  * map to DDI A,B,TC1,TC2 respectively.
3628  */
3629 static const u8 rkl_aux_ch_map[] = {
3630 	[AUX_CH_A] = DP_AUX_A,
3631 	[AUX_CH_B] = DP_AUX_B,
3632 	[AUX_CH_USBC1] = DP_AUX_C,
3633 	[AUX_CH_USBC2] = DP_AUX_D,
3634 };
3635 
3636 static const u8 direct_aux_ch_map[] = {
3637 	[AUX_CH_A] = DP_AUX_A,
3638 	[AUX_CH_B] = DP_AUX_B,
3639 	[AUX_CH_C] = DP_AUX_C,
3640 	[AUX_CH_D] = DP_AUX_D, /* aka AUX_CH_USBC1 */
3641 	[AUX_CH_E] = DP_AUX_E, /* aka AUX_CH_USBC2 */
3642 	[AUX_CH_F] = DP_AUX_F, /* aka AUX_CH_USBC3 */
3643 	[AUX_CH_G] = DP_AUX_G, /* aka AUX_CH_USBC4 */
3644 	[AUX_CH_H] = DP_AUX_H, /* aka AUX_CH_USBC5 */
3645 	[AUX_CH_I] = DP_AUX_I, /* aka AUX_CH_USBC6 */
3646 };
3647 
3648 static enum aux_ch map_aux_ch(struct drm_i915_private *i915, u8 aux_channel)
3649 {
3650 	const u8 *aux_ch_map;
3651 	int i, n_entries;
3652 
3653 	if (DISPLAY_VER(i915) >= 13) {
3654 		aux_ch_map = adlp_aux_ch_map;
3655 		n_entries = ARRAY_SIZE(adlp_aux_ch_map);
3656 	} else if (IS_ALDERLAKE_S(i915)) {
3657 		aux_ch_map = adls_aux_ch_map;
3658 		n_entries = ARRAY_SIZE(adls_aux_ch_map);
3659 	} else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) {
3660 		aux_ch_map = rkl_aux_ch_map;
3661 		n_entries = ARRAY_SIZE(rkl_aux_ch_map);
3662 	} else {
3663 		aux_ch_map = direct_aux_ch_map;
3664 		n_entries = ARRAY_SIZE(direct_aux_ch_map);
3665 	}
3666 
3667 	for (i = 0; i < n_entries; i++) {
3668 		if (aux_ch_map[i] == aux_channel)
3669 			return i;
3670 	}
3671 
3672 	drm_dbg_kms(&i915->drm,
3673 		    "Ignoring alternate AUX CH: VBT claims AUX 0x%x, which is not valid for this platform\n",
3674 		    aux_channel);
3675 
3676 	return AUX_CH_NONE;
3677 }
3678 
3679 enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata)
3680 {
3681 	if (!devdata || !devdata->child.aux_channel)
3682 		return AUX_CH_NONE;
3683 
3684 	return map_aux_ch(devdata->i915, devdata->child.aux_channel);
3685 }
3686 
3687 bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
3688 {
3689 	struct drm_i915_private *i915;
3690 	u8 aux_channel;
3691 	int count = 0;
3692 
3693 	if (!devdata || !devdata->child.aux_channel)
3694 		return false;
3695 
3696 	i915 = devdata->i915;
3697 	aux_channel = devdata->child.aux_channel;
3698 
3699 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3700 		if (intel_bios_encoder_supports_dp(devdata) &&
3701 		    aux_channel == devdata->child.aux_channel)
3702 			count++;
3703 	}
3704 
3705 	return count > 1;
3706 }
3707 
3708 int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3709 {
3710 	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3711 		return 0;
3712 
3713 	return translate_iboost(devdata->i915, devdata->child.dp_iboost_level);
3714 }
3715 
3716 int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3717 {
3718 	if (!devdata || devdata->i915->display.vbt.version < 196 || !devdata->child.iboost)
3719 		return 0;
3720 
3721 	return translate_iboost(devdata->i915, devdata->child.hdmi_iboost_level);
3722 }
3723 
3724 int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata)
3725 {
3726 	if (!devdata || !devdata->child.ddc_pin)
3727 		return 0;
3728 
3729 	return map_ddc_pin(devdata->i915, devdata->child.ddc_pin);
3730 }
3731 
3732 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3733 {
3734 	return devdata->i915->display.vbt.version >= 195 && devdata->child.dp_usb_type_c;
3735 }
3736 
3737 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3738 {
3739 	return devdata->i915->display.vbt.version >= 209 && devdata->child.tbt;
3740 }
3741 
3742 bool intel_bios_encoder_lane_reversal(const struct intel_bios_encoder_data *devdata)
3743 {
3744 	return devdata && devdata->child.lane_reversal;
3745 }
3746 
3747 bool intel_bios_encoder_hpd_invert(const struct intel_bios_encoder_data *devdata)
3748 {
3749 	return devdata && devdata->child.hpd_invert;
3750 }
3751 
3752 const struct intel_bios_encoder_data *
3753 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3754 {
3755 	struct intel_bios_encoder_data *devdata;
3756 
3757 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
3758 		if (intel_bios_encoder_port(devdata) == port)
3759 			return devdata;
3760 	}
3761 
3762 	return NULL;
3763 }
3764 
3765 void intel_bios_for_each_encoder(struct drm_i915_private *i915,
3766 				 void (*func)(struct drm_i915_private *i915,
3767 					      const struct intel_bios_encoder_data *devdata))
3768 {
3769 	struct intel_bios_encoder_data *devdata;
3770 
3771 	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node)
3772 		func(i915, devdata);
3773 }
3774 
3775 static int intel_bios_vbt_show(struct seq_file *m, void *unused)
3776 {
3777 	struct drm_i915_private *i915 = m->private;
3778 	const void *vbt;
3779 	size_t vbt_size;
3780 
3781 	vbt = intel_bios_get_vbt(i915, &vbt_size);
3782 
3783 	if (vbt) {
3784 		seq_write(m, vbt, vbt_size);
3785 		kfree(vbt);
3786 	}
3787 
3788 	return 0;
3789 }
3790 
3791 DEFINE_SHOW_ATTRIBUTE(intel_bios_vbt);
3792 
3793 void intel_bios_debugfs_register(struct drm_i915_private *i915)
3794 {
3795 	struct drm_minor *minor = i915->drm.primary;
3796 
3797 	debugfs_create_file("i915_vbt", 0444, minor->debugfs_root,
3798 			    i915, &intel_bios_vbt_fops);
3799 }
3800