1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/drm_dp_helper.h> 29 30 #include "display/intel_display.h" 31 #include "display/intel_display_types.h" 32 #include "display/intel_gmbus.h" 33 34 #include "i915_drv.h" 35 36 #define _INTEL_BIOS_PRIVATE 37 #include "intel_vbt_defs.h" 38 39 /** 40 * DOC: Video BIOS Table (VBT) 41 * 42 * The Video BIOS Table, or VBT, provides platform and board specific 43 * configuration information to the driver that is not discoverable or available 44 * through other means. The configuration is mostly related to display 45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 46 * the PCI ROM. 47 * 48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 50 * contain the actual configuration information. The VBT Header, and thus the 51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 52 * BDB Header. The data blocks are concatenated after the BDB Header. The data 53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 54 * data. (Block 53, the MIPI Sequence Block is an exception.) 55 * 56 * The driver parses the VBT during load. The relevant information is stored in 57 * driver private data for ease of use, and the actual VBT is not read after 58 * that. 59 */ 60 61 /* Wrapper for VBT child device config */ 62 struct display_device_data { 63 struct child_device_config child; 64 struct dsc_compression_parameters_entry *dsc; 65 struct list_head node; 66 }; 67 68 #define SLAVE_ADDR1 0x70 69 #define SLAVE_ADDR2 0x72 70 71 /* Get BDB block size given a pointer to Block ID. */ 72 static u32 _get_blocksize(const u8 *block_base) 73 { 74 /* The MIPI Sequence Block v3+ has a separate size field. */ 75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 76 return *((const u32 *)(block_base + 4)); 77 else 78 return *((const u16 *)(block_base + 1)); 79 } 80 81 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 82 static u32 get_blocksize(const void *block_data) 83 { 84 return _get_blocksize(block_data - 3); 85 } 86 87 static const void * 88 find_section(const void *_bdb, enum bdb_block_id section_id) 89 { 90 const struct bdb_header *bdb = _bdb; 91 const u8 *base = _bdb; 92 int index = 0; 93 u32 total, current_size; 94 enum bdb_block_id current_id; 95 96 /* skip to first section */ 97 index += bdb->header_size; 98 total = bdb->bdb_size; 99 100 /* walk the sections looking for section_id */ 101 while (index + 3 < total) { 102 current_id = *(base + index); 103 current_size = _get_blocksize(base + index); 104 index += 3; 105 106 if (index + current_size > total) 107 return NULL; 108 109 if (current_id == section_id) 110 return base + index; 111 112 index += current_size; 113 } 114 115 return NULL; 116 } 117 118 static void 119 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 120 const struct lvds_dvo_timing *dvo_timing) 121 { 122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 123 dvo_timing->hactive_lo; 124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 127 ((dvo_timing->hsync_pulse_width_hi << 8) | 128 dvo_timing->hsync_pulse_width_lo); 129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 131 132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 133 dvo_timing->vactive_lo; 134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 137 ((dvo_timing->vsync_pulse_width_hi << 4) | 138 dvo_timing->vsync_pulse_width_lo); 139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 141 panel_fixed_mode->clock = dvo_timing->clock * 10; 142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 143 144 if (dvo_timing->hsync_positive) 145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 146 else 147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 148 149 if (dvo_timing->vsync_positive) 150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 151 else 152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 153 154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 155 dvo_timing->himage_lo; 156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 157 dvo_timing->vimage_lo; 158 159 /* Some VBTs have bogus h/vtotal values */ 160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 164 165 drm_mode_set_name(panel_fixed_mode); 166 } 167 168 static const struct lvds_dvo_timing * 169 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, 170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, 171 int index) 172 { 173 /* 174 * the size of fp_timing varies on the different platform. 175 * So calculate the DVO timing relative offset in LVDS data 176 * entry to get the DVO timing entry 177 */ 178 179 int lfp_data_size = 180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - 181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; 182 int dvo_timing_offset = 183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - 184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; 185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; 186 187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); 188 } 189 190 /* get lvds_fp_timing entry 191 * this function may return NULL if the corresponding entry is invalid 192 */ 193 static const struct lvds_fp_timing * 194 get_lvds_fp_timing(const struct bdb_header *bdb, 195 const struct bdb_lvds_lfp_data *data, 196 const struct bdb_lvds_lfp_data_ptrs *ptrs, 197 int index) 198 { 199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb; 200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ 201 size_t ofs; 202 203 if (index >= ARRAY_SIZE(ptrs->ptr)) 204 return NULL; 205 ofs = ptrs->ptr[index].fp_timing_offset; 206 if (ofs < data_ofs || 207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) 208 return NULL; 209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); 210 } 211 212 /* Parse general panel options */ 213 static void 214 parse_panel_options(struct drm_i915_private *dev_priv, 215 const struct bdb_header *bdb) 216 { 217 const struct bdb_lvds_options *lvds_options; 218 int panel_type; 219 int drrs_mode; 220 int ret; 221 222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); 223 if (!lvds_options) 224 return; 225 226 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; 227 228 ret = intel_opregion_get_panel_type(dev_priv); 229 if (ret >= 0) { 230 drm_WARN_ON(&dev_priv->drm, ret > 0xf); 231 panel_type = ret; 232 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n", 233 panel_type); 234 } else { 235 if (lvds_options->panel_type > 0xf) { 236 drm_dbg_kms(&dev_priv->drm, 237 "Invalid VBT panel type 0x%x\n", 238 lvds_options->panel_type); 239 return; 240 } 241 panel_type = lvds_options->panel_type; 242 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n", 243 panel_type); 244 } 245 246 dev_priv->vbt.panel_type = panel_type; 247 248 drrs_mode = (lvds_options->dps_panel_type_bits 249 >> (panel_type * 2)) & MODE_MASK; 250 /* 251 * VBT has static DRRS = 0 and seamless DRRS = 2. 252 * The below piece of code is required to adjust vbt.drrs_type 253 * to match the enum drrs_support_type. 254 */ 255 switch (drrs_mode) { 256 case 0: 257 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; 258 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n"); 259 break; 260 case 2: 261 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; 262 drm_dbg_kms(&dev_priv->drm, 263 "DRRS supported mode is seamless\n"); 264 break; 265 default: 266 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 267 drm_dbg_kms(&dev_priv->drm, 268 "DRRS not supported (VBT input)\n"); 269 break; 270 } 271 } 272 273 /* Try to find integrated panel timing data */ 274 static void 275 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv, 276 const struct bdb_header *bdb) 277 { 278 const struct bdb_lvds_lfp_data *lvds_lfp_data; 279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 280 const struct lvds_dvo_timing *panel_dvo_timing; 281 const struct lvds_fp_timing *fp_timing; 282 struct drm_display_mode *panel_fixed_mode; 283 int panel_type = dev_priv->vbt.panel_type; 284 285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); 286 if (!lvds_lfp_data) 287 return; 288 289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); 290 if (!lvds_lfp_data_ptrs) 291 return; 292 293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 294 lvds_lfp_data_ptrs, 295 panel_type); 296 297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 298 if (!panel_fixed_mode) 299 return; 300 301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 302 303 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 304 305 drm_dbg_kms(&dev_priv->drm, 306 "Found panel mode in BIOS VBT legacy lfp table:\n"); 307 drm_mode_debug_printmodeline(panel_fixed_mode); 308 309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, 310 lvds_lfp_data_ptrs, 311 panel_type); 312 if (fp_timing) { 313 /* check the resolution, just to be sure */ 314 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 315 fp_timing->y_res == panel_fixed_mode->vdisplay) { 316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 317 drm_dbg_kms(&dev_priv->drm, 318 "VBT initial LVDS value %x\n", 319 dev_priv->vbt.bios_lvds_val); 320 } 321 } 322 } 323 324 static void 325 parse_generic_dtd(struct drm_i915_private *dev_priv, 326 const struct bdb_header *bdb) 327 { 328 const struct bdb_generic_dtd *generic_dtd; 329 const struct generic_dtd_entry *dtd; 330 struct drm_display_mode *panel_fixed_mode; 331 int num_dtd; 332 333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD); 334 if (!generic_dtd) 335 return; 336 337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 338 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n", 339 generic_dtd->gdtd_size); 340 return; 341 } else if (generic_dtd->gdtd_size != 342 sizeof(struct generic_dtd_entry)) { 343 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n", 344 generic_dtd->gdtd_size); 345 /* DTD has unknown fields, but keep going */ 346 } 347 348 num_dtd = (get_blocksize(generic_dtd) - 349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 350 if (dev_priv->vbt.panel_type >= num_dtd) { 351 drm_err(&dev_priv->drm, 352 "Panel type %d not found in table of %d DTD's\n", 353 dev_priv->vbt.panel_type, num_dtd); 354 return; 355 } 356 357 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type]; 358 359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 360 if (!panel_fixed_mode) 361 return; 362 363 panel_fixed_mode->hdisplay = dtd->hactive; 364 panel_fixed_mode->hsync_start = 365 panel_fixed_mode->hdisplay + dtd->hfront_porch; 366 panel_fixed_mode->hsync_end = 367 panel_fixed_mode->hsync_start + dtd->hsync; 368 panel_fixed_mode->htotal = 369 panel_fixed_mode->hdisplay + dtd->hblank; 370 371 panel_fixed_mode->vdisplay = dtd->vactive; 372 panel_fixed_mode->vsync_start = 373 panel_fixed_mode->vdisplay + dtd->vfront_porch; 374 panel_fixed_mode->vsync_end = 375 panel_fixed_mode->vsync_start + dtd->vsync; 376 panel_fixed_mode->vtotal = 377 panel_fixed_mode->vdisplay + dtd->vblank; 378 379 panel_fixed_mode->clock = dtd->pixel_clock; 380 panel_fixed_mode->width_mm = dtd->width_mm; 381 panel_fixed_mode->height_mm = dtd->height_mm; 382 383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 384 drm_mode_set_name(panel_fixed_mode); 385 386 if (dtd->hsync_positive_polarity) 387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 388 else 389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 390 391 if (dtd->vsync_positive_polarity) 392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 393 else 394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 395 396 drm_dbg_kms(&dev_priv->drm, 397 "Found panel mode in BIOS VBT generic dtd table:\n"); 398 drm_mode_debug_printmodeline(panel_fixed_mode); 399 400 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 401 } 402 403 static void 404 parse_panel_dtd(struct drm_i915_private *dev_priv, 405 const struct bdb_header *bdb) 406 { 407 /* 408 * Older VBTs provided provided DTD information for internal displays 409 * through the "LFP panel DTD" block (42). As of VBT revision 229, 410 * that block is now deprecated and DTD information should be provided 411 * via a newer "generic DTD" block (58). Just to be safe, we'll 412 * try the new generic DTD block first on VBT >= 229, but still fall 413 * back to trying the old LFP block if that fails. 414 */ 415 if (bdb->version >= 229) 416 parse_generic_dtd(dev_priv, bdb); 417 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 418 parse_lfp_panel_dtd(dev_priv, bdb); 419 } 420 421 static void 422 parse_lfp_backlight(struct drm_i915_private *dev_priv, 423 const struct bdb_header *bdb) 424 { 425 const struct bdb_lfp_backlight_data *backlight_data; 426 const struct lfp_backlight_data_entry *entry; 427 int panel_type = dev_priv->vbt.panel_type; 428 429 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); 430 if (!backlight_data) 431 return; 432 433 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 434 drm_dbg_kms(&dev_priv->drm, 435 "Unsupported backlight data entry size %u\n", 436 backlight_data->entry_size); 437 return; 438 } 439 440 entry = &backlight_data->data[panel_type]; 441 442 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 443 if (!dev_priv->vbt.backlight.present) { 444 drm_dbg_kms(&dev_priv->drm, 445 "PWM backlight not present in VBT (type %u)\n", 446 entry->type); 447 return; 448 } 449 450 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 451 if (bdb->version >= 191 && 452 get_blocksize(backlight_data) >= sizeof(*backlight_data)) { 453 const struct lfp_backlight_control_method *method; 454 455 method = &backlight_data->backlight_control[panel_type]; 456 dev_priv->vbt.backlight.type = method->type; 457 dev_priv->vbt.backlight.controller = method->controller; 458 } 459 460 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 461 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; 462 dev_priv->vbt.backlight.min_brightness = entry->min_brightness; 463 drm_dbg_kms(&dev_priv->drm, 464 "VBT backlight PWM modulation frequency %u Hz, " 465 "active %s, min brightness %u, level %u, controller %u\n", 466 dev_priv->vbt.backlight.pwm_freq_hz, 467 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", 468 dev_priv->vbt.backlight.min_brightness, 469 backlight_data->level[panel_type], 470 dev_priv->vbt.backlight.controller); 471 } 472 473 /* Try to find sdvo panel data */ 474 static void 475 parse_sdvo_panel_data(struct drm_i915_private *dev_priv, 476 const struct bdb_header *bdb) 477 { 478 const struct bdb_sdvo_panel_dtds *dtds; 479 struct drm_display_mode *panel_fixed_mode; 480 int index; 481 482 index = i915_modparams.vbt_sdvo_panel_type; 483 if (index == -2) { 484 drm_dbg_kms(&dev_priv->drm, 485 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 486 return; 487 } 488 489 if (index == -1) { 490 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 491 492 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); 493 if (!sdvo_lvds_options) 494 return; 495 496 index = sdvo_lvds_options->panel_type; 497 } 498 499 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS); 500 if (!dtds) 501 return; 502 503 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 504 if (!panel_fixed_mode) 505 return; 506 507 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 508 509 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 510 511 drm_dbg_kms(&dev_priv->drm, 512 "Found SDVO panel mode in BIOS VBT tables:\n"); 513 drm_mode_debug_printmodeline(panel_fixed_mode); 514 } 515 516 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, 517 bool alternate) 518 { 519 switch (INTEL_GEN(dev_priv)) { 520 case 2: 521 return alternate ? 66667 : 48000; 522 case 3: 523 case 4: 524 return alternate ? 100000 : 96000; 525 default: 526 return alternate ? 100000 : 120000; 527 } 528 } 529 530 static void 531 parse_general_features(struct drm_i915_private *dev_priv, 532 const struct bdb_header *bdb) 533 { 534 const struct bdb_general_features *general; 535 536 general = find_section(bdb, BDB_GENERAL_FEATURES); 537 if (!general) 538 return; 539 540 dev_priv->vbt.int_tv_support = general->int_tv_support; 541 /* int_crt_support can't be trusted on earlier platforms */ 542 if (bdb->version >= 155 && 543 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) 544 dev_priv->vbt.int_crt_support = general->int_crt_support; 545 dev_priv->vbt.lvds_use_ssc = general->enable_ssc; 546 dev_priv->vbt.lvds_ssc_freq = 547 intel_bios_ssc_frequency(dev_priv, general->ssc_freq); 548 dev_priv->vbt.display_clock_mode = general->display_clock_mode; 549 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 550 if (bdb->version >= 181) { 551 dev_priv->vbt.orientation = general->rotate_180 ? 552 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 553 DRM_MODE_PANEL_ORIENTATION_NORMAL; 554 } else { 555 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 556 } 557 drm_dbg_kms(&dev_priv->drm, 558 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 559 dev_priv->vbt.int_tv_support, 560 dev_priv->vbt.int_crt_support, 561 dev_priv->vbt.lvds_use_ssc, 562 dev_priv->vbt.lvds_ssc_freq, 563 dev_priv->vbt.display_clock_mode, 564 dev_priv->vbt.fdi_rx_polarity_inverted); 565 } 566 567 static const struct child_device_config * 568 child_device_ptr(const struct bdb_general_definitions *defs, int i) 569 { 570 return (const void *) &defs->devices[i * defs->child_dev_size]; 571 } 572 573 static void 574 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version) 575 { 576 struct sdvo_device_mapping *mapping; 577 const struct display_device_data *devdata; 578 const struct child_device_config *child; 579 int count = 0; 580 581 /* 582 * Only parse SDVO mappings on gens that could have SDVO. This isn't 583 * accurate and doesn't have to be, as long as it's not too strict. 584 */ 585 if (!IS_GEN_RANGE(dev_priv, 3, 7)) { 586 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n"); 587 return; 588 } 589 590 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 591 child = &devdata->child; 592 593 if (child->slave_addr != SLAVE_ADDR1 && 594 child->slave_addr != SLAVE_ADDR2) { 595 /* 596 * If the slave address is neither 0x70 nor 0x72, 597 * it is not a SDVO device. Skip it. 598 */ 599 continue; 600 } 601 if (child->dvo_port != DEVICE_PORT_DVOB && 602 child->dvo_port != DEVICE_PORT_DVOC) { 603 /* skip the incorrect SDVO port */ 604 drm_dbg_kms(&dev_priv->drm, 605 "Incorrect SDVO port. Skip it\n"); 606 continue; 607 } 608 drm_dbg_kms(&dev_priv->drm, 609 "the SDVO device with slave addr %2x is found on" 610 " %s port\n", 611 child->slave_addr, 612 (child->dvo_port == DEVICE_PORT_DVOB) ? 613 "SDVOB" : "SDVOC"); 614 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; 615 if (!mapping->initialized) { 616 mapping->dvo_port = child->dvo_port; 617 mapping->slave_addr = child->slave_addr; 618 mapping->dvo_wiring = child->dvo_wiring; 619 mapping->ddc_pin = child->ddc_pin; 620 mapping->i2c_pin = child->i2c_pin; 621 mapping->initialized = 1; 622 drm_dbg_kms(&dev_priv->drm, 623 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 624 mapping->dvo_port, mapping->slave_addr, 625 mapping->dvo_wiring, mapping->ddc_pin, 626 mapping->i2c_pin); 627 } else { 628 drm_dbg_kms(&dev_priv->drm, 629 "Maybe one SDVO port is shared by " 630 "two SDVO device.\n"); 631 } 632 if (child->slave2_addr) { 633 /* Maybe this is a SDVO device with multiple inputs */ 634 /* And the mapping info is not added */ 635 drm_dbg_kms(&dev_priv->drm, 636 "there exists the slave2_addr. Maybe this" 637 " is a SDVO device with multiple inputs.\n"); 638 } 639 count++; 640 } 641 642 if (!count) { 643 /* No SDVO device info is found */ 644 drm_dbg_kms(&dev_priv->drm, 645 "No SDVO device info is found in VBT\n"); 646 } 647 } 648 649 static void 650 parse_driver_features(struct drm_i915_private *dev_priv, 651 const struct bdb_header *bdb) 652 { 653 const struct bdb_driver_features *driver; 654 655 driver = find_section(bdb, BDB_DRIVER_FEATURES); 656 if (!driver) 657 return; 658 659 if (INTEL_GEN(dev_priv) >= 5) { 660 /* 661 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 662 * to mean "eDP". The VBT spec doesn't agree with that 663 * interpretation, but real world VBTs seem to. 664 */ 665 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 666 dev_priv->vbt.int_lvds_support = 0; 667 } else { 668 /* 669 * FIXME it's not clear which BDB version has the LVDS config 670 * bits defined. Revision history in the VBT spec says: 671 * "0.92 | Add two definitions for VBT value of LVDS Active 672 * Config (00b and 11b values defined) | 06/13/2005" 673 * but does not the specify the BDB version. 674 * 675 * So far version 134 (on i945gm) is the oldest VBT observed 676 * in the wild with the bits correctly populated. Version 677 * 108 (on i85x) does not have the bits correctly populated. 678 */ 679 if (bdb->version >= 134 && 680 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 681 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 682 dev_priv->vbt.int_lvds_support = 0; 683 } 684 685 if (bdb->version < 228) { 686 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n", 687 driver->drrs_enabled); 688 /* 689 * If DRRS is not supported, drrs_type has to be set to 0. 690 * This is because, VBT is configured in such a way that 691 * static DRRS is 0 and DRRS not supported is represented by 692 * driver->drrs_enabled=false 693 */ 694 if (!driver->drrs_enabled) 695 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 696 697 dev_priv->vbt.psr.enable = driver->psr_enabled; 698 } 699 } 700 701 static void 702 parse_power_conservation_features(struct drm_i915_private *dev_priv, 703 const struct bdb_header *bdb) 704 { 705 const struct bdb_lfp_power *power; 706 u8 panel_type = dev_priv->vbt.panel_type; 707 708 if (bdb->version < 228) 709 return; 710 711 power = find_section(bdb, BDB_LFP_POWER); 712 if (!power) 713 return; 714 715 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type); 716 717 /* 718 * If DRRS is not supported, drrs_type has to be set to 0. 719 * This is because, VBT is configured in such a way that 720 * static DRRS is 0 and DRRS not supported is represented by 721 * power->drrs & BIT(panel_type)=false 722 */ 723 if (!(power->drrs & BIT(panel_type))) 724 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; 725 } 726 727 static void 728 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 729 { 730 const struct bdb_edp *edp; 731 const struct edp_power_seq *edp_pps; 732 const struct edp_fast_link_params *edp_link_params; 733 int panel_type = dev_priv->vbt.panel_type; 734 735 edp = find_section(bdb, BDB_EDP); 736 if (!edp) 737 return; 738 739 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 740 case EDP_18BPP: 741 dev_priv->vbt.edp.bpp = 18; 742 break; 743 case EDP_24BPP: 744 dev_priv->vbt.edp.bpp = 24; 745 break; 746 case EDP_30BPP: 747 dev_priv->vbt.edp.bpp = 30; 748 break; 749 } 750 751 /* Get the eDP sequencing and link info */ 752 edp_pps = &edp->power_seqs[panel_type]; 753 edp_link_params = &edp->fast_link_params[panel_type]; 754 755 dev_priv->vbt.edp.pps = *edp_pps; 756 757 switch (edp_link_params->rate) { 758 case EDP_RATE_1_62: 759 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; 760 break; 761 case EDP_RATE_2_7: 762 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; 763 break; 764 default: 765 drm_dbg_kms(&dev_priv->drm, 766 "VBT has unknown eDP link rate value %u\n", 767 edp_link_params->rate); 768 break; 769 } 770 771 switch (edp_link_params->lanes) { 772 case EDP_LANE_1: 773 dev_priv->vbt.edp.lanes = 1; 774 break; 775 case EDP_LANE_2: 776 dev_priv->vbt.edp.lanes = 2; 777 break; 778 case EDP_LANE_4: 779 dev_priv->vbt.edp.lanes = 4; 780 break; 781 default: 782 drm_dbg_kms(&dev_priv->drm, 783 "VBT has unknown eDP lane count value %u\n", 784 edp_link_params->lanes); 785 break; 786 } 787 788 switch (edp_link_params->preemphasis) { 789 case EDP_PREEMPHASIS_NONE: 790 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 791 break; 792 case EDP_PREEMPHASIS_3_5dB: 793 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 794 break; 795 case EDP_PREEMPHASIS_6dB: 796 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 797 break; 798 case EDP_PREEMPHASIS_9_5dB: 799 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 800 break; 801 default: 802 drm_dbg_kms(&dev_priv->drm, 803 "VBT has unknown eDP pre-emphasis value %u\n", 804 edp_link_params->preemphasis); 805 break; 806 } 807 808 switch (edp_link_params->vswing) { 809 case EDP_VSWING_0_4V: 810 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 811 break; 812 case EDP_VSWING_0_6V: 813 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 814 break; 815 case EDP_VSWING_0_8V: 816 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 817 break; 818 case EDP_VSWING_1_2V: 819 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 820 break; 821 default: 822 drm_dbg_kms(&dev_priv->drm, 823 "VBT has unknown eDP voltage swing value %u\n", 824 edp_link_params->vswing); 825 break; 826 } 827 828 if (bdb->version >= 173) { 829 u8 vswing; 830 831 /* Don't read from VBT if module parameter has valid value*/ 832 if (i915_modparams.edp_vswing) { 833 dev_priv->vbt.edp.low_vswing = 834 i915_modparams.edp_vswing == 1; 835 } else { 836 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 837 dev_priv->vbt.edp.low_vswing = vswing == 0; 838 } 839 } 840 } 841 842 static void 843 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) 844 { 845 const struct bdb_psr *psr; 846 const struct psr_table *psr_table; 847 int panel_type = dev_priv->vbt.panel_type; 848 849 psr = find_section(bdb, BDB_PSR); 850 if (!psr) { 851 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n"); 852 return; 853 } 854 855 psr_table = &psr->psr_table[panel_type]; 856 857 dev_priv->vbt.psr.full_link = psr_table->full_link; 858 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 859 860 /* Allowed VBT values goes from 0 to 15 */ 861 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 862 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 863 864 switch (psr_table->lines_to_wait) { 865 case 0: 866 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; 867 break; 868 case 1: 869 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; 870 break; 871 case 2: 872 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; 873 break; 874 case 3: 875 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; 876 break; 877 default: 878 drm_dbg_kms(&dev_priv->drm, 879 "VBT has unknown PSR lines to wait %u\n", 880 psr_table->lines_to_wait); 881 break; 882 } 883 884 /* 885 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 886 * Old decimal value is wake up time in multiples of 100 us. 887 */ 888 if (bdb->version >= 205 && 889 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) || 890 INTEL_GEN(dev_priv) >= 10)) { 891 switch (psr_table->tp1_wakeup_time) { 892 case 0: 893 dev_priv->vbt.psr.tp1_wakeup_time_us = 500; 894 break; 895 case 1: 896 dev_priv->vbt.psr.tp1_wakeup_time_us = 100; 897 break; 898 case 3: 899 dev_priv->vbt.psr.tp1_wakeup_time_us = 0; 900 break; 901 default: 902 drm_dbg_kms(&dev_priv->drm, 903 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 904 psr_table->tp1_wakeup_time); 905 /* fallthrough */ 906 case 2: 907 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500; 908 break; 909 } 910 911 switch (psr_table->tp2_tp3_wakeup_time) { 912 case 0: 913 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500; 914 break; 915 case 1: 916 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100; 917 break; 918 case 3: 919 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0; 920 break; 921 default: 922 drm_dbg_kms(&dev_priv->drm, 923 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 924 psr_table->tp2_tp3_wakeup_time); 925 /* fallthrough */ 926 case 2: 927 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 928 break; 929 } 930 } else { 931 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 932 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 933 } 934 935 if (bdb->version >= 226) { 936 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 937 938 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 939 switch (wakeup_time) { 940 case 0: 941 wakeup_time = 500; 942 break; 943 case 1: 944 wakeup_time = 100; 945 break; 946 case 3: 947 wakeup_time = 50; 948 break; 949 default: 950 case 2: 951 wakeup_time = 2500; 952 break; 953 } 954 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 955 } else { 956 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 957 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us; 958 } 959 } 960 961 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, 962 u16 version, enum port port) 963 { 964 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) { 965 dev_priv->vbt.dsi.bl_ports = BIT(port); 966 if (dev_priv->vbt.dsi.config->cabc_supported) 967 dev_priv->vbt.dsi.cabc_ports = BIT(port); 968 969 return; 970 } 971 972 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) { 973 case DL_DCS_PORT_A: 974 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A); 975 break; 976 case DL_DCS_PORT_C: 977 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C); 978 break; 979 default: 980 case DL_DCS_PORT_A_AND_C: 981 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 982 break; 983 } 984 985 if (!dev_priv->vbt.dsi.config->cabc_supported) 986 return; 987 988 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) { 989 case DL_DCS_PORT_A: 990 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A); 991 break; 992 case DL_DCS_PORT_C: 993 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C); 994 break; 995 default: 996 case DL_DCS_PORT_A_AND_C: 997 dev_priv->vbt.dsi.cabc_ports = 998 BIT(PORT_A) | BIT(PORT_C); 999 break; 1000 } 1001 } 1002 1003 static void 1004 parse_mipi_config(struct drm_i915_private *dev_priv, 1005 const struct bdb_header *bdb) 1006 { 1007 const struct bdb_mipi_config *start; 1008 const struct mipi_config *config; 1009 const struct mipi_pps_data *pps; 1010 int panel_type = dev_priv->vbt.panel_type; 1011 enum port port; 1012 1013 /* parse MIPI blocks only if LFP type is MIPI */ 1014 if (!intel_bios_is_dsi_present(dev_priv, &port)) 1015 return; 1016 1017 /* Initialize this to undefined indicating no generic MIPI support */ 1018 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1019 1020 /* Block #40 is already parsed and panel_fixed_mode is 1021 * stored in dev_priv->lfp_lvds_vbt_mode 1022 * resuse this when needed 1023 */ 1024 1025 /* Parse #52 for panel index used from panel_type already 1026 * parsed 1027 */ 1028 start = find_section(bdb, BDB_MIPI_CONFIG); 1029 if (!start) { 1030 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found"); 1031 return; 1032 } 1033 1034 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n", 1035 panel_type); 1036 1037 /* 1038 * get hold of the correct configuration block and pps data as per 1039 * the panel_type as index 1040 */ 1041 config = &start->config[panel_type]; 1042 pps = &start->pps[panel_type]; 1043 1044 /* store as of now full data. Trim when we realise all is not needed */ 1045 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1046 if (!dev_priv->vbt.dsi.config) 1047 return; 1048 1049 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1050 if (!dev_priv->vbt.dsi.pps) { 1051 kfree(dev_priv->vbt.dsi.config); 1052 return; 1053 } 1054 1055 parse_dsi_backlight_ports(dev_priv, bdb->version, port); 1056 1057 /* FIXME is the 90 vs. 270 correct? */ 1058 switch (config->rotation) { 1059 case ENABLE_ROTATION_0: 1060 /* 1061 * Most (all?) VBTs claim 0 degrees despite having 1062 * an upside down panel, thus we do not trust this. 1063 */ 1064 dev_priv->vbt.dsi.orientation = 1065 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1066 break; 1067 case ENABLE_ROTATION_90: 1068 dev_priv->vbt.dsi.orientation = 1069 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1070 break; 1071 case ENABLE_ROTATION_180: 1072 dev_priv->vbt.dsi.orientation = 1073 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1074 break; 1075 case ENABLE_ROTATION_270: 1076 dev_priv->vbt.dsi.orientation = 1077 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1078 break; 1079 } 1080 1081 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1082 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1083 } 1084 1085 /* Find the sequence block and size for the given panel. */ 1086 static const u8 * 1087 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1088 u16 panel_id, u32 *seq_size) 1089 { 1090 u32 total = get_blocksize(sequence); 1091 const u8 *data = &sequence->data[0]; 1092 u8 current_id; 1093 u32 current_size; 1094 int header_size = sequence->version >= 3 ? 5 : 3; 1095 int index = 0; 1096 int i; 1097 1098 /* skip new block size */ 1099 if (sequence->version >= 3) 1100 data += 4; 1101 1102 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1103 if (index + header_size > total) { 1104 DRM_ERROR("Invalid sequence block (header)\n"); 1105 return NULL; 1106 } 1107 1108 current_id = *(data + index); 1109 if (sequence->version >= 3) 1110 current_size = *((const u32 *)(data + index + 1)); 1111 else 1112 current_size = *((const u16 *)(data + index + 1)); 1113 1114 index += header_size; 1115 1116 if (index + current_size > total) { 1117 DRM_ERROR("Invalid sequence block\n"); 1118 return NULL; 1119 } 1120 1121 if (current_id == panel_id) { 1122 *seq_size = current_size; 1123 return data + index; 1124 } 1125 1126 index += current_size; 1127 } 1128 1129 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1130 1131 return NULL; 1132 } 1133 1134 static int goto_next_sequence(const u8 *data, int index, int total) 1135 { 1136 u16 len; 1137 1138 /* Skip Sequence Byte. */ 1139 for (index = index + 1; index < total; index += len) { 1140 u8 operation_byte = *(data + index); 1141 index++; 1142 1143 switch (operation_byte) { 1144 case MIPI_SEQ_ELEM_END: 1145 return index; 1146 case MIPI_SEQ_ELEM_SEND_PKT: 1147 if (index + 4 > total) 1148 return 0; 1149 1150 len = *((const u16 *)(data + index + 2)) + 4; 1151 break; 1152 case MIPI_SEQ_ELEM_DELAY: 1153 len = 4; 1154 break; 1155 case MIPI_SEQ_ELEM_GPIO: 1156 len = 2; 1157 break; 1158 case MIPI_SEQ_ELEM_I2C: 1159 if (index + 7 > total) 1160 return 0; 1161 len = *(data + index + 6) + 7; 1162 break; 1163 default: 1164 DRM_ERROR("Unknown operation byte\n"); 1165 return 0; 1166 } 1167 } 1168 1169 return 0; 1170 } 1171 1172 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1173 { 1174 int seq_end; 1175 u16 len; 1176 u32 size_of_sequence; 1177 1178 /* 1179 * Could skip sequence based on Size of Sequence alone, but also do some 1180 * checking on the structure. 1181 */ 1182 if (total < 5) { 1183 DRM_ERROR("Too small sequence size\n"); 1184 return 0; 1185 } 1186 1187 /* Skip Sequence Byte. */ 1188 index++; 1189 1190 /* 1191 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1192 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1193 * byte. 1194 */ 1195 size_of_sequence = *((const u32 *)(data + index)); 1196 index += 4; 1197 1198 seq_end = index + size_of_sequence; 1199 if (seq_end > total) { 1200 DRM_ERROR("Invalid sequence size\n"); 1201 return 0; 1202 } 1203 1204 for (; index < total; index += len) { 1205 u8 operation_byte = *(data + index); 1206 index++; 1207 1208 if (operation_byte == MIPI_SEQ_ELEM_END) { 1209 if (index != seq_end) { 1210 DRM_ERROR("Invalid element structure\n"); 1211 return 0; 1212 } 1213 return index; 1214 } 1215 1216 len = *(data + index); 1217 index++; 1218 1219 /* 1220 * FIXME: Would be nice to check elements like for v1/v2 in 1221 * goto_next_sequence() above. 1222 */ 1223 switch (operation_byte) { 1224 case MIPI_SEQ_ELEM_SEND_PKT: 1225 case MIPI_SEQ_ELEM_DELAY: 1226 case MIPI_SEQ_ELEM_GPIO: 1227 case MIPI_SEQ_ELEM_I2C: 1228 case MIPI_SEQ_ELEM_SPI: 1229 case MIPI_SEQ_ELEM_PMIC: 1230 break; 1231 default: 1232 DRM_ERROR("Unknown operation byte %u\n", 1233 operation_byte); 1234 break; 1235 } 1236 } 1237 1238 return 0; 1239 } 1240 1241 /* 1242 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1243 * skip all delay + gpio operands and stop at the first DSI packet op. 1244 */ 1245 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv) 1246 { 1247 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1248 int index, len; 1249 1250 if (drm_WARN_ON(&dev_priv->drm, 1251 !data || dev_priv->vbt.dsi.seq_version != 1)) 1252 return 0; 1253 1254 /* index = 1 to skip sequence byte */ 1255 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1256 switch (data[index]) { 1257 case MIPI_SEQ_ELEM_SEND_PKT: 1258 return index == 1 ? 0 : index; 1259 case MIPI_SEQ_ELEM_DELAY: 1260 len = 5; /* 1 byte for operand + uint32 */ 1261 break; 1262 case MIPI_SEQ_ELEM_GPIO: 1263 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1264 break; 1265 default: 1266 return 0; 1267 } 1268 } 1269 1270 return 0; 1271 } 1272 1273 /* 1274 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1275 * The deassert must be done before calling intel_dsi_device_ready, so for 1276 * these devices we split the init OTP sequence into a deassert sequence and 1277 * the actual init OTP part. 1278 */ 1279 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv) 1280 { 1281 u8 *init_otp; 1282 int len; 1283 1284 /* Limit this to VLV for now. */ 1285 if (!IS_VALLEYVIEW(dev_priv)) 1286 return; 1287 1288 /* Limit this to v1 vid-mode sequences */ 1289 if (dev_priv->vbt.dsi.config->is_cmd_mode || 1290 dev_priv->vbt.dsi.seq_version != 1) 1291 return; 1292 1293 /* Only do this if there are otp and assert seqs and no deassert seq */ 1294 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1295 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1296 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1297 return; 1298 1299 /* The deassert-sequence ends at the first DSI packet */ 1300 len = get_init_otp_deassert_fragment_len(dev_priv); 1301 if (!len) 1302 return; 1303 1304 drm_dbg_kms(&dev_priv->drm, 1305 "Using init OTP fragment to deassert reset\n"); 1306 1307 /* Copy the fragment, update seq byte and terminate it */ 1308 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1309 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1310 if (!dev_priv->vbt.dsi.deassert_seq) 1311 return; 1312 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1313 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1314 /* Use the copy for deassert */ 1315 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1316 dev_priv->vbt.dsi.deassert_seq; 1317 /* Replace the last byte of the fragment with init OTP seq byte */ 1318 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1319 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1320 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1321 } 1322 1323 static void 1324 parse_mipi_sequence(struct drm_i915_private *dev_priv, 1325 const struct bdb_header *bdb) 1326 { 1327 int panel_type = dev_priv->vbt.panel_type; 1328 const struct bdb_mipi_sequence *sequence; 1329 const u8 *seq_data; 1330 u32 seq_size; 1331 u8 *data; 1332 int index = 0; 1333 1334 /* Only our generic panel driver uses the sequence block. */ 1335 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1336 return; 1337 1338 sequence = find_section(bdb, BDB_MIPI_SEQUENCE); 1339 if (!sequence) { 1340 drm_dbg_kms(&dev_priv->drm, 1341 "No MIPI Sequence found, parsing complete\n"); 1342 return; 1343 } 1344 1345 /* Fail gracefully for forward incompatible sequence block. */ 1346 if (sequence->version >= 4) { 1347 drm_err(&dev_priv->drm, 1348 "Unable to parse MIPI Sequence Block v%u\n", 1349 sequence->version); 1350 return; 1351 } 1352 1353 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n", 1354 sequence->version); 1355 1356 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1357 if (!seq_data) 1358 return; 1359 1360 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1361 if (!data) 1362 return; 1363 1364 /* Parse the sequences, store pointers to each sequence. */ 1365 for (;;) { 1366 u8 seq_id = *(data + index); 1367 if (seq_id == MIPI_SEQ_END) 1368 break; 1369 1370 if (seq_id >= MIPI_SEQ_MAX) { 1371 drm_err(&dev_priv->drm, "Unknown sequence %u\n", 1372 seq_id); 1373 goto err; 1374 } 1375 1376 /* Log about presence of sequences we won't run. */ 1377 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1378 drm_dbg_kms(&dev_priv->drm, 1379 "Unsupported sequence %u\n", seq_id); 1380 1381 dev_priv->vbt.dsi.sequence[seq_id] = data + index; 1382 1383 if (sequence->version >= 3) 1384 index = goto_next_sequence_v3(data, index, seq_size); 1385 else 1386 index = goto_next_sequence(data, index, seq_size); 1387 if (!index) { 1388 drm_err(&dev_priv->drm, "Invalid sequence %u\n", 1389 seq_id); 1390 goto err; 1391 } 1392 } 1393 1394 dev_priv->vbt.dsi.data = data; 1395 dev_priv->vbt.dsi.size = seq_size; 1396 dev_priv->vbt.dsi.seq_version = sequence->version; 1397 1398 fixup_mipi_sequences(dev_priv); 1399 1400 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n"); 1401 return; 1402 1403 err: 1404 kfree(data); 1405 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); 1406 } 1407 1408 static void 1409 parse_compression_parameters(struct drm_i915_private *i915, 1410 const struct bdb_header *bdb) 1411 { 1412 const struct bdb_compression_parameters *params; 1413 struct display_device_data *devdata; 1414 const struct child_device_config *child; 1415 u16 block_size; 1416 int index; 1417 1418 if (bdb->version < 198) 1419 return; 1420 1421 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS); 1422 if (params) { 1423 /* Sanity checks */ 1424 if (params->entry_size != sizeof(params->data[0])) { 1425 drm_dbg_kms(&i915->drm, 1426 "VBT: unsupported compression param entry size\n"); 1427 return; 1428 } 1429 1430 block_size = get_blocksize(params); 1431 if (block_size < sizeof(*params)) { 1432 drm_dbg_kms(&i915->drm, 1433 "VBT: expected 16 compression param entries\n"); 1434 return; 1435 } 1436 } 1437 1438 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1439 child = &devdata->child; 1440 1441 if (!child->compression_enable) 1442 continue; 1443 1444 if (!params) { 1445 drm_dbg_kms(&i915->drm, 1446 "VBT: compression params not available\n"); 1447 continue; 1448 } 1449 1450 if (child->compression_method_cps) { 1451 drm_dbg_kms(&i915->drm, 1452 "VBT: CPS compression not supported\n"); 1453 continue; 1454 } 1455 1456 index = child->compression_structure_index; 1457 1458 devdata->dsc = kmemdup(¶ms->data[index], 1459 sizeof(*devdata->dsc), GFP_KERNEL); 1460 } 1461 } 1462 1463 static u8 translate_iboost(u8 val) 1464 { 1465 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1466 1467 if (val >= ARRAY_SIZE(mapping)) { 1468 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1469 return 0; 1470 } 1471 return mapping[val]; 1472 } 1473 1474 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 1475 { 1476 const struct ddi_vbt_port_info *info; 1477 enum port port; 1478 1479 for_each_port(port) { 1480 info = &i915->vbt.ddi_port_info[port]; 1481 1482 if (info->child && ddc_pin == info->alternate_ddc_pin) 1483 return port; 1484 } 1485 1486 return PORT_NONE; 1487 } 1488 1489 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, 1490 enum port port) 1491 { 1492 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1493 enum port p; 1494 1495 if (!info->alternate_ddc_pin) 1496 return; 1497 1498 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin); 1499 if (p != PORT_NONE) { 1500 drm_dbg_kms(&dev_priv->drm, 1501 "port %c trying to use the same DDC pin (0x%x) as port %c, " 1502 "disabling port %c DVI/HDMI support\n", 1503 port_name(port), info->alternate_ddc_pin, 1504 port_name(p), port_name(p)); 1505 1506 /* 1507 * If we have multiple ports supposedly sharing the 1508 * pin, then dvi/hdmi couldn't exist on the shared 1509 * port. Otherwise they share the same ddc bin and 1510 * system couldn't communicate with them separately. 1511 * 1512 * Give inverse child device order the priority, 1513 * last one wins. Yes, there are real machines 1514 * (eg. Asrock B250M-HDV) where VBT has both 1515 * port A and port E with the same AUX ch and 1516 * we must pick port E :( 1517 */ 1518 info = &dev_priv->vbt.ddi_port_info[p]; 1519 1520 info->supports_dvi = false; 1521 info->supports_hdmi = false; 1522 info->alternate_ddc_pin = 0; 1523 } 1524 } 1525 1526 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 1527 { 1528 const struct ddi_vbt_port_info *info; 1529 enum port port; 1530 1531 for_each_port(port) { 1532 info = &i915->vbt.ddi_port_info[port]; 1533 1534 if (info->child && aux_ch == info->alternate_aux_channel) 1535 return port; 1536 } 1537 1538 return PORT_NONE; 1539 } 1540 1541 static void sanitize_aux_ch(struct drm_i915_private *dev_priv, 1542 enum port port) 1543 { 1544 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; 1545 enum port p; 1546 1547 if (!info->alternate_aux_channel) 1548 return; 1549 1550 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel); 1551 if (p != PORT_NONE) { 1552 drm_dbg_kms(&dev_priv->drm, 1553 "port %c trying to use the same AUX CH (0x%x) as port %c, " 1554 "disabling port %c DP support\n", 1555 port_name(port), info->alternate_aux_channel, 1556 port_name(p), port_name(p)); 1557 1558 /* 1559 * If we have multiple ports supposedlt sharing the 1560 * aux channel, then DP couldn't exist on the shared 1561 * port. Otherwise they share the same aux channel 1562 * and system couldn't communicate with them separately. 1563 * 1564 * Give inverse child device order the priority, 1565 * last one wins. Yes, there are real machines 1566 * (eg. Asrock B250M-HDV) where VBT has both 1567 * port A and port E with the same AUX ch and 1568 * we must pick port E :( 1569 */ 1570 info = &dev_priv->vbt.ddi_port_info[p]; 1571 1572 info->supports_dp = false; 1573 info->alternate_aux_channel = 0; 1574 } 1575 } 1576 1577 static const u8 cnp_ddc_pin_map[] = { 1578 [0] = 0, /* N/A */ 1579 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1580 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1581 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1582 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1583 }; 1584 1585 static const u8 icp_ddc_pin_map[] = { 1586 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1587 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1588 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1589 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1590 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1591 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1592 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1593 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1594 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1595 }; 1596 1597 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) 1598 { 1599 const u8 *ddc_pin_map; 1600 int n_entries; 1601 1602 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { 1603 ddc_pin_map = icp_ddc_pin_map; 1604 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 1605 } else if (HAS_PCH_CNP(dev_priv)) { 1606 ddc_pin_map = cnp_ddc_pin_map; 1607 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 1608 } else { 1609 /* Assuming direct map */ 1610 return vbt_pin; 1611 } 1612 1613 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 1614 return ddc_pin_map[vbt_pin]; 1615 1616 drm_dbg_kms(&dev_priv->drm, 1617 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 1618 vbt_pin); 1619 return 0; 1620 } 1621 1622 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 1623 const int port_mapping[][3], u8 dvo_port) 1624 { 1625 enum port port; 1626 int i; 1627 1628 for (port = PORT_A; port < n_ports; port++) { 1629 for (i = 0; i < n_dvo; i++) { 1630 if (port_mapping[port][i] == -1) 1631 break; 1632 1633 if (dvo_port == port_mapping[port][i]) 1634 return port; 1635 } 1636 } 1637 1638 return PORT_NONE; 1639 } 1640 1641 static enum port dvo_port_to_port(struct drm_i915_private *dev_priv, 1642 u8 dvo_port) 1643 { 1644 /* 1645 * Each DDI port can have more than one value on the "DVO Port" field, 1646 * so look for all the possible values for each port. 1647 */ 1648 static const int port_mapping[][3] = { 1649 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1650 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1651 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1652 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1653 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 1654 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 1655 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 1656 }; 1657 /* 1658 * Bspec lists the ports as A, B, C, D - however internally in our 1659 * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the 1660 * registers in Display Engine match the right offsets. Apply the 1661 * mapping here to translate from VBT to internal convention. 1662 */ 1663 static const int rkl_port_mapping[][3] = { 1664 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 1665 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 1666 [PORT_C] = { -1 }, 1667 [PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 1668 [PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 1669 }; 1670 1671 if (IS_ROCKETLAKE(dev_priv)) 1672 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 1673 ARRAY_SIZE(rkl_port_mapping[0]), 1674 rkl_port_mapping, 1675 dvo_port); 1676 else 1677 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 1678 ARRAY_SIZE(port_mapping[0]), 1679 port_mapping, 1680 dvo_port); 1681 } 1682 1683 static void parse_ddi_port(struct drm_i915_private *dev_priv, 1684 struct display_device_data *devdata, 1685 u8 bdb_version) 1686 { 1687 const struct child_device_config *child = &devdata->child; 1688 struct ddi_vbt_port_info *info; 1689 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; 1690 enum port port; 1691 1692 port = dvo_port_to_port(dev_priv, child->dvo_port); 1693 if (port == PORT_NONE) 1694 return; 1695 1696 info = &dev_priv->vbt.ddi_port_info[port]; 1697 1698 if (info->child) { 1699 drm_dbg_kms(&dev_priv->drm, 1700 "More than one child device for port %c in VBT, using the first.\n", 1701 port_name(port)); 1702 return; 1703 } 1704 1705 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 1706 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 1707 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; 1708 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 1709 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); 1710 1711 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) { 1712 drm_dbg_kms(&dev_priv->drm, 1713 "VBT claims port A supports DVI%s, ignoring\n", 1714 is_hdmi ? "/HDMI" : ""); 1715 is_dvi = false; 1716 is_hdmi = false; 1717 } 1718 1719 info->supports_dvi = is_dvi; 1720 info->supports_hdmi = is_hdmi; 1721 info->supports_dp = is_dp; 1722 info->supports_edp = is_edp; 1723 1724 if (bdb_version >= 195) 1725 info->supports_typec_usb = child->dp_usb_type_c; 1726 1727 if (bdb_version >= 209) 1728 info->supports_tbt = child->tbt; 1729 1730 drm_dbg_kms(&dev_priv->drm, 1731 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 1732 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 1733 HAS_LSPCON(dev_priv) && child->lspcon, 1734 info->supports_typec_usb, info->supports_tbt, 1735 devdata->dsc != NULL); 1736 1737 if (is_dvi) { 1738 u8 ddc_pin; 1739 1740 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin); 1741 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) { 1742 info->alternate_ddc_pin = ddc_pin; 1743 sanitize_ddc_pin(dev_priv, port); 1744 } else { 1745 drm_dbg_kms(&dev_priv->drm, 1746 "Port %c has invalid DDC pin %d, " 1747 "sticking to defaults\n", 1748 port_name(port), ddc_pin); 1749 } 1750 } 1751 1752 if (is_dp) { 1753 info->alternate_aux_channel = child->aux_channel; 1754 1755 sanitize_aux_ch(dev_priv, port); 1756 } 1757 1758 if (bdb_version >= 158) { 1759 /* The VBT HDMI level shift values match the table we have. */ 1760 u8 hdmi_level_shift = child->hdmi_level_shifter_value; 1761 drm_dbg_kms(&dev_priv->drm, 1762 "VBT HDMI level shift for port %c: %d\n", 1763 port_name(port), 1764 hdmi_level_shift); 1765 info->hdmi_level_shift = hdmi_level_shift; 1766 info->hdmi_level_shift_set = true; 1767 } 1768 1769 if (bdb_version >= 204) { 1770 int max_tmds_clock; 1771 1772 switch (child->hdmi_max_data_rate) { 1773 default: 1774 MISSING_CASE(child->hdmi_max_data_rate); 1775 /* fall through */ 1776 case HDMI_MAX_DATA_RATE_PLATFORM: 1777 max_tmds_clock = 0; 1778 break; 1779 case HDMI_MAX_DATA_RATE_297: 1780 max_tmds_clock = 297000; 1781 break; 1782 case HDMI_MAX_DATA_RATE_165: 1783 max_tmds_clock = 165000; 1784 break; 1785 } 1786 1787 if (max_tmds_clock) 1788 drm_dbg_kms(&dev_priv->drm, 1789 "VBT HDMI max TMDS clock for port %c: %d kHz\n", 1790 port_name(port), max_tmds_clock); 1791 info->max_tmds_clock = max_tmds_clock; 1792 } 1793 1794 /* Parse the I_boost config for SKL and above */ 1795 if (bdb_version >= 196 && child->iboost) { 1796 info->dp_boost_level = translate_iboost(child->dp_iboost_level); 1797 drm_dbg_kms(&dev_priv->drm, 1798 "VBT (e)DP boost level for port %c: %d\n", 1799 port_name(port), info->dp_boost_level); 1800 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); 1801 drm_dbg_kms(&dev_priv->drm, 1802 "VBT HDMI boost level for port %c: %d\n", 1803 port_name(port), info->hdmi_boost_level); 1804 } 1805 1806 /* DP max link rate for CNL+ */ 1807 if (bdb_version >= 216) { 1808 switch (child->dp_max_link_rate) { 1809 default: 1810 case VBT_DP_MAX_LINK_RATE_HBR3: 1811 info->dp_max_link_rate = 810000; 1812 break; 1813 case VBT_DP_MAX_LINK_RATE_HBR2: 1814 info->dp_max_link_rate = 540000; 1815 break; 1816 case VBT_DP_MAX_LINK_RATE_HBR: 1817 info->dp_max_link_rate = 270000; 1818 break; 1819 case VBT_DP_MAX_LINK_RATE_LBR: 1820 info->dp_max_link_rate = 162000; 1821 break; 1822 } 1823 drm_dbg_kms(&dev_priv->drm, 1824 "VBT DP max link rate for port %c: %d\n", 1825 port_name(port), info->dp_max_link_rate); 1826 } 1827 1828 info->child = child; 1829 } 1830 1831 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version) 1832 { 1833 struct display_device_data *devdata; 1834 1835 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv)) 1836 return; 1837 1838 if (bdb_version < 155) 1839 return; 1840 1841 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) 1842 parse_ddi_port(dev_priv, devdata, bdb_version); 1843 } 1844 1845 static void 1846 parse_general_definitions(struct drm_i915_private *dev_priv, 1847 const struct bdb_header *bdb) 1848 { 1849 const struct bdb_general_definitions *defs; 1850 struct display_device_data *devdata; 1851 const struct child_device_config *child; 1852 int i, child_device_num; 1853 u8 expected_size; 1854 u16 block_size; 1855 int bus_pin; 1856 1857 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); 1858 if (!defs) { 1859 drm_dbg_kms(&dev_priv->drm, 1860 "No general definition block is found, no devices defined.\n"); 1861 return; 1862 } 1863 1864 block_size = get_blocksize(defs); 1865 if (block_size < sizeof(*defs)) { 1866 drm_dbg_kms(&dev_priv->drm, 1867 "General definitions block too small (%u)\n", 1868 block_size); 1869 return; 1870 } 1871 1872 bus_pin = defs->crt_ddc_gmbus_pin; 1873 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 1874 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) 1875 dev_priv->vbt.crt_ddc_pin = bus_pin; 1876 1877 if (bdb->version < 106) { 1878 expected_size = 22; 1879 } else if (bdb->version < 111) { 1880 expected_size = 27; 1881 } else if (bdb->version < 195) { 1882 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 1883 } else if (bdb->version == 195) { 1884 expected_size = 37; 1885 } else if (bdb->version <= 215) { 1886 expected_size = 38; 1887 } else if (bdb->version <= 229) { 1888 expected_size = 39; 1889 } else { 1890 expected_size = sizeof(*child); 1891 BUILD_BUG_ON(sizeof(*child) < 39); 1892 drm_dbg(&dev_priv->drm, 1893 "Expected child device config size for VBT version %u not known; assuming %u\n", 1894 bdb->version, expected_size); 1895 } 1896 1897 /* Flag an error for unexpected size, but continue anyway. */ 1898 if (defs->child_dev_size != expected_size) 1899 drm_err(&dev_priv->drm, 1900 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 1901 defs->child_dev_size, expected_size, bdb->version); 1902 1903 /* The legacy sized child device config is the minimum we need. */ 1904 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 1905 drm_dbg_kms(&dev_priv->drm, 1906 "Child device config size %u is too small.\n", 1907 defs->child_dev_size); 1908 return; 1909 } 1910 1911 /* get the number of child device */ 1912 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 1913 1914 for (i = 0; i < child_device_num; i++) { 1915 child = child_device_ptr(defs, i); 1916 if (!child->device_type) 1917 continue; 1918 1919 drm_dbg_kms(&dev_priv->drm, 1920 "Found VBT child device with type 0x%x\n", 1921 child->device_type); 1922 1923 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 1924 if (!devdata) 1925 break; 1926 1927 /* 1928 * Copy as much as we know (sizeof) and is available 1929 * (child_dev_size) of the child device config. Accessing the 1930 * data must depend on VBT version. 1931 */ 1932 memcpy(&devdata->child, child, 1933 min_t(size_t, defs->child_dev_size, sizeof(*child))); 1934 1935 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices); 1936 } 1937 1938 if (list_empty(&dev_priv->vbt.display_devices)) 1939 drm_dbg_kms(&dev_priv->drm, 1940 "no child dev is parsed from VBT\n"); 1941 } 1942 1943 /* Common defaults which may be overridden by VBT. */ 1944 static void 1945 init_vbt_defaults(struct drm_i915_private *dev_priv) 1946 { 1947 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 1948 1949 /* Default to having backlight */ 1950 dev_priv->vbt.backlight.present = true; 1951 1952 /* LFP panel data */ 1953 dev_priv->vbt.lvds_dither = 1; 1954 1955 /* SDVO panel data */ 1956 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 1957 1958 /* general features */ 1959 dev_priv->vbt.int_tv_support = 1; 1960 dev_priv->vbt.int_crt_support = 1; 1961 1962 /* driver features */ 1963 dev_priv->vbt.int_lvds_support = 1; 1964 1965 /* Default to using SSC */ 1966 dev_priv->vbt.lvds_use_ssc = 1; 1967 /* 1968 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 1969 * clock for LVDS. 1970 */ 1971 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, 1972 !HAS_PCH_SPLIT(dev_priv)); 1973 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n", 1974 dev_priv->vbt.lvds_ssc_freq); 1975 } 1976 1977 /* Defaults to initialize only if there is no VBT. */ 1978 static void 1979 init_vbt_missing_defaults(struct drm_i915_private *dev_priv) 1980 { 1981 enum port port; 1982 1983 for_each_port(port) { 1984 struct ddi_vbt_port_info *info = 1985 &dev_priv->vbt.ddi_port_info[port]; 1986 enum phy phy = intel_port_to_phy(dev_priv, port); 1987 1988 /* 1989 * VBT has the TypeC mode (native,TBT/USB) and we don't want 1990 * to detect it. 1991 */ 1992 if (intel_phy_is_tc(dev_priv, phy)) 1993 continue; 1994 1995 info->supports_dvi = (port != PORT_A && port != PORT_E); 1996 info->supports_hdmi = info->supports_dvi; 1997 info->supports_dp = (port != PORT_E); 1998 info->supports_edp = (port == PORT_A); 1999 } 2000 } 2001 2002 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2003 { 2004 const void *_vbt = vbt; 2005 2006 return _vbt + vbt->bdb_offset; 2007 } 2008 2009 /** 2010 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2011 * @buf: pointer to a buffer to validate 2012 * @size: size of the buffer 2013 * 2014 * Returns true on valid VBT. 2015 */ 2016 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2017 { 2018 const struct vbt_header *vbt = buf; 2019 const struct bdb_header *bdb; 2020 2021 if (!vbt) 2022 return false; 2023 2024 if (sizeof(struct vbt_header) > size) { 2025 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2026 return false; 2027 } 2028 2029 if (memcmp(vbt->signature, "$VBT", 4)) { 2030 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2031 return false; 2032 } 2033 2034 if (vbt->vbt_size > size) { 2035 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2036 return false; 2037 } 2038 2039 size = vbt->vbt_size; 2040 2041 if (range_overflows_t(size_t, 2042 vbt->bdb_offset, 2043 sizeof(struct bdb_header), 2044 size)) { 2045 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2046 return false; 2047 } 2048 2049 bdb = get_bdb_header(vbt); 2050 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2051 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2052 return false; 2053 } 2054 2055 return vbt; 2056 } 2057 2058 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv) 2059 { 2060 struct pci_dev *pdev = dev_priv->drm.pdev; 2061 void __iomem *p = NULL, *oprom; 2062 struct vbt_header *vbt; 2063 u16 vbt_size; 2064 size_t i, size; 2065 2066 oprom = pci_map_rom(pdev, &size); 2067 if (!oprom) 2068 return NULL; 2069 2070 /* Scour memory looking for the VBT signature. */ 2071 for (i = 0; i + 4 < size; i += 4) { 2072 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2073 continue; 2074 2075 p = oprom + i; 2076 size -= i; 2077 break; 2078 } 2079 2080 if (!p) 2081 goto err_unmap_oprom; 2082 2083 if (sizeof(struct vbt_header) > size) { 2084 drm_dbg(&dev_priv->drm, "VBT header incomplete\n"); 2085 goto err_unmap_oprom; 2086 } 2087 2088 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2089 if (vbt_size > size) { 2090 drm_dbg(&dev_priv->drm, 2091 "VBT incomplete (vbt_size overflows)\n"); 2092 goto err_unmap_oprom; 2093 } 2094 2095 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2096 vbt = kmalloc(vbt_size, GFP_KERNEL); 2097 if (!vbt) 2098 goto err_unmap_oprom; 2099 2100 memcpy_fromio(vbt, p, vbt_size); 2101 2102 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2103 goto err_free_vbt; 2104 2105 pci_unmap_rom(pdev, oprom); 2106 2107 return vbt; 2108 2109 err_free_vbt: 2110 kfree(vbt); 2111 err_unmap_oprom: 2112 pci_unmap_rom(pdev, oprom); 2113 2114 return NULL; 2115 } 2116 2117 /** 2118 * intel_bios_init - find VBT and initialize settings from the BIOS 2119 * @dev_priv: i915 device instance 2120 * 2121 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2122 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2123 * initialize some defaults if the VBT is not present at all. 2124 */ 2125 void intel_bios_init(struct drm_i915_private *dev_priv) 2126 { 2127 const struct vbt_header *vbt = dev_priv->opregion.vbt; 2128 struct vbt_header *oprom_vbt = NULL; 2129 const struct bdb_header *bdb; 2130 2131 INIT_LIST_HEAD(&dev_priv->vbt.display_devices); 2132 2133 if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) { 2134 drm_dbg_kms(&dev_priv->drm, 2135 "Skipping VBT init due to disabled display.\n"); 2136 return; 2137 } 2138 2139 init_vbt_defaults(dev_priv); 2140 2141 /* If the OpRegion does not have VBT, look in PCI ROM. */ 2142 if (!vbt) { 2143 oprom_vbt = oprom_get_vbt(dev_priv); 2144 if (!oprom_vbt) 2145 goto out; 2146 2147 vbt = oprom_vbt; 2148 2149 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n"); 2150 } 2151 2152 bdb = get_bdb_header(vbt); 2153 2154 drm_dbg_kms(&dev_priv->drm, 2155 "VBT signature \"%.*s\", BDB version %d\n", 2156 (int)sizeof(vbt->signature), vbt->signature, bdb->version); 2157 2158 /* Grab useful general definitions */ 2159 parse_general_features(dev_priv, bdb); 2160 parse_general_definitions(dev_priv, bdb); 2161 parse_panel_options(dev_priv, bdb); 2162 parse_panel_dtd(dev_priv, bdb); 2163 parse_lfp_backlight(dev_priv, bdb); 2164 parse_sdvo_panel_data(dev_priv, bdb); 2165 parse_driver_features(dev_priv, bdb); 2166 parse_power_conservation_features(dev_priv, bdb); 2167 parse_edp(dev_priv, bdb); 2168 parse_psr(dev_priv, bdb); 2169 parse_mipi_config(dev_priv, bdb); 2170 parse_mipi_sequence(dev_priv, bdb); 2171 2172 /* Depends on child device list */ 2173 parse_compression_parameters(dev_priv, bdb); 2174 2175 /* Further processing on pre-parsed data */ 2176 parse_sdvo_device_mapping(dev_priv, bdb->version); 2177 parse_ddi_ports(dev_priv, bdb->version); 2178 2179 out: 2180 if (!vbt) { 2181 drm_info(&dev_priv->drm, 2182 "Failed to find VBIOS tables (VBT)\n"); 2183 init_vbt_missing_defaults(dev_priv); 2184 } 2185 2186 kfree(oprom_vbt); 2187 } 2188 2189 /** 2190 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2191 * @dev_priv: i915 device instance 2192 */ 2193 void intel_bios_driver_remove(struct drm_i915_private *dev_priv) 2194 { 2195 struct display_device_data *devdata, *n; 2196 2197 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) { 2198 list_del(&devdata->node); 2199 kfree(devdata->dsc); 2200 kfree(devdata); 2201 } 2202 2203 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode); 2204 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; 2205 kfree(dev_priv->vbt.lfp_lvds_vbt_mode); 2206 dev_priv->vbt.lfp_lvds_vbt_mode = NULL; 2207 kfree(dev_priv->vbt.dsi.data); 2208 dev_priv->vbt.dsi.data = NULL; 2209 kfree(dev_priv->vbt.dsi.pps); 2210 dev_priv->vbt.dsi.pps = NULL; 2211 kfree(dev_priv->vbt.dsi.config); 2212 dev_priv->vbt.dsi.config = NULL; 2213 kfree(dev_priv->vbt.dsi.deassert_seq); 2214 dev_priv->vbt.dsi.deassert_seq = NULL; 2215 } 2216 2217 /** 2218 * intel_bios_is_tv_present - is integrated TV present in VBT 2219 * @dev_priv: i915 device instance 2220 * 2221 * Return true if TV is present. If no child devices were parsed from VBT, 2222 * assume TV is present. 2223 */ 2224 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) 2225 { 2226 const struct display_device_data *devdata; 2227 const struct child_device_config *child; 2228 2229 if (!dev_priv->vbt.int_tv_support) 2230 return false; 2231 2232 if (list_empty(&dev_priv->vbt.display_devices)) 2233 return true; 2234 2235 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2236 child = &devdata->child; 2237 2238 /* 2239 * If the device type is not TV, continue. 2240 */ 2241 switch (child->device_type) { 2242 case DEVICE_TYPE_INT_TV: 2243 case DEVICE_TYPE_TV: 2244 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 2245 break; 2246 default: 2247 continue; 2248 } 2249 /* Only when the addin_offset is non-zero, it is regarded 2250 * as present. 2251 */ 2252 if (child->addin_offset) 2253 return true; 2254 } 2255 2256 return false; 2257 } 2258 2259 /** 2260 * intel_bios_is_lvds_present - is LVDS present in VBT 2261 * @dev_priv: i915 device instance 2262 * @i2c_pin: i2c pin for LVDS if present 2263 * 2264 * Return true if LVDS is present. If no child devices were parsed from VBT, 2265 * assume LVDS is present. 2266 */ 2267 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) 2268 { 2269 const struct display_device_data *devdata; 2270 const struct child_device_config *child; 2271 2272 if (list_empty(&dev_priv->vbt.display_devices)) 2273 return true; 2274 2275 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2276 child = &devdata->child; 2277 2278 /* If the device type is not LFP, continue. 2279 * We have to check both the new identifiers as well as the 2280 * old for compatibility with some BIOSes. 2281 */ 2282 if (child->device_type != DEVICE_TYPE_INT_LFP && 2283 child->device_type != DEVICE_TYPE_LFP) 2284 continue; 2285 2286 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) 2287 *i2c_pin = child->i2c_pin; 2288 2289 /* However, we cannot trust the BIOS writers to populate 2290 * the VBT correctly. Since LVDS requires additional 2291 * information from AIM blocks, a non-zero addin offset is 2292 * a good indicator that the LVDS is actually present. 2293 */ 2294 if (child->addin_offset) 2295 return true; 2296 2297 /* But even then some BIOS writers perform some black magic 2298 * and instantiate the device without reference to any 2299 * additional data. Trust that if the VBT was written into 2300 * the OpRegion then they have validated the LVDS's existence. 2301 */ 2302 if (dev_priv->opregion.vbt) 2303 return true; 2304 } 2305 2306 return false; 2307 } 2308 2309 /** 2310 * intel_bios_is_port_present - is the specified digital port present 2311 * @dev_priv: i915 device instance 2312 * @port: port to check 2313 * 2314 * Return true if the device in %port is present. 2315 */ 2316 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) 2317 { 2318 const struct display_device_data *devdata; 2319 const struct child_device_config *child; 2320 static const struct { 2321 u16 dp, hdmi; 2322 } port_mapping[] = { 2323 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2324 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2325 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2326 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2327 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2328 }; 2329 2330 if (HAS_DDI(dev_priv)) { 2331 const struct ddi_vbt_port_info *port_info = 2332 &dev_priv->vbt.ddi_port_info[port]; 2333 2334 return port_info->child; 2335 } 2336 2337 /* FIXME maybe deal with port A as well? */ 2338 if (drm_WARN_ON(&dev_priv->drm, 2339 port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) 2340 return false; 2341 2342 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2343 child = &devdata->child; 2344 2345 if ((child->dvo_port == port_mapping[port].dp || 2346 child->dvo_port == port_mapping[port].hdmi) && 2347 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | 2348 DEVICE_TYPE_DISPLAYPORT_OUTPUT))) 2349 return true; 2350 } 2351 2352 return false; 2353 } 2354 2355 /** 2356 * intel_bios_is_port_edp - is the device in given port eDP 2357 * @dev_priv: i915 device instance 2358 * @port: port to check 2359 * 2360 * Return true if the device in %port is eDP. 2361 */ 2362 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) 2363 { 2364 const struct display_device_data *devdata; 2365 const struct child_device_config *child; 2366 static const short port_mapping[] = { 2367 [PORT_B] = DVO_PORT_DPB, 2368 [PORT_C] = DVO_PORT_DPC, 2369 [PORT_D] = DVO_PORT_DPD, 2370 [PORT_E] = DVO_PORT_DPE, 2371 [PORT_F] = DVO_PORT_DPF, 2372 }; 2373 2374 if (HAS_DDI(dev_priv)) 2375 return dev_priv->vbt.ddi_port_info[port].supports_edp; 2376 2377 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2378 child = &devdata->child; 2379 2380 if (child->dvo_port == port_mapping[port] && 2381 (child->device_type & DEVICE_TYPE_eDP_BITS) == 2382 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) 2383 return true; 2384 } 2385 2386 return false; 2387 } 2388 2389 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, 2390 enum port port) 2391 { 2392 static const struct { 2393 u16 dp, hdmi; 2394 } port_mapping[] = { 2395 /* 2396 * Buggy VBTs may declare DP ports as having 2397 * HDMI type dvo_port :( So let's check both. 2398 */ 2399 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, 2400 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, 2401 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, 2402 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, 2403 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, }, 2404 }; 2405 2406 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) 2407 return false; 2408 2409 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != 2410 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) 2411 return false; 2412 2413 if (child->dvo_port == port_mapping[port].dp) 2414 return true; 2415 2416 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 2417 if (child->dvo_port == port_mapping[port].hdmi && 2418 child->aux_channel != 0) 2419 return true; 2420 2421 return false; 2422 } 2423 2424 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, 2425 enum port port) 2426 { 2427 const struct display_device_data *devdata; 2428 2429 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2430 if (child_dev_is_dp_dual_mode(&devdata->child, port)) 2431 return true; 2432 } 2433 2434 return false; 2435 } 2436 2437 /** 2438 * intel_bios_is_dsi_present - is DSI present in VBT 2439 * @dev_priv: i915 device instance 2440 * @port: port for DSI if present 2441 * 2442 * Return true if DSI is present, and return the port in %port. 2443 */ 2444 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, 2445 enum port *port) 2446 { 2447 const struct display_device_data *devdata; 2448 const struct child_device_config *child; 2449 u8 dvo_port; 2450 2451 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) { 2452 child = &devdata->child; 2453 2454 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2455 continue; 2456 2457 dvo_port = child->dvo_port; 2458 2459 if (dvo_port == DVO_PORT_MIPIA || 2460 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) || 2461 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) { 2462 if (port) 2463 *port = dvo_port - DVO_PORT_MIPIA; 2464 return true; 2465 } else if (dvo_port == DVO_PORT_MIPIB || 2466 dvo_port == DVO_PORT_MIPIC || 2467 dvo_port == DVO_PORT_MIPID) { 2468 drm_dbg_kms(&dev_priv->drm, 2469 "VBT has unsupported DSI port %c\n", 2470 port_name(dvo_port - DVO_PORT_MIPIA)); 2471 } 2472 } 2473 2474 return false; 2475 } 2476 2477 static void fill_dsc(struct intel_crtc_state *crtc_state, 2478 struct dsc_compression_parameters_entry *dsc, 2479 int dsc_max_bpc) 2480 { 2481 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 2482 int bpc = 8; 2483 2484 vdsc_cfg->dsc_version_major = dsc->version_major; 2485 vdsc_cfg->dsc_version_minor = dsc->version_minor; 2486 2487 if (dsc->support_12bpc && dsc_max_bpc >= 12) 2488 bpc = 12; 2489 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 2490 bpc = 10; 2491 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 2492 bpc = 8; 2493 else 2494 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 2495 dsc_max_bpc); 2496 2497 crtc_state->pipe_bpp = bpc * 3; 2498 2499 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 2500 VBT_DSC_MAX_BPP(dsc->max_bpp)); 2501 2502 /* 2503 * FIXME: This is ugly, and slice count should take DSC engine 2504 * throughput etc. into account. 2505 * 2506 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 2507 */ 2508 if (dsc->slices_per_line & BIT(2)) { 2509 crtc_state->dsc.slice_count = 4; 2510 } else if (dsc->slices_per_line & BIT(1)) { 2511 crtc_state->dsc.slice_count = 2; 2512 } else { 2513 /* FIXME */ 2514 if (!(dsc->slices_per_line & BIT(0))) 2515 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 2516 2517 crtc_state->dsc.slice_count = 1; 2518 } 2519 2520 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 2521 crtc_state->dsc.slice_count != 0) 2522 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 2523 crtc_state->hw.adjusted_mode.crtc_hdisplay, 2524 crtc_state->dsc.slice_count); 2525 2526 /* 2527 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the 2528 * implementation specific physical rate buffer size. Currently we use 2529 * the required rate buffer model size calculated in 2530 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E. 2531 * 2532 * The VBT rc_buffer_block_size and rc_buffer_size definitions 2533 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC 2534 * implementation should also use the DPCD (or perhaps VBT for eDP) 2535 * provided value for the buffer size. 2536 */ 2537 2538 /* FIXME: DSI spec says bpc + 1 for this one */ 2539 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 2540 2541 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 2542 2543 vdsc_cfg->slice_height = dsc->slice_height; 2544 } 2545 2546 /* FIXME: initially DSI specific */ 2547 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 2548 struct intel_crtc_state *crtc_state, 2549 int dsc_max_bpc) 2550 { 2551 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2552 const struct display_device_data *devdata; 2553 const struct child_device_config *child; 2554 2555 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 2556 child = &devdata->child; 2557 2558 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 2559 continue; 2560 2561 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 2562 if (!devdata->dsc) 2563 return false; 2564 2565 if (crtc_state) 2566 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 2567 2568 return true; 2569 } 2570 } 2571 2572 return false; 2573 } 2574 2575 /** 2576 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 2577 * @i915: i915 device instance 2578 * @port: port to check 2579 * 2580 * Return true if HPD should be inverted for %port. 2581 */ 2582 bool 2583 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 2584 enum port port) 2585 { 2586 const struct child_device_config *child = 2587 i915->vbt.ddi_port_info[port].child; 2588 2589 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915))) 2590 return false; 2591 2592 return child && child->hpd_invert; 2593 } 2594 2595 /** 2596 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 2597 * @i915: i915 device instance 2598 * @port: port to check 2599 * 2600 * Return true if LSPCON is present on this port 2601 */ 2602 bool 2603 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 2604 enum port port) 2605 { 2606 const struct child_device_config *child = 2607 i915->vbt.ddi_port_info[port].child; 2608 2609 return HAS_LSPCON(i915) && child && child->lspcon; 2610 } 2611 2612 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, 2613 enum port port) 2614 { 2615 const struct ddi_vbt_port_info *info = 2616 &dev_priv->vbt.ddi_port_info[port]; 2617 enum aux_ch aux_ch; 2618 2619 if (!info->alternate_aux_channel) { 2620 aux_ch = (enum aux_ch)port; 2621 2622 drm_dbg_kms(&dev_priv->drm, 2623 "using AUX %c for port %c (platform default)\n", 2624 aux_ch_name(aux_ch), port_name(port)); 2625 return aux_ch; 2626 } 2627 2628 switch (info->alternate_aux_channel) { 2629 case DP_AUX_A: 2630 aux_ch = AUX_CH_A; 2631 break; 2632 case DP_AUX_B: 2633 aux_ch = AUX_CH_B; 2634 break; 2635 case DP_AUX_C: 2636 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C; 2637 break; 2638 case DP_AUX_D: 2639 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D; 2640 break; 2641 case DP_AUX_E: 2642 aux_ch = AUX_CH_E; 2643 break; 2644 case DP_AUX_F: 2645 aux_ch = AUX_CH_F; 2646 break; 2647 case DP_AUX_G: 2648 aux_ch = AUX_CH_G; 2649 break; 2650 default: 2651 MISSING_CASE(info->alternate_aux_channel); 2652 aux_ch = AUX_CH_A; 2653 break; 2654 } 2655 2656 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n", 2657 aux_ch_name(aux_ch), port_name(port)); 2658 2659 return aux_ch; 2660 } 2661 2662 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 2663 { 2664 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2665 2666 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock; 2667 } 2668 2669 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 2670 { 2671 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2672 const struct ddi_vbt_port_info *info = 2673 &i915->vbt.ddi_port_info[encoder->port]; 2674 2675 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1; 2676 } 2677 2678 int intel_bios_dp_boost_level(struct intel_encoder *encoder) 2679 { 2680 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2681 2682 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level; 2683 } 2684 2685 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder) 2686 { 2687 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2688 2689 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level; 2690 } 2691 2692 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 2693 { 2694 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2695 2696 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate; 2697 } 2698 2699 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 2700 { 2701 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 2702 2703 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin; 2704 } 2705 2706 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port) 2707 { 2708 return i915->vbt.ddi_port_info[port].supports_dvi; 2709 } 2710 2711 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port) 2712 { 2713 return i915->vbt.ddi_port_info[port].supports_hdmi; 2714 } 2715 2716 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port) 2717 { 2718 return i915->vbt.ddi_port_info[port].supports_dp; 2719 } 2720 2721 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, 2722 enum port port) 2723 { 2724 return i915->vbt.ddi_port_info[port].supports_typec_usb; 2725 } 2726 2727 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port) 2728 { 2729 return i915->vbt.ddi_port_info[port].supports_tbt; 2730 } 2731