1 /* 2 * Copyright © 2006 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * 26 */ 27 28 #include <drm/display/drm_dp_helper.h> 29 #include <drm/display/drm_dsc_helper.h> 30 31 #include "display/intel_display.h" 32 #include "display/intel_display_types.h" 33 #include "display/intel_gmbus.h" 34 35 #include "i915_drv.h" 36 #include "i915_reg.h" 37 38 #define _INTEL_BIOS_PRIVATE 39 #include "intel_vbt_defs.h" 40 41 /** 42 * DOC: Video BIOS Table (VBT) 43 * 44 * The Video BIOS Table, or VBT, provides platform and board specific 45 * configuration information to the driver that is not discoverable or available 46 * through other means. The configuration is mostly related to display 47 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in 48 * the PCI ROM. 49 * 50 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB 51 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that 52 * contain the actual configuration information. The VBT Header, and thus the 53 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the 54 * BDB Header. The data blocks are concatenated after the BDB Header. The data 55 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of 56 * data. (Block 53, the MIPI Sequence Block is an exception.) 57 * 58 * The driver parses the VBT during load. The relevant information is stored in 59 * driver private data for ease of use, and the actual VBT is not read after 60 * that. 61 */ 62 63 /* Wrapper for VBT child device config */ 64 struct intel_bios_encoder_data { 65 struct drm_i915_private *i915; 66 67 struct child_device_config child; 68 struct dsc_compression_parameters_entry *dsc; 69 struct list_head node; 70 }; 71 72 #define SLAVE_ADDR1 0x70 73 #define SLAVE_ADDR2 0x72 74 75 /* Get BDB block size given a pointer to Block ID. */ 76 static u32 _get_blocksize(const u8 *block_base) 77 { 78 /* The MIPI Sequence Block v3+ has a separate size field. */ 79 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) 80 return *((const u32 *)(block_base + 4)); 81 else 82 return *((const u16 *)(block_base + 1)); 83 } 84 85 /* Get BDB block size give a pointer to data after Block ID and Block Size. */ 86 static u32 get_blocksize(const void *block_data) 87 { 88 return _get_blocksize(block_data - 3); 89 } 90 91 static const void * 92 find_raw_section(const void *_bdb, enum bdb_block_id section_id) 93 { 94 const struct bdb_header *bdb = _bdb; 95 const u8 *base = _bdb; 96 int index = 0; 97 u32 total, current_size; 98 enum bdb_block_id current_id; 99 100 /* skip to first section */ 101 index += bdb->header_size; 102 total = bdb->bdb_size; 103 104 /* walk the sections looking for section_id */ 105 while (index + 3 < total) { 106 current_id = *(base + index); 107 current_size = _get_blocksize(base + index); 108 index += 3; 109 110 if (index + current_size > total) 111 return NULL; 112 113 if (current_id == section_id) 114 return base + index; 115 116 index += current_size; 117 } 118 119 return NULL; 120 } 121 122 /* 123 * Offset from the start of BDB to the start of the 124 * block data (just past the block header). 125 */ 126 static u32 block_offset(const void *bdb, enum bdb_block_id section_id) 127 { 128 const void *block; 129 130 block = find_raw_section(bdb, section_id); 131 if (!block) 132 return 0; 133 134 return block - bdb; 135 } 136 137 /* size of the block excluding the header */ 138 static u32 block_size(const void *bdb, enum bdb_block_id section_id) 139 { 140 const void *block; 141 142 block = find_raw_section(bdb, section_id); 143 if (!block) 144 return 0; 145 146 return get_blocksize(block); 147 } 148 149 struct bdb_block_entry { 150 struct list_head node; 151 enum bdb_block_id section_id; 152 u8 data[]; 153 }; 154 155 static const void * 156 find_section(struct drm_i915_private *i915, 157 enum bdb_block_id section_id) 158 { 159 struct bdb_block_entry *entry; 160 161 list_for_each_entry(entry, &i915->vbt.bdb_blocks, node) { 162 if (entry->section_id == section_id) 163 return entry->data + 3; 164 } 165 166 return NULL; 167 } 168 169 static const struct { 170 enum bdb_block_id section_id; 171 size_t min_size; 172 } bdb_blocks[] = { 173 { .section_id = BDB_GENERAL_FEATURES, 174 .min_size = sizeof(struct bdb_general_features), }, 175 { .section_id = BDB_GENERAL_DEFINITIONS, 176 .min_size = sizeof(struct bdb_general_definitions), }, 177 { .section_id = BDB_PSR, 178 .min_size = sizeof(struct bdb_psr), }, 179 { .section_id = BDB_DRIVER_FEATURES, 180 .min_size = sizeof(struct bdb_driver_features), }, 181 { .section_id = BDB_SDVO_LVDS_OPTIONS, 182 .min_size = sizeof(struct bdb_sdvo_lvds_options), }, 183 { .section_id = BDB_SDVO_PANEL_DTDS, 184 .min_size = sizeof(struct bdb_sdvo_panel_dtds), }, 185 { .section_id = BDB_EDP, 186 .min_size = sizeof(struct bdb_edp), }, 187 { .section_id = BDB_LVDS_OPTIONS, 188 .min_size = sizeof(struct bdb_lvds_options), }, 189 /* 190 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS, 191 * so keep the two ordered. 192 */ 193 { .section_id = BDB_LVDS_LFP_DATA_PTRS, 194 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), }, 195 { .section_id = BDB_LVDS_LFP_DATA, 196 .min_size = 0, /* special case */ }, 197 { .section_id = BDB_LVDS_BACKLIGHT, 198 .min_size = sizeof(struct bdb_lfp_backlight_data), }, 199 { .section_id = BDB_LFP_POWER, 200 .min_size = sizeof(struct bdb_lfp_power), }, 201 { .section_id = BDB_MIPI_CONFIG, 202 .min_size = sizeof(struct bdb_mipi_config), }, 203 { .section_id = BDB_MIPI_SEQUENCE, 204 .min_size = sizeof(struct bdb_mipi_sequence) }, 205 { .section_id = BDB_COMPRESSION_PARAMETERS, 206 .min_size = sizeof(struct bdb_compression_parameters), }, 207 { .section_id = BDB_GENERIC_DTD, 208 .min_size = sizeof(struct bdb_generic_dtd), }, 209 }; 210 211 static size_t lfp_data_min_size(struct drm_i915_private *i915) 212 { 213 const struct bdb_lvds_lfp_data_ptrs *ptrs; 214 size_t size; 215 216 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 217 if (!ptrs) 218 return 0; 219 220 size = sizeof(struct bdb_lvds_lfp_data); 221 if (ptrs->panel_name.table_size) 222 size = max(size, ptrs->panel_name.offset + 223 sizeof(struct bdb_lvds_lfp_data_tail)); 224 225 return size; 226 } 227 228 static bool validate_lfp_data_ptrs(const void *bdb, 229 const struct bdb_lvds_lfp_data_ptrs *ptrs) 230 { 231 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size; 232 int data_block_size, lfp_data_size; 233 int i; 234 235 data_block_size = block_size(bdb, BDB_LVDS_LFP_DATA); 236 if (data_block_size == 0) 237 return false; 238 239 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */ 240 if (ptrs->lvds_entries != 3) 241 return false; 242 243 fp_timing_size = ptrs->ptr[0].fp_timing.table_size; 244 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size; 245 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size; 246 panel_name_size = ptrs->panel_name.table_size; 247 248 /* fp_timing has variable size */ 249 if (fp_timing_size < 32 || 250 dvo_timing_size != sizeof(struct lvds_dvo_timing) || 251 panel_pnp_id_size != sizeof(struct lvds_pnp_id)) 252 return false; 253 254 /* panel_name is not present in old VBTs */ 255 if (panel_name_size != 0 && 256 panel_name_size != sizeof(struct lvds_lfp_panel_name)) 257 return false; 258 259 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset; 260 if (16 * lfp_data_size > data_block_size) 261 return false; 262 263 /* 264 * Except for vlv/chv machines all real VBTs seem to have 6 265 * unaccounted bytes in the fp_timing table. And it doesn't 266 * appear to be a really intentional hole as the fp_timing 267 * 0xffff terminator is always within those 6 missing bytes. 268 */ 269 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size && 270 fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size != lfp_data_size) 271 return false; 272 273 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size > ptrs->ptr[0].dvo_timing.offset || 274 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset || 275 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size) 276 return false; 277 278 /* make sure the table entries have uniform size */ 279 for (i = 1; i < 16; i++) { 280 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size || 281 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size || 282 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size) 283 return false; 284 285 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size || 286 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size || 287 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size) 288 return false; 289 } 290 291 /* make sure the tables fit inside the data block */ 292 for (i = 0; i < 16; i++) { 293 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size || 294 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size || 295 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size) 296 return false; 297 } 298 299 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size) 300 return false; 301 302 return true; 303 } 304 305 /* make the data table offsets relative to the data block */ 306 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block) 307 { 308 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block; 309 u32 offset; 310 int i; 311 312 offset = block_offset(bdb, BDB_LVDS_LFP_DATA); 313 314 for (i = 0; i < 16; i++) { 315 if (ptrs->ptr[i].fp_timing.offset < offset || 316 ptrs->ptr[i].dvo_timing.offset < offset || 317 ptrs->ptr[i].panel_pnp_id.offset < offset) 318 return false; 319 320 ptrs->ptr[i].fp_timing.offset -= offset; 321 ptrs->ptr[i].dvo_timing.offset -= offset; 322 ptrs->ptr[i].panel_pnp_id.offset -= offset; 323 } 324 325 if (ptrs->panel_name.table_size) { 326 if (ptrs->panel_name.offset < offset) 327 return false; 328 329 ptrs->panel_name.offset -= offset; 330 } 331 332 return validate_lfp_data_ptrs(bdb, ptrs); 333 } 334 335 static const void *find_fp_timing_terminator(const u8 *data, int size) 336 { 337 int i; 338 339 for (i = 0; i < size - 1; i++) { 340 if (data[i] == 0xff && data[i+1] == 0xff) 341 return &data[i]; 342 } 343 344 return NULL; 345 } 346 347 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table, 348 int table_size, int total_size) 349 { 350 if (total_size < table_size) 351 return total_size; 352 353 table->table_size = table_size; 354 table->offset = total_size - table_size; 355 356 return total_size - table_size; 357 } 358 359 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next, 360 const struct lvds_lfp_data_ptr_table *prev, 361 int size) 362 { 363 next->table_size = prev->table_size; 364 next->offset = prev->offset + size; 365 } 366 367 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915, 368 const void *bdb) 369 { 370 int i, size, table_size, block_size, offset; 371 const void *t0, *t1, *block; 372 struct bdb_lvds_lfp_data_ptrs *ptrs; 373 void *ptrs_block; 374 375 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA); 376 if (!block) 377 return NULL; 378 379 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); 380 381 block_size = get_blocksize(block); 382 383 size = block_size; 384 t0 = find_fp_timing_terminator(block, size); 385 if (!t0) 386 return NULL; 387 388 size -= t0 - block - 2; 389 t1 = find_fp_timing_terminator(t0 + 2, size); 390 if (!t1) 391 return NULL; 392 393 size = t1 - t0; 394 if (size * 16 > block_size) 395 return NULL; 396 397 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL); 398 if (!ptrs_block) 399 return NULL; 400 401 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS; 402 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs); 403 ptrs = ptrs_block + 3; 404 405 table_size = sizeof(struct lvds_pnp_id); 406 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size); 407 408 table_size = sizeof(struct lvds_dvo_timing); 409 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size); 410 411 table_size = t0 - block + 2; 412 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size); 413 414 if (ptrs->ptr[0].fp_timing.table_size) 415 ptrs->lvds_entries++; 416 if (ptrs->ptr[0].dvo_timing.table_size) 417 ptrs->lvds_entries++; 418 if (ptrs->ptr[0].panel_pnp_id.table_size) 419 ptrs->lvds_entries++; 420 421 if (size != 0 || ptrs->lvds_entries != 3) { 422 kfree(ptrs); 423 return NULL; 424 } 425 426 size = t1 - t0; 427 for (i = 1; i < 16; i++) { 428 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size); 429 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size); 430 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size); 431 } 432 433 size = t1 - t0; 434 table_size = sizeof(struct lvds_lfp_panel_name); 435 436 if (16 * (size + table_size) <= block_size) { 437 ptrs->panel_name.table_size = table_size; 438 ptrs->panel_name.offset = size * 16; 439 } 440 441 offset = block - bdb; 442 443 for (i = 0; i < 16; i++) { 444 ptrs->ptr[i].fp_timing.offset += offset; 445 ptrs->ptr[i].dvo_timing.offset += offset; 446 ptrs->ptr[i].panel_pnp_id.offset += offset; 447 } 448 449 if (ptrs->panel_name.table_size) 450 ptrs->panel_name.offset += offset; 451 452 return ptrs_block; 453 } 454 455 static void 456 init_bdb_block(struct drm_i915_private *i915, 457 const void *bdb, enum bdb_block_id section_id, 458 size_t min_size) 459 { 460 struct bdb_block_entry *entry; 461 void *temp_block = NULL; 462 const void *block; 463 size_t block_size; 464 465 block = find_raw_section(bdb, section_id); 466 467 /* Modern VBTs lack the LFP data table pointers block, make one up */ 468 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) { 469 temp_block = generate_lfp_data_ptrs(i915, bdb); 470 if (temp_block) 471 block = temp_block + 3; 472 } 473 if (!block) 474 return; 475 476 drm_WARN(&i915->drm, min_size == 0, 477 "Block %d min_size is zero\n", section_id); 478 479 block_size = get_blocksize(block); 480 481 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3), 482 GFP_KERNEL); 483 if (!entry) { 484 kfree(temp_block); 485 return; 486 } 487 488 entry->section_id = section_id; 489 memcpy(entry->data, block - 3, block_size + 3); 490 491 kfree(temp_block); 492 493 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", 494 section_id, block_size, min_size); 495 496 if (section_id == BDB_LVDS_LFP_DATA_PTRS && 497 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) { 498 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n"); 499 kfree(entry); 500 return; 501 } 502 503 list_add_tail(&entry->node, &i915->vbt.bdb_blocks); 504 } 505 506 static void init_bdb_blocks(struct drm_i915_private *i915, 507 const void *bdb) 508 { 509 int i; 510 511 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) { 512 enum bdb_block_id section_id = bdb_blocks[i].section_id; 513 size_t min_size = bdb_blocks[i].min_size; 514 515 if (section_id == BDB_LVDS_LFP_DATA) 516 min_size = lfp_data_min_size(i915); 517 518 init_bdb_block(i915, bdb, section_id, min_size); 519 } 520 } 521 522 static void 523 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 524 const struct lvds_dvo_timing *dvo_timing) 525 { 526 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | 527 dvo_timing->hactive_lo; 528 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + 529 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); 530 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + 531 ((dvo_timing->hsync_pulse_width_hi << 8) | 532 dvo_timing->hsync_pulse_width_lo); 533 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + 534 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); 535 536 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | 537 dvo_timing->vactive_lo; 538 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + 539 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); 540 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + 541 ((dvo_timing->vsync_pulse_width_hi << 4) | 542 dvo_timing->vsync_pulse_width_lo); 543 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + 544 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); 545 panel_fixed_mode->clock = dvo_timing->clock * 10; 546 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 547 548 if (dvo_timing->hsync_positive) 549 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 550 else 551 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 552 553 if (dvo_timing->vsync_positive) 554 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 555 else 556 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 557 558 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | 559 dvo_timing->himage_lo; 560 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | 561 dvo_timing->vimage_lo; 562 563 /* Some VBTs have bogus h/vtotal values */ 564 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) 565 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; 566 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) 567 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; 568 569 drm_mode_set_name(panel_fixed_mode); 570 } 571 572 static const struct lvds_dvo_timing * 573 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data, 574 const struct bdb_lvds_lfp_data_ptrs *ptrs, 575 int index) 576 { 577 return (const void *)data + ptrs->ptr[index].dvo_timing.offset; 578 } 579 580 static const struct lvds_fp_timing * 581 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data, 582 const struct bdb_lvds_lfp_data_ptrs *ptrs, 583 int index) 584 { 585 return (const void *)data + ptrs->ptr[index].fp_timing.offset; 586 } 587 588 static const struct bdb_lvds_lfp_data_tail * 589 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data, 590 const struct bdb_lvds_lfp_data_ptrs *ptrs) 591 { 592 if (ptrs->panel_name.table_size) 593 return (const void *)data + ptrs->panel_name.offset; 594 else 595 return NULL; 596 } 597 598 static int opregion_get_panel_type(struct drm_i915_private *i915) 599 { 600 return intel_opregion_get_panel_type(i915); 601 } 602 603 static int vbt_get_panel_type(struct drm_i915_private *i915) 604 { 605 const struct bdb_lvds_options *lvds_options; 606 607 lvds_options = find_section(i915, BDB_LVDS_OPTIONS); 608 if (!lvds_options) 609 return -1; 610 611 if (lvds_options->panel_type > 0xf) { 612 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n", 613 lvds_options->panel_type); 614 return -1; 615 } 616 617 return lvds_options->panel_type; 618 } 619 620 static int fallback_get_panel_type(struct drm_i915_private *i915) 621 { 622 return 0; 623 } 624 625 enum panel_type { 626 PANEL_TYPE_OPREGION, 627 PANEL_TYPE_VBT, 628 PANEL_TYPE_FALLBACK, 629 }; 630 631 static int get_panel_type(struct drm_i915_private *i915) 632 { 633 struct { 634 const char *name; 635 int (*get_panel_type)(struct drm_i915_private *i915); 636 int panel_type; 637 } panel_types[] = { 638 [PANEL_TYPE_OPREGION] = { 639 .name = "OpRegion", 640 .get_panel_type = opregion_get_panel_type, 641 }, 642 [PANEL_TYPE_VBT] = { 643 .name = "VBT", 644 .get_panel_type = vbt_get_panel_type, 645 }, 646 [PANEL_TYPE_FALLBACK] = { 647 .name = "fallback", 648 .get_panel_type = fallback_get_panel_type, 649 }, 650 }; 651 int i; 652 653 for (i = 0; i < ARRAY_SIZE(panel_types); i++) { 654 panel_types[i].panel_type = panel_types[i].get_panel_type(i915); 655 656 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf); 657 658 if (panel_types[i].panel_type >= 0) 659 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n", 660 panel_types[i].name, panel_types[i].panel_type); 661 } 662 663 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0) 664 i = PANEL_TYPE_OPREGION; 665 else if (panel_types[PANEL_TYPE_VBT].panel_type >= 0) 666 i = PANEL_TYPE_VBT; 667 else 668 i = PANEL_TYPE_FALLBACK; 669 670 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n", 671 panel_types[i].name, panel_types[i].panel_type); 672 673 return panel_types[i].panel_type; 674 } 675 676 /* Parse general panel options */ 677 static void 678 parse_panel_options(struct drm_i915_private *i915) 679 { 680 const struct bdb_lvds_options *lvds_options; 681 int panel_type; 682 int drrs_mode; 683 684 lvds_options = find_section(i915, BDB_LVDS_OPTIONS); 685 if (!lvds_options) 686 return; 687 688 i915->vbt.lvds_dither = lvds_options->pixel_dither; 689 690 panel_type = get_panel_type(i915); 691 692 i915->vbt.panel_type = panel_type; 693 694 drrs_mode = (lvds_options->dps_panel_type_bits 695 >> (panel_type * 2)) & MODE_MASK; 696 /* 697 * VBT has static DRRS = 0 and seamless DRRS = 2. 698 * The below piece of code is required to adjust vbt.drrs_type 699 * to match the enum drrs_support_type. 700 */ 701 switch (drrs_mode) { 702 case 0: 703 i915->vbt.drrs_type = DRRS_TYPE_STATIC; 704 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); 705 break; 706 case 2: 707 i915->vbt.drrs_type = DRRS_TYPE_SEAMLESS; 708 drm_dbg_kms(&i915->drm, 709 "DRRS supported mode is seamless\n"); 710 break; 711 default: 712 i915->vbt.drrs_type = DRRS_TYPE_NONE; 713 drm_dbg_kms(&i915->drm, 714 "DRRS not supported (VBT input)\n"); 715 break; 716 } 717 } 718 719 static void 720 parse_lfp_panel_dtd(struct drm_i915_private *i915, 721 const struct bdb_lvds_lfp_data *lvds_lfp_data, 722 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs) 723 { 724 const struct lvds_dvo_timing *panel_dvo_timing; 725 const struct lvds_fp_timing *fp_timing; 726 struct drm_display_mode *panel_fixed_mode; 727 int panel_type = i915->vbt.panel_type; 728 729 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, 730 lvds_lfp_data_ptrs, 731 panel_type); 732 733 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 734 if (!panel_fixed_mode) 735 return; 736 737 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); 738 739 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 740 741 drm_dbg_kms(&i915->drm, 742 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n", 743 DRM_MODE_ARG(panel_fixed_mode)); 744 745 fp_timing = get_lvds_fp_timing(lvds_lfp_data, 746 lvds_lfp_data_ptrs, 747 panel_type); 748 749 /* check the resolution, just to be sure */ 750 if (fp_timing->x_res == panel_fixed_mode->hdisplay && 751 fp_timing->y_res == panel_fixed_mode->vdisplay) { 752 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val; 753 drm_dbg_kms(&i915->drm, 754 "VBT initial LVDS value %x\n", 755 i915->vbt.bios_lvds_val); 756 } 757 } 758 759 static void 760 parse_lfp_data(struct drm_i915_private *i915) 761 { 762 const struct bdb_lvds_lfp_data *data; 763 const struct bdb_lvds_lfp_data_tail *tail; 764 const struct bdb_lvds_lfp_data_ptrs *ptrs; 765 int panel_type = i915->vbt.panel_type; 766 767 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS); 768 if (!ptrs) 769 return; 770 771 data = find_section(i915, BDB_LVDS_LFP_DATA); 772 if (!data) 773 return; 774 775 if (!i915->vbt.lfp_lvds_vbt_mode) 776 parse_lfp_panel_dtd(i915, data, ptrs); 777 778 tail = get_lfp_data_tail(data, ptrs); 779 if (!tail) 780 return; 781 782 if (i915->vbt.version >= 188) { 783 i915->vbt.seamless_drrs_min_refresh_rate = 784 tail->seamless_drrs_min_refresh_rate[panel_type]; 785 drm_dbg_kms(&i915->drm, 786 "Seamless DRRS min refresh rate: %d Hz\n", 787 i915->vbt.seamless_drrs_min_refresh_rate); 788 } 789 } 790 791 static void 792 parse_generic_dtd(struct drm_i915_private *i915) 793 { 794 const struct bdb_generic_dtd *generic_dtd; 795 const struct generic_dtd_entry *dtd; 796 struct drm_display_mode *panel_fixed_mode; 797 int num_dtd; 798 799 /* 800 * Older VBTs provided DTD information for internal displays through 801 * the "LFP panel tables" block (42). As of VBT revision 229 the 802 * DTD information should be provided via a newer "generic DTD" 803 * block (58). Just to be safe, we'll try the new generic DTD block 804 * first on VBT >= 229, but still fall back to trying the old LFP 805 * block if that fails. 806 */ 807 if (i915->vbt.version < 229) 808 return; 809 810 generic_dtd = find_section(i915, BDB_GENERIC_DTD); 811 if (!generic_dtd) 812 return; 813 814 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) { 815 drm_err(&i915->drm, "GDTD size %u is too small.\n", 816 generic_dtd->gdtd_size); 817 return; 818 } else if (generic_dtd->gdtd_size != 819 sizeof(struct generic_dtd_entry)) { 820 drm_err(&i915->drm, "Unexpected GDTD size %u\n", 821 generic_dtd->gdtd_size); 822 /* DTD has unknown fields, but keep going */ 823 } 824 825 num_dtd = (get_blocksize(generic_dtd) - 826 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size; 827 if (i915->vbt.panel_type >= num_dtd) { 828 drm_err(&i915->drm, 829 "Panel type %d not found in table of %d DTD's\n", 830 i915->vbt.panel_type, num_dtd); 831 return; 832 } 833 834 dtd = &generic_dtd->dtd[i915->vbt.panel_type]; 835 836 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 837 if (!panel_fixed_mode) 838 return; 839 840 panel_fixed_mode->hdisplay = dtd->hactive; 841 panel_fixed_mode->hsync_start = 842 panel_fixed_mode->hdisplay + dtd->hfront_porch; 843 panel_fixed_mode->hsync_end = 844 panel_fixed_mode->hsync_start + dtd->hsync; 845 panel_fixed_mode->htotal = 846 panel_fixed_mode->hdisplay + dtd->hblank; 847 848 panel_fixed_mode->vdisplay = dtd->vactive; 849 panel_fixed_mode->vsync_start = 850 panel_fixed_mode->vdisplay + dtd->vfront_porch; 851 panel_fixed_mode->vsync_end = 852 panel_fixed_mode->vsync_start + dtd->vsync; 853 panel_fixed_mode->vtotal = 854 panel_fixed_mode->vdisplay + dtd->vblank; 855 856 panel_fixed_mode->clock = dtd->pixel_clock; 857 panel_fixed_mode->width_mm = dtd->width_mm; 858 panel_fixed_mode->height_mm = dtd->height_mm; 859 860 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; 861 drm_mode_set_name(panel_fixed_mode); 862 863 if (dtd->hsync_positive_polarity) 864 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; 865 else 866 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; 867 868 if (dtd->vsync_positive_polarity) 869 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; 870 else 871 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; 872 873 drm_dbg_kms(&i915->drm, 874 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n", 875 DRM_MODE_ARG(panel_fixed_mode)); 876 877 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; 878 } 879 880 static void 881 parse_lfp_backlight(struct drm_i915_private *i915) 882 { 883 const struct bdb_lfp_backlight_data *backlight_data; 884 const struct lfp_backlight_data_entry *entry; 885 int panel_type = i915->vbt.panel_type; 886 u16 level; 887 888 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT); 889 if (!backlight_data) 890 return; 891 892 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { 893 drm_dbg_kms(&i915->drm, 894 "Unsupported backlight data entry size %u\n", 895 backlight_data->entry_size); 896 return; 897 } 898 899 entry = &backlight_data->data[panel_type]; 900 901 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; 902 if (!i915->vbt.backlight.present) { 903 drm_dbg_kms(&i915->drm, 904 "PWM backlight not present in VBT (type %u)\n", 905 entry->type); 906 return; 907 } 908 909 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; 910 if (i915->vbt.version >= 191) { 911 size_t exp_size; 912 913 if (i915->vbt.version >= 236) 914 exp_size = sizeof(struct bdb_lfp_backlight_data); 915 else if (i915->vbt.version >= 234) 916 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234; 917 else 918 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191; 919 920 if (get_blocksize(backlight_data) >= exp_size) { 921 const struct lfp_backlight_control_method *method; 922 923 method = &backlight_data->backlight_control[panel_type]; 924 i915->vbt.backlight.type = method->type; 925 i915->vbt.backlight.controller = method->controller; 926 } 927 } 928 929 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; 930 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm; 931 932 if (i915->vbt.version >= 234) { 933 u16 min_level; 934 bool scale; 935 936 level = backlight_data->brightness_level[panel_type].level; 937 min_level = backlight_data->brightness_min_level[panel_type].level; 938 939 if (i915->vbt.version >= 236) 940 scale = backlight_data->brightness_precision_bits[panel_type] == 16; 941 else 942 scale = level > 255; 943 944 if (scale) 945 min_level = min_level / 255; 946 947 if (min_level > 255) { 948 drm_warn(&i915->drm, "Brightness min level > 255\n"); 949 level = 255; 950 } 951 i915->vbt.backlight.min_brightness = min_level; 952 953 i915->vbt.backlight.brightness_precision_bits = 954 backlight_data->brightness_precision_bits[panel_type]; 955 } else { 956 level = backlight_data->level[panel_type]; 957 i915->vbt.backlight.min_brightness = entry->min_brightness; 958 } 959 960 drm_dbg_kms(&i915->drm, 961 "VBT backlight PWM modulation frequency %u Hz, " 962 "active %s, min brightness %u, level %u, controller %u\n", 963 i915->vbt.backlight.pwm_freq_hz, 964 i915->vbt.backlight.active_low_pwm ? "low" : "high", 965 i915->vbt.backlight.min_brightness, 966 level, 967 i915->vbt.backlight.controller); 968 } 969 970 /* Try to find sdvo panel data */ 971 static void 972 parse_sdvo_panel_data(struct drm_i915_private *i915) 973 { 974 const struct bdb_sdvo_panel_dtds *dtds; 975 struct drm_display_mode *panel_fixed_mode; 976 int index; 977 978 index = i915->params.vbt_sdvo_panel_type; 979 if (index == -2) { 980 drm_dbg_kms(&i915->drm, 981 "Ignore SDVO panel mode from BIOS VBT tables.\n"); 982 return; 983 } 984 985 if (index == -1) { 986 const struct bdb_sdvo_lvds_options *sdvo_lvds_options; 987 988 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS); 989 if (!sdvo_lvds_options) 990 return; 991 992 index = sdvo_lvds_options->panel_type; 993 } 994 995 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS); 996 if (!dtds) 997 return; 998 999 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 1000 if (!panel_fixed_mode) 1001 return; 1002 1003 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]); 1004 1005 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; 1006 1007 drm_dbg_kms(&i915->drm, 1008 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n", 1009 DRM_MODE_ARG(panel_fixed_mode)); 1010 } 1011 1012 static int intel_bios_ssc_frequency(struct drm_i915_private *i915, 1013 bool alternate) 1014 { 1015 switch (DISPLAY_VER(i915)) { 1016 case 2: 1017 return alternate ? 66667 : 48000; 1018 case 3: 1019 case 4: 1020 return alternate ? 100000 : 96000; 1021 default: 1022 return alternate ? 100000 : 120000; 1023 } 1024 } 1025 1026 static void 1027 parse_general_features(struct drm_i915_private *i915) 1028 { 1029 const struct bdb_general_features *general; 1030 1031 general = find_section(i915, BDB_GENERAL_FEATURES); 1032 if (!general) 1033 return; 1034 1035 i915->vbt.int_tv_support = general->int_tv_support; 1036 /* int_crt_support can't be trusted on earlier platforms */ 1037 if (i915->vbt.version >= 155 && 1038 (HAS_DDI(i915) || IS_VALLEYVIEW(i915))) 1039 i915->vbt.int_crt_support = general->int_crt_support; 1040 i915->vbt.lvds_use_ssc = general->enable_ssc; 1041 i915->vbt.lvds_ssc_freq = 1042 intel_bios_ssc_frequency(i915, general->ssc_freq); 1043 i915->vbt.display_clock_mode = general->display_clock_mode; 1044 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; 1045 if (i915->vbt.version >= 181) { 1046 i915->vbt.orientation = general->rotate_180 ? 1047 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP : 1048 DRM_MODE_PANEL_ORIENTATION_NORMAL; 1049 } else { 1050 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1051 } 1052 1053 if (i915->vbt.version >= 249 && general->afc_startup_config) { 1054 i915->vbt.override_afc_startup = true; 1055 i915->vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7; 1056 } 1057 1058 drm_dbg_kms(&i915->drm, 1059 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", 1060 i915->vbt.int_tv_support, 1061 i915->vbt.int_crt_support, 1062 i915->vbt.lvds_use_ssc, 1063 i915->vbt.lvds_ssc_freq, 1064 i915->vbt.display_clock_mode, 1065 i915->vbt.fdi_rx_polarity_inverted); 1066 } 1067 1068 static const struct child_device_config * 1069 child_device_ptr(const struct bdb_general_definitions *defs, int i) 1070 { 1071 return (const void *) &defs->devices[i * defs->child_dev_size]; 1072 } 1073 1074 static void 1075 parse_sdvo_device_mapping(struct drm_i915_private *i915) 1076 { 1077 struct sdvo_device_mapping *mapping; 1078 const struct intel_bios_encoder_data *devdata; 1079 const struct child_device_config *child; 1080 int count = 0; 1081 1082 /* 1083 * Only parse SDVO mappings on gens that could have SDVO. This isn't 1084 * accurate and doesn't have to be, as long as it's not too strict. 1085 */ 1086 if (!IS_DISPLAY_VER(i915, 3, 7)) { 1087 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n"); 1088 return; 1089 } 1090 1091 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1092 child = &devdata->child; 1093 1094 if (child->slave_addr != SLAVE_ADDR1 && 1095 child->slave_addr != SLAVE_ADDR2) { 1096 /* 1097 * If the slave address is neither 0x70 nor 0x72, 1098 * it is not a SDVO device. Skip it. 1099 */ 1100 continue; 1101 } 1102 if (child->dvo_port != DEVICE_PORT_DVOB && 1103 child->dvo_port != DEVICE_PORT_DVOC) { 1104 /* skip the incorrect SDVO port */ 1105 drm_dbg_kms(&i915->drm, 1106 "Incorrect SDVO port. Skip it\n"); 1107 continue; 1108 } 1109 drm_dbg_kms(&i915->drm, 1110 "the SDVO device with slave addr %2x is found on" 1111 " %s port\n", 1112 child->slave_addr, 1113 (child->dvo_port == DEVICE_PORT_DVOB) ? 1114 "SDVOB" : "SDVOC"); 1115 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1]; 1116 if (!mapping->initialized) { 1117 mapping->dvo_port = child->dvo_port; 1118 mapping->slave_addr = child->slave_addr; 1119 mapping->dvo_wiring = child->dvo_wiring; 1120 mapping->ddc_pin = child->ddc_pin; 1121 mapping->i2c_pin = child->i2c_pin; 1122 mapping->initialized = 1; 1123 drm_dbg_kms(&i915->drm, 1124 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", 1125 mapping->dvo_port, mapping->slave_addr, 1126 mapping->dvo_wiring, mapping->ddc_pin, 1127 mapping->i2c_pin); 1128 } else { 1129 drm_dbg_kms(&i915->drm, 1130 "Maybe one SDVO port is shared by " 1131 "two SDVO device.\n"); 1132 } 1133 if (child->slave2_addr) { 1134 /* Maybe this is a SDVO device with multiple inputs */ 1135 /* And the mapping info is not added */ 1136 drm_dbg_kms(&i915->drm, 1137 "there exists the slave2_addr. Maybe this" 1138 " is a SDVO device with multiple inputs.\n"); 1139 } 1140 count++; 1141 } 1142 1143 if (!count) { 1144 /* No SDVO device info is found */ 1145 drm_dbg_kms(&i915->drm, 1146 "No SDVO device info is found in VBT\n"); 1147 } 1148 } 1149 1150 static void 1151 parse_driver_features(struct drm_i915_private *i915) 1152 { 1153 const struct bdb_driver_features *driver; 1154 1155 driver = find_section(i915, BDB_DRIVER_FEATURES); 1156 if (!driver) 1157 return; 1158 1159 if (DISPLAY_VER(i915) >= 5) { 1160 /* 1161 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS 1162 * to mean "eDP". The VBT spec doesn't agree with that 1163 * interpretation, but real world VBTs seem to. 1164 */ 1165 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS) 1166 i915->vbt.int_lvds_support = 0; 1167 } else { 1168 /* 1169 * FIXME it's not clear which BDB version has the LVDS config 1170 * bits defined. Revision history in the VBT spec says: 1171 * "0.92 | Add two definitions for VBT value of LVDS Active 1172 * Config (00b and 11b values defined) | 06/13/2005" 1173 * but does not the specify the BDB version. 1174 * 1175 * So far version 134 (on i945gm) is the oldest VBT observed 1176 * in the wild with the bits correctly populated. Version 1177 * 108 (on i85x) does not have the bits correctly populated. 1178 */ 1179 if (i915->vbt.version >= 134 && 1180 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS && 1181 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS) 1182 i915->vbt.int_lvds_support = 0; 1183 } 1184 1185 if (i915->vbt.version < 228) { 1186 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n", 1187 driver->drrs_enabled); 1188 /* 1189 * If DRRS is not supported, drrs_type has to be set to 0. 1190 * This is because, VBT is configured in such a way that 1191 * static DRRS is 0 and DRRS not supported is represented by 1192 * driver->drrs_enabled=false 1193 */ 1194 if (!driver->drrs_enabled) 1195 i915->vbt.drrs_type = DRRS_TYPE_NONE; 1196 1197 i915->vbt.psr.enable = driver->psr_enabled; 1198 } 1199 } 1200 1201 static void 1202 parse_power_conservation_features(struct drm_i915_private *i915) 1203 { 1204 const struct bdb_lfp_power *power; 1205 u8 panel_type = i915->vbt.panel_type; 1206 1207 if (i915->vbt.version < 228) 1208 return; 1209 1210 power = find_section(i915, BDB_LFP_POWER); 1211 if (!power) 1212 return; 1213 1214 i915->vbt.psr.enable = power->psr & BIT(panel_type); 1215 1216 /* 1217 * If DRRS is not supported, drrs_type has to be set to 0. 1218 * This is because, VBT is configured in such a way that 1219 * static DRRS is 0 and DRRS not supported is represented by 1220 * power->drrs & BIT(panel_type)=false 1221 */ 1222 if (!(power->drrs & BIT(panel_type))) 1223 i915->vbt.drrs_type = DRRS_TYPE_NONE; 1224 1225 if (i915->vbt.version >= 232) 1226 i915->vbt.edp.hobl = power->hobl & BIT(panel_type); 1227 } 1228 1229 static void 1230 parse_edp(struct drm_i915_private *i915) 1231 { 1232 const struct bdb_edp *edp; 1233 const struct edp_power_seq *edp_pps; 1234 const struct edp_fast_link_params *edp_link_params; 1235 int panel_type = i915->vbt.panel_type; 1236 1237 edp = find_section(i915, BDB_EDP); 1238 if (!edp) 1239 return; 1240 1241 switch ((edp->color_depth >> (panel_type * 2)) & 3) { 1242 case EDP_18BPP: 1243 i915->vbt.edp.bpp = 18; 1244 break; 1245 case EDP_24BPP: 1246 i915->vbt.edp.bpp = 24; 1247 break; 1248 case EDP_30BPP: 1249 i915->vbt.edp.bpp = 30; 1250 break; 1251 } 1252 1253 /* Get the eDP sequencing and link info */ 1254 edp_pps = &edp->power_seqs[panel_type]; 1255 edp_link_params = &edp->fast_link_params[panel_type]; 1256 1257 i915->vbt.edp.pps = *edp_pps; 1258 1259 switch (edp_link_params->rate) { 1260 case EDP_RATE_1_62: 1261 i915->vbt.edp.rate = DP_LINK_BW_1_62; 1262 break; 1263 case EDP_RATE_2_7: 1264 i915->vbt.edp.rate = DP_LINK_BW_2_7; 1265 break; 1266 default: 1267 drm_dbg_kms(&i915->drm, 1268 "VBT has unknown eDP link rate value %u\n", 1269 edp_link_params->rate); 1270 break; 1271 } 1272 1273 switch (edp_link_params->lanes) { 1274 case EDP_LANE_1: 1275 i915->vbt.edp.lanes = 1; 1276 break; 1277 case EDP_LANE_2: 1278 i915->vbt.edp.lanes = 2; 1279 break; 1280 case EDP_LANE_4: 1281 i915->vbt.edp.lanes = 4; 1282 break; 1283 default: 1284 drm_dbg_kms(&i915->drm, 1285 "VBT has unknown eDP lane count value %u\n", 1286 edp_link_params->lanes); 1287 break; 1288 } 1289 1290 switch (edp_link_params->preemphasis) { 1291 case EDP_PREEMPHASIS_NONE: 1292 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; 1293 break; 1294 case EDP_PREEMPHASIS_3_5dB: 1295 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; 1296 break; 1297 case EDP_PREEMPHASIS_6dB: 1298 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; 1299 break; 1300 case EDP_PREEMPHASIS_9_5dB: 1301 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; 1302 break; 1303 default: 1304 drm_dbg_kms(&i915->drm, 1305 "VBT has unknown eDP pre-emphasis value %u\n", 1306 edp_link_params->preemphasis); 1307 break; 1308 } 1309 1310 switch (edp_link_params->vswing) { 1311 case EDP_VSWING_0_4V: 1312 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; 1313 break; 1314 case EDP_VSWING_0_6V: 1315 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; 1316 break; 1317 case EDP_VSWING_0_8V: 1318 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; 1319 break; 1320 case EDP_VSWING_1_2V: 1321 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; 1322 break; 1323 default: 1324 drm_dbg_kms(&i915->drm, 1325 "VBT has unknown eDP voltage swing value %u\n", 1326 edp_link_params->vswing); 1327 break; 1328 } 1329 1330 if (i915->vbt.version >= 173) { 1331 u8 vswing; 1332 1333 /* Don't read from VBT if module parameter has valid value*/ 1334 if (i915->params.edp_vswing) { 1335 i915->vbt.edp.low_vswing = 1336 i915->params.edp_vswing == 1; 1337 } else { 1338 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; 1339 i915->vbt.edp.low_vswing = vswing == 0; 1340 } 1341 } 1342 1343 i915->vbt.edp.drrs_msa_timing_delay = 1344 (edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3; 1345 } 1346 1347 static void 1348 parse_psr(struct drm_i915_private *i915) 1349 { 1350 const struct bdb_psr *psr; 1351 const struct psr_table *psr_table; 1352 int panel_type = i915->vbt.panel_type; 1353 1354 psr = find_section(i915, BDB_PSR); 1355 if (!psr) { 1356 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n"); 1357 return; 1358 } 1359 1360 psr_table = &psr->psr_table[panel_type]; 1361 1362 i915->vbt.psr.full_link = psr_table->full_link; 1363 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; 1364 1365 /* Allowed VBT values goes from 0 to 15 */ 1366 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : 1367 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; 1368 1369 /* 1370 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us 1371 * Old decimal value is wake up time in multiples of 100 us. 1372 */ 1373 if (i915->vbt.version >= 205 && 1374 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) { 1375 switch (psr_table->tp1_wakeup_time) { 1376 case 0: 1377 i915->vbt.psr.tp1_wakeup_time_us = 500; 1378 break; 1379 case 1: 1380 i915->vbt.psr.tp1_wakeup_time_us = 100; 1381 break; 1382 case 3: 1383 i915->vbt.psr.tp1_wakeup_time_us = 0; 1384 break; 1385 default: 1386 drm_dbg_kms(&i915->drm, 1387 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1388 psr_table->tp1_wakeup_time); 1389 fallthrough; 1390 case 2: 1391 i915->vbt.psr.tp1_wakeup_time_us = 2500; 1392 break; 1393 } 1394 1395 switch (psr_table->tp2_tp3_wakeup_time) { 1396 case 0: 1397 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500; 1398 break; 1399 case 1: 1400 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100; 1401 break; 1402 case 3: 1403 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0; 1404 break; 1405 default: 1406 drm_dbg_kms(&i915->drm, 1407 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n", 1408 psr_table->tp2_tp3_wakeup_time); 1409 fallthrough; 1410 case 2: 1411 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500; 1412 break; 1413 } 1414 } else { 1415 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100; 1416 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100; 1417 } 1418 1419 if (i915->vbt.version >= 226) { 1420 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time; 1421 1422 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3; 1423 switch (wakeup_time) { 1424 case 0: 1425 wakeup_time = 500; 1426 break; 1427 case 1: 1428 wakeup_time = 100; 1429 break; 1430 case 3: 1431 wakeup_time = 50; 1432 break; 1433 default: 1434 case 2: 1435 wakeup_time = 2500; 1436 break; 1437 } 1438 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time; 1439 } else { 1440 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */ 1441 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us; 1442 } 1443 } 1444 1445 static void parse_dsi_backlight_ports(struct drm_i915_private *i915, 1446 u16 version, enum port port) 1447 { 1448 if (!i915->vbt.dsi.config->dual_link || version < 197) { 1449 i915->vbt.dsi.bl_ports = BIT(port); 1450 if (i915->vbt.dsi.config->cabc_supported) 1451 i915->vbt.dsi.cabc_ports = BIT(port); 1452 1453 return; 1454 } 1455 1456 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) { 1457 case DL_DCS_PORT_A: 1458 i915->vbt.dsi.bl_ports = BIT(PORT_A); 1459 break; 1460 case DL_DCS_PORT_C: 1461 i915->vbt.dsi.bl_ports = BIT(PORT_C); 1462 break; 1463 default: 1464 case DL_DCS_PORT_A_AND_C: 1465 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C); 1466 break; 1467 } 1468 1469 if (!i915->vbt.dsi.config->cabc_supported) 1470 return; 1471 1472 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) { 1473 case DL_DCS_PORT_A: 1474 i915->vbt.dsi.cabc_ports = BIT(PORT_A); 1475 break; 1476 case DL_DCS_PORT_C: 1477 i915->vbt.dsi.cabc_ports = BIT(PORT_C); 1478 break; 1479 default: 1480 case DL_DCS_PORT_A_AND_C: 1481 i915->vbt.dsi.cabc_ports = 1482 BIT(PORT_A) | BIT(PORT_C); 1483 break; 1484 } 1485 } 1486 1487 static void 1488 parse_mipi_config(struct drm_i915_private *i915) 1489 { 1490 const struct bdb_mipi_config *start; 1491 const struct mipi_config *config; 1492 const struct mipi_pps_data *pps; 1493 int panel_type = i915->vbt.panel_type; 1494 enum port port; 1495 1496 /* parse MIPI blocks only if LFP type is MIPI */ 1497 if (!intel_bios_is_dsi_present(i915, &port)) 1498 return; 1499 1500 /* Initialize this to undefined indicating no generic MIPI support */ 1501 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; 1502 1503 /* Block #40 is already parsed and panel_fixed_mode is 1504 * stored in i915->lfp_lvds_vbt_mode 1505 * resuse this when needed 1506 */ 1507 1508 /* Parse #52 for panel index used from panel_type already 1509 * parsed 1510 */ 1511 start = find_section(i915, BDB_MIPI_CONFIG); 1512 if (!start) { 1513 drm_dbg_kms(&i915->drm, "No MIPI config BDB found"); 1514 return; 1515 } 1516 1517 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n", 1518 panel_type); 1519 1520 /* 1521 * get hold of the correct configuration block and pps data as per 1522 * the panel_type as index 1523 */ 1524 config = &start->config[panel_type]; 1525 pps = &start->pps[panel_type]; 1526 1527 /* store as of now full data. Trim when we realise all is not needed */ 1528 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); 1529 if (!i915->vbt.dsi.config) 1530 return; 1531 1532 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); 1533 if (!i915->vbt.dsi.pps) { 1534 kfree(i915->vbt.dsi.config); 1535 return; 1536 } 1537 1538 parse_dsi_backlight_ports(i915, i915->vbt.version, port); 1539 1540 /* FIXME is the 90 vs. 270 correct? */ 1541 switch (config->rotation) { 1542 case ENABLE_ROTATION_0: 1543 /* 1544 * Most (all?) VBTs claim 0 degrees despite having 1545 * an upside down panel, thus we do not trust this. 1546 */ 1547 i915->vbt.dsi.orientation = 1548 DRM_MODE_PANEL_ORIENTATION_UNKNOWN; 1549 break; 1550 case ENABLE_ROTATION_90: 1551 i915->vbt.dsi.orientation = 1552 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP; 1553 break; 1554 case ENABLE_ROTATION_180: 1555 i915->vbt.dsi.orientation = 1556 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP; 1557 break; 1558 case ENABLE_ROTATION_270: 1559 i915->vbt.dsi.orientation = 1560 DRM_MODE_PANEL_ORIENTATION_LEFT_UP; 1561 break; 1562 } 1563 1564 /* We have mandatory mipi config blocks. Initialize as generic panel */ 1565 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; 1566 } 1567 1568 /* Find the sequence block and size for the given panel. */ 1569 static const u8 * 1570 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, 1571 u16 panel_id, u32 *seq_size) 1572 { 1573 u32 total = get_blocksize(sequence); 1574 const u8 *data = &sequence->data[0]; 1575 u8 current_id; 1576 u32 current_size; 1577 int header_size = sequence->version >= 3 ? 5 : 3; 1578 int index = 0; 1579 int i; 1580 1581 /* skip new block size */ 1582 if (sequence->version >= 3) 1583 data += 4; 1584 1585 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { 1586 if (index + header_size > total) { 1587 DRM_ERROR("Invalid sequence block (header)\n"); 1588 return NULL; 1589 } 1590 1591 current_id = *(data + index); 1592 if (sequence->version >= 3) 1593 current_size = *((const u32 *)(data + index + 1)); 1594 else 1595 current_size = *((const u16 *)(data + index + 1)); 1596 1597 index += header_size; 1598 1599 if (index + current_size > total) { 1600 DRM_ERROR("Invalid sequence block\n"); 1601 return NULL; 1602 } 1603 1604 if (current_id == panel_id) { 1605 *seq_size = current_size; 1606 return data + index; 1607 } 1608 1609 index += current_size; 1610 } 1611 1612 DRM_ERROR("Sequence block detected but no valid configuration\n"); 1613 1614 return NULL; 1615 } 1616 1617 static int goto_next_sequence(const u8 *data, int index, int total) 1618 { 1619 u16 len; 1620 1621 /* Skip Sequence Byte. */ 1622 for (index = index + 1; index < total; index += len) { 1623 u8 operation_byte = *(data + index); 1624 index++; 1625 1626 switch (operation_byte) { 1627 case MIPI_SEQ_ELEM_END: 1628 return index; 1629 case MIPI_SEQ_ELEM_SEND_PKT: 1630 if (index + 4 > total) 1631 return 0; 1632 1633 len = *((const u16 *)(data + index + 2)) + 4; 1634 break; 1635 case MIPI_SEQ_ELEM_DELAY: 1636 len = 4; 1637 break; 1638 case MIPI_SEQ_ELEM_GPIO: 1639 len = 2; 1640 break; 1641 case MIPI_SEQ_ELEM_I2C: 1642 if (index + 7 > total) 1643 return 0; 1644 len = *(data + index + 6) + 7; 1645 break; 1646 default: 1647 DRM_ERROR("Unknown operation byte\n"); 1648 return 0; 1649 } 1650 } 1651 1652 return 0; 1653 } 1654 1655 static int goto_next_sequence_v3(const u8 *data, int index, int total) 1656 { 1657 int seq_end; 1658 u16 len; 1659 u32 size_of_sequence; 1660 1661 /* 1662 * Could skip sequence based on Size of Sequence alone, but also do some 1663 * checking on the structure. 1664 */ 1665 if (total < 5) { 1666 DRM_ERROR("Too small sequence size\n"); 1667 return 0; 1668 } 1669 1670 /* Skip Sequence Byte. */ 1671 index++; 1672 1673 /* 1674 * Size of Sequence. Excludes the Sequence Byte and the size itself, 1675 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END 1676 * byte. 1677 */ 1678 size_of_sequence = *((const u32 *)(data + index)); 1679 index += 4; 1680 1681 seq_end = index + size_of_sequence; 1682 if (seq_end > total) { 1683 DRM_ERROR("Invalid sequence size\n"); 1684 return 0; 1685 } 1686 1687 for (; index < total; index += len) { 1688 u8 operation_byte = *(data + index); 1689 index++; 1690 1691 if (operation_byte == MIPI_SEQ_ELEM_END) { 1692 if (index != seq_end) { 1693 DRM_ERROR("Invalid element structure\n"); 1694 return 0; 1695 } 1696 return index; 1697 } 1698 1699 len = *(data + index); 1700 index++; 1701 1702 /* 1703 * FIXME: Would be nice to check elements like for v1/v2 in 1704 * goto_next_sequence() above. 1705 */ 1706 switch (operation_byte) { 1707 case MIPI_SEQ_ELEM_SEND_PKT: 1708 case MIPI_SEQ_ELEM_DELAY: 1709 case MIPI_SEQ_ELEM_GPIO: 1710 case MIPI_SEQ_ELEM_I2C: 1711 case MIPI_SEQ_ELEM_SPI: 1712 case MIPI_SEQ_ELEM_PMIC: 1713 break; 1714 default: 1715 DRM_ERROR("Unknown operation byte %u\n", 1716 operation_byte); 1717 break; 1718 } 1719 } 1720 1721 return 0; 1722 } 1723 1724 /* 1725 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence, 1726 * skip all delay + gpio operands and stop at the first DSI packet op. 1727 */ 1728 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915) 1729 { 1730 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1731 int index, len; 1732 1733 if (drm_WARN_ON(&i915->drm, 1734 !data || i915->vbt.dsi.seq_version != 1)) 1735 return 0; 1736 1737 /* index = 1 to skip sequence byte */ 1738 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) { 1739 switch (data[index]) { 1740 case MIPI_SEQ_ELEM_SEND_PKT: 1741 return index == 1 ? 0 : index; 1742 case MIPI_SEQ_ELEM_DELAY: 1743 len = 5; /* 1 byte for operand + uint32 */ 1744 break; 1745 case MIPI_SEQ_ELEM_GPIO: 1746 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */ 1747 break; 1748 default: 1749 return 0; 1750 } 1751 } 1752 1753 return 0; 1754 } 1755 1756 /* 1757 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence. 1758 * The deassert must be done before calling intel_dsi_device_ready, so for 1759 * these devices we split the init OTP sequence into a deassert sequence and 1760 * the actual init OTP part. 1761 */ 1762 static void fixup_mipi_sequences(struct drm_i915_private *i915) 1763 { 1764 u8 *init_otp; 1765 int len; 1766 1767 /* Limit this to VLV for now. */ 1768 if (!IS_VALLEYVIEW(i915)) 1769 return; 1770 1771 /* Limit this to v1 vid-mode sequences */ 1772 if (i915->vbt.dsi.config->is_cmd_mode || 1773 i915->vbt.dsi.seq_version != 1) 1774 return; 1775 1776 /* Only do this if there are otp and assert seqs and no deassert seq */ 1777 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] || 1778 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] || 1779 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) 1780 return; 1781 1782 /* The deassert-sequence ends at the first DSI packet */ 1783 len = get_init_otp_deassert_fragment_len(i915); 1784 if (!len) 1785 return; 1786 1787 drm_dbg_kms(&i915->drm, 1788 "Using init OTP fragment to deassert reset\n"); 1789 1790 /* Copy the fragment, update seq byte and terminate it */ 1791 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; 1792 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL); 1793 if (!i915->vbt.dsi.deassert_seq) 1794 return; 1795 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET; 1796 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END; 1797 /* Use the copy for deassert */ 1798 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] = 1799 i915->vbt.dsi.deassert_seq; 1800 /* Replace the last byte of the fragment with init OTP seq byte */ 1801 init_otp[len - 1] = MIPI_SEQ_INIT_OTP; 1802 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */ 1803 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1; 1804 } 1805 1806 static void 1807 parse_mipi_sequence(struct drm_i915_private *i915) 1808 { 1809 int panel_type = i915->vbt.panel_type; 1810 const struct bdb_mipi_sequence *sequence; 1811 const u8 *seq_data; 1812 u32 seq_size; 1813 u8 *data; 1814 int index = 0; 1815 1816 /* Only our generic panel driver uses the sequence block. */ 1817 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) 1818 return; 1819 1820 sequence = find_section(i915, BDB_MIPI_SEQUENCE); 1821 if (!sequence) { 1822 drm_dbg_kms(&i915->drm, 1823 "No MIPI Sequence found, parsing complete\n"); 1824 return; 1825 } 1826 1827 /* Fail gracefully for forward incompatible sequence block. */ 1828 if (sequence->version >= 4) { 1829 drm_err(&i915->drm, 1830 "Unable to parse MIPI Sequence Block v%u\n", 1831 sequence->version); 1832 return; 1833 } 1834 1835 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n", 1836 sequence->version); 1837 1838 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); 1839 if (!seq_data) 1840 return; 1841 1842 data = kmemdup(seq_data, seq_size, GFP_KERNEL); 1843 if (!data) 1844 return; 1845 1846 /* Parse the sequences, store pointers to each sequence. */ 1847 for (;;) { 1848 u8 seq_id = *(data + index); 1849 if (seq_id == MIPI_SEQ_END) 1850 break; 1851 1852 if (seq_id >= MIPI_SEQ_MAX) { 1853 drm_err(&i915->drm, "Unknown sequence %u\n", 1854 seq_id); 1855 goto err; 1856 } 1857 1858 /* Log about presence of sequences we won't run. */ 1859 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) 1860 drm_dbg_kms(&i915->drm, 1861 "Unsupported sequence %u\n", seq_id); 1862 1863 i915->vbt.dsi.sequence[seq_id] = data + index; 1864 1865 if (sequence->version >= 3) 1866 index = goto_next_sequence_v3(data, index, seq_size); 1867 else 1868 index = goto_next_sequence(data, index, seq_size); 1869 if (!index) { 1870 drm_err(&i915->drm, "Invalid sequence %u\n", 1871 seq_id); 1872 goto err; 1873 } 1874 } 1875 1876 i915->vbt.dsi.data = data; 1877 i915->vbt.dsi.size = seq_size; 1878 i915->vbt.dsi.seq_version = sequence->version; 1879 1880 fixup_mipi_sequences(i915); 1881 1882 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n"); 1883 return; 1884 1885 err: 1886 kfree(data); 1887 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence)); 1888 } 1889 1890 static void 1891 parse_compression_parameters(struct drm_i915_private *i915) 1892 { 1893 const struct bdb_compression_parameters *params; 1894 struct intel_bios_encoder_data *devdata; 1895 const struct child_device_config *child; 1896 u16 block_size; 1897 int index; 1898 1899 if (i915->vbt.version < 198) 1900 return; 1901 1902 params = find_section(i915, BDB_COMPRESSION_PARAMETERS); 1903 if (params) { 1904 /* Sanity checks */ 1905 if (params->entry_size != sizeof(params->data[0])) { 1906 drm_dbg_kms(&i915->drm, 1907 "VBT: unsupported compression param entry size\n"); 1908 return; 1909 } 1910 1911 block_size = get_blocksize(params); 1912 if (block_size < sizeof(*params)) { 1913 drm_dbg_kms(&i915->drm, 1914 "VBT: expected 16 compression param entries\n"); 1915 return; 1916 } 1917 } 1918 1919 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 1920 child = &devdata->child; 1921 1922 if (!child->compression_enable) 1923 continue; 1924 1925 if (!params) { 1926 drm_dbg_kms(&i915->drm, 1927 "VBT: compression params not available\n"); 1928 continue; 1929 } 1930 1931 if (child->compression_method_cps) { 1932 drm_dbg_kms(&i915->drm, 1933 "VBT: CPS compression not supported\n"); 1934 continue; 1935 } 1936 1937 index = child->compression_structure_index; 1938 1939 devdata->dsc = kmemdup(¶ms->data[index], 1940 sizeof(*devdata->dsc), GFP_KERNEL); 1941 } 1942 } 1943 1944 static u8 translate_iboost(u8 val) 1945 { 1946 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ 1947 1948 if (val >= ARRAY_SIZE(mapping)) { 1949 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); 1950 return 0; 1951 } 1952 return mapping[val]; 1953 } 1954 1955 static const u8 cnp_ddc_pin_map[] = { 1956 [0] = 0, /* N/A */ 1957 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT, 1958 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT, 1959 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */ 1960 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */ 1961 }; 1962 1963 static const u8 icp_ddc_pin_map[] = { 1964 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1965 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1966 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT, 1967 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP, 1968 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP, 1969 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP, 1970 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP, 1971 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP, 1972 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, 1973 }; 1974 1975 static const u8 rkl_pch_tgp_ddc_pin_map[] = { 1976 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1977 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1978 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, 1979 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, 1980 }; 1981 1982 static const u8 adls_ddc_pin_map[] = { 1983 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1984 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 1985 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 1986 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 1987 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 1988 }; 1989 1990 static const u8 gen9bc_tgp_ddc_pin_map[] = { 1991 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1992 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP, 1993 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP, 1994 }; 1995 1996 static const u8 adlp_ddc_pin_map[] = { 1997 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT, 1998 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, 1999 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP, 2000 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP, 2001 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP, 2002 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP, 2003 }; 2004 2005 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin) 2006 { 2007 const u8 *ddc_pin_map; 2008 int n_entries; 2009 2010 if (IS_ALDERLAKE_P(i915)) { 2011 ddc_pin_map = adlp_ddc_pin_map; 2012 n_entries = ARRAY_SIZE(adlp_ddc_pin_map); 2013 } else if (IS_ALDERLAKE_S(i915)) { 2014 ddc_pin_map = adls_ddc_pin_map; 2015 n_entries = ARRAY_SIZE(adls_ddc_pin_map); 2016 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) { 2017 return vbt_pin; 2018 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { 2019 ddc_pin_map = rkl_pch_tgp_ddc_pin_map; 2020 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); 2021 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) { 2022 ddc_pin_map = gen9bc_tgp_ddc_pin_map; 2023 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map); 2024 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) { 2025 ddc_pin_map = icp_ddc_pin_map; 2026 n_entries = ARRAY_SIZE(icp_ddc_pin_map); 2027 } else if (HAS_PCH_CNP(i915)) { 2028 ddc_pin_map = cnp_ddc_pin_map; 2029 n_entries = ARRAY_SIZE(cnp_ddc_pin_map); 2030 } else { 2031 /* Assuming direct map */ 2032 return vbt_pin; 2033 } 2034 2035 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0) 2036 return ddc_pin_map[vbt_pin]; 2037 2038 drm_dbg_kms(&i915->drm, 2039 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n", 2040 vbt_pin); 2041 return 0; 2042 } 2043 2044 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin) 2045 { 2046 const struct intel_bios_encoder_data *devdata; 2047 enum port port; 2048 2049 if (!ddc_pin) 2050 return PORT_NONE; 2051 2052 for_each_port(port) { 2053 devdata = i915->vbt.ports[port]; 2054 2055 if (devdata && ddc_pin == devdata->child.ddc_pin) 2056 return port; 2057 } 2058 2059 return PORT_NONE; 2060 } 2061 2062 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata, 2063 enum port port) 2064 { 2065 struct drm_i915_private *i915 = devdata->i915; 2066 struct child_device_config *child; 2067 u8 mapped_ddc_pin; 2068 enum port p; 2069 2070 if (!devdata->child.ddc_pin) 2071 return; 2072 2073 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin); 2074 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) { 2075 drm_dbg_kms(&i915->drm, 2076 "Port %c has invalid DDC pin %d, " 2077 "sticking to defaults\n", 2078 port_name(port), mapped_ddc_pin); 2079 devdata->child.ddc_pin = 0; 2080 return; 2081 } 2082 2083 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin); 2084 if (p == PORT_NONE) 2085 return; 2086 2087 drm_dbg_kms(&i915->drm, 2088 "port %c trying to use the same DDC pin (0x%x) as port %c, " 2089 "disabling port %c DVI/HDMI support\n", 2090 port_name(port), mapped_ddc_pin, 2091 port_name(p), port_name(p)); 2092 2093 /* 2094 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi 2095 * couldn't exist on the shared port. Otherwise they share the same ddc 2096 * pin and system couldn't communicate with them separately. 2097 * 2098 * Give inverse child device order the priority, last one wins. Yes, 2099 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 2100 * port A and port E with the same AUX ch and we must pick port E :( 2101 */ 2102 child = &i915->vbt.ports[p]->child; 2103 2104 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2105 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2106 2107 child->ddc_pin = 0; 2108 } 2109 2110 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch) 2111 { 2112 const struct intel_bios_encoder_data *devdata; 2113 enum port port; 2114 2115 if (!aux_ch) 2116 return PORT_NONE; 2117 2118 for_each_port(port) { 2119 devdata = i915->vbt.ports[port]; 2120 2121 if (devdata && aux_ch == devdata->child.aux_channel) 2122 return port; 2123 } 2124 2125 return PORT_NONE; 2126 } 2127 2128 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata, 2129 enum port port) 2130 { 2131 struct drm_i915_private *i915 = devdata->i915; 2132 struct child_device_config *child; 2133 enum port p; 2134 2135 p = get_port_by_aux_ch(i915, devdata->child.aux_channel); 2136 if (p == PORT_NONE) 2137 return; 2138 2139 drm_dbg_kms(&i915->drm, 2140 "port %c trying to use the same AUX CH (0x%x) as port %c, " 2141 "disabling port %c DP support\n", 2142 port_name(port), devdata->child.aux_channel, 2143 port_name(p), port_name(p)); 2144 2145 /* 2146 * If we have multiple ports supposedly sharing the aux channel, then DP 2147 * couldn't exist on the shared port. Otherwise they share the same aux 2148 * channel and system couldn't communicate with them separately. 2149 * 2150 * Give inverse child device order the priority, last one wins. Yes, 2151 * there are real machines (eg. Asrock B250M-HDV) where VBT has both 2152 * port A and port E with the same AUX ch and we must pick port E :( 2153 */ 2154 child = &i915->vbt.ports[p]->child; 2155 2156 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2157 child->aux_channel = 0; 2158 } 2159 2160 static u8 dvo_port_type(u8 dvo_port) 2161 { 2162 switch (dvo_port) { 2163 case DVO_PORT_HDMIA: 2164 case DVO_PORT_HDMIB: 2165 case DVO_PORT_HDMIC: 2166 case DVO_PORT_HDMID: 2167 case DVO_PORT_HDMIE: 2168 case DVO_PORT_HDMIF: 2169 case DVO_PORT_HDMIG: 2170 case DVO_PORT_HDMIH: 2171 case DVO_PORT_HDMII: 2172 return DVO_PORT_HDMIA; 2173 case DVO_PORT_DPA: 2174 case DVO_PORT_DPB: 2175 case DVO_PORT_DPC: 2176 case DVO_PORT_DPD: 2177 case DVO_PORT_DPE: 2178 case DVO_PORT_DPF: 2179 case DVO_PORT_DPG: 2180 case DVO_PORT_DPH: 2181 case DVO_PORT_DPI: 2182 return DVO_PORT_DPA; 2183 case DVO_PORT_MIPIA: 2184 case DVO_PORT_MIPIB: 2185 case DVO_PORT_MIPIC: 2186 case DVO_PORT_MIPID: 2187 return DVO_PORT_MIPIA; 2188 default: 2189 return dvo_port; 2190 } 2191 } 2192 2193 static enum port __dvo_port_to_port(int n_ports, int n_dvo, 2194 const int port_mapping[][3], u8 dvo_port) 2195 { 2196 enum port port; 2197 int i; 2198 2199 for (port = PORT_A; port < n_ports; port++) { 2200 for (i = 0; i < n_dvo; i++) { 2201 if (port_mapping[port][i] == -1) 2202 break; 2203 2204 if (dvo_port == port_mapping[port][i]) 2205 return port; 2206 } 2207 } 2208 2209 return PORT_NONE; 2210 } 2211 2212 static enum port dvo_port_to_port(struct drm_i915_private *i915, 2213 u8 dvo_port) 2214 { 2215 /* 2216 * Each DDI port can have more than one value on the "DVO Port" field, 2217 * so look for all the possible values for each port. 2218 */ 2219 static const int port_mapping[][3] = { 2220 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2221 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2222 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2223 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2224 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT }, 2225 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2226 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2227 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2228 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2229 }; 2230 /* 2231 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D 2232 * map to DDI A,B,TC1,TC2 respectively. 2233 */ 2234 static const int rkl_port_mapping[][3] = { 2235 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2236 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2237 [PORT_C] = { -1 }, 2238 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2239 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2240 }; 2241 /* 2242 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, 2243 * PORT_F and PORT_G, we need to map that to correct VBT sections. 2244 */ 2245 static const int adls_port_mapping[][3] = { 2246 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2247 [PORT_B] = { -1 }, 2248 [PORT_C] = { -1 }, 2249 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2250 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2251 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2252 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2253 }; 2254 static const int xelpd_port_mapping[][3] = { 2255 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, 2256 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, 2257 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, 2258 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, 2259 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, 2260 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 }, 2261 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 }, 2262 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 }, 2263 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 }, 2264 }; 2265 2266 if (DISPLAY_VER(i915) == 13) 2267 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping), 2268 ARRAY_SIZE(xelpd_port_mapping[0]), 2269 xelpd_port_mapping, 2270 dvo_port); 2271 else if (IS_ALDERLAKE_S(i915)) 2272 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), 2273 ARRAY_SIZE(adls_port_mapping[0]), 2274 adls_port_mapping, 2275 dvo_port); 2276 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 2277 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), 2278 ARRAY_SIZE(rkl_port_mapping[0]), 2279 rkl_port_mapping, 2280 dvo_port); 2281 else 2282 return __dvo_port_to_port(ARRAY_SIZE(port_mapping), 2283 ARRAY_SIZE(port_mapping[0]), 2284 port_mapping, 2285 dvo_port); 2286 } 2287 2288 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate) 2289 { 2290 switch (vbt_max_link_rate) { 2291 default: 2292 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF: 2293 return 0; 2294 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20: 2295 return 2000000; 2296 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5: 2297 return 1350000; 2298 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10: 2299 return 1000000; 2300 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3: 2301 return 810000; 2302 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2: 2303 return 540000; 2304 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR: 2305 return 270000; 2306 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR: 2307 return 162000; 2308 } 2309 } 2310 2311 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate) 2312 { 2313 switch (vbt_max_link_rate) { 2314 default: 2315 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3: 2316 return 810000; 2317 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2: 2318 return 540000; 2319 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR: 2320 return 270000; 2321 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR: 2322 return 162000; 2323 } 2324 } 2325 2326 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata) 2327 { 2328 if (!devdata || devdata->i915->vbt.version < 216) 2329 return 0; 2330 2331 if (devdata->i915->vbt.version >= 230) 2332 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate); 2333 else 2334 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate); 2335 } 2336 2337 static void sanitize_device_type(struct intel_bios_encoder_data *devdata, 2338 enum port port) 2339 { 2340 struct drm_i915_private *i915 = devdata->i915; 2341 bool is_hdmi; 2342 2343 if (port != PORT_A || DISPLAY_VER(i915) >= 12) 2344 return; 2345 2346 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING)) 2347 return; 2348 2349 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT); 2350 2351 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n", 2352 is_hdmi ? "/HDMI" : ""); 2353 2354 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING; 2355 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT; 2356 } 2357 2358 static bool 2359 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata) 2360 { 2361 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT; 2362 } 2363 2364 bool 2365 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata) 2366 { 2367 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; 2368 } 2369 2370 bool 2371 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata) 2372 { 2373 return intel_bios_encoder_supports_dvi(devdata) && 2374 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; 2375 } 2376 2377 bool 2378 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata) 2379 { 2380 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2381 } 2382 2383 static bool 2384 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata) 2385 { 2386 return intel_bios_encoder_supports_dp(devdata) && 2387 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR; 2388 } 2389 2390 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata) 2391 { 2392 if (!devdata || devdata->i915->vbt.version < 158) 2393 return -1; 2394 2395 return devdata->child.hdmi_level_shifter_value; 2396 } 2397 2398 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata) 2399 { 2400 if (!devdata || devdata->i915->vbt.version < 204) 2401 return 0; 2402 2403 switch (devdata->child.hdmi_max_data_rate) { 2404 default: 2405 MISSING_CASE(devdata->child.hdmi_max_data_rate); 2406 fallthrough; 2407 case HDMI_MAX_DATA_RATE_PLATFORM: 2408 return 0; 2409 case HDMI_MAX_DATA_RATE_594: 2410 return 594000; 2411 case HDMI_MAX_DATA_RATE_340: 2412 return 340000; 2413 case HDMI_MAX_DATA_RATE_300: 2414 return 300000; 2415 case HDMI_MAX_DATA_RATE_297: 2416 return 297000; 2417 case HDMI_MAX_DATA_RATE_165: 2418 return 165000; 2419 } 2420 } 2421 2422 static bool is_port_valid(struct drm_i915_private *i915, enum port port) 2423 { 2424 /* 2425 * On some ICL SKUs port F is not present, but broken VBTs mark 2426 * the port as present. Only try to initialize port F for the 2427 * SKUs that may actually have it. 2428 */ 2429 if (port == PORT_F && IS_ICELAKE(i915)) 2430 return IS_ICL_WITH_PORT_F(i915); 2431 2432 return true; 2433 } 2434 2435 static void parse_ddi_port(struct drm_i915_private *i915, 2436 struct intel_bios_encoder_data *devdata) 2437 { 2438 const struct child_device_config *child = &devdata->child; 2439 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt; 2440 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock; 2441 enum port port; 2442 2443 port = dvo_port_to_port(i915, child->dvo_port); 2444 if (port == PORT_NONE) 2445 return; 2446 2447 if (!is_port_valid(i915, port)) { 2448 drm_dbg_kms(&i915->drm, 2449 "VBT reports port %c as supported, but that can't be true: skipping\n", 2450 port_name(port)); 2451 return; 2452 } 2453 2454 if (i915->vbt.ports[port]) { 2455 drm_dbg_kms(&i915->drm, 2456 "More than one child device for port %c in VBT, using the first.\n", 2457 port_name(port)); 2458 return; 2459 } 2460 2461 sanitize_device_type(devdata, port); 2462 2463 is_dvi = intel_bios_encoder_supports_dvi(devdata); 2464 is_dp = intel_bios_encoder_supports_dp(devdata); 2465 is_crt = intel_bios_encoder_supports_crt(devdata); 2466 is_hdmi = intel_bios_encoder_supports_hdmi(devdata); 2467 is_edp = intel_bios_encoder_supports_edp(devdata); 2468 2469 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata); 2470 supports_tbt = intel_bios_encoder_supports_tbt(devdata); 2471 2472 drm_dbg_kms(&i915->drm, 2473 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n", 2474 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp, 2475 HAS_LSPCON(i915) && child->lspcon, 2476 supports_typec_usb, supports_tbt, 2477 devdata->dsc != NULL); 2478 2479 if (is_dvi) 2480 sanitize_ddc_pin(devdata, port); 2481 2482 if (is_dp) 2483 sanitize_aux_ch(devdata, port); 2484 2485 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata); 2486 if (hdmi_level_shift >= 0) { 2487 drm_dbg_kms(&i915->drm, 2488 "Port %c VBT HDMI level shift: %d\n", 2489 port_name(port), hdmi_level_shift); 2490 } 2491 2492 max_tmds_clock = _intel_bios_max_tmds_clock(devdata); 2493 if (max_tmds_clock) 2494 drm_dbg_kms(&i915->drm, 2495 "Port %c VBT HDMI max TMDS clock: %d kHz\n", 2496 port_name(port), max_tmds_clock); 2497 2498 /* I_boost config for SKL and above */ 2499 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata); 2500 if (dp_boost_level) 2501 drm_dbg_kms(&i915->drm, 2502 "Port %c VBT (e)DP boost level: %d\n", 2503 port_name(port), dp_boost_level); 2504 2505 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata); 2506 if (hdmi_boost_level) 2507 drm_dbg_kms(&i915->drm, 2508 "Port %c VBT HDMI boost level: %d\n", 2509 port_name(port), hdmi_boost_level); 2510 2511 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata); 2512 if (dp_max_link_rate) 2513 drm_dbg_kms(&i915->drm, 2514 "Port %c VBT DP max link rate: %d\n", 2515 port_name(port), dp_max_link_rate); 2516 2517 i915->vbt.ports[port] = devdata; 2518 } 2519 2520 static bool has_ddi_port_info(struct drm_i915_private *i915) 2521 { 2522 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915); 2523 } 2524 2525 static void parse_ddi_ports(struct drm_i915_private *i915) 2526 { 2527 struct intel_bios_encoder_data *devdata; 2528 2529 if (!has_ddi_port_info(i915)) 2530 return; 2531 2532 list_for_each_entry(devdata, &i915->vbt.display_devices, node) 2533 parse_ddi_port(i915, devdata); 2534 } 2535 2536 static void 2537 parse_general_definitions(struct drm_i915_private *i915) 2538 { 2539 const struct bdb_general_definitions *defs; 2540 struct intel_bios_encoder_data *devdata; 2541 const struct child_device_config *child; 2542 int i, child_device_num; 2543 u8 expected_size; 2544 u16 block_size; 2545 int bus_pin; 2546 2547 defs = find_section(i915, BDB_GENERAL_DEFINITIONS); 2548 if (!defs) { 2549 drm_dbg_kms(&i915->drm, 2550 "No general definition block is found, no devices defined.\n"); 2551 return; 2552 } 2553 2554 block_size = get_blocksize(defs); 2555 if (block_size < sizeof(*defs)) { 2556 drm_dbg_kms(&i915->drm, 2557 "General definitions block too small (%u)\n", 2558 block_size); 2559 return; 2560 } 2561 2562 bus_pin = defs->crt_ddc_gmbus_pin; 2563 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin); 2564 if (intel_gmbus_is_valid_pin(i915, bus_pin)) 2565 i915->vbt.crt_ddc_pin = bus_pin; 2566 2567 if (i915->vbt.version < 106) { 2568 expected_size = 22; 2569 } else if (i915->vbt.version < 111) { 2570 expected_size = 27; 2571 } else if (i915->vbt.version < 195) { 2572 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; 2573 } else if (i915->vbt.version == 195) { 2574 expected_size = 37; 2575 } else if (i915->vbt.version <= 215) { 2576 expected_size = 38; 2577 } else if (i915->vbt.version <= 237) { 2578 expected_size = 39; 2579 } else { 2580 expected_size = sizeof(*child); 2581 BUILD_BUG_ON(sizeof(*child) < 39); 2582 drm_dbg(&i915->drm, 2583 "Expected child device config size for VBT version %u not known; assuming %u\n", 2584 i915->vbt.version, expected_size); 2585 } 2586 2587 /* Flag an error for unexpected size, but continue anyway. */ 2588 if (defs->child_dev_size != expected_size) 2589 drm_err(&i915->drm, 2590 "Unexpected child device config size %u (expected %u for VBT version %u)\n", 2591 defs->child_dev_size, expected_size, i915->vbt.version); 2592 2593 /* The legacy sized child device config is the minimum we need. */ 2594 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { 2595 drm_dbg_kms(&i915->drm, 2596 "Child device config size %u is too small.\n", 2597 defs->child_dev_size); 2598 return; 2599 } 2600 2601 /* get the number of child device */ 2602 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; 2603 2604 for (i = 0; i < child_device_num; i++) { 2605 child = child_device_ptr(defs, i); 2606 if (!child->device_type) 2607 continue; 2608 2609 drm_dbg_kms(&i915->drm, 2610 "Found VBT child device with type 0x%x\n", 2611 child->device_type); 2612 2613 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2614 if (!devdata) 2615 break; 2616 2617 devdata->i915 = i915; 2618 2619 /* 2620 * Copy as much as we know (sizeof) and is available 2621 * (child_dev_size) of the child device config. Accessing the 2622 * data must depend on VBT version. 2623 */ 2624 memcpy(&devdata->child, child, 2625 min_t(size_t, defs->child_dev_size, sizeof(*child))); 2626 2627 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2628 } 2629 2630 if (list_empty(&i915->vbt.display_devices)) 2631 drm_dbg_kms(&i915->drm, 2632 "no child dev is parsed from VBT\n"); 2633 } 2634 2635 /* Common defaults which may be overridden by VBT. */ 2636 static void 2637 init_vbt_defaults(struct drm_i915_private *i915) 2638 { 2639 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; 2640 2641 /* Default to having backlight */ 2642 i915->vbt.backlight.present = true; 2643 2644 /* LFP panel data */ 2645 i915->vbt.lvds_dither = 1; 2646 2647 /* SDVO panel data */ 2648 i915->vbt.sdvo_lvds_vbt_mode = NULL; 2649 2650 /* general features */ 2651 i915->vbt.int_tv_support = 1; 2652 i915->vbt.int_crt_support = 1; 2653 2654 /* driver features */ 2655 i915->vbt.int_lvds_support = 1; 2656 2657 /* Default to using SSC */ 2658 i915->vbt.lvds_use_ssc = 1; 2659 /* 2660 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference 2661 * clock for LVDS. 2662 */ 2663 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915, 2664 !HAS_PCH_SPLIT(i915)); 2665 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n", 2666 i915->vbt.lvds_ssc_freq); 2667 } 2668 2669 /* Defaults to initialize only if there is no VBT. */ 2670 static void 2671 init_vbt_missing_defaults(struct drm_i915_private *i915) 2672 { 2673 enum port port; 2674 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) | 2675 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F); 2676 2677 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915)) 2678 return; 2679 2680 for_each_port_masked(port, ports) { 2681 struct intel_bios_encoder_data *devdata; 2682 struct child_device_config *child; 2683 enum phy phy = intel_port_to_phy(i915, port); 2684 2685 /* 2686 * VBT has the TypeC mode (native,TBT/USB) and we don't want 2687 * to detect it. 2688 */ 2689 if (intel_phy_is_tc(i915, phy)) 2690 continue; 2691 2692 /* Create fake child device config */ 2693 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL); 2694 if (!devdata) 2695 break; 2696 2697 devdata->i915 = i915; 2698 child = &devdata->child; 2699 2700 if (port == PORT_F) 2701 child->dvo_port = DVO_PORT_HDMIF; 2702 else if (port == PORT_E) 2703 child->dvo_port = DVO_PORT_HDMIE; 2704 else 2705 child->dvo_port = DVO_PORT_HDMIA + port; 2706 2707 if (port != PORT_A && port != PORT_E) 2708 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING; 2709 2710 if (port != PORT_E) 2711 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT; 2712 2713 if (port == PORT_A) 2714 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR; 2715 2716 list_add_tail(&devdata->node, &i915->vbt.display_devices); 2717 2718 drm_dbg_kms(&i915->drm, 2719 "Generating default VBT child device with type 0x04%x on port %c\n", 2720 child->device_type, port_name(port)); 2721 } 2722 2723 /* Bypass some minimum baseline VBT version checks */ 2724 i915->vbt.version = 155; 2725 } 2726 2727 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) 2728 { 2729 const void *_vbt = vbt; 2730 2731 return _vbt + vbt->bdb_offset; 2732 } 2733 2734 /** 2735 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT 2736 * @buf: pointer to a buffer to validate 2737 * @size: size of the buffer 2738 * 2739 * Returns true on valid VBT. 2740 */ 2741 bool intel_bios_is_valid_vbt(const void *buf, size_t size) 2742 { 2743 const struct vbt_header *vbt = buf; 2744 const struct bdb_header *bdb; 2745 2746 if (!vbt) 2747 return false; 2748 2749 if (sizeof(struct vbt_header) > size) { 2750 DRM_DEBUG_DRIVER("VBT header incomplete\n"); 2751 return false; 2752 } 2753 2754 if (memcmp(vbt->signature, "$VBT", 4)) { 2755 DRM_DEBUG_DRIVER("VBT invalid signature\n"); 2756 return false; 2757 } 2758 2759 if (vbt->vbt_size > size) { 2760 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n"); 2761 return false; 2762 } 2763 2764 size = vbt->vbt_size; 2765 2766 if (range_overflows_t(size_t, 2767 vbt->bdb_offset, 2768 sizeof(struct bdb_header), 2769 size)) { 2770 DRM_DEBUG_DRIVER("BDB header incomplete\n"); 2771 return false; 2772 } 2773 2774 bdb = get_bdb_header(vbt); 2775 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { 2776 DRM_DEBUG_DRIVER("BDB incomplete\n"); 2777 return false; 2778 } 2779 2780 return vbt; 2781 } 2782 2783 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915) 2784 { 2785 u32 count, data, found, store = 0; 2786 u32 static_region, oprom_offset; 2787 u32 oprom_size = 0x200000; 2788 u16 vbt_size; 2789 u32 *vbt; 2790 2791 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS); 2792 static_region &= OPTIONROM_SPI_REGIONID_MASK; 2793 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region); 2794 2795 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET); 2796 oprom_offset &= OROM_OFFSET_MASK; 2797 2798 for (count = 0; count < oprom_size; count += 4) { 2799 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count); 2800 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2801 2802 if (data == *((const u32 *)"$VBT")) { 2803 found = oprom_offset + count; 2804 break; 2805 } 2806 } 2807 2808 if (count >= oprom_size) 2809 goto err_not_found; 2810 2811 /* Get VBT size and allocate space for the VBT */ 2812 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + 2813 offsetof(struct vbt_header, vbt_size)); 2814 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2815 vbt_size &= 0xffff; 2816 2817 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL); 2818 if (!vbt) 2819 goto err_not_found; 2820 2821 for (count = 0; count < vbt_size; count += 4) { 2822 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count); 2823 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER); 2824 *(vbt + store++) = data; 2825 } 2826 2827 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2828 goto err_free_vbt; 2829 2830 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n"); 2831 2832 return (struct vbt_header *)vbt; 2833 2834 err_free_vbt: 2835 kfree(vbt); 2836 err_not_found: 2837 return NULL; 2838 } 2839 2840 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915) 2841 { 2842 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 2843 void __iomem *p = NULL, *oprom; 2844 struct vbt_header *vbt; 2845 u16 vbt_size; 2846 size_t i, size; 2847 2848 oprom = pci_map_rom(pdev, &size); 2849 if (!oprom) 2850 return NULL; 2851 2852 /* Scour memory looking for the VBT signature. */ 2853 for (i = 0; i + 4 < size; i += 4) { 2854 if (ioread32(oprom + i) != *((const u32 *)"$VBT")) 2855 continue; 2856 2857 p = oprom + i; 2858 size -= i; 2859 break; 2860 } 2861 2862 if (!p) 2863 goto err_unmap_oprom; 2864 2865 if (sizeof(struct vbt_header) > size) { 2866 drm_dbg(&i915->drm, "VBT header incomplete\n"); 2867 goto err_unmap_oprom; 2868 } 2869 2870 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size)); 2871 if (vbt_size > size) { 2872 drm_dbg(&i915->drm, 2873 "VBT incomplete (vbt_size overflows)\n"); 2874 goto err_unmap_oprom; 2875 } 2876 2877 /* The rest will be validated by intel_bios_is_valid_vbt() */ 2878 vbt = kmalloc(vbt_size, GFP_KERNEL); 2879 if (!vbt) 2880 goto err_unmap_oprom; 2881 2882 memcpy_fromio(vbt, p, vbt_size); 2883 2884 if (!intel_bios_is_valid_vbt(vbt, vbt_size)) 2885 goto err_free_vbt; 2886 2887 pci_unmap_rom(pdev, oprom); 2888 2889 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n"); 2890 2891 return vbt; 2892 2893 err_free_vbt: 2894 kfree(vbt); 2895 err_unmap_oprom: 2896 pci_unmap_rom(pdev, oprom); 2897 2898 return NULL; 2899 } 2900 2901 /** 2902 * intel_bios_init - find VBT and initialize settings from the BIOS 2903 * @i915: i915 device instance 2904 * 2905 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT 2906 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also 2907 * initialize some defaults if the VBT is not present at all. 2908 */ 2909 void intel_bios_init(struct drm_i915_private *i915) 2910 { 2911 const struct vbt_header *vbt = i915->opregion.vbt; 2912 struct vbt_header *oprom_vbt = NULL; 2913 const struct bdb_header *bdb; 2914 2915 INIT_LIST_HEAD(&i915->vbt.display_devices); 2916 INIT_LIST_HEAD(&i915->vbt.bdb_blocks); 2917 2918 if (!HAS_DISPLAY(i915)) { 2919 drm_dbg_kms(&i915->drm, 2920 "Skipping VBT init due to disabled display.\n"); 2921 return; 2922 } 2923 2924 init_vbt_defaults(i915); 2925 2926 /* 2927 * If the OpRegion does not have VBT, look in SPI flash through MMIO or 2928 * PCI mapping 2929 */ 2930 if (!vbt && IS_DGFX(i915)) { 2931 oprom_vbt = spi_oprom_get_vbt(i915); 2932 vbt = oprom_vbt; 2933 } 2934 2935 if (!vbt) { 2936 oprom_vbt = oprom_get_vbt(i915); 2937 vbt = oprom_vbt; 2938 } 2939 2940 if (!vbt) 2941 goto out; 2942 2943 bdb = get_bdb_header(vbt); 2944 i915->vbt.version = bdb->version; 2945 2946 drm_dbg_kms(&i915->drm, 2947 "VBT signature \"%.*s\", BDB version %d\n", 2948 (int)sizeof(vbt->signature), vbt->signature, i915->vbt.version); 2949 2950 init_bdb_blocks(i915, bdb); 2951 2952 /* Grab useful general definitions */ 2953 parse_general_features(i915); 2954 parse_general_definitions(i915); 2955 parse_panel_options(i915); 2956 parse_generic_dtd(i915); 2957 parse_lfp_data(i915); 2958 parse_lfp_backlight(i915); 2959 parse_sdvo_panel_data(i915); 2960 parse_driver_features(i915); 2961 parse_power_conservation_features(i915); 2962 parse_edp(i915); 2963 parse_psr(i915); 2964 parse_mipi_config(i915); 2965 parse_mipi_sequence(i915); 2966 2967 /* Depends on child device list */ 2968 parse_compression_parameters(i915); 2969 2970 out: 2971 if (!vbt) { 2972 drm_info(&i915->drm, 2973 "Failed to find VBIOS tables (VBT)\n"); 2974 init_vbt_missing_defaults(i915); 2975 } 2976 2977 /* Further processing on pre-parsed or generated child device data */ 2978 parse_sdvo_device_mapping(i915); 2979 parse_ddi_ports(i915); 2980 2981 kfree(oprom_vbt); 2982 } 2983 2984 /** 2985 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init() 2986 * @i915: i915 device instance 2987 */ 2988 void intel_bios_driver_remove(struct drm_i915_private *i915) 2989 { 2990 struct intel_bios_encoder_data *devdata, *nd; 2991 struct bdb_block_entry *entry, *ne; 2992 2993 list_for_each_entry_safe(devdata, nd, &i915->vbt.display_devices, node) { 2994 list_del(&devdata->node); 2995 kfree(devdata->dsc); 2996 kfree(devdata); 2997 } 2998 2999 list_for_each_entry_safe(entry, ne, &i915->vbt.bdb_blocks, node) { 3000 list_del(&entry->node); 3001 kfree(entry); 3002 } 3003 3004 kfree(i915->vbt.sdvo_lvds_vbt_mode); 3005 i915->vbt.sdvo_lvds_vbt_mode = NULL; 3006 kfree(i915->vbt.lfp_lvds_vbt_mode); 3007 i915->vbt.lfp_lvds_vbt_mode = NULL; 3008 kfree(i915->vbt.dsi.data); 3009 i915->vbt.dsi.data = NULL; 3010 kfree(i915->vbt.dsi.pps); 3011 i915->vbt.dsi.pps = NULL; 3012 kfree(i915->vbt.dsi.config); 3013 i915->vbt.dsi.config = NULL; 3014 kfree(i915->vbt.dsi.deassert_seq); 3015 i915->vbt.dsi.deassert_seq = NULL; 3016 } 3017 3018 /** 3019 * intel_bios_is_tv_present - is integrated TV present in VBT 3020 * @i915: i915 device instance 3021 * 3022 * Return true if TV is present. If no child devices were parsed from VBT, 3023 * assume TV is present. 3024 */ 3025 bool intel_bios_is_tv_present(struct drm_i915_private *i915) 3026 { 3027 const struct intel_bios_encoder_data *devdata; 3028 const struct child_device_config *child; 3029 3030 if (!i915->vbt.int_tv_support) 3031 return false; 3032 3033 if (list_empty(&i915->vbt.display_devices)) 3034 return true; 3035 3036 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 3037 child = &devdata->child; 3038 3039 /* 3040 * If the device type is not TV, continue. 3041 */ 3042 switch (child->device_type) { 3043 case DEVICE_TYPE_INT_TV: 3044 case DEVICE_TYPE_TV: 3045 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: 3046 break; 3047 default: 3048 continue; 3049 } 3050 /* Only when the addin_offset is non-zero, it is regarded 3051 * as present. 3052 */ 3053 if (child->addin_offset) 3054 return true; 3055 } 3056 3057 return false; 3058 } 3059 3060 /** 3061 * intel_bios_is_lvds_present - is LVDS present in VBT 3062 * @i915: i915 device instance 3063 * @i2c_pin: i2c pin for LVDS if present 3064 * 3065 * Return true if LVDS is present. If no child devices were parsed from VBT, 3066 * assume LVDS is present. 3067 */ 3068 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin) 3069 { 3070 const struct intel_bios_encoder_data *devdata; 3071 const struct child_device_config *child; 3072 3073 if (list_empty(&i915->vbt.display_devices)) 3074 return true; 3075 3076 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 3077 child = &devdata->child; 3078 3079 /* If the device type is not LFP, continue. 3080 * We have to check both the new identifiers as well as the 3081 * old for compatibility with some BIOSes. 3082 */ 3083 if (child->device_type != DEVICE_TYPE_INT_LFP && 3084 child->device_type != DEVICE_TYPE_LFP) 3085 continue; 3086 3087 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin)) 3088 *i2c_pin = child->i2c_pin; 3089 3090 /* However, we cannot trust the BIOS writers to populate 3091 * the VBT correctly. Since LVDS requires additional 3092 * information from AIM blocks, a non-zero addin offset is 3093 * a good indicator that the LVDS is actually present. 3094 */ 3095 if (child->addin_offset) 3096 return true; 3097 3098 /* But even then some BIOS writers perform some black magic 3099 * and instantiate the device without reference to any 3100 * additional data. Trust that if the VBT was written into 3101 * the OpRegion then they have validated the LVDS's existence. 3102 */ 3103 if (i915->opregion.vbt) 3104 return true; 3105 } 3106 3107 return false; 3108 } 3109 3110 /** 3111 * intel_bios_is_port_present - is the specified digital port present 3112 * @i915: i915 device instance 3113 * @port: port to check 3114 * 3115 * Return true if the device in %port is present. 3116 */ 3117 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port) 3118 { 3119 if (WARN_ON(!has_ddi_port_info(i915))) 3120 return true; 3121 3122 return i915->vbt.ports[port]; 3123 } 3124 3125 /** 3126 * intel_bios_is_port_edp - is the device in given port eDP 3127 * @i915: i915 device instance 3128 * @port: port to check 3129 * 3130 * Return true if the device in %port is eDP. 3131 */ 3132 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port) 3133 { 3134 const struct intel_bios_encoder_data *devdata = 3135 intel_bios_encoder_data_lookup(i915, port); 3136 3137 return devdata && intel_bios_encoder_supports_edp(devdata); 3138 } 3139 3140 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata) 3141 { 3142 const struct child_device_config *child = &devdata->child; 3143 3144 if (!intel_bios_encoder_supports_dp(devdata) || 3145 !intel_bios_encoder_supports_hdmi(devdata)) 3146 return false; 3147 3148 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA) 3149 return true; 3150 3151 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ 3152 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA && 3153 child->aux_channel != 0) 3154 return true; 3155 3156 return false; 3157 } 3158 3159 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915, 3160 enum port port) 3161 { 3162 const struct intel_bios_encoder_data *devdata = 3163 intel_bios_encoder_data_lookup(i915, port); 3164 3165 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata); 3166 } 3167 3168 /** 3169 * intel_bios_is_dsi_present - is DSI present in VBT 3170 * @i915: i915 device instance 3171 * @port: port for DSI if present 3172 * 3173 * Return true if DSI is present, and return the port in %port. 3174 */ 3175 bool intel_bios_is_dsi_present(struct drm_i915_private *i915, 3176 enum port *port) 3177 { 3178 const struct intel_bios_encoder_data *devdata; 3179 const struct child_device_config *child; 3180 u8 dvo_port; 3181 3182 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 3183 child = &devdata->child; 3184 3185 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3186 continue; 3187 3188 dvo_port = child->dvo_port; 3189 3190 if (dvo_port == DVO_PORT_MIPIA || 3191 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) || 3192 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) { 3193 if (port) 3194 *port = dvo_port - DVO_PORT_MIPIA; 3195 return true; 3196 } else if (dvo_port == DVO_PORT_MIPIB || 3197 dvo_port == DVO_PORT_MIPIC || 3198 dvo_port == DVO_PORT_MIPID) { 3199 drm_dbg_kms(&i915->drm, 3200 "VBT has unsupported DSI port %c\n", 3201 port_name(dvo_port - DVO_PORT_MIPIA)); 3202 } 3203 } 3204 3205 return false; 3206 } 3207 3208 static void fill_dsc(struct intel_crtc_state *crtc_state, 3209 struct dsc_compression_parameters_entry *dsc, 3210 int dsc_max_bpc) 3211 { 3212 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; 3213 int bpc = 8; 3214 3215 vdsc_cfg->dsc_version_major = dsc->version_major; 3216 vdsc_cfg->dsc_version_minor = dsc->version_minor; 3217 3218 if (dsc->support_12bpc && dsc_max_bpc >= 12) 3219 bpc = 12; 3220 else if (dsc->support_10bpc && dsc_max_bpc >= 10) 3221 bpc = 10; 3222 else if (dsc->support_8bpc && dsc_max_bpc >= 8) 3223 bpc = 8; 3224 else 3225 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n", 3226 dsc_max_bpc); 3227 3228 crtc_state->pipe_bpp = bpc * 3; 3229 3230 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp, 3231 VBT_DSC_MAX_BPP(dsc->max_bpp)); 3232 3233 /* 3234 * FIXME: This is ugly, and slice count should take DSC engine 3235 * throughput etc. into account. 3236 * 3237 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices. 3238 */ 3239 if (dsc->slices_per_line & BIT(2)) { 3240 crtc_state->dsc.slice_count = 4; 3241 } else if (dsc->slices_per_line & BIT(1)) { 3242 crtc_state->dsc.slice_count = 2; 3243 } else { 3244 /* FIXME */ 3245 if (!(dsc->slices_per_line & BIT(0))) 3246 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n"); 3247 3248 crtc_state->dsc.slice_count = 1; 3249 } 3250 3251 if (crtc_state->hw.adjusted_mode.crtc_hdisplay % 3252 crtc_state->dsc.slice_count != 0) 3253 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n", 3254 crtc_state->hw.adjusted_mode.crtc_hdisplay, 3255 crtc_state->dsc.slice_count); 3256 3257 /* 3258 * The VBT rc_buffer_block_size and rc_buffer_size definitions 3259 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. 3260 */ 3261 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, 3262 dsc->rc_buffer_size); 3263 3264 /* FIXME: DSI spec says bpc + 1 for this one */ 3265 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); 3266 3267 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; 3268 3269 vdsc_cfg->slice_height = dsc->slice_height; 3270 } 3271 3272 /* FIXME: initially DSI specific */ 3273 bool intel_bios_get_dsc_params(struct intel_encoder *encoder, 3274 struct intel_crtc_state *crtc_state, 3275 int dsc_max_bpc) 3276 { 3277 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3278 const struct intel_bios_encoder_data *devdata; 3279 const struct child_device_config *child; 3280 3281 list_for_each_entry(devdata, &i915->vbt.display_devices, node) { 3282 child = &devdata->child; 3283 3284 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) 3285 continue; 3286 3287 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) { 3288 if (!devdata->dsc) 3289 return false; 3290 3291 if (crtc_state) 3292 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc); 3293 3294 return true; 3295 } 3296 } 3297 3298 return false; 3299 } 3300 3301 /** 3302 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port 3303 * @i915: i915 device instance 3304 * @port: port to check 3305 * 3306 * Return true if HPD should be inverted for %port. 3307 */ 3308 bool 3309 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915, 3310 enum port port) 3311 { 3312 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3313 3314 if (drm_WARN_ON_ONCE(&i915->drm, 3315 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915))) 3316 return false; 3317 3318 return devdata && devdata->child.hpd_invert; 3319 } 3320 3321 /** 3322 * intel_bios_is_lspcon_present - if LSPCON is attached on %port 3323 * @i915: i915 device instance 3324 * @port: port to check 3325 * 3326 * Return true if LSPCON is present on this port 3327 */ 3328 bool 3329 intel_bios_is_lspcon_present(const struct drm_i915_private *i915, 3330 enum port port) 3331 { 3332 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3333 3334 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon; 3335 } 3336 3337 /** 3338 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port 3339 * @i915: i915 device instance 3340 * @port: port to check 3341 * 3342 * Return true if port requires lane reversal 3343 */ 3344 bool 3345 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915, 3346 enum port port) 3347 { 3348 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3349 3350 return devdata && devdata->child.lane_reversal; 3351 } 3352 3353 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915, 3354 enum port port) 3355 { 3356 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port]; 3357 enum aux_ch aux_ch; 3358 3359 if (!devdata || !devdata->child.aux_channel) { 3360 aux_ch = (enum aux_ch)port; 3361 3362 drm_dbg_kms(&i915->drm, 3363 "using AUX %c for port %c (platform default)\n", 3364 aux_ch_name(aux_ch), port_name(port)); 3365 return aux_ch; 3366 } 3367 3368 /* 3369 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D 3370 * map to DDI A,B,TC1,TC2 respectively. 3371 * 3372 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E 3373 * map to DDI A,TC1,TC2,TC3,TC4 respectively. 3374 */ 3375 switch (devdata->child.aux_channel) { 3376 case DP_AUX_A: 3377 aux_ch = AUX_CH_A; 3378 break; 3379 case DP_AUX_B: 3380 if (IS_ALDERLAKE_S(i915)) 3381 aux_ch = AUX_CH_USBC1; 3382 else 3383 aux_ch = AUX_CH_B; 3384 break; 3385 case DP_AUX_C: 3386 if (IS_ALDERLAKE_S(i915)) 3387 aux_ch = AUX_CH_USBC2; 3388 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 3389 aux_ch = AUX_CH_USBC1; 3390 else 3391 aux_ch = AUX_CH_C; 3392 break; 3393 case DP_AUX_D: 3394 if (DISPLAY_VER(i915) == 13) 3395 aux_ch = AUX_CH_D_XELPD; 3396 else if (IS_ALDERLAKE_S(i915)) 3397 aux_ch = AUX_CH_USBC3; 3398 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) 3399 aux_ch = AUX_CH_USBC2; 3400 else 3401 aux_ch = AUX_CH_D; 3402 break; 3403 case DP_AUX_E: 3404 if (DISPLAY_VER(i915) == 13) 3405 aux_ch = AUX_CH_E_XELPD; 3406 else if (IS_ALDERLAKE_S(i915)) 3407 aux_ch = AUX_CH_USBC4; 3408 else 3409 aux_ch = AUX_CH_E; 3410 break; 3411 case DP_AUX_F: 3412 if (DISPLAY_VER(i915) == 13) 3413 aux_ch = AUX_CH_USBC1; 3414 else 3415 aux_ch = AUX_CH_F; 3416 break; 3417 case DP_AUX_G: 3418 if (DISPLAY_VER(i915) == 13) 3419 aux_ch = AUX_CH_USBC2; 3420 else 3421 aux_ch = AUX_CH_G; 3422 break; 3423 case DP_AUX_H: 3424 if (DISPLAY_VER(i915) == 13) 3425 aux_ch = AUX_CH_USBC3; 3426 else 3427 aux_ch = AUX_CH_H; 3428 break; 3429 case DP_AUX_I: 3430 if (DISPLAY_VER(i915) == 13) 3431 aux_ch = AUX_CH_USBC4; 3432 else 3433 aux_ch = AUX_CH_I; 3434 break; 3435 default: 3436 MISSING_CASE(devdata->child.aux_channel); 3437 aux_ch = AUX_CH_A; 3438 break; 3439 } 3440 3441 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n", 3442 aux_ch_name(aux_ch), port_name(port)); 3443 3444 return aux_ch; 3445 } 3446 3447 int intel_bios_max_tmds_clock(struct intel_encoder *encoder) 3448 { 3449 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3450 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3451 3452 return _intel_bios_max_tmds_clock(devdata); 3453 } 3454 3455 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */ 3456 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder) 3457 { 3458 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3459 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3460 3461 return _intel_bios_hdmi_level_shift(devdata); 3462 } 3463 3464 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata) 3465 { 3466 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3467 return 0; 3468 3469 return translate_iboost(devdata->child.dp_iboost_level); 3470 } 3471 3472 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata) 3473 { 3474 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost) 3475 return 0; 3476 3477 return translate_iboost(devdata->child.hdmi_iboost_level); 3478 } 3479 3480 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder) 3481 { 3482 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3483 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3484 3485 return _intel_bios_dp_max_link_rate(devdata); 3486 } 3487 3488 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder) 3489 { 3490 struct drm_i915_private *i915 = to_i915(encoder->base.dev); 3491 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port]; 3492 3493 if (!devdata || !devdata->child.ddc_pin) 3494 return 0; 3495 3496 return map_ddc_pin(i915, devdata->child.ddc_pin); 3497 } 3498 3499 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata) 3500 { 3501 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c; 3502 } 3503 3504 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata) 3505 { 3506 return devdata->i915->vbt.version >= 209 && devdata->child.tbt; 3507 } 3508 3509 const struct intel_bios_encoder_data * 3510 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port) 3511 { 3512 return i915->vbt.ports[port]; 3513 } 3514