xref: /linux/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h (revision 86e2d052c2320bf12571a5d96b16c2745e1cfc5e)
194ee73eeSBaihan Li /* SPDX-License-Identifier: GPL-2.0-or-later */
294ee73eeSBaihan Li /* Copyright (c) 2024 Hisilicon Limited. */
394ee73eeSBaihan Li 
494ee73eeSBaihan Li #ifndef DP_KAPI_H
594ee73eeSBaihan Li #define DP_KAPI_H
694ee73eeSBaihan Li 
794ee73eeSBaihan Li #include <linux/types.h>
894ee73eeSBaihan Li #include <linux/delay.h>
994ee73eeSBaihan Li #include <drm/drm_device.h>
1094ee73eeSBaihan Li #include <drm/drm_encoder.h>
1194ee73eeSBaihan Li #include <drm/drm_connector.h>
1294ee73eeSBaihan Li #include <drm/drm_print.h>
131e7f3551SBaihan Li #include <drm/display/drm_dp_helper.h>
1494ee73eeSBaihan Li 
1594ee73eeSBaihan Li struct hibmc_dp_dev;
1694ee73eeSBaihan Li 
172f618261SBaihan Li enum hibmc_dp_cbar_pattern {
182f618261SBaihan Li 	CBAR_COLOR_BAR,
192f618261SBaihan Li 	CBAR_WHITE,
202f618261SBaihan Li 	CBAR_RED,
212f618261SBaihan Li 	CBAR_ORANGE,
222f618261SBaihan Li 	CBAR_YELLOW,
232f618261SBaihan Li 	CBAR_GREEN,
242f618261SBaihan Li 	CBAR_CYAN,
252f618261SBaihan Li 	CBAR_BLUE,
262f618261SBaihan Li 	CBAR_PURPLE,
272f618261SBaihan Li 	CBAR_BLACK,
282f618261SBaihan Li };
292f618261SBaihan Li 
302f618261SBaihan Li struct hibmc_dp_color_raw {
312f618261SBaihan Li 	enum hibmc_dp_cbar_pattern pattern;
322f618261SBaihan Li 	u32 r_value;
332f618261SBaihan Li 	u32 g_value;
342f618261SBaihan Li 	u32 b_value;
352f618261SBaihan Li };
362f618261SBaihan Li 
372f618261SBaihan Li struct hibmc_dp_cbar_cfg {
382f618261SBaihan Li 	u8 enable;
392f618261SBaihan Li 	u8 self_timing;
402f618261SBaihan Li 	u8 dynamic_rate; /* 0:static, 1-255(frame):dynamic */
412f618261SBaihan Li 	enum hibmc_dp_cbar_pattern pattern;
422f618261SBaihan Li };
432f618261SBaihan Li 
4494ee73eeSBaihan Li struct hibmc_dp {
4594ee73eeSBaihan Li 	struct hibmc_dp_dev *dp_dev;
4694ee73eeSBaihan Li 	struct drm_device *drm_dev;
4794ee73eeSBaihan Li 	struct drm_encoder encoder;
4894ee73eeSBaihan Li 	struct drm_connector connector;
4994ee73eeSBaihan Li 	void __iomem *mmio;
501e7f3551SBaihan Li 	struct drm_dp_aux aux;
512f618261SBaihan Li 	struct hibmc_dp_cbar_cfg cfg;
52*3c7623fbSBaihan Li 	u32 irq_status;
5394ee73eeSBaihan Li };
5494ee73eeSBaihan Li 
5594ee73eeSBaihan Li int hibmc_dp_hw_init(struct hibmc_dp *dp);
5694ee73eeSBaihan Li int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode);
5794ee73eeSBaihan Li void hibmc_dp_display_en(struct hibmc_dp *dp, bool enable);
582f618261SBaihan Li void hibmc_dp_set_cbar(struct hibmc_dp *dp, const struct hibmc_dp_cbar_cfg *cfg);
59*3c7623fbSBaihan Li void hibmc_dp_reset_link(struct hibmc_dp *dp);
60*3c7623fbSBaihan Li void hibmc_dp_hpd_cfg(struct hibmc_dp *dp);
61*3c7623fbSBaihan Li void hibmc_dp_enable_int(struct hibmc_dp *dp);
62*3c7623fbSBaihan Li void hibmc_dp_disable_int(struct hibmc_dp *dp);
6394ee73eeSBaihan Li 
6494ee73eeSBaihan Li #endif
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