xref: /linux/drivers/gpu/drm/gud/gud_internal.h (revision 68a052239fc4b351e961f698b824f7654a346091)
1 /* SPDX-License-Identifier: MIT */
2 
3 #ifndef __LINUX_GUD_INTERNAL_H
4 #define __LINUX_GUD_INTERNAL_H
5 
6 #include <linux/list.h>
7 #include <linux/mutex.h>
8 #include <linux/scatterlist.h>
9 #include <linux/usb.h>
10 #include <linux/workqueue.h>
11 #include <uapi/drm/drm_fourcc.h>
12 
13 #include <drm/drm_modes.h>
14 
15 struct gud_device {
16 	struct drm_device drm;
17 	struct drm_plane plane;
18 	struct drm_crtc crtc;
19 	struct work_struct work;
20 	u32 flags;
21 	const struct drm_format_info *xrgb8888_emulation_format;
22 
23 	u16 *properties;
24 	unsigned int num_properties;
25 
26 	unsigned int bulk_pipe;
27 	void *bulk_buf;
28 	size_t bulk_len;
29 	struct sg_table bulk_sgt;
30 
31 	u8 compression;
32 	void *lz4_comp_mem;
33 	void *compress_buf;
34 
35 	u64 stats_length;
36 	u64 stats_actual_length;
37 	unsigned int stats_num_errors;
38 
39 	struct mutex ctrl_lock; /* Serialize get/set and status transfers */
40 
41 	struct mutex damage_lock; /* Protects the following members: */
42 	struct drm_framebuffer *fb;
43 	struct drm_rect damage;
44 	bool prev_flush_failed;
45 	void *shadow_buf;
46 };
47 
48 static inline struct gud_device *to_gud_device(struct drm_device *drm)
49 {
50 	return container_of(drm, struct gud_device, drm);
51 }
52 
53 static inline struct usb_device *gud_to_usb_device(struct gud_device *gdrm)
54 {
55 	return interface_to_usbdev(to_usb_interface(gdrm->drm.dev));
56 }
57 
58 int gud_usb_get(struct gud_device *gdrm, u8 request, u16 index, void *buf, size_t len);
59 int gud_usb_set(struct gud_device *gdrm, u8 request, u16 index, void *buf, size_t len);
60 int gud_usb_get_u8(struct gud_device *gdrm, u8 request, u16 index, u8 *val);
61 int gud_usb_set_u8(struct gud_device *gdrm, u8 request, u8 val);
62 
63 void gud_clear_damage(struct gud_device *gdrm);
64 void gud_flush_work(struct work_struct *work);
65 int gud_plane_atomic_check(struct drm_plane *plane,
66 			   struct drm_atomic_state *state);
67 void gud_plane_atomic_update(struct drm_plane *plane,
68 			     struct drm_atomic_state *atomic_state);
69 int gud_connector_fill_properties(struct drm_connector_state *connector_state,
70 				  struct gud_property_req *properties);
71 int gud_get_connectors(struct gud_device *gdrm);
72 
73 /* Driver internal fourcc transfer formats */
74 #define GUD_DRM_FORMAT_R1		0x00000122
75 #define GUD_DRM_FORMAT_XRGB1111		0x03121722
76 
77 static inline u8 gud_from_fourcc(u32 fourcc)
78 {
79 	switch (fourcc) {
80 	case GUD_DRM_FORMAT_R1:
81 		return GUD_PIXEL_FORMAT_R1;
82 	case DRM_FORMAT_R8:
83 		return GUD_PIXEL_FORMAT_R8;
84 	case GUD_DRM_FORMAT_XRGB1111:
85 		return GUD_PIXEL_FORMAT_XRGB1111;
86 	case DRM_FORMAT_RGB332:
87 		return GUD_PIXEL_FORMAT_RGB332;
88 	case DRM_FORMAT_RGB565:
89 		return GUD_PIXEL_FORMAT_RGB565;
90 	case DRM_FORMAT_RGB888:
91 		return GUD_PIXEL_FORMAT_RGB888;
92 	case DRM_FORMAT_XRGB8888:
93 		return GUD_PIXEL_FORMAT_XRGB8888;
94 	case DRM_FORMAT_ARGB8888:
95 		return GUD_PIXEL_FORMAT_ARGB8888;
96 	}
97 
98 	return 0;
99 }
100 
101 static inline u32 gud_to_fourcc(u8 format)
102 {
103 	switch (format) {
104 	case GUD_PIXEL_FORMAT_R1:
105 		return GUD_DRM_FORMAT_R1;
106 	case GUD_PIXEL_FORMAT_R8:
107 		return DRM_FORMAT_R8;
108 	case GUD_PIXEL_FORMAT_XRGB1111:
109 		return GUD_DRM_FORMAT_XRGB1111;
110 	case GUD_PIXEL_FORMAT_RGB332:
111 		return DRM_FORMAT_RGB332;
112 	case GUD_PIXEL_FORMAT_RGB565:
113 		return DRM_FORMAT_RGB565;
114 	case GUD_PIXEL_FORMAT_RGB888:
115 		return DRM_FORMAT_RGB888;
116 	case GUD_PIXEL_FORMAT_XRGB8888:
117 		return DRM_FORMAT_XRGB8888;
118 	case GUD_PIXEL_FORMAT_ARGB8888:
119 		return DRM_FORMAT_ARGB8888;
120 	}
121 
122 	return 0;
123 }
124 
125 static inline void gud_from_display_mode(struct gud_display_mode_req *dst,
126 					 const struct drm_display_mode *src)
127 {
128 	u32 flags = src->flags & GUD_DISPLAY_MODE_FLAG_USER_MASK;
129 
130 	if (src->type & DRM_MODE_TYPE_PREFERRED)
131 		flags |= GUD_DISPLAY_MODE_FLAG_PREFERRED;
132 
133 	dst->clock = cpu_to_le32(src->clock);
134 	dst->hdisplay = cpu_to_le16(src->hdisplay);
135 	dst->hsync_start = cpu_to_le16(src->hsync_start);
136 	dst->hsync_end = cpu_to_le16(src->hsync_end);
137 	dst->htotal = cpu_to_le16(src->htotal);
138 	dst->vdisplay = cpu_to_le16(src->vdisplay);
139 	dst->vsync_start = cpu_to_le16(src->vsync_start);
140 	dst->vsync_end = cpu_to_le16(src->vsync_end);
141 	dst->vtotal = cpu_to_le16(src->vtotal);
142 	dst->flags = cpu_to_le32(flags);
143 }
144 
145 static inline void gud_to_display_mode(struct drm_display_mode *dst,
146 				       const struct gud_display_mode_req *src)
147 {
148 	u32 flags = le32_to_cpu(src->flags);
149 
150 	memset(dst, 0, sizeof(*dst));
151 	dst->clock = le32_to_cpu(src->clock);
152 	dst->hdisplay = le16_to_cpu(src->hdisplay);
153 	dst->hsync_start = le16_to_cpu(src->hsync_start);
154 	dst->hsync_end = le16_to_cpu(src->hsync_end);
155 	dst->htotal = le16_to_cpu(src->htotal);
156 	dst->vdisplay = le16_to_cpu(src->vdisplay);
157 	dst->vsync_start = le16_to_cpu(src->vsync_start);
158 	dst->vsync_end = le16_to_cpu(src->vsync_end);
159 	dst->vtotal = le16_to_cpu(src->vtotal);
160 	dst->flags = flags & GUD_DISPLAY_MODE_FLAG_USER_MASK;
161 	dst->type = DRM_MODE_TYPE_DRIVER;
162 	if (flags & GUD_DISPLAY_MODE_FLAG_PREFERRED)
163 		dst->type |= DRM_MODE_TYPE_PREFERRED;
164 	drm_mode_set_name(dst);
165 }
166 
167 #endif
168