1 /* 2 * Copyright 2006 Dave Airlie <airlied@linux.ie> 3 * Copyright © 2006-2007 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 23 * DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Eric Anholt <eric@anholt.net> 27 */ 28 #include <linux/module.h> 29 #include <linux/i2c.h> 30 #include <linux/slab.h> 31 #include <linux/delay.h> 32 #include "drmP.h" 33 #include "drm.h" 34 #include "drm_crtc.h" 35 #include "drm_edid.h" 36 #include "psb_intel_drv.h" 37 #include "gma_drm.h" 38 #include "psb_drv.h" 39 #include "psb_intel_sdvo_regs.h" 40 #include "psb_intel_reg.h" 41 42 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1) 43 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1) 44 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1) 45 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0) 46 47 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\ 48 SDVO_TV_MASK) 49 50 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) 51 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) 52 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) 53 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) 54 55 56 static const char *tv_format_names[] = { 57 "NTSC_M" , "NTSC_J" , "NTSC_443", 58 "PAL_B" , "PAL_D" , "PAL_G" , 59 "PAL_H" , "PAL_I" , "PAL_M" , 60 "PAL_N" , "PAL_NC" , "PAL_60" , 61 "SECAM_B" , "SECAM_D" , "SECAM_G" , 62 "SECAM_K" , "SECAM_K1", "SECAM_L" , 63 "SECAM_60" 64 }; 65 66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names)) 67 68 struct psb_intel_sdvo { 69 struct psb_intel_encoder base; 70 71 struct i2c_adapter *i2c; 72 u8 slave_addr; 73 74 struct i2c_adapter ddc; 75 76 /* Register for the SDVO device: SDVOB or SDVOC */ 77 int sdvo_reg; 78 79 /* Active outputs controlled by this SDVO output */ 80 uint16_t controlled_output; 81 82 /* 83 * Capabilities of the SDVO device returned by 84 * i830_sdvo_get_capabilities() 85 */ 86 struct psb_intel_sdvo_caps caps; 87 88 /* Pixel clock limitations reported by the SDVO device, in kHz */ 89 int pixel_clock_min, pixel_clock_max; 90 91 /* 92 * For multiple function SDVO device, 93 * this is for current attached outputs. 94 */ 95 uint16_t attached_output; 96 97 /** 98 * This is used to select the color range of RBG outputs in HDMI mode. 99 * It is only valid when using TMDS encoding and 8 bit per color mode. 100 */ 101 uint32_t color_range; 102 103 /** 104 * This is set if we're going to treat the device as TV-out. 105 * 106 * While we have these nice friendly flags for output types that ought 107 * to decide this for us, the S-Video output on our HDMI+S-Video card 108 * shows up as RGB1 (VGA). 109 */ 110 bool is_tv; 111 112 /* This is for current tv format name */ 113 int tv_format_index; 114 115 /** 116 * This is set if we treat the device as HDMI, instead of DVI. 117 */ 118 bool is_hdmi; 119 bool has_hdmi_monitor; 120 bool has_hdmi_audio; 121 122 /** 123 * This is set if we detect output of sdvo device as LVDS and 124 * have a valid fixed mode to use with the panel. 125 */ 126 bool is_lvds; 127 128 /** 129 * This is sdvo fixed pannel mode pointer 130 */ 131 struct drm_display_mode *sdvo_lvds_fixed_mode; 132 133 /* DDC bus used by this SDVO encoder */ 134 uint8_t ddc_bus; 135 136 /* Input timings for adjusted_mode */ 137 struct psb_intel_sdvo_dtd input_dtd; 138 }; 139 140 struct psb_intel_sdvo_connector { 141 struct psb_intel_connector base; 142 143 /* Mark the type of connector */ 144 uint16_t output_flag; 145 146 int force_audio; 147 148 /* This contains all current supported TV format */ 149 u8 tv_format_supported[TV_FORMAT_NUM]; 150 int format_supported_num; 151 struct drm_property *tv_format; 152 153 /* add the property for the SDVO-TV */ 154 struct drm_property *left; 155 struct drm_property *right; 156 struct drm_property *top; 157 struct drm_property *bottom; 158 struct drm_property *hpos; 159 struct drm_property *vpos; 160 struct drm_property *contrast; 161 struct drm_property *saturation; 162 struct drm_property *hue; 163 struct drm_property *sharpness; 164 struct drm_property *flicker_filter; 165 struct drm_property *flicker_filter_adaptive; 166 struct drm_property *flicker_filter_2d; 167 struct drm_property *tv_chroma_filter; 168 struct drm_property *tv_luma_filter; 169 struct drm_property *dot_crawl; 170 171 /* add the property for the SDVO-TV/LVDS */ 172 struct drm_property *brightness; 173 174 /* Add variable to record current setting for the above property */ 175 u32 left_margin, right_margin, top_margin, bottom_margin; 176 177 /* this is to get the range of margin.*/ 178 u32 max_hscan, max_vscan; 179 u32 max_hpos, cur_hpos; 180 u32 max_vpos, cur_vpos; 181 u32 cur_brightness, max_brightness; 182 u32 cur_contrast, max_contrast; 183 u32 cur_saturation, max_saturation; 184 u32 cur_hue, max_hue; 185 u32 cur_sharpness, max_sharpness; 186 u32 cur_flicker_filter, max_flicker_filter; 187 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive; 188 u32 cur_flicker_filter_2d, max_flicker_filter_2d; 189 u32 cur_tv_chroma_filter, max_tv_chroma_filter; 190 u32 cur_tv_luma_filter, max_tv_luma_filter; 191 u32 cur_dot_crawl, max_dot_crawl; 192 }; 193 194 static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder) 195 { 196 return container_of(encoder, struct psb_intel_sdvo, base.base); 197 } 198 199 static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector) 200 { 201 return container_of(psb_intel_attached_encoder(connector), 202 struct psb_intel_sdvo, base); 203 } 204 205 static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector) 206 { 207 return container_of(to_psb_intel_connector(connector), struct psb_intel_sdvo_connector, base); 208 } 209 210 static bool 211 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags); 212 static bool 213 psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 214 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 215 int type); 216 static bool 217 psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 218 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector); 219 220 /** 221 * Writes the SDVOB or SDVOC with the given value, but always writes both 222 * SDVOB and SDVOC to work around apparent hardware issues (according to 223 * comments in the BIOS). 224 */ 225 static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val) 226 { 227 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 228 u32 bval = val, cval = val; 229 int i; 230 231 if (psb_intel_sdvo->sdvo_reg == SDVOB) { 232 cval = REG_READ(SDVOC); 233 } else { 234 bval = REG_READ(SDVOB); 235 } 236 /* 237 * Write the registers twice for luck. Sometimes, 238 * writing them only once doesn't appear to 'stick'. 239 * The BIOS does this too. Yay, magic 240 */ 241 for (i = 0; i < 2; i++) 242 { 243 REG_WRITE(SDVOB, bval); 244 REG_READ(SDVOB); 245 REG_WRITE(SDVOC, cval); 246 REG_READ(SDVOC); 247 } 248 } 249 250 static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch) 251 { 252 struct i2c_msg msgs[] = { 253 { 254 .addr = psb_intel_sdvo->slave_addr, 255 .flags = 0, 256 .len = 1, 257 .buf = &addr, 258 }, 259 { 260 .addr = psb_intel_sdvo->slave_addr, 261 .flags = I2C_M_RD, 262 .len = 1, 263 .buf = ch, 264 } 265 }; 266 int ret; 267 268 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2) 269 return true; 270 271 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret); 272 return false; 273 } 274 275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd} 276 /** Mapping of command numbers to names, for debug output */ 277 static const struct _sdvo_cmd_name { 278 u8 cmd; 279 const char *name; 280 } sdvo_cmd_names[] = { 281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET), 282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS), 283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV), 284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS), 285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS), 286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS), 287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP), 288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP), 289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS), 290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT), 291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG), 292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG), 293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE), 294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT), 295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT), 296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1), 297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2), 298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2), 300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1), 301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1), 302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2), 303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1), 304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2), 305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING), 306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1), 307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2), 308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE), 309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE), 310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS), 311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT), 312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT), 313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS), 314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT), 315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT), 316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES), 317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE), 318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE), 319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE), 320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH), 321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT), 322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT), 323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS), 324 325 /* Add the op code for SDVO enhancements */ 326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS), 327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS), 328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS), 329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS), 330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS), 331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS), 332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION), 333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION), 334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION), 335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE), 336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE), 337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE), 338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST), 339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST), 340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST), 341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS), 342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS), 343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS), 344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H), 345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H), 346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H), 347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V), 348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V), 349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V), 350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER), 351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER), 353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE), 354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE), 355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE), 356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D), 357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D), 358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D), 359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS), 360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS), 361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS), 362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL), 363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL), 364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER), 365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER), 366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER), 367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER), 368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER), 369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER), 370 371 /* HDMI op code */ 372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE), 373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE), 374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE), 375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI), 376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI), 377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP), 378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY), 379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY), 380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER), 381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT), 382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT), 383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX), 384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX), 385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO), 386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT), 387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT), 388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE), 389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE), 390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA), 391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 392 }; 393 394 #define IS_SDVOB(reg) (reg == SDVOB) 395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC") 396 397 static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 398 const void *args, int args_len) 399 { 400 int i; 401 402 DRM_DEBUG_KMS("%s: W: %02X ", 403 SDVO_NAME(psb_intel_sdvo), cmd); 404 for (i = 0; i < args_len; i++) 405 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]); 406 for (; i < 8; i++) 407 DRM_LOG_KMS(" "); 408 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) { 409 if (cmd == sdvo_cmd_names[i].cmd) { 410 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name); 411 break; 412 } 413 } 414 if (i == ARRAY_SIZE(sdvo_cmd_names)) 415 DRM_LOG_KMS("(%02X)", cmd); 416 DRM_LOG_KMS("\n"); 417 } 418 419 static const char *cmd_status_names[] = { 420 "Power on", 421 "Success", 422 "Not supported", 423 "Invalid arg", 424 "Pending", 425 "Target not specified", 426 "Scaling not supported" 427 }; 428 429 static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 430 const void *args, int args_len) 431 { 432 u8 buf[args_len*2 + 2], status; 433 struct i2c_msg msgs[args_len + 3]; 434 int i, ret; 435 436 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len); 437 438 for (i = 0; i < args_len; i++) { 439 msgs[i].addr = psb_intel_sdvo->slave_addr; 440 msgs[i].flags = 0; 441 msgs[i].len = 2; 442 msgs[i].buf = buf + 2 *i; 443 buf[2*i + 0] = SDVO_I2C_ARG_0 - i; 444 buf[2*i + 1] = ((u8*)args)[i]; 445 } 446 msgs[i].addr = psb_intel_sdvo->slave_addr; 447 msgs[i].flags = 0; 448 msgs[i].len = 2; 449 msgs[i].buf = buf + 2*i; 450 buf[2*i + 0] = SDVO_I2C_OPCODE; 451 buf[2*i + 1] = cmd; 452 453 /* the following two are to read the response */ 454 status = SDVO_I2C_CMD_STATUS; 455 msgs[i+1].addr = psb_intel_sdvo->slave_addr; 456 msgs[i+1].flags = 0; 457 msgs[i+1].len = 1; 458 msgs[i+1].buf = &status; 459 460 msgs[i+2].addr = psb_intel_sdvo->slave_addr; 461 msgs[i+2].flags = I2C_M_RD; 462 msgs[i+2].len = 1; 463 msgs[i+2].buf = &status; 464 465 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3); 466 if (ret < 0) { 467 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); 468 return false; 469 } 470 if (ret != i+3) { 471 /* failure in I2C transfer */ 472 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3); 473 return false; 474 } 475 476 return true; 477 } 478 479 static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo, 480 void *response, int response_len) 481 { 482 u8 retry = 5; 483 u8 status; 484 int i; 485 486 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo)); 487 488 /* 489 * The documentation states that all commands will be 490 * processed within 15µs, and that we need only poll 491 * the status byte a maximum of 3 times in order for the 492 * command to be complete. 493 * 494 * Check 5 times in case the hardware failed to read the docs. 495 */ 496 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 497 SDVO_I2C_CMD_STATUS, 498 &status)) 499 goto log_fail; 500 501 while (status == SDVO_CMD_STATUS_PENDING && retry--) { 502 udelay(15); 503 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 504 SDVO_I2C_CMD_STATUS, 505 &status)) 506 goto log_fail; 507 } 508 509 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) 510 DRM_LOG_KMS("(%s)", cmd_status_names[status]); 511 else 512 DRM_LOG_KMS("(??? %d)", status); 513 514 if (status != SDVO_CMD_STATUS_SUCCESS) 515 goto log_fail; 516 517 /* Read the command response */ 518 for (i = 0; i < response_len; i++) { 519 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, 520 SDVO_I2C_RETURN_0 + i, 521 &((u8 *)response)[i])) 522 goto log_fail; 523 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]); 524 } 525 DRM_LOG_KMS("\n"); 526 return true; 527 528 log_fail: 529 DRM_LOG_KMS("... failed\n"); 530 return false; 531 } 532 533 static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) 534 { 535 if (mode->clock >= 100000) 536 return 1; 537 else if (mode->clock >= 50000) 538 return 2; 539 else 540 return 4; 541 } 542 543 static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo, 544 u8 ddc_bus) 545 { 546 /* This must be the immediately preceding write before the i2c xfer */ 547 return psb_intel_sdvo_write_cmd(psb_intel_sdvo, 548 SDVO_CMD_SET_CONTROL_BUS_SWITCH, 549 &ddc_bus, 1); 550 } 551 552 static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len) 553 { 554 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len)) 555 return false; 556 557 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0); 558 } 559 560 static bool 561 psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len) 562 { 563 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0)) 564 return false; 565 566 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len); 567 } 568 569 static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo) 570 { 571 struct psb_intel_sdvo_set_target_input_args targets = {0}; 572 return psb_intel_sdvo_set_value(psb_intel_sdvo, 573 SDVO_CMD_SET_TARGET_INPUT, 574 &targets, sizeof(targets)); 575 } 576 577 /** 578 * Return whether each input is trained. 579 * 580 * This function is making an assumption about the layout of the response, 581 * which should be checked against the docs. 582 */ 583 static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2) 584 { 585 struct psb_intel_sdvo_get_trained_inputs_response response; 586 587 BUILD_BUG_ON(sizeof(response) != 1); 588 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS, 589 &response, sizeof(response))) 590 return false; 591 592 *input_1 = response.input0_trained; 593 *input_2 = response.input1_trained; 594 return true; 595 } 596 597 static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo, 598 u16 outputs) 599 { 600 return psb_intel_sdvo_set_value(psb_intel_sdvo, 601 SDVO_CMD_SET_ACTIVE_OUTPUTS, 602 &outputs, sizeof(outputs)); 603 } 604 605 static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo, 606 int mode) 607 { 608 u8 state = SDVO_ENCODER_STATE_ON; 609 610 switch (mode) { 611 case DRM_MODE_DPMS_ON: 612 state = SDVO_ENCODER_STATE_ON; 613 break; 614 case DRM_MODE_DPMS_STANDBY: 615 state = SDVO_ENCODER_STATE_STANDBY; 616 break; 617 case DRM_MODE_DPMS_SUSPEND: 618 state = SDVO_ENCODER_STATE_SUSPEND; 619 break; 620 case DRM_MODE_DPMS_OFF: 621 state = SDVO_ENCODER_STATE_OFF; 622 break; 623 } 624 625 return psb_intel_sdvo_set_value(psb_intel_sdvo, 626 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); 627 } 628 629 static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo, 630 int *clock_min, 631 int *clock_max) 632 { 633 struct psb_intel_sdvo_pixel_clock_range clocks; 634 635 BUILD_BUG_ON(sizeof(clocks) != 4); 636 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 637 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, 638 &clocks, sizeof(clocks))) 639 return false; 640 641 /* Convert the values from units of 10 kHz to kHz. */ 642 *clock_min = clocks.min * 10; 643 *clock_max = clocks.max * 10; 644 return true; 645 } 646 647 static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo, 648 u16 outputs) 649 { 650 return psb_intel_sdvo_set_value(psb_intel_sdvo, 651 SDVO_CMD_SET_TARGET_OUTPUT, 652 &outputs, sizeof(outputs)); 653 } 654 655 static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, 656 struct psb_intel_sdvo_dtd *dtd) 657 { 658 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && 659 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); 660 } 661 662 static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 663 struct psb_intel_sdvo_dtd *dtd) 664 { 665 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 666 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); 667 } 668 669 static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo, 670 struct psb_intel_sdvo_dtd *dtd) 671 { 672 return psb_intel_sdvo_set_timing(psb_intel_sdvo, 673 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); 674 } 675 676 static bool 677 psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 678 uint16_t clock, 679 uint16_t width, 680 uint16_t height) 681 { 682 struct psb_intel_sdvo_preferred_input_timing_args args; 683 684 memset(&args, 0, sizeof(args)); 685 args.clock = clock; 686 args.width = width; 687 args.height = height; 688 args.interlace = 0; 689 690 if (psb_intel_sdvo->is_lvds && 691 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || 692 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height)) 693 args.scaled = 1; 694 695 return psb_intel_sdvo_set_value(psb_intel_sdvo, 696 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 697 &args, sizeof(args)); 698 } 699 700 static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo, 701 struct psb_intel_sdvo_dtd *dtd) 702 { 703 BUILD_BUG_ON(sizeof(dtd->part1) != 8); 704 BUILD_BUG_ON(sizeof(dtd->part2) != 8); 705 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 706 &dtd->part1, sizeof(dtd->part1)) && 707 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 708 &dtd->part2, sizeof(dtd->part2)); 709 } 710 711 static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val) 712 { 713 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); 714 } 715 716 static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd, 717 const struct drm_display_mode *mode) 718 { 719 uint16_t width, height; 720 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len; 721 uint16_t h_sync_offset, v_sync_offset; 722 723 width = mode->crtc_hdisplay; 724 height = mode->crtc_vdisplay; 725 726 /* do some mode translations */ 727 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start; 728 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start; 729 730 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start; 731 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start; 732 733 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start; 734 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start; 735 736 dtd->part1.clock = mode->clock / 10; 737 dtd->part1.h_active = width & 0xff; 738 dtd->part1.h_blank = h_blank_len & 0xff; 739 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) | 740 ((h_blank_len >> 8) & 0xf); 741 dtd->part1.v_active = height & 0xff; 742 dtd->part1.v_blank = v_blank_len & 0xff; 743 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) | 744 ((v_blank_len >> 8) & 0xf); 745 746 dtd->part2.h_sync_off = h_sync_offset & 0xff; 747 dtd->part2.h_sync_width = h_sync_len & 0xff; 748 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 | 749 (v_sync_len & 0xf); 750 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) | 751 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) | 752 ((v_sync_len & 0x30) >> 4); 753 754 dtd->part2.dtd_flags = 0x18; 755 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 756 dtd->part2.dtd_flags |= 0x2; 757 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 758 dtd->part2.dtd_flags |= 0x4; 759 760 dtd->part2.sdvo_flags = 0; 761 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0; 762 dtd->part2.reserved = 0; 763 } 764 765 static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, 766 const struct psb_intel_sdvo_dtd *dtd) 767 { 768 mode->hdisplay = dtd->part1.h_active; 769 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; 770 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; 771 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2; 772 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; 773 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; 774 mode->htotal = mode->hdisplay + dtd->part1.h_blank; 775 mode->htotal += (dtd->part1.h_high & 0xf) << 8; 776 777 mode->vdisplay = dtd->part1.v_active; 778 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8; 779 mode->vsync_start = mode->vdisplay; 780 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf; 781 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2; 782 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0; 783 mode->vsync_end = mode->vsync_start + 784 (dtd->part2.v_sync_off_width & 0xf); 785 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4; 786 mode->vtotal = mode->vdisplay + dtd->part1.v_blank; 787 mode->vtotal += (dtd->part1.v_high & 0xf) << 8; 788 789 mode->clock = dtd->part1.clock * 10; 790 791 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); 792 if (dtd->part2.dtd_flags & 0x2) 793 mode->flags |= DRM_MODE_FLAG_PHSYNC; 794 if (dtd->part2.dtd_flags & 0x4) 795 mode->flags |= DRM_MODE_FLAG_PVSYNC; 796 } 797 798 static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo) 799 { 800 struct psb_intel_sdvo_encode encode; 801 802 BUILD_BUG_ON(sizeof(encode) != 2); 803 return psb_intel_sdvo_get_value(psb_intel_sdvo, 804 SDVO_CMD_GET_SUPP_ENCODE, 805 &encode, sizeof(encode)); 806 } 807 808 static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo, 809 uint8_t mode) 810 { 811 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1); 812 } 813 814 static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo, 815 uint8_t mode) 816 { 817 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 818 } 819 820 #if 0 821 static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo) 822 { 823 int i, j; 824 uint8_t set_buf_index[2]; 825 uint8_t av_split; 826 uint8_t buf_size; 827 uint8_t buf[48]; 828 uint8_t *pos; 829 830 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1); 831 832 for (i = 0; i <= av_split; i++) { 833 set_buf_index[0] = i; set_buf_index[1] = 0; 834 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, 835 set_buf_index, 2); 836 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 837 psb_intel_sdvo_read_response(encoder, &buf_size, 1); 838 839 pos = buf; 840 for (j = 0; j <= buf_size; j += 8) { 841 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, 842 NULL, 0); 843 psb_intel_sdvo_read_response(encoder, pos, 8); 844 pos += 8; 845 } 846 } 847 } 848 #endif 849 850 static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo) 851 { 852 DRM_INFO("HDMI is not supported yet"); 853 854 return false; 855 #if 0 856 struct dip_infoframe avi_if = { 857 .type = DIP_TYPE_AVI, 858 .ver = DIP_VERSION_AVI, 859 .len = DIP_LEN_AVI, 860 }; 861 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; 862 uint8_t set_buf_index[2] = { 1, 0 }; 863 uint64_t *data = (uint64_t *)&avi_if; 864 unsigned i; 865 866 intel_dip_infoframe_csum(&avi_if); 867 868 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, 869 SDVO_CMD_SET_HBUF_INDEX, 870 set_buf_index, 2)) 871 return false; 872 873 for (i = 0; i < sizeof(avi_if); i += 8) { 874 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, 875 SDVO_CMD_SET_HBUF_DATA, 876 data, 8)) 877 return false; 878 data++; 879 } 880 881 return psb_intel_sdvo_set_value(psb_intel_sdvo, 882 SDVO_CMD_SET_HBUF_TXRATE, 883 &tx_rate, 1); 884 #endif 885 } 886 887 static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo) 888 { 889 struct psb_intel_sdvo_tv_format format; 890 uint32_t format_map; 891 892 format_map = 1 << psb_intel_sdvo->tv_format_index; 893 memset(&format, 0, sizeof(format)); 894 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map))); 895 896 BUILD_BUG_ON(sizeof(format) != 6); 897 return psb_intel_sdvo_set_value(psb_intel_sdvo, 898 SDVO_CMD_SET_TV_FORMAT, 899 &format, sizeof(format)); 900 } 901 902 static bool 903 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo, 904 const struct drm_display_mode *mode) 905 { 906 struct psb_intel_sdvo_dtd output_dtd; 907 908 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 909 psb_intel_sdvo->attached_output)) 910 return false; 911 912 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 913 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd)) 914 return false; 915 916 return true; 917 } 918 919 static bool 920 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo, 921 const struct drm_display_mode *mode, 922 struct drm_display_mode *adjusted_mode) 923 { 924 /* Reset the input timing to the screen. Assume always input 0. */ 925 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 926 return false; 927 928 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo, 929 mode->clock / 10, 930 mode->hdisplay, 931 mode->vdisplay)) 932 return false; 933 934 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo, 935 &psb_intel_sdvo->input_dtd)) 936 return false; 937 938 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd); 939 940 drm_mode_set_crtcinfo(adjusted_mode, 0); 941 return true; 942 } 943 944 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder, 945 const struct drm_display_mode *mode, 946 struct drm_display_mode *adjusted_mode) 947 { 948 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 949 int multiplier; 950 951 /* We need to construct preferred input timings based on our 952 * output timings. To do that, we have to set the output 953 * timings, even though this isn't really the right place in 954 * the sequence to do it. Oh well. 955 */ 956 if (psb_intel_sdvo->is_tv) { 957 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode)) 958 return false; 959 960 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 961 mode, 962 adjusted_mode); 963 } else if (psb_intel_sdvo->is_lvds) { 964 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, 965 psb_intel_sdvo->sdvo_lvds_fixed_mode)) 966 return false; 967 968 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo, 969 mode, 970 adjusted_mode); 971 } 972 973 /* Make the CRTC code factor in the SDVO pixel multiplier. The 974 * SDVO device will factor out the multiplier during mode_set. 975 */ 976 multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode); 977 psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier); 978 979 return true; 980 } 981 982 static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder, 983 struct drm_display_mode *mode, 984 struct drm_display_mode *adjusted_mode) 985 { 986 struct drm_device *dev = encoder->dev; 987 struct drm_crtc *crtc = encoder->crtc; 988 struct psb_intel_crtc *psb_intel_crtc = to_psb_intel_crtc(crtc); 989 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 990 u32 sdvox; 991 struct psb_intel_sdvo_in_out_map in_out; 992 struct psb_intel_sdvo_dtd input_dtd; 993 int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode); 994 int rate; 995 996 if (!mode) 997 return; 998 999 /* First, set the input mapping for the first input to our controlled 1000 * output. This is only correct if we're a single-input device, in 1001 * which case the first input is the output from the appropriate SDVO 1002 * channel on the motherboard. In a two-input device, the first input 1003 * will be SDVOB and the second SDVOC. 1004 */ 1005 in_out.in0 = psb_intel_sdvo->attached_output; 1006 in_out.in1 = 0; 1007 1008 psb_intel_sdvo_set_value(psb_intel_sdvo, 1009 SDVO_CMD_SET_IN_OUT_MAP, 1010 &in_out, sizeof(in_out)); 1011 1012 /* Set the output timings to the screen */ 1013 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1014 psb_intel_sdvo->attached_output)) 1015 return; 1016 1017 /* We have tried to get input timing in mode_fixup, and filled into 1018 * adjusted_mode. 1019 */ 1020 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) { 1021 input_dtd = psb_intel_sdvo->input_dtd; 1022 } else { 1023 /* Set the output timing to the screen */ 1024 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, 1025 psb_intel_sdvo->attached_output)) 1026 return; 1027 1028 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode); 1029 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd); 1030 } 1031 1032 /* Set the input timing to the screen. Assume always input 0. */ 1033 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 1034 return; 1035 1036 if (psb_intel_sdvo->has_hdmi_monitor) { 1037 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI); 1038 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo, 1039 SDVO_COLORIMETRY_RGB256); 1040 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo); 1041 } else 1042 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI); 1043 1044 if (psb_intel_sdvo->is_tv && 1045 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo)) 1046 return; 1047 1048 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd); 1049 1050 switch (pixel_multiplier) { 1051 default: 1052 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; 1053 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; 1054 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; 1055 } 1056 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate)) 1057 return; 1058 1059 /* Set the SDVO control regs. */ 1060 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg); 1061 switch (psb_intel_sdvo->sdvo_reg) { 1062 case SDVOB: 1063 sdvox &= SDVOB_PRESERVE_MASK; 1064 break; 1065 case SDVOC: 1066 sdvox &= SDVOC_PRESERVE_MASK; 1067 break; 1068 } 1069 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE; 1070 1071 if (psb_intel_crtc->pipe == 1) 1072 sdvox |= SDVO_PIPE_B_SELECT; 1073 if (psb_intel_sdvo->has_hdmi_audio) 1074 sdvox |= SDVO_AUDIO_ENABLE; 1075 1076 /* FIXME: Check if this is needed for PSB 1077 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT; 1078 */ 1079 1080 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL) 1081 sdvox |= SDVO_STALL_SELECT; 1082 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox); 1083 } 1084 1085 static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1086 { 1087 struct drm_device *dev = encoder->dev; 1088 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1089 u32 temp; 1090 1091 switch (mode) { 1092 case DRM_MODE_DPMS_ON: 1093 DRM_DEBUG("DPMS_ON"); 1094 break; 1095 case DRM_MODE_DPMS_OFF: 1096 DRM_DEBUG("DPMS_OFF"); 1097 break; 1098 default: 1099 DRM_DEBUG("DPMS: %d", mode); 1100 } 1101 1102 if (mode != DRM_MODE_DPMS_ON) { 1103 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0); 1104 if (0) 1105 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1106 1107 if (mode == DRM_MODE_DPMS_OFF) { 1108 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1109 if ((temp & SDVO_ENABLE) != 0) { 1110 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE); 1111 } 1112 } 1113 } else { 1114 bool input1, input2; 1115 int i; 1116 u8 status; 1117 1118 temp = REG_READ(psb_intel_sdvo->sdvo_reg); 1119 if ((temp & SDVO_ENABLE) == 0) 1120 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE); 1121 for (i = 0; i < 2; i++) 1122 psb_intel_wait_for_vblank(dev); 1123 1124 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2); 1125 /* Warn if the device reported failure to sync. 1126 * A lot of SDVO devices fail to notify of sync, but it's 1127 * a given it the status is a success, we succeeded. 1128 */ 1129 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) { 1130 DRM_DEBUG_KMS("First %s output reported failure to " 1131 "sync\n", SDVO_NAME(psb_intel_sdvo)); 1132 } 1133 1134 if (0) 1135 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode); 1136 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output); 1137 } 1138 return; 1139 } 1140 1141 static int psb_intel_sdvo_mode_valid(struct drm_connector *connector, 1142 struct drm_display_mode *mode) 1143 { 1144 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1145 1146 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 1147 return MODE_NO_DBLESCAN; 1148 1149 if (psb_intel_sdvo->pixel_clock_min > mode->clock) 1150 return MODE_CLOCK_LOW; 1151 1152 if (psb_intel_sdvo->pixel_clock_max < mode->clock) 1153 return MODE_CLOCK_HIGH; 1154 1155 if (psb_intel_sdvo->is_lvds) { 1156 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) 1157 return MODE_PANEL; 1158 1159 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay) 1160 return MODE_PANEL; 1161 } 1162 1163 return MODE_OK; 1164 } 1165 1166 static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps) 1167 { 1168 BUILD_BUG_ON(sizeof(*caps) != 8); 1169 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 1170 SDVO_CMD_GET_DEVICE_CAPS, 1171 caps, sizeof(*caps))) 1172 return false; 1173 1174 DRM_DEBUG_KMS("SDVO capabilities:\n" 1175 " vendor_id: %d\n" 1176 " device_id: %d\n" 1177 " device_rev_id: %d\n" 1178 " sdvo_version_major: %d\n" 1179 " sdvo_version_minor: %d\n" 1180 " sdvo_inputs_mask: %d\n" 1181 " smooth_scaling: %d\n" 1182 " sharp_scaling: %d\n" 1183 " up_scaling: %d\n" 1184 " down_scaling: %d\n" 1185 " stall_support: %d\n" 1186 " output_flags: %d\n", 1187 caps->vendor_id, 1188 caps->device_id, 1189 caps->device_rev_id, 1190 caps->sdvo_version_major, 1191 caps->sdvo_version_minor, 1192 caps->sdvo_inputs_mask, 1193 caps->smooth_scaling, 1194 caps->sharp_scaling, 1195 caps->up_scaling, 1196 caps->down_scaling, 1197 caps->stall_support, 1198 caps->output_flags); 1199 1200 return true; 1201 } 1202 1203 /* No use! */ 1204 #if 0 1205 struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB) 1206 { 1207 struct drm_connector *connector = NULL; 1208 struct psb_intel_sdvo *iout = NULL; 1209 struct psb_intel_sdvo *sdvo; 1210 1211 /* find the sdvo connector */ 1212 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { 1213 iout = to_psb_intel_sdvo(connector); 1214 1215 if (iout->type != INTEL_OUTPUT_SDVO) 1216 continue; 1217 1218 sdvo = iout->dev_priv; 1219 1220 if (sdvo->sdvo_reg == SDVOB && sdvoB) 1221 return connector; 1222 1223 if (sdvo->sdvo_reg == SDVOC && !sdvoB) 1224 return connector; 1225 1226 } 1227 1228 return NULL; 1229 } 1230 1231 int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector) 1232 { 1233 u8 response[2]; 1234 u8 status; 1235 struct psb_intel_sdvo *psb_intel_sdvo; 1236 DRM_DEBUG_KMS("\n"); 1237 1238 if (!connector) 1239 return 0; 1240 1241 psb_intel_sdvo = to_psb_intel_sdvo(connector); 1242 1243 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, 1244 &response, 2) && response[0]; 1245 } 1246 1247 void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on) 1248 { 1249 u8 response[2]; 1250 u8 status; 1251 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector); 1252 1253 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1254 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1255 1256 if (on) { 1257 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); 1258 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1259 1260 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1261 } else { 1262 response[0] = 0; 1263 response[1] = 0; 1264 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); 1265 } 1266 1267 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); 1268 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2); 1269 } 1270 #endif 1271 1272 static bool 1273 psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo) 1274 { 1275 /* Is there more than one type of output? */ 1276 int caps = psb_intel_sdvo->caps.output_flags & 0xf; 1277 return caps & -caps; 1278 } 1279 1280 static struct edid * 1281 psb_intel_sdvo_get_edid(struct drm_connector *connector) 1282 { 1283 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector); 1284 return drm_get_edid(connector, &sdvo->ddc); 1285 } 1286 1287 /* Mac mini hack -- use the same DDC as the analog connector */ 1288 static struct edid * 1289 psb_intel_sdvo_get_analog_edid(struct drm_connector *connector) 1290 { 1291 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1292 1293 return drm_get_edid(connector, 1294 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter); 1295 return NULL; 1296 } 1297 1298 static enum drm_connector_status 1299 psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) 1300 { 1301 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1302 enum drm_connector_status status; 1303 struct edid *edid; 1304 1305 edid = psb_intel_sdvo_get_edid(connector); 1306 1307 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) { 1308 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus; 1309 1310 /* 1311 * Don't use the 1 as the argument of DDC bus switch to get 1312 * the EDID. It is used for SDVO SPD ROM. 1313 */ 1314 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) { 1315 psb_intel_sdvo->ddc_bus = ddc; 1316 edid = psb_intel_sdvo_get_edid(connector); 1317 if (edid) 1318 break; 1319 } 1320 /* 1321 * If we found the EDID on the other bus, 1322 * assume that is the correct DDC bus. 1323 */ 1324 if (edid == NULL) 1325 psb_intel_sdvo->ddc_bus = saved_ddc; 1326 } 1327 1328 /* 1329 * When there is no edid and no monitor is connected with VGA 1330 * port, try to use the CRT ddc to read the EDID for DVI-connector. 1331 */ 1332 if (edid == NULL) 1333 edid = psb_intel_sdvo_get_analog_edid(connector); 1334 1335 status = connector_status_unknown; 1336 if (edid != NULL) { 1337 /* DDC bus is shared, match EDID to connector type */ 1338 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 1339 status = connector_status_connected; 1340 if (psb_intel_sdvo->is_hdmi) { 1341 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); 1342 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); 1343 } 1344 } else 1345 status = connector_status_disconnected; 1346 connector->display_info.raw_edid = NULL; 1347 kfree(edid); 1348 } 1349 1350 if (status == connector_status_connected) { 1351 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1352 if (psb_intel_sdvo_connector->force_audio) 1353 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0; 1354 } 1355 1356 return status; 1357 } 1358 1359 static enum drm_connector_status 1360 psb_intel_sdvo_detect(struct drm_connector *connector, bool force) 1361 { 1362 uint16_t response; 1363 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1364 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1365 enum drm_connector_status ret; 1366 1367 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1368 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0)) 1369 return connector_status_unknown; 1370 1371 /* add 30ms delay when the output type might be TV */ 1372 if (psb_intel_sdvo->caps.output_flags & 1373 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0)) 1374 mdelay(30); 1375 1376 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2)) 1377 return connector_status_unknown; 1378 1379 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n", 1380 response & 0xff, response >> 8, 1381 psb_intel_sdvo_connector->output_flag); 1382 1383 if (response == 0) 1384 return connector_status_disconnected; 1385 1386 psb_intel_sdvo->attached_output = response; 1387 1388 psb_intel_sdvo->has_hdmi_monitor = false; 1389 psb_intel_sdvo->has_hdmi_audio = false; 1390 1391 if ((psb_intel_sdvo_connector->output_flag & response) == 0) 1392 ret = connector_status_disconnected; 1393 else if (IS_TMDS(psb_intel_sdvo_connector)) 1394 ret = psb_intel_sdvo_hdmi_sink_detect(connector); 1395 else { 1396 struct edid *edid; 1397 1398 /* if we have an edid check it matches the connection */ 1399 edid = psb_intel_sdvo_get_edid(connector); 1400 if (edid == NULL) 1401 edid = psb_intel_sdvo_get_analog_edid(connector); 1402 if (edid != NULL) { 1403 if (edid->input & DRM_EDID_INPUT_DIGITAL) 1404 ret = connector_status_disconnected; 1405 else 1406 ret = connector_status_connected; 1407 connector->display_info.raw_edid = NULL; 1408 kfree(edid); 1409 } else 1410 ret = connector_status_connected; 1411 } 1412 1413 /* May update encoder flag for like clock for SDVO TV, etc.*/ 1414 if (ret == connector_status_connected) { 1415 psb_intel_sdvo->is_tv = false; 1416 psb_intel_sdvo->is_lvds = false; 1417 psb_intel_sdvo->base.needs_tv_clock = false; 1418 1419 if (response & SDVO_TV_MASK) { 1420 psb_intel_sdvo->is_tv = true; 1421 psb_intel_sdvo->base.needs_tv_clock = true; 1422 } 1423 if (response & SDVO_LVDS_MASK) 1424 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL; 1425 } 1426 1427 return ret; 1428 } 1429 1430 static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1431 { 1432 struct edid *edid; 1433 1434 /* set the bus switch and get the modes */ 1435 edid = psb_intel_sdvo_get_edid(connector); 1436 1437 /* 1438 * Mac mini hack. On this device, the DVI-I connector shares one DDC 1439 * link between analog and digital outputs. So, if the regular SDVO 1440 * DDC fails, check to see if the analog output is disconnected, in 1441 * which case we'll look there for the digital DDC data. 1442 */ 1443 if (edid == NULL) 1444 edid = psb_intel_sdvo_get_analog_edid(connector); 1445 1446 if (edid != NULL) { 1447 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1448 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); 1449 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector); 1450 1451 if (connector_is_digital == monitor_is_digital) { 1452 drm_mode_connector_update_edid_property(connector, edid); 1453 drm_add_edid_modes(connector, edid); 1454 } 1455 1456 connector->display_info.raw_edid = NULL; 1457 kfree(edid); 1458 } 1459 } 1460 1461 /* 1462 * Set of SDVO TV modes. 1463 * Note! This is in reply order (see loop in get_tv_modes). 1464 * XXX: all 60Hz refresh? 1465 */ 1466 static const struct drm_display_mode sdvo_tv_modes[] = { 1467 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384, 1468 416, 0, 200, 201, 232, 233, 0, 1469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1470 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384, 1471 416, 0, 240, 241, 272, 273, 0, 1472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1473 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464, 1474 496, 0, 300, 301, 332, 333, 0, 1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1476 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704, 1477 736, 0, 350, 351, 382, 383, 0, 1478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1479 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704, 1480 736, 0, 400, 401, 432, 433, 0, 1481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1482 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704, 1483 736, 0, 480, 481, 512, 513, 0, 1484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1485 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768, 1486 800, 0, 480, 481, 512, 513, 0, 1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1488 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768, 1489 800, 0, 576, 577, 608, 609, 0, 1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1491 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784, 1492 816, 0, 350, 351, 382, 383, 0, 1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1494 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784, 1495 816, 0, 400, 401, 432, 433, 0, 1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1497 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784, 1498 816, 0, 480, 481, 512, 513, 0, 1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1500 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784, 1501 816, 0, 540, 541, 572, 573, 0, 1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1503 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784, 1504 816, 0, 576, 577, 608, 609, 0, 1505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1506 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832, 1507 864, 0, 576, 577, 608, 609, 0, 1508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1509 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864, 1510 896, 0, 600, 601, 632, 633, 0, 1511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1512 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896, 1513 928, 0, 624, 625, 656, 657, 0, 1514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1515 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984, 1516 1016, 0, 766, 767, 798, 799, 0, 1517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1518 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088, 1519 1120, 0, 768, 769, 800, 801, 0, 1520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1521 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344, 1522 1376, 0, 1024, 1025, 1056, 1057, 0, 1523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 1524 }; 1525 1526 static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector) 1527 { 1528 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1529 struct psb_intel_sdvo_sdtv_resolution_request tv_res; 1530 uint32_t reply = 0, format_map = 0; 1531 int i; 1532 1533 /* Read the list of supported input resolutions for the selected TV 1534 * format. 1535 */ 1536 format_map = 1 << psb_intel_sdvo->tv_format_index; 1537 memcpy(&tv_res, &format_map, 1538 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request))); 1539 1540 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output)) 1541 return; 1542 1543 BUILD_BUG_ON(sizeof(tv_res) != 3); 1544 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, 1545 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT, 1546 &tv_res, sizeof(tv_res))) 1547 return; 1548 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3)) 1549 return; 1550 1551 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) 1552 if (reply & (1 << i)) { 1553 struct drm_display_mode *nmode; 1554 nmode = drm_mode_duplicate(connector->dev, 1555 &sdvo_tv_modes[i]); 1556 if (nmode) 1557 drm_mode_probed_add(connector, nmode); 1558 } 1559 } 1560 1561 static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector) 1562 { 1563 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1564 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1565 struct drm_display_mode *newmode; 1566 1567 /* 1568 * Attempt to get the mode list from DDC. 1569 * Assume that the preferred modes are 1570 * arranged in priority order. 1571 */ 1572 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c); 1573 if (list_empty(&connector->probed_modes) == false) 1574 goto end; 1575 1576 /* Fetch modes from VBT */ 1577 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { 1578 newmode = drm_mode_duplicate(connector->dev, 1579 dev_priv->sdvo_lvds_vbt_mode); 1580 if (newmode != NULL) { 1581 /* Guarantee the mode is preferred */ 1582 newmode->type = (DRM_MODE_TYPE_PREFERRED | 1583 DRM_MODE_TYPE_DRIVER); 1584 drm_mode_probed_add(connector, newmode); 1585 } 1586 } 1587 1588 end: 1589 list_for_each_entry(newmode, &connector->probed_modes, head) { 1590 if (newmode->type & DRM_MODE_TYPE_PREFERRED) { 1591 psb_intel_sdvo->sdvo_lvds_fixed_mode = 1592 drm_mode_duplicate(connector->dev, newmode); 1593 1594 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode, 1595 0); 1596 1597 psb_intel_sdvo->is_lvds = true; 1598 break; 1599 } 1600 } 1601 1602 } 1603 1604 static int psb_intel_sdvo_get_modes(struct drm_connector *connector) 1605 { 1606 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1607 1608 if (IS_TV(psb_intel_sdvo_connector)) 1609 psb_intel_sdvo_get_tv_modes(connector); 1610 else if (IS_LVDS(psb_intel_sdvo_connector)) 1611 psb_intel_sdvo_get_lvds_modes(connector); 1612 else 1613 psb_intel_sdvo_get_ddc_modes(connector); 1614 1615 return !list_empty(&connector->probed_modes); 1616 } 1617 1618 static void 1619 psb_intel_sdvo_destroy_enhance_property(struct drm_connector *connector) 1620 { 1621 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1622 struct drm_device *dev = connector->dev; 1623 1624 if (psb_intel_sdvo_connector->left) 1625 drm_property_destroy(dev, psb_intel_sdvo_connector->left); 1626 if (psb_intel_sdvo_connector->right) 1627 drm_property_destroy(dev, psb_intel_sdvo_connector->right); 1628 if (psb_intel_sdvo_connector->top) 1629 drm_property_destroy(dev, psb_intel_sdvo_connector->top); 1630 if (psb_intel_sdvo_connector->bottom) 1631 drm_property_destroy(dev, psb_intel_sdvo_connector->bottom); 1632 if (psb_intel_sdvo_connector->hpos) 1633 drm_property_destroy(dev, psb_intel_sdvo_connector->hpos); 1634 if (psb_intel_sdvo_connector->vpos) 1635 drm_property_destroy(dev, psb_intel_sdvo_connector->vpos); 1636 if (psb_intel_sdvo_connector->saturation) 1637 drm_property_destroy(dev, psb_intel_sdvo_connector->saturation); 1638 if (psb_intel_sdvo_connector->contrast) 1639 drm_property_destroy(dev, psb_intel_sdvo_connector->contrast); 1640 if (psb_intel_sdvo_connector->hue) 1641 drm_property_destroy(dev, psb_intel_sdvo_connector->hue); 1642 if (psb_intel_sdvo_connector->sharpness) 1643 drm_property_destroy(dev, psb_intel_sdvo_connector->sharpness); 1644 if (psb_intel_sdvo_connector->flicker_filter) 1645 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter); 1646 if (psb_intel_sdvo_connector->flicker_filter_2d) 1647 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter_2d); 1648 if (psb_intel_sdvo_connector->flicker_filter_adaptive) 1649 drm_property_destroy(dev, psb_intel_sdvo_connector->flicker_filter_adaptive); 1650 if (psb_intel_sdvo_connector->tv_luma_filter) 1651 drm_property_destroy(dev, psb_intel_sdvo_connector->tv_luma_filter); 1652 if (psb_intel_sdvo_connector->tv_chroma_filter) 1653 drm_property_destroy(dev, psb_intel_sdvo_connector->tv_chroma_filter); 1654 if (psb_intel_sdvo_connector->dot_crawl) 1655 drm_property_destroy(dev, psb_intel_sdvo_connector->dot_crawl); 1656 if (psb_intel_sdvo_connector->brightness) 1657 drm_property_destroy(dev, psb_intel_sdvo_connector->brightness); 1658 } 1659 1660 static void psb_intel_sdvo_destroy(struct drm_connector *connector) 1661 { 1662 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1663 1664 if (psb_intel_sdvo_connector->tv_format) 1665 drm_property_destroy(connector->dev, 1666 psb_intel_sdvo_connector->tv_format); 1667 1668 psb_intel_sdvo_destroy_enhance_property(connector); 1669 drm_sysfs_connector_remove(connector); 1670 drm_connector_cleanup(connector); 1671 kfree(connector); 1672 } 1673 1674 static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) 1675 { 1676 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1677 struct edid *edid; 1678 bool has_audio = false; 1679 1680 if (!psb_intel_sdvo->is_hdmi) 1681 return false; 1682 1683 edid = psb_intel_sdvo_get_edid(connector); 1684 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) 1685 has_audio = drm_detect_monitor_audio(edid); 1686 1687 return has_audio; 1688 } 1689 1690 static int 1691 psb_intel_sdvo_set_property(struct drm_connector *connector, 1692 struct drm_property *property, 1693 uint64_t val) 1694 { 1695 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector); 1696 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector); 1697 struct drm_psb_private *dev_priv = connector->dev->dev_private; 1698 uint16_t temp_value; 1699 uint8_t cmd; 1700 int ret; 1701 1702 ret = drm_connector_property_set_value(connector, property, val); 1703 if (ret) 1704 return ret; 1705 1706 if (property == dev_priv->force_audio_property) { 1707 int i = val; 1708 bool has_audio; 1709 1710 if (i == psb_intel_sdvo_connector->force_audio) 1711 return 0; 1712 1713 psb_intel_sdvo_connector->force_audio = i; 1714 1715 if (i == 0) 1716 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector); 1717 else 1718 has_audio = i > 0; 1719 1720 if (has_audio == psb_intel_sdvo->has_hdmi_audio) 1721 return 0; 1722 1723 psb_intel_sdvo->has_hdmi_audio = has_audio; 1724 goto done; 1725 } 1726 1727 if (property == dev_priv->broadcast_rgb_property) { 1728 if (val == !!psb_intel_sdvo->color_range) 1729 return 0; 1730 1731 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; 1732 goto done; 1733 } 1734 1735 #define CHECK_PROPERTY(name, NAME) \ 1736 if (psb_intel_sdvo_connector->name == property) { \ 1737 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \ 1738 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \ 1739 cmd = SDVO_CMD_SET_##NAME; \ 1740 psb_intel_sdvo_connector->cur_##name = temp_value; \ 1741 goto set_value; \ 1742 } 1743 1744 if (property == psb_intel_sdvo_connector->tv_format) { 1745 if (val >= TV_FORMAT_NUM) 1746 return -EINVAL; 1747 1748 if (psb_intel_sdvo->tv_format_index == 1749 psb_intel_sdvo_connector->tv_format_supported[val]) 1750 return 0; 1751 1752 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val]; 1753 goto done; 1754 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) { 1755 temp_value = val; 1756 if (psb_intel_sdvo_connector->left == property) { 1757 drm_connector_property_set_value(connector, 1758 psb_intel_sdvo_connector->right, val); 1759 if (psb_intel_sdvo_connector->left_margin == temp_value) 1760 return 0; 1761 1762 psb_intel_sdvo_connector->left_margin = temp_value; 1763 psb_intel_sdvo_connector->right_margin = temp_value; 1764 temp_value = psb_intel_sdvo_connector->max_hscan - 1765 psb_intel_sdvo_connector->left_margin; 1766 cmd = SDVO_CMD_SET_OVERSCAN_H; 1767 goto set_value; 1768 } else if (psb_intel_sdvo_connector->right == property) { 1769 drm_connector_property_set_value(connector, 1770 psb_intel_sdvo_connector->left, val); 1771 if (psb_intel_sdvo_connector->right_margin == temp_value) 1772 return 0; 1773 1774 psb_intel_sdvo_connector->left_margin = temp_value; 1775 psb_intel_sdvo_connector->right_margin = temp_value; 1776 temp_value = psb_intel_sdvo_connector->max_hscan - 1777 psb_intel_sdvo_connector->left_margin; 1778 cmd = SDVO_CMD_SET_OVERSCAN_H; 1779 goto set_value; 1780 } else if (psb_intel_sdvo_connector->top == property) { 1781 drm_connector_property_set_value(connector, 1782 psb_intel_sdvo_connector->bottom, val); 1783 if (psb_intel_sdvo_connector->top_margin == temp_value) 1784 return 0; 1785 1786 psb_intel_sdvo_connector->top_margin = temp_value; 1787 psb_intel_sdvo_connector->bottom_margin = temp_value; 1788 temp_value = psb_intel_sdvo_connector->max_vscan - 1789 psb_intel_sdvo_connector->top_margin; 1790 cmd = SDVO_CMD_SET_OVERSCAN_V; 1791 goto set_value; 1792 } else if (psb_intel_sdvo_connector->bottom == property) { 1793 drm_connector_property_set_value(connector, 1794 psb_intel_sdvo_connector->top, val); 1795 if (psb_intel_sdvo_connector->bottom_margin == temp_value) 1796 return 0; 1797 1798 psb_intel_sdvo_connector->top_margin = temp_value; 1799 psb_intel_sdvo_connector->bottom_margin = temp_value; 1800 temp_value = psb_intel_sdvo_connector->max_vscan - 1801 psb_intel_sdvo_connector->top_margin; 1802 cmd = SDVO_CMD_SET_OVERSCAN_V; 1803 goto set_value; 1804 } 1805 CHECK_PROPERTY(hpos, HPOS) 1806 CHECK_PROPERTY(vpos, VPOS) 1807 CHECK_PROPERTY(saturation, SATURATION) 1808 CHECK_PROPERTY(contrast, CONTRAST) 1809 CHECK_PROPERTY(hue, HUE) 1810 CHECK_PROPERTY(brightness, BRIGHTNESS) 1811 CHECK_PROPERTY(sharpness, SHARPNESS) 1812 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER) 1813 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D) 1814 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE) 1815 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER) 1816 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER) 1817 CHECK_PROPERTY(dot_crawl, DOT_CRAWL) 1818 } 1819 1820 return -EINVAL; /* unknown property */ 1821 1822 set_value: 1823 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2)) 1824 return -EIO; 1825 1826 1827 done: 1828 if (psb_intel_sdvo->base.base.crtc) { 1829 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc; 1830 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1831 crtc->y, crtc->fb); 1832 } 1833 1834 return 0; 1835 #undef CHECK_PROPERTY 1836 } 1837 1838 static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = { 1839 .dpms = psb_intel_sdvo_dpms, 1840 .mode_fixup = psb_intel_sdvo_mode_fixup, 1841 .prepare = psb_intel_encoder_prepare, 1842 .mode_set = psb_intel_sdvo_mode_set, 1843 .commit = psb_intel_encoder_commit, 1844 }; 1845 1846 static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = { 1847 .dpms = drm_helper_connector_dpms, 1848 .detect = psb_intel_sdvo_detect, 1849 .fill_modes = drm_helper_probe_single_connector_modes, 1850 .set_property = psb_intel_sdvo_set_property, 1851 .destroy = psb_intel_sdvo_destroy, 1852 }; 1853 1854 static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = { 1855 .get_modes = psb_intel_sdvo_get_modes, 1856 .mode_valid = psb_intel_sdvo_mode_valid, 1857 .best_encoder = psb_intel_best_encoder, 1858 }; 1859 1860 static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder) 1861 { 1862 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder); 1863 1864 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL) 1865 drm_mode_destroy(encoder->dev, 1866 psb_intel_sdvo->sdvo_lvds_fixed_mode); 1867 1868 i2c_del_adapter(&psb_intel_sdvo->ddc); 1869 psb_intel_encoder_destroy(encoder); 1870 } 1871 1872 static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = { 1873 .destroy = psb_intel_sdvo_enc_destroy, 1874 }; 1875 1876 static void 1877 psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo) 1878 { 1879 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works. 1880 * We need to figure out if this is true for all available poulsbo 1881 * hardware, or if we need to fiddle with the guessing code above. 1882 * The problem might go away if we can parse sdvo mappings from bios */ 1883 sdvo->ddc_bus = 2; 1884 1885 #if 0 1886 uint16_t mask = 0; 1887 unsigned int num_bits; 1888 1889 /* Make a mask of outputs less than or equal to our own priority in the 1890 * list. 1891 */ 1892 switch (sdvo->controlled_output) { 1893 case SDVO_OUTPUT_LVDS1: 1894 mask |= SDVO_OUTPUT_LVDS1; 1895 case SDVO_OUTPUT_LVDS0: 1896 mask |= SDVO_OUTPUT_LVDS0; 1897 case SDVO_OUTPUT_TMDS1: 1898 mask |= SDVO_OUTPUT_TMDS1; 1899 case SDVO_OUTPUT_TMDS0: 1900 mask |= SDVO_OUTPUT_TMDS0; 1901 case SDVO_OUTPUT_RGB1: 1902 mask |= SDVO_OUTPUT_RGB1; 1903 case SDVO_OUTPUT_RGB0: 1904 mask |= SDVO_OUTPUT_RGB0; 1905 break; 1906 } 1907 1908 /* Count bits to find what number we are in the priority list. */ 1909 mask &= sdvo->caps.output_flags; 1910 num_bits = hweight16(mask); 1911 /* If more than 3 outputs, default to DDC bus 3 for now. */ 1912 if (num_bits > 3) 1913 num_bits = 3; 1914 1915 /* Corresponds to SDVO_CONTROL_BUS_DDCx */ 1916 sdvo->ddc_bus = 1 << num_bits; 1917 #endif 1918 } 1919 1920 /** 1921 * Choose the appropriate DDC bus for control bus switch command for this 1922 * SDVO output based on the controlled output. 1923 * 1924 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS 1925 * outputs, then LVDS outputs. 1926 */ 1927 static void 1928 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv, 1929 struct psb_intel_sdvo *sdvo, u32 reg) 1930 { 1931 struct sdvo_device_mapping *mapping; 1932 1933 if (IS_SDVOB(reg)) 1934 mapping = &(dev_priv->sdvo_mappings[0]); 1935 else 1936 mapping = &(dev_priv->sdvo_mappings[1]); 1937 1938 if (mapping->initialized) 1939 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4); 1940 else 1941 psb_intel_sdvo_guess_ddc_bus(sdvo); 1942 } 1943 1944 static void 1945 psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv, 1946 struct psb_intel_sdvo *sdvo, u32 reg) 1947 { 1948 struct sdvo_device_mapping *mapping; 1949 u8 pin, speed; 1950 1951 if (IS_SDVOB(reg)) 1952 mapping = &dev_priv->sdvo_mappings[0]; 1953 else 1954 mapping = &dev_priv->sdvo_mappings[1]; 1955 1956 pin = GMBUS_PORT_DPB; 1957 speed = GMBUS_RATE_1MHZ >> 8; 1958 if (mapping->initialized) { 1959 pin = mapping->i2c_pin; 1960 speed = mapping->i2c_speed; 1961 } 1962 1963 if (pin < GMBUS_NUM_PORTS) { 1964 sdvo->i2c = &dev_priv->gmbus[pin].adapter; 1965 gma_intel_gmbus_set_speed(sdvo->i2c, speed); 1966 gma_intel_gmbus_force_bit(sdvo->i2c, true); 1967 } else 1968 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter; 1969 } 1970 1971 static bool 1972 psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device) 1973 { 1974 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo); 1975 } 1976 1977 static u8 1978 psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) 1979 { 1980 struct drm_psb_private *dev_priv = dev->dev_private; 1981 struct sdvo_device_mapping *my_mapping, *other_mapping; 1982 1983 if (IS_SDVOB(sdvo_reg)) { 1984 my_mapping = &dev_priv->sdvo_mappings[0]; 1985 other_mapping = &dev_priv->sdvo_mappings[1]; 1986 } else { 1987 my_mapping = &dev_priv->sdvo_mappings[1]; 1988 other_mapping = &dev_priv->sdvo_mappings[0]; 1989 } 1990 1991 /* If the BIOS described our SDVO device, take advantage of it. */ 1992 if (my_mapping->slave_addr) 1993 return my_mapping->slave_addr; 1994 1995 /* If the BIOS only described a different SDVO device, use the 1996 * address that it isn't using. 1997 */ 1998 if (other_mapping->slave_addr) { 1999 if (other_mapping->slave_addr == 0x70) 2000 return 0x72; 2001 else 2002 return 0x70; 2003 } 2004 2005 /* No SDVO device info is found for another DVO port, 2006 * so use mapping assumption we had before BIOS parsing. 2007 */ 2008 if (IS_SDVOB(sdvo_reg)) 2009 return 0x70; 2010 else 2011 return 0x72; 2012 } 2013 2014 static void 2015 psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector, 2016 struct psb_intel_sdvo *encoder) 2017 { 2018 drm_connector_init(encoder->base.base.dev, 2019 &connector->base.base, 2020 &psb_intel_sdvo_connector_funcs, 2021 connector->base.base.connector_type); 2022 2023 drm_connector_helper_add(&connector->base.base, 2024 &psb_intel_sdvo_connector_helper_funcs); 2025 2026 connector->base.base.interlace_allowed = 0; 2027 connector->base.base.doublescan_allowed = 0; 2028 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB; 2029 2030 psb_intel_connector_attach_encoder(&connector->base, &encoder->base); 2031 drm_sysfs_connector_add(&connector->base.base); 2032 } 2033 2034 static void 2035 psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector) 2036 { 2037 /* FIXME: We don't support HDMI at the moment 2038 struct drm_device *dev = connector->base.base.dev; 2039 2040 intel_attach_force_audio_property(&connector->base.base); 2041 intel_attach_broadcast_rgb_property(&connector->base.base); 2042 */ 2043 } 2044 2045 static bool 2046 psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2047 { 2048 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2049 struct drm_connector *connector; 2050 struct psb_intel_connector *intel_connector; 2051 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2052 2053 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2054 if (!psb_intel_sdvo_connector) 2055 return false; 2056 2057 if (device == 0) { 2058 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0; 2059 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0; 2060 } else if (device == 1) { 2061 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1; 2062 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1; 2063 } 2064 2065 intel_connector = &psb_intel_sdvo_connector->base; 2066 connector = &intel_connector->base; 2067 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; 2068 encoder->encoder_type = DRM_MODE_ENCODER_TMDS; 2069 connector->connector_type = DRM_MODE_CONNECTOR_DVID; 2070 2071 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) { 2072 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; 2073 psb_intel_sdvo->is_hdmi = true; 2074 } 2075 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2076 (1 << INTEL_ANALOG_CLONE_BIT)); 2077 2078 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2079 if (psb_intel_sdvo->is_hdmi) 2080 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector); 2081 2082 return true; 2083 } 2084 2085 static bool 2086 psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type) 2087 { 2088 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2089 struct drm_connector *connector; 2090 struct psb_intel_connector *intel_connector; 2091 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2092 2093 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2094 if (!psb_intel_sdvo_connector) 2095 return false; 2096 2097 intel_connector = &psb_intel_sdvo_connector->base; 2098 connector = &intel_connector->base; 2099 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; 2100 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; 2101 2102 psb_intel_sdvo->controlled_output |= type; 2103 psb_intel_sdvo_connector->output_flag = type; 2104 2105 psb_intel_sdvo->is_tv = true; 2106 psb_intel_sdvo->base.needs_tv_clock = true; 2107 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; 2108 2109 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2110 2111 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type)) 2112 goto err; 2113 2114 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2115 goto err; 2116 2117 return true; 2118 2119 err: 2120 psb_intel_sdvo_destroy(connector); 2121 return false; 2122 } 2123 2124 static bool 2125 psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2126 { 2127 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2128 struct drm_connector *connector; 2129 struct psb_intel_connector *intel_connector; 2130 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2131 2132 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2133 if (!psb_intel_sdvo_connector) 2134 return false; 2135 2136 intel_connector = &psb_intel_sdvo_connector->base; 2137 connector = &intel_connector->base; 2138 connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2139 encoder->encoder_type = DRM_MODE_ENCODER_DAC; 2140 connector->connector_type = DRM_MODE_CONNECTOR_VGA; 2141 2142 if (device == 0) { 2143 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0; 2144 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0; 2145 } else if (device == 1) { 2146 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1; 2147 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1; 2148 } 2149 2150 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) | 2151 (1 << INTEL_ANALOG_CLONE_BIT)); 2152 2153 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, 2154 psb_intel_sdvo); 2155 return true; 2156 } 2157 2158 static bool 2159 psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device) 2160 { 2161 struct drm_encoder *encoder = &psb_intel_sdvo->base.base; 2162 struct drm_connector *connector; 2163 struct psb_intel_connector *intel_connector; 2164 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector; 2165 2166 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL); 2167 if (!psb_intel_sdvo_connector) 2168 return false; 2169 2170 intel_connector = &psb_intel_sdvo_connector->base; 2171 connector = &intel_connector->base; 2172 encoder->encoder_type = DRM_MODE_ENCODER_LVDS; 2173 connector->connector_type = DRM_MODE_CONNECTOR_LVDS; 2174 2175 if (device == 0) { 2176 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0; 2177 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0; 2178 } else if (device == 1) { 2179 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1; 2180 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1; 2181 } 2182 2183 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) | 2184 (1 << INTEL_SDVO_LVDS_CLONE_BIT)); 2185 2186 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo); 2187 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector)) 2188 goto err; 2189 2190 return true; 2191 2192 err: 2193 psb_intel_sdvo_destroy(connector); 2194 return false; 2195 } 2196 2197 static bool 2198 psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags) 2199 { 2200 psb_intel_sdvo->is_tv = false; 2201 psb_intel_sdvo->base.needs_tv_clock = false; 2202 psb_intel_sdvo->is_lvds = false; 2203 2204 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/ 2205 2206 if (flags & SDVO_OUTPUT_TMDS0) 2207 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0)) 2208 return false; 2209 2210 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK) 2211 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1)) 2212 return false; 2213 2214 /* TV has no XXX1 function block */ 2215 if (flags & SDVO_OUTPUT_SVID0) 2216 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0)) 2217 return false; 2218 2219 if (flags & SDVO_OUTPUT_CVBS0) 2220 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0)) 2221 return false; 2222 2223 if (flags & SDVO_OUTPUT_RGB0) 2224 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0)) 2225 return false; 2226 2227 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK) 2228 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1)) 2229 return false; 2230 2231 if (flags & SDVO_OUTPUT_LVDS0) 2232 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0)) 2233 return false; 2234 2235 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK) 2236 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1)) 2237 return false; 2238 2239 if ((flags & SDVO_OUTPUT_MASK) == 0) { 2240 unsigned char bytes[2]; 2241 2242 psb_intel_sdvo->controlled_output = 0; 2243 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2); 2244 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n", 2245 SDVO_NAME(psb_intel_sdvo), 2246 bytes[0], bytes[1]); 2247 return false; 2248 } 2249 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1); 2250 2251 return true; 2252 } 2253 2254 static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo, 2255 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2256 int type) 2257 { 2258 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2259 struct psb_intel_sdvo_tv_format format; 2260 uint32_t format_map, i; 2261 2262 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type)) 2263 return false; 2264 2265 BUILD_BUG_ON(sizeof(format) != 6); 2266 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2267 SDVO_CMD_GET_SUPPORTED_TV_FORMATS, 2268 &format, sizeof(format))) 2269 return false; 2270 2271 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format))); 2272 2273 if (format_map == 0) 2274 return false; 2275 2276 psb_intel_sdvo_connector->format_supported_num = 0; 2277 for (i = 0 ; i < TV_FORMAT_NUM; i++) 2278 if (format_map & (1 << i)) 2279 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i; 2280 2281 2282 psb_intel_sdvo_connector->tv_format = 2283 drm_property_create(dev, DRM_MODE_PROP_ENUM, 2284 "mode", psb_intel_sdvo_connector->format_supported_num); 2285 if (!psb_intel_sdvo_connector->tv_format) 2286 return false; 2287 2288 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++) 2289 drm_property_add_enum( 2290 psb_intel_sdvo_connector->tv_format, i, 2291 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]); 2292 2293 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0]; 2294 drm_connector_attach_property(&psb_intel_sdvo_connector->base.base, 2295 psb_intel_sdvo_connector->tv_format, 0); 2296 return true; 2297 2298 } 2299 2300 #define ENHANCEMENT(name, NAME) do { \ 2301 if (enhancements.name) { \ 2302 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \ 2303 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \ 2304 return false; \ 2305 psb_intel_sdvo_connector->max_##name = data_value[0]; \ 2306 psb_intel_sdvo_connector->cur_##name = response; \ 2307 psb_intel_sdvo_connector->name = \ 2308 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \ 2309 if (!psb_intel_sdvo_connector->name) return false; \ 2310 drm_connector_attach_property(connector, \ 2311 psb_intel_sdvo_connector->name, \ 2312 psb_intel_sdvo_connector->cur_##name); \ 2313 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \ 2314 data_value[0], data_value[1], response); \ 2315 } \ 2316 } while(0) 2317 2318 static bool 2319 psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo, 2320 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2321 struct psb_intel_sdvo_enhancements_reply enhancements) 2322 { 2323 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2324 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2325 uint16_t response, data_value[2]; 2326 2327 /* when horizontal overscan is supported, Add the left/right property */ 2328 if (enhancements.overscan_h) { 2329 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2330 SDVO_CMD_GET_MAX_OVERSCAN_H, 2331 &data_value, 4)) 2332 return false; 2333 2334 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2335 SDVO_CMD_GET_OVERSCAN_H, 2336 &response, 2)) 2337 return false; 2338 2339 psb_intel_sdvo_connector->max_hscan = data_value[0]; 2340 psb_intel_sdvo_connector->left_margin = data_value[0] - response; 2341 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin; 2342 psb_intel_sdvo_connector->left = 2343 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); 2344 if (!psb_intel_sdvo_connector->left) 2345 return false; 2346 2347 drm_connector_attach_property(connector, 2348 psb_intel_sdvo_connector->left, 2349 psb_intel_sdvo_connector->left_margin); 2350 2351 psb_intel_sdvo_connector->right = 2352 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); 2353 if (!psb_intel_sdvo_connector->right) 2354 return false; 2355 2356 drm_connector_attach_property(connector, 2357 psb_intel_sdvo_connector->right, 2358 psb_intel_sdvo_connector->right_margin); 2359 DRM_DEBUG_KMS("h_overscan: max %d, " 2360 "default %d, current %d\n", 2361 data_value[0], data_value[1], response); 2362 } 2363 2364 if (enhancements.overscan_v) { 2365 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2366 SDVO_CMD_GET_MAX_OVERSCAN_V, 2367 &data_value, 4)) 2368 return false; 2369 2370 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, 2371 SDVO_CMD_GET_OVERSCAN_V, 2372 &response, 2)) 2373 return false; 2374 2375 psb_intel_sdvo_connector->max_vscan = data_value[0]; 2376 psb_intel_sdvo_connector->top_margin = data_value[0] - response; 2377 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin; 2378 psb_intel_sdvo_connector->top = 2379 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]); 2380 if (!psb_intel_sdvo_connector->top) 2381 return false; 2382 2383 drm_connector_attach_property(connector, 2384 psb_intel_sdvo_connector->top, 2385 psb_intel_sdvo_connector->top_margin); 2386 2387 psb_intel_sdvo_connector->bottom = 2388 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]); 2389 if (!psb_intel_sdvo_connector->bottom) 2390 return false; 2391 2392 drm_connector_attach_property(connector, 2393 psb_intel_sdvo_connector->bottom, 2394 psb_intel_sdvo_connector->bottom_margin); 2395 DRM_DEBUG_KMS("v_overscan: max %d, " 2396 "default %d, current %d\n", 2397 data_value[0], data_value[1], response); 2398 } 2399 2400 ENHANCEMENT(hpos, HPOS); 2401 ENHANCEMENT(vpos, VPOS); 2402 ENHANCEMENT(saturation, SATURATION); 2403 ENHANCEMENT(contrast, CONTRAST); 2404 ENHANCEMENT(hue, HUE); 2405 ENHANCEMENT(sharpness, SHARPNESS); 2406 ENHANCEMENT(brightness, BRIGHTNESS); 2407 ENHANCEMENT(flicker_filter, FLICKER_FILTER); 2408 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE); 2409 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D); 2410 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER); 2411 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER); 2412 2413 if (enhancements.dot_crawl) { 2414 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2)) 2415 return false; 2416 2417 psb_intel_sdvo_connector->max_dot_crawl = 1; 2418 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1; 2419 psb_intel_sdvo_connector->dot_crawl = 2420 drm_property_create_range(dev, 0, "dot_crawl", 0, 1); 2421 if (!psb_intel_sdvo_connector->dot_crawl) 2422 return false; 2423 2424 drm_connector_attach_property(connector, 2425 psb_intel_sdvo_connector->dot_crawl, 2426 psb_intel_sdvo_connector->cur_dot_crawl); 2427 DRM_DEBUG_KMS("dot crawl: current %d\n", response); 2428 } 2429 2430 return true; 2431 } 2432 2433 static bool 2434 psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo, 2435 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector, 2436 struct psb_intel_sdvo_enhancements_reply enhancements) 2437 { 2438 struct drm_device *dev = psb_intel_sdvo->base.base.dev; 2439 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base; 2440 uint16_t response, data_value[2]; 2441 2442 ENHANCEMENT(brightness, BRIGHTNESS); 2443 2444 return true; 2445 } 2446 #undef ENHANCEMENT 2447 2448 static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo, 2449 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector) 2450 { 2451 union { 2452 struct psb_intel_sdvo_enhancements_reply reply; 2453 uint16_t response; 2454 } enhancements; 2455 2456 BUILD_BUG_ON(sizeof(enhancements) != 2); 2457 2458 enhancements.response = 0; 2459 psb_intel_sdvo_get_value(psb_intel_sdvo, 2460 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, 2461 &enhancements, sizeof(enhancements)); 2462 if (enhancements.response == 0) { 2463 DRM_DEBUG_KMS("No enhancement is supported\n"); 2464 return true; 2465 } 2466 2467 if (IS_TV(psb_intel_sdvo_connector)) 2468 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2469 else if(IS_LVDS(psb_intel_sdvo_connector)) 2470 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply); 2471 else 2472 return true; 2473 } 2474 2475 static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter, 2476 struct i2c_msg *msgs, 2477 int num) 2478 { 2479 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2480 2481 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus)) 2482 return -EIO; 2483 2484 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num); 2485 } 2486 2487 static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter) 2488 { 2489 struct psb_intel_sdvo *sdvo = adapter->algo_data; 2490 return sdvo->i2c->algo->functionality(sdvo->i2c); 2491 } 2492 2493 static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = { 2494 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer, 2495 .functionality = psb_intel_sdvo_ddc_proxy_func 2496 }; 2497 2498 static bool 2499 psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo, 2500 struct drm_device *dev) 2501 { 2502 sdvo->ddc.owner = THIS_MODULE; 2503 sdvo->ddc.class = I2C_CLASS_DDC; 2504 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy"); 2505 sdvo->ddc.dev.parent = &dev->pdev->dev; 2506 sdvo->ddc.algo_data = sdvo; 2507 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy; 2508 2509 return i2c_add_adapter(&sdvo->ddc) == 0; 2510 } 2511 2512 bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg) 2513 { 2514 struct drm_psb_private *dev_priv = dev->dev_private; 2515 struct psb_intel_encoder *psb_intel_encoder; 2516 struct psb_intel_sdvo *psb_intel_sdvo; 2517 int i; 2518 2519 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL); 2520 if (!psb_intel_sdvo) 2521 return false; 2522 2523 psb_intel_sdvo->sdvo_reg = sdvo_reg; 2524 psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1; 2525 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2526 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) { 2527 kfree(psb_intel_sdvo); 2528 return false; 2529 } 2530 2531 /* encoder type will be decided later */ 2532 psb_intel_encoder = &psb_intel_sdvo->base; 2533 psb_intel_encoder->type = INTEL_OUTPUT_SDVO; 2534 drm_encoder_init(dev, &psb_intel_encoder->base, &psb_intel_sdvo_enc_funcs, 0); 2535 2536 /* Read the regs to test if we can talk to the device */ 2537 for (i = 0; i < 0x40; i++) { 2538 u8 byte; 2539 2540 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) { 2541 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2542 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2543 goto err; 2544 } 2545 } 2546 2547 if (IS_SDVOB(sdvo_reg)) 2548 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; 2549 else 2550 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; 2551 2552 drm_encoder_helper_add(&psb_intel_encoder->base, &psb_intel_sdvo_helper_funcs); 2553 2554 /* In default case sdvo lvds is false */ 2555 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps)) 2556 goto err; 2557 2558 if (psb_intel_sdvo_output_setup(psb_intel_sdvo, 2559 psb_intel_sdvo->caps.output_flags) != true) { 2560 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2561 IS_SDVOB(sdvo_reg) ? 'B' : 'C'); 2562 goto err; 2563 } 2564 2565 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg); 2566 2567 /* Set the input timing to the screen. Assume always input 0. */ 2568 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo)) 2569 goto err; 2570 2571 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo, 2572 &psb_intel_sdvo->pixel_clock_min, 2573 &psb_intel_sdvo->pixel_clock_max)) 2574 goto err; 2575 2576 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " 2577 "clock range %dMHz - %dMHz, " 2578 "input 1: %c, input 2: %c, " 2579 "output 1: %c, output 2: %c\n", 2580 SDVO_NAME(psb_intel_sdvo), 2581 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id, 2582 psb_intel_sdvo->caps.device_rev_id, 2583 psb_intel_sdvo->pixel_clock_min / 1000, 2584 psb_intel_sdvo->pixel_clock_max / 1000, 2585 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N', 2586 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N', 2587 /* check currently supported outputs */ 2588 psb_intel_sdvo->caps.output_flags & 2589 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N', 2590 psb_intel_sdvo->caps.output_flags & 2591 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); 2592 return true; 2593 2594 err: 2595 drm_encoder_cleanup(&psb_intel_encoder->base); 2596 i2c_del_adapter(&psb_intel_sdvo->ddc); 2597 kfree(psb_intel_sdvo); 2598 2599 return false; 2600 } 2601