xref: /linux/drivers/gpu/drm/gma500/psb_drv.c (revision 722ecdbce68a87de2d9296f91308f44ea900a039)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /**************************************************************************
3  * Copyright (c) 2007-2011, Intel Corporation.
4  * All Rights Reserved.
5  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
6  * All Rights Reserved.
7  *
8  **************************************************************************/
9 
10 #include <linux/cpu.h>
11 #include <linux/module.h>
12 #include <linux/notifier.h>
13 #include <linux/pm_runtime.h>
14 #include <linux/spinlock.h>
15 #include <linux/delay.h>
16 
17 #include <asm/set_memory.h>
18 
19 #include <acpi/video.h>
20 
21 #include <drm/drm.h>
22 #include <drm/drm_aperture.h>
23 #include <drm/drm_drv.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_file.h>
26 #include <drm/drm_ioctl.h>
27 #include <drm/drm_pciids.h>
28 #include <drm/drm_vblank.h>
29 
30 #include "framebuffer.h"
31 #include "gem.h"
32 #include "intel_bios.h"
33 #include "mid_bios.h"
34 #include "power.h"
35 #include "psb_drv.h"
36 #include "psb_intel_reg.h"
37 #include "psb_irq.h"
38 #include "psb_reg.h"
39 
40 static const struct drm_driver driver;
41 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
42 
43 /*
44  * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
45  * to the different groups of PowerVR 5-series chip designs
46  *
47  * 0x8086 = Intel Corporation
48  *
49  * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
50  * PowerVR SGX535    - Moorestown - Intel GMA 600
51  * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
52  * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
53  * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
54  *                                  N2800
55  */
56 static const struct pci_device_id pciidlist[] = {
57 	/* Poulsbo */
58 	{ 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
59 	{ 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
60 	/* Oak Trail */
61 	{ 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
62 	{ 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
63 	{ 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
64 	{ 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
65 	{ 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
66 	{ 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
67 	{ 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
68 	{ 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
69 	{ 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
70 	/* Cedar Trail */
71 	{ 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
72 	{ 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
73 	{ 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
74 	{ 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
75 	{ 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
76 	{ 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
77 	{ 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
78 	{ 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
79 	{ 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
80 	{ 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
81 	{ 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
82 	{ 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
83 	{ 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
84 	{ 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
85 	{ 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
86 	{ 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
87 	{ 0, }
88 };
89 MODULE_DEVICE_TABLE(pci, pciidlist);
90 
91 /*
92  * Standard IOCTLs.
93  */
94 static const struct drm_ioctl_desc psb_ioctls[] = {
95 };
96 
97 /**
98  *	psb_spank		-	reset the 2D engine
99  *	@dev_priv: our PSB DRM device
100  *
101  *	Soft reset the graphics engine and then reload the necessary registers.
102  */
103 static void psb_spank(struct drm_psb_private *dev_priv)
104 {
105 	PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
106 		_PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
107 		_PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
108 		_PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
109 	PSB_RSGX32(PSB_CR_SOFT_RESET);
110 
111 	msleep(1);
112 
113 	PSB_WSGX32(0, PSB_CR_SOFT_RESET);
114 	wmb();
115 	PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
116 		   PSB_CR_BIF_CTRL);
117 	wmb();
118 	(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
119 
120 	msleep(1);
121 	PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
122 		   PSB_CR_BIF_CTRL);
123 	(void) PSB_RSGX32(PSB_CR_BIF_CTRL);
124 	PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
125 }
126 
127 static int psb_do_init(struct drm_device *dev)
128 {
129 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
130 	struct psb_gtt *pg = &dev_priv->gtt;
131 
132 	uint32_t stolen_gtt;
133 
134 	if (pg->mmu_gatt_start & 0x0FFFFFFF) {
135 		dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
136 		return -EINVAL;
137 	}
138 
139 	stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
140 	stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
141 	stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
142 
143 	dev_priv->gatt_free_offset = pg->mmu_gatt_start +
144 	    (stolen_gtt << PAGE_SHIFT) * 1024;
145 
146 	spin_lock_init(&dev_priv->irqmask_lock);
147 
148 	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
149 	PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
150 	PSB_RSGX32(PSB_CR_BIF_BANK1);
151 
152 	/* Do not bypass any MMU access, let them pagefault instead */
153 	PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
154 		   PSB_CR_BIF_CTRL);
155 	PSB_RSGX32(PSB_CR_BIF_CTRL);
156 
157 	psb_spank(dev_priv);
158 
159 	/* mmu_gatt ?? */
160 	PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
161 	PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
162 
163 	return 0;
164 }
165 
166 static void psb_driver_unload(struct drm_device *dev)
167 {
168 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
169 
170 	/* TODO: Kill vblank etc here */
171 
172 	if (dev_priv->backlight_device)
173 		gma_backlight_exit(dev);
174 	psb_modeset_cleanup(dev);
175 
176 	gma_irq_uninstall(dev);
177 
178 	if (dev_priv->ops->chip_teardown)
179 		dev_priv->ops->chip_teardown(dev);
180 
181 	psb_intel_opregion_fini(dev);
182 
183 	if (dev_priv->pf_pd) {
184 		psb_mmu_free_pagedir(dev_priv->pf_pd);
185 		dev_priv->pf_pd = NULL;
186 	}
187 	if (dev_priv->mmu) {
188 		struct psb_gtt *pg = &dev_priv->gtt;
189 
190 		psb_mmu_remove_pfn_sequence(
191 			psb_mmu_get_default_pd
192 			(dev_priv->mmu),
193 			pg->mmu_gatt_start,
194 			dev_priv->vram_stolen_size >> PAGE_SHIFT);
195 		psb_mmu_driver_takedown(dev_priv->mmu);
196 		dev_priv->mmu = NULL;
197 	}
198 	psb_gem_mm_fini(dev);
199 	psb_gtt_fini(dev);
200 	if (dev_priv->scratch_page) {
201 		set_pages_wb(dev_priv->scratch_page, 1);
202 		__free_page(dev_priv->scratch_page);
203 		dev_priv->scratch_page = NULL;
204 	}
205 	if (dev_priv->vdc_reg) {
206 		iounmap(dev_priv->vdc_reg);
207 		dev_priv->vdc_reg = NULL;
208 	}
209 	if (dev_priv->sgx_reg) {
210 		iounmap(dev_priv->sgx_reg);
211 		dev_priv->sgx_reg = NULL;
212 	}
213 	if (dev_priv->aux_reg) {
214 		iounmap(dev_priv->aux_reg);
215 		dev_priv->aux_reg = NULL;
216 	}
217 	pci_dev_put(dev_priv->aux_pdev);
218 	pci_dev_put(dev_priv->lpc_pdev);
219 
220 	/* Destroy VBT data */
221 	psb_intel_destroy_bios(dev);
222 
223 	gma_power_uninit(dev);
224 }
225 
226 static void psb_device_release(void *data)
227 {
228 	struct drm_device *dev = data;
229 
230 	psb_driver_unload(dev);
231 }
232 
233 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
234 {
235 	struct pci_dev *pdev = to_pci_dev(dev->dev);
236 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
237 	unsigned long resource_start, resource_len;
238 	unsigned long irqflags;
239 	struct drm_connector_list_iter conn_iter;
240 	struct drm_connector *connector;
241 	struct gma_encoder *gma_encoder;
242 	struct psb_gtt *pg;
243 	int ret = -ENOMEM;
244 
245 	/* initializing driver private data */
246 
247 	dev_priv->ops = (struct psb_ops *)flags;
248 
249 	pg = &dev_priv->gtt;
250 
251 	pci_set_master(pdev);
252 
253 	dev_priv->num_pipe = dev_priv->ops->pipes;
254 
255 	resource_start = pci_resource_start(pdev, PSB_MMIO_RESOURCE);
256 
257 	dev_priv->vdc_reg =
258 	    ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
259 	if (!dev_priv->vdc_reg)
260 		goto out_err;
261 
262 	dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
263 							PSB_SGX_SIZE);
264 	if (!dev_priv->sgx_reg)
265 		goto out_err;
266 
267 	if (IS_MRST(dev)) {
268 		int domain = pci_domain_nr(pdev->bus);
269 
270 		dev_priv->aux_pdev =
271 			pci_get_domain_bus_and_slot(domain, 0,
272 						    PCI_DEVFN(3, 0));
273 
274 		if (dev_priv->aux_pdev) {
275 			resource_start = pci_resource_start(dev_priv->aux_pdev,
276 							    PSB_AUX_RESOURCE);
277 			resource_len = pci_resource_len(dev_priv->aux_pdev,
278 							PSB_AUX_RESOURCE);
279 			dev_priv->aux_reg = ioremap(resource_start,
280 							    resource_len);
281 			if (!dev_priv->aux_reg)
282 				goto out_err;
283 
284 			DRM_DEBUG_KMS("Found aux vdc");
285 		} else {
286 			/* Couldn't find the aux vdc so map to primary vdc */
287 			dev_priv->aux_reg = dev_priv->vdc_reg;
288 			DRM_DEBUG_KMS("Couldn't find aux pci device");
289 		}
290 		dev_priv->gmbus_reg = dev_priv->aux_reg;
291 
292 		dev_priv->lpc_pdev =
293 			pci_get_domain_bus_and_slot(domain, 0,
294 						    PCI_DEVFN(31, 0));
295 		if (dev_priv->lpc_pdev) {
296 			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
297 				&dev_priv->lpc_gpio_base);
298 			pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
299 				(u32)dev_priv->lpc_gpio_base | (1L<<31));
300 			pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
301 				&dev_priv->lpc_gpio_base);
302 			dev_priv->lpc_gpio_base &= 0xffc0;
303 			if (dev_priv->lpc_gpio_base)
304 				DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
305 						dev_priv->lpc_gpio_base);
306 			else {
307 				pci_dev_put(dev_priv->lpc_pdev);
308 				dev_priv->lpc_pdev = NULL;
309 			}
310 		}
311 	} else {
312 		dev_priv->gmbus_reg = dev_priv->vdc_reg;
313 	}
314 
315 	psb_intel_opregion_setup(dev);
316 
317 	ret = dev_priv->ops->chip_setup(dev);
318 	if (ret)
319 		goto out_err;
320 
321 	/* Init OSPM support */
322 	gma_power_init(dev);
323 
324 	ret = -ENOMEM;
325 
326 	dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
327 	if (!dev_priv->scratch_page)
328 		goto out_err;
329 
330 	set_pages_uc(dev_priv->scratch_page, 1);
331 
332 	ret = psb_gtt_init(dev);
333 	if (ret)
334 		goto out_err;
335 	ret = psb_gem_mm_init(dev);
336 	if (ret)
337 		goto out_err;
338 
339 	ret = -ENOMEM;
340 
341 	dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, NULL);
342 	if (!dev_priv->mmu)
343 		goto out_err;
344 
345 	dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
346 	if (!dev_priv->pf_pd)
347 		goto out_err;
348 
349 	ret = psb_do_init(dev);
350 	if (ret)
351 		return ret;
352 
353 	/* Add stolen memory to SGX MMU */
354 	ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
355 					  dev_priv->stolen_base >> PAGE_SHIFT,
356 					  pg->gatt_start,
357 					  pg->stolen_size >> PAGE_SHIFT, 0);
358 
359 	psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
360 	psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
361 
362 	PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
363 	PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
364 
365 	acpi_video_register();
366 
367 	/* Setup vertical blanking handling */
368 	ret = drm_vblank_init(dev, dev_priv->num_pipe);
369 	if (ret)
370 		goto out_err;
371 
372 	/*
373 	 * Install interrupt handlers prior to powering off SGX or else we will
374 	 * crash.
375 	 */
376 	dev_priv->vdc_irq_mask = 0;
377 	dev_priv->pipestat[0] = 0;
378 	dev_priv->pipestat[1] = 0;
379 	dev_priv->pipestat[2] = 0;
380 	spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
381 	PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
382 	PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
383 	PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
384 	spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
385 
386 	gma_irq_install(dev, pdev->irq);
387 
388 	dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
389 
390 	psb_modeset_init(dev);
391 	psb_fbdev_init(dev);
392 	drm_kms_helper_poll_init(dev);
393 
394 	/* Only add backlight support if we have LVDS or MIPI output */
395 	drm_connector_list_iter_begin(dev, &conn_iter);
396 	drm_for_each_connector_iter(connector, &conn_iter) {
397 		gma_encoder = gma_attached_encoder(connector);
398 
399 		if (gma_encoder->type == INTEL_OUTPUT_LVDS ||
400 		    gma_encoder->type == INTEL_OUTPUT_MIPI) {
401 			ret = gma_backlight_init(dev);
402 			break;
403 		}
404 	}
405 	drm_connector_list_iter_end(&conn_iter);
406 
407 	if (ret)
408 		return ret;
409 	psb_intel_opregion_enable_asle(dev);
410 #if 0
411 	/* Enable runtime pm at last */
412 	pm_runtime_enable(dev->dev);
413 	pm_runtime_set_active(dev->dev);
414 #endif
415 
416 	return devm_add_action_or_reset(dev->dev, psb_device_release, dev);
417 
418 out_err:
419 	psb_driver_unload(dev);
420 	return ret;
421 }
422 
423 static inline void get_brightness(struct backlight_device *bd)
424 {
425 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
426 	if (bd) {
427 		bd->props.brightness = bd->ops->get_brightness(bd);
428 		backlight_update_status(bd);
429 	}
430 #endif
431 }
432 
433 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
434 			       unsigned long arg)
435 {
436 	struct drm_file *file_priv = filp->private_data;
437 	struct drm_device *dev = file_priv->minor->dev;
438 	struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
439 	static unsigned int runtime_allowed;
440 
441 	if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
442 		runtime_allowed++;
443 		pm_runtime_allow(dev->dev);
444 		dev_priv->rpm_enabled = 1;
445 	}
446 	return drm_ioctl(filp, cmd, arg);
447 	/* FIXME: do we need to wrap the other side of this */
448 }
449 
450 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
451 {
452 	struct drm_psb_private *dev_priv;
453 	struct drm_device *dev;
454 	int ret;
455 
456 	/*
457 	 * We cannot yet easily find the framebuffer's location in memory. So
458 	 * remove all framebuffers here.
459 	 *
460 	 * TODO: Refactor psb_driver_load() to map vdc_reg earlier. Then we
461 	 *       might be able to read the framebuffer range from the device.
462 	 */
463 	ret = drm_aperture_remove_framebuffers(true, &driver);
464 	if (ret)
465 		return ret;
466 
467 	ret = pcim_enable_device(pdev);
468 	if (ret)
469 		return ret;
470 
471 	dev_priv = devm_drm_dev_alloc(&pdev->dev, &driver, struct drm_psb_private, dev);
472 	if (IS_ERR(dev_priv))
473 		return PTR_ERR(dev_priv);
474 	dev = &dev_priv->dev;
475 
476 	pci_set_drvdata(pdev, dev);
477 
478 	ret = psb_driver_load(dev, ent->driver_data);
479 	if (ret)
480 		return ret;
481 
482 	ret = drm_dev_register(dev, ent->driver_data);
483 	if (ret)
484 		return ret;
485 
486 	return 0;
487 }
488 
489 static void psb_pci_remove(struct pci_dev *pdev)
490 {
491 	struct drm_device *dev = pci_get_drvdata(pdev);
492 
493 	drm_dev_unregister(dev);
494 }
495 
496 static const struct dev_pm_ops psb_pm_ops = {
497 	.resume = gma_power_resume,
498 	.suspend = gma_power_suspend,
499 	.thaw = gma_power_thaw,
500 	.freeze = gma_power_freeze,
501 	.restore = gma_power_restore,
502 	.runtime_suspend = psb_runtime_suspend,
503 	.runtime_resume = psb_runtime_resume,
504 	.runtime_idle = psb_runtime_idle,
505 };
506 
507 static const struct file_operations psb_gem_fops = {
508 	.owner = THIS_MODULE,
509 	.open = drm_open,
510 	.release = drm_release,
511 	.unlocked_ioctl = psb_unlocked_ioctl,
512 	.compat_ioctl = drm_compat_ioctl,
513 	.mmap = drm_gem_mmap,
514 	.poll = drm_poll,
515 	.read = drm_read,
516 };
517 
518 static const struct drm_driver driver = {
519 	.driver_features = DRIVER_MODESET | DRIVER_GEM,
520 	.lastclose = drm_fb_helper_lastclose,
521 
522 	.num_ioctls = ARRAY_SIZE(psb_ioctls),
523 
524 	.dumb_create = psb_gem_dumb_create,
525 	.ioctls = psb_ioctls,
526 	.fops = &psb_gem_fops,
527 	.name = DRIVER_NAME,
528 	.desc = DRIVER_DESC,
529 	.date = DRIVER_DATE,
530 	.major = DRIVER_MAJOR,
531 	.minor = DRIVER_MINOR,
532 	.patchlevel = DRIVER_PATCHLEVEL
533 };
534 
535 static struct pci_driver psb_pci_driver = {
536 	.name = DRIVER_NAME,
537 	.id_table = pciidlist,
538 	.probe = psb_pci_probe,
539 	.remove = psb_pci_remove,
540 	.driver.pm = &psb_pm_ops,
541 };
542 
543 static int __init psb_init(void)
544 {
545 	if (drm_firmware_drivers_only())
546 		return -ENODEV;
547 
548 	return pci_register_driver(&psb_pci_driver);
549 }
550 
551 static void __exit psb_exit(void)
552 {
553 	pci_unregister_driver(&psb_pci_driver);
554 }
555 
556 late_initcall(psb_init);
557 module_exit(psb_exit);
558 
559 MODULE_AUTHOR(DRIVER_AUTHOR);
560 MODULE_DESCRIPTION(DRIVER_DESC);
561 MODULE_LICENSE("GPL");
562