1 /************************************************************************** 2 * Copyright (c) 2011, Intel Corporation. 3 * All Rights Reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 17 * 18 **************************************************************************/ 19 20 #include <linux/backlight.h> 21 #include <drm/drmP.h> 22 #include <drm/drm.h> 23 #include "gma_drm.h" 24 #include "psb_drv.h" 25 #include "psb_reg.h" 26 #include "psb_intel_reg.h" 27 #include "intel_bios.h" 28 29 30 static int psb_output_init(struct drm_device *dev) 31 { 32 struct drm_psb_private *dev_priv = dev->dev_private; 33 psb_intel_lvds_init(dev, &dev_priv->mode_dev); 34 psb_intel_sdvo_init(dev, SDVOB); 35 return 0; 36 } 37 38 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 39 40 /* 41 * Poulsbo Backlight Interfaces 42 */ 43 44 #define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */ 45 #define BLC_PWM_FREQ_CALC_CONSTANT 32 46 #define MHz 1000000 47 48 #define PSB_BLC_PWM_PRECISION_FACTOR 10 49 #define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE 50 #define PSB_BLC_MIN_PWM_REG_FREQ 0x2 51 52 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE) 53 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16) 54 55 static int psb_brightness; 56 static struct backlight_device *psb_backlight_device; 57 58 static int psb_get_brightness(struct backlight_device *bd) 59 { 60 /* return locally cached var instead of HW read (due to DPST etc.) */ 61 /* FIXME: ideally return actual value in case firmware fiddled with 62 it */ 63 return psb_brightness; 64 } 65 66 67 static int psb_backlight_setup(struct drm_device *dev) 68 { 69 struct drm_psb_private *dev_priv = dev->dev_private; 70 unsigned long core_clock; 71 /* u32 bl_max_freq; */ 72 /* unsigned long value; */ 73 u16 bl_max_freq; 74 uint32_t value; 75 uint32_t blc_pwm_precision_factor; 76 77 /* get bl_max_freq and pol from dev_priv*/ 78 if (!dev_priv->lvds_bl) { 79 dev_err(dev->dev, "Has no valid LVDS backlight info\n"); 80 return -ENOENT; 81 } 82 bl_max_freq = dev_priv->lvds_bl->freq; 83 blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR; 84 85 core_clock = dev_priv->core_freq; 86 87 value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT; 88 value *= blc_pwm_precision_factor; 89 value /= bl_max_freq; 90 value /= blc_pwm_precision_factor; 91 92 if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ || 93 value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ) 94 return -ERANGE; 95 else { 96 value &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR; 97 REG_WRITE(BLC_PWM_CTL, 98 (value << PSB_BACKLIGHT_PWM_CTL_SHIFT) | (value)); 99 } 100 return 0; 101 } 102 103 static int psb_set_brightness(struct backlight_device *bd) 104 { 105 struct drm_device *dev = bl_get_data(psb_backlight_device); 106 int level = bd->props.brightness; 107 108 /* Percentage 1-100% being valid */ 109 if (level < 1) 110 level = 1; 111 112 psb_intel_lvds_set_brightness(dev, level); 113 psb_brightness = level; 114 return 0; 115 } 116 117 static const struct backlight_ops psb_ops = { 118 .get_brightness = psb_get_brightness, 119 .update_status = psb_set_brightness, 120 }; 121 122 static int psb_backlight_init(struct drm_device *dev) 123 { 124 struct drm_psb_private *dev_priv = dev->dev_private; 125 int ret; 126 struct backlight_properties props; 127 128 memset(&props, 0, sizeof(struct backlight_properties)); 129 props.max_brightness = 100; 130 props.type = BACKLIGHT_PLATFORM; 131 132 psb_backlight_device = backlight_device_register("psb-bl", 133 NULL, (void *)dev, &psb_ops, &props); 134 if (IS_ERR(psb_backlight_device)) 135 return PTR_ERR(psb_backlight_device); 136 137 ret = psb_backlight_setup(dev); 138 if (ret < 0) { 139 backlight_device_unregister(psb_backlight_device); 140 psb_backlight_device = NULL; 141 return ret; 142 } 143 psb_backlight_device->props.brightness = 100; 144 psb_backlight_device->props.max_brightness = 100; 145 backlight_update_status(psb_backlight_device); 146 dev_priv->backlight_device = psb_backlight_device; 147 return 0; 148 } 149 150 #endif 151 152 /* 153 * Provide the Poulsbo specific chip logic and low level methods 154 * for power management 155 */ 156 157 static void psb_init_pm(struct drm_device *dev) 158 { 159 struct drm_psb_private *dev_priv = dev->dev_private; 160 161 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL); 162 gating &= ~3; /* Disable 2D clock gating */ 163 gating |= 1; 164 PSB_WSGX32(gating, PSB_CR_CLKGATECTL); 165 PSB_RSGX32(PSB_CR_CLKGATECTL); 166 } 167 168 /** 169 * psb_save_display_registers - save registers lost on suspend 170 * @dev: our DRM device 171 * 172 * Save the state we need in order to be able to restore the interface 173 * upon resume from suspend 174 */ 175 static int psb_save_display_registers(struct drm_device *dev) 176 { 177 struct drm_psb_private *dev_priv = dev->dev_private; 178 struct drm_crtc *crtc; 179 struct drm_connector *connector; 180 181 /* Display arbitration control + watermarks */ 182 dev_priv->saveDSPARB = PSB_RVDC32(DSPARB); 183 dev_priv->saveDSPFW1 = PSB_RVDC32(DSPFW1); 184 dev_priv->saveDSPFW2 = PSB_RVDC32(DSPFW2); 185 dev_priv->saveDSPFW3 = PSB_RVDC32(DSPFW3); 186 dev_priv->saveDSPFW4 = PSB_RVDC32(DSPFW4); 187 dev_priv->saveDSPFW5 = PSB_RVDC32(DSPFW5); 188 dev_priv->saveDSPFW6 = PSB_RVDC32(DSPFW6); 189 dev_priv->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT); 190 191 /* Save crtc and output state */ 192 mutex_lock(&dev->mode_config.mutex); 193 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 194 if (drm_helper_crtc_in_use(crtc)) 195 crtc->funcs->save(crtc); 196 } 197 198 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 199 connector->funcs->save(connector); 200 201 mutex_unlock(&dev->mode_config.mutex); 202 return 0; 203 } 204 205 /** 206 * psb_restore_display_registers - restore lost register state 207 * @dev: our DRM device 208 * 209 * Restore register state that was lost during suspend and resume. 210 */ 211 static int psb_restore_display_registers(struct drm_device *dev) 212 { 213 struct drm_psb_private *dev_priv = dev->dev_private; 214 struct drm_crtc *crtc; 215 struct drm_connector *connector; 216 217 /* Display arbitration + watermarks */ 218 PSB_WVDC32(dev_priv->saveDSPARB, DSPARB); 219 PSB_WVDC32(dev_priv->saveDSPFW1, DSPFW1); 220 PSB_WVDC32(dev_priv->saveDSPFW2, DSPFW2); 221 PSB_WVDC32(dev_priv->saveDSPFW3, DSPFW3); 222 PSB_WVDC32(dev_priv->saveDSPFW4, DSPFW4); 223 PSB_WVDC32(dev_priv->saveDSPFW5, DSPFW5); 224 PSB_WVDC32(dev_priv->saveDSPFW6, DSPFW6); 225 PSB_WVDC32(dev_priv->saveCHICKENBIT, DSPCHICKENBIT); 226 227 /*make sure VGA plane is off. it initializes to on after reset!*/ 228 PSB_WVDC32(0x80000000, VGACNTRL); 229 230 mutex_lock(&dev->mode_config.mutex); 231 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) 232 if (drm_helper_crtc_in_use(crtc)) 233 crtc->funcs->restore(crtc); 234 235 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 236 connector->funcs->restore(connector); 237 238 mutex_unlock(&dev->mode_config.mutex); 239 return 0; 240 } 241 242 static int psb_power_down(struct drm_device *dev) 243 { 244 return 0; 245 } 246 247 static int psb_power_up(struct drm_device *dev) 248 { 249 return 0; 250 } 251 252 static void psb_get_core_freq(struct drm_device *dev) 253 { 254 uint32_t clock; 255 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0); 256 struct drm_psb_private *dev_priv = dev->dev_private; 257 258 /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/ 259 /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/ 260 261 pci_write_config_dword(pci_root, 0xD0, 0xD0050300); 262 pci_read_config_dword(pci_root, 0xD4, &clock); 263 pci_dev_put(pci_root); 264 265 switch (clock & 0x07) { 266 case 0: 267 dev_priv->core_freq = 100; 268 break; 269 case 1: 270 dev_priv->core_freq = 133; 271 break; 272 case 2: 273 dev_priv->core_freq = 150; 274 break; 275 case 3: 276 dev_priv->core_freq = 178; 277 break; 278 case 4: 279 dev_priv->core_freq = 200; 280 break; 281 case 5: 282 case 6: 283 case 7: 284 dev_priv->core_freq = 266; 285 default: 286 dev_priv->core_freq = 0; 287 } 288 } 289 290 static int psb_chip_setup(struct drm_device *dev) 291 { 292 psb_get_core_freq(dev); 293 gma_intel_setup_gmbus(dev); 294 gma_intel_opregion_init(dev); 295 psb_intel_init_bios(dev); 296 return 0; 297 } 298 299 static void psb_chip_teardown(struct drm_device *dev) 300 { 301 gma_intel_teardown_gmbus(dev); 302 } 303 304 const struct psb_ops psb_chip_ops = { 305 .name = "Poulsbo", 306 .accel_2d = 1, 307 .pipes = 2, 308 .crtcs = 2, 309 .sgx_offset = PSB_SGX_OFFSET, 310 .chip_setup = psb_chip_setup, 311 .chip_teardown = psb_chip_teardown, 312 313 .crtc_helper = &psb_intel_helper_funcs, 314 .crtc_funcs = &psb_intel_crtc_funcs, 315 316 .output_init = psb_output_init, 317 318 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE 319 .backlight_init = psb_backlight_init, 320 #endif 321 322 .init_pm = psb_init_pm, 323 .save_regs = psb_save_display_registers, 324 .restore_regs = psb_restore_display_registers, 325 .power_down = psb_power_down, 326 .power_up = psb_power_up, 327 }; 328 329