16a227d5fSAlan Cox /*
26a227d5fSAlan Cox * Copyright © 2006-2007 Intel Corporation
36a227d5fSAlan Cox *
46a227d5fSAlan Cox * Permission is hereby granted, free of charge, to any person obtaining a
56a227d5fSAlan Cox * copy of this software and associated documentation files (the "Software"),
66a227d5fSAlan Cox * to deal in the Software without restriction, including without limitation
76a227d5fSAlan Cox * the rights to use, copy, modify, merge, publish, distribute, sublicense,
86a227d5fSAlan Cox * and/or sell copies of the Software, and to permit persons to whom the
96a227d5fSAlan Cox * Software is furnished to do so, subject to the following conditions:
106a227d5fSAlan Cox *
116a227d5fSAlan Cox * The above copyright notice and this permission notice (including the next
126a227d5fSAlan Cox * paragraph) shall be included in all copies or substantial portions of the
136a227d5fSAlan Cox * Software.
146a227d5fSAlan Cox *
156a227d5fSAlan Cox * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
166a227d5fSAlan Cox * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
176a227d5fSAlan Cox * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
186a227d5fSAlan Cox * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
196a227d5fSAlan Cox * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
206a227d5fSAlan Cox * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
216a227d5fSAlan Cox * DEALINGS IN THE SOFTWARE.
226a227d5fSAlan Cox *
236a227d5fSAlan Cox * Authors:
246a227d5fSAlan Cox * Eric Anholt <eric@anholt.net>
256a227d5fSAlan Cox */
266a227d5fSAlan Cox
270c7b178aSSam Ravnborg #include <linux/delay.h>
286a227d5fSAlan Cox #include <linux/i2c.h>
290c7b178aSSam Ravnborg #include <linux/pm_runtime.h>
306a227d5fSAlan Cox
31*3599dfa1SThomas Zimmermann #include <drm/drm_crtc_helper.h>
32*3599dfa1SThomas Zimmermann #include <drm/drm_modeset_helper_vtables.h>
33d088b69fSThomas Zimmermann #include <drm/drm_simple_kms_helper.h>
34d088b69fSThomas Zimmermann
350c7b178aSSam Ravnborg #include "cdv_device.h"
366a227d5fSAlan Cox #include "intel_bios.h"
370c7b178aSSam Ravnborg #include "power.h"
386a227d5fSAlan Cox #include "psb_drv.h"
396a227d5fSAlan Cox #include "psb_intel_drv.h"
406a227d5fSAlan Cox #include "psb_intel_reg.h"
416a227d5fSAlan Cox
426a227d5fSAlan Cox
cdv_intel_crt_dpms(struct drm_encoder * encoder,int mode)436a227d5fSAlan Cox static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
446a227d5fSAlan Cox {
456a227d5fSAlan Cox struct drm_device *dev = encoder->dev;
466a227d5fSAlan Cox u32 temp, reg;
476a227d5fSAlan Cox reg = ADPA;
486a227d5fSAlan Cox
496a227d5fSAlan Cox temp = REG_READ(reg);
506a227d5fSAlan Cox temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
516a227d5fSAlan Cox temp &= ~ADPA_DAC_ENABLE;
526a227d5fSAlan Cox
536a227d5fSAlan Cox switch (mode) {
546a227d5fSAlan Cox case DRM_MODE_DPMS_ON:
556a227d5fSAlan Cox temp |= ADPA_DAC_ENABLE;
566a227d5fSAlan Cox break;
576a227d5fSAlan Cox case DRM_MODE_DPMS_STANDBY:
586a227d5fSAlan Cox temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
596a227d5fSAlan Cox break;
606a227d5fSAlan Cox case DRM_MODE_DPMS_SUSPEND:
616a227d5fSAlan Cox temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
626a227d5fSAlan Cox break;
636a227d5fSAlan Cox case DRM_MODE_DPMS_OFF:
646a227d5fSAlan Cox temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
656a227d5fSAlan Cox break;
666a227d5fSAlan Cox }
676a227d5fSAlan Cox
686a227d5fSAlan Cox REG_WRITE(reg, temp);
696a227d5fSAlan Cox }
706a227d5fSAlan Cox
cdv_intel_crt_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)7167772782SLuc Van Oostenryck static enum drm_mode_status cdv_intel_crt_mode_valid(struct drm_connector *connector,
726a227d5fSAlan Cox struct drm_display_mode *mode)
736a227d5fSAlan Cox {
746a227d5fSAlan Cox if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
756a227d5fSAlan Cox return MODE_NO_DBLESCAN;
766a227d5fSAlan Cox
776a227d5fSAlan Cox /* The lowest clock for CDV is 20000KHz */
786a227d5fSAlan Cox if (mode->clock < 20000)
796a227d5fSAlan Cox return MODE_CLOCK_LOW;
806a227d5fSAlan Cox
816a227d5fSAlan Cox /* The max clock for CDV is 355 instead of 400 */
82b60bfb65SAlan Cox if (mode->clock > 355000)
836a227d5fSAlan Cox return MODE_CLOCK_HIGH;
846a227d5fSAlan Cox
856a227d5fSAlan Cox return MODE_OK;
866a227d5fSAlan Cox }
876a227d5fSAlan Cox
cdv_intel_crt_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)886a227d5fSAlan Cox static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
896a227d5fSAlan Cox struct drm_display_mode *mode,
906a227d5fSAlan Cox struct drm_display_mode *adjusted_mode)
916a227d5fSAlan Cox {
926a227d5fSAlan Cox
936a227d5fSAlan Cox struct drm_device *dev = encoder->dev;
946a227d5fSAlan Cox struct drm_crtc *crtc = encoder->crtc;
956306865dSPatrik Jakobsson struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
966a227d5fSAlan Cox int dpll_md_reg;
976a227d5fSAlan Cox u32 adpa, dpll_md;
986a227d5fSAlan Cox u32 adpa_reg;
996a227d5fSAlan Cox
1006306865dSPatrik Jakobsson if (gma_crtc->pipe == 0)
1016a227d5fSAlan Cox dpll_md_reg = DPLL_A_MD;
1026a227d5fSAlan Cox else
1036a227d5fSAlan Cox dpll_md_reg = DPLL_B_MD;
1046a227d5fSAlan Cox
1056a227d5fSAlan Cox adpa_reg = ADPA;
1066a227d5fSAlan Cox
1076a227d5fSAlan Cox /*
1086a227d5fSAlan Cox * Disable separate mode multiplier used when cloning SDVO to CRT
1096a227d5fSAlan Cox * XXX this needs to be adjusted when we really are cloning
1106a227d5fSAlan Cox */
1116a227d5fSAlan Cox {
1126a227d5fSAlan Cox dpll_md = REG_READ(dpll_md_reg);
1136a227d5fSAlan Cox REG_WRITE(dpll_md_reg,
1146a227d5fSAlan Cox dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
1156a227d5fSAlan Cox }
1166a227d5fSAlan Cox
1176a227d5fSAlan Cox adpa = 0;
1186a227d5fSAlan Cox if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1196a227d5fSAlan Cox adpa |= ADPA_HSYNC_ACTIVE_HIGH;
1206a227d5fSAlan Cox if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1216a227d5fSAlan Cox adpa |= ADPA_VSYNC_ACTIVE_HIGH;
1226a227d5fSAlan Cox
1236306865dSPatrik Jakobsson if (gma_crtc->pipe == 0)
1246a227d5fSAlan Cox adpa |= ADPA_PIPE_A_SELECT;
1256a227d5fSAlan Cox else
1266a227d5fSAlan Cox adpa |= ADPA_PIPE_B_SELECT;
1276a227d5fSAlan Cox
1286a227d5fSAlan Cox REG_WRITE(adpa_reg, adpa);
1296a227d5fSAlan Cox }
1306a227d5fSAlan Cox
1316a227d5fSAlan Cox
13218b9bf2cSLee Jones /*
1336a227d5fSAlan Cox * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
1346a227d5fSAlan Cox *
1356a227d5fSAlan Cox * \return true if CRT is connected.
1366a227d5fSAlan Cox * \return false if CRT is disconnected.
1376a227d5fSAlan Cox */
cdv_intel_crt_detect_hotplug(struct drm_connector * connector,bool force)1386a227d5fSAlan Cox static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
1396a227d5fSAlan Cox bool force)
1406a227d5fSAlan Cox {
1416a227d5fSAlan Cox struct drm_device *dev = connector->dev;
1426a227d5fSAlan Cox u32 hotplug_en;
1436a227d5fSAlan Cox int i, tries = 0, ret = false;
144d235e64aSAlan Cox u32 orig;
1456a227d5fSAlan Cox
1466a227d5fSAlan Cox /*
1476a227d5fSAlan Cox * On a CDV thep, CRT detect sequence need to be done twice
1486a227d5fSAlan Cox * to get a reliable result.
1496a227d5fSAlan Cox */
1506a227d5fSAlan Cox tries = 2;
1516a227d5fSAlan Cox
152d235e64aSAlan Cox orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN);
1536a227d5fSAlan Cox hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
1546a227d5fSAlan Cox hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
1556a227d5fSAlan Cox
1566a227d5fSAlan Cox hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
1576a227d5fSAlan Cox hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
1586a227d5fSAlan Cox
1596a227d5fSAlan Cox for (i = 0; i < tries ; i++) {
1606a227d5fSAlan Cox unsigned long timeout;
1616a227d5fSAlan Cox /* turn on the FORCE_DETECT */
1626a227d5fSAlan Cox REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
1636a227d5fSAlan Cox timeout = jiffies + msecs_to_jiffies(1000);
1646a227d5fSAlan Cox /* wait for FORCE_DETECT to go off */
1656a227d5fSAlan Cox do {
1666a227d5fSAlan Cox if (!(REG_READ(PORT_HOTPLUG_EN) &
1676a227d5fSAlan Cox CRT_HOTPLUG_FORCE_DETECT))
1686a227d5fSAlan Cox break;
1696a227d5fSAlan Cox msleep(1);
1706a227d5fSAlan Cox } while (time_after(timeout, jiffies));
1716a227d5fSAlan Cox }
1726a227d5fSAlan Cox
1736a227d5fSAlan Cox if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
1746a227d5fSAlan Cox CRT_HOTPLUG_MONITOR_NONE)
1756a227d5fSAlan Cox ret = true;
1766a227d5fSAlan Cox
177d235e64aSAlan Cox /* clear the interrupt we just generated, if any */
178d235e64aSAlan Cox REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
179d235e64aSAlan Cox
180d235e64aSAlan Cox /* and put the bits back */
181d235e64aSAlan Cox REG_WRITE(PORT_HOTPLUG_EN, orig);
1826a227d5fSAlan Cox return ret;
1836a227d5fSAlan Cox }
1846a227d5fSAlan Cox
cdv_intel_crt_detect(struct drm_connector * connector,bool force)1856a227d5fSAlan Cox static enum drm_connector_status cdv_intel_crt_detect(
1866a227d5fSAlan Cox struct drm_connector *connector, bool force)
1876a227d5fSAlan Cox {
1886a227d5fSAlan Cox if (cdv_intel_crt_detect_hotplug(connector, force))
1896a227d5fSAlan Cox return connector_status_connected;
1906a227d5fSAlan Cox else
1916a227d5fSAlan Cox return connector_status_disconnected;
1926a227d5fSAlan Cox }
1936a227d5fSAlan Cox
cdv_intel_crt_destroy(struct drm_connector * connector)1946a227d5fSAlan Cox static void cdv_intel_crt_destroy(struct drm_connector *connector)
1956a227d5fSAlan Cox {
19612e67ccaSPatrik Jakobsson struct gma_connector *gma_connector = to_gma_connector(connector);
1970cc3ae93SPatrik Jakobsson struct gma_i2c_chan *ddc_bus = to_gma_i2c_chan(connector->ddc);
1986a227d5fSAlan Cox
1990cc3ae93SPatrik Jakobsson gma_i2c_destroy(ddc_bus);
2006a227d5fSAlan Cox drm_connector_cleanup(connector);
20112e67ccaSPatrik Jakobsson kfree(gma_connector);
2026a227d5fSAlan Cox }
2036a227d5fSAlan Cox
cdv_intel_crt_get_modes(struct drm_connector * connector)2046a227d5fSAlan Cox static int cdv_intel_crt_get_modes(struct drm_connector *connector)
2056a227d5fSAlan Cox {
2060cc3ae93SPatrik Jakobsson return psb_intel_ddc_get_modes(connector, connector->ddc);
2076a227d5fSAlan Cox }
2086a227d5fSAlan Cox
cdv_intel_crt_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t value)2096a227d5fSAlan Cox static int cdv_intel_crt_set_property(struct drm_connector *connector,
2106a227d5fSAlan Cox struct drm_property *property,
2116a227d5fSAlan Cox uint64_t value)
2126a227d5fSAlan Cox {
2136a227d5fSAlan Cox return 0;
2146a227d5fSAlan Cox }
2156a227d5fSAlan Cox
2166a227d5fSAlan Cox /*
2176a227d5fSAlan Cox * Routines for controlling stuff on the analog port
2186a227d5fSAlan Cox */
2196a227d5fSAlan Cox
2206a227d5fSAlan Cox static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
2216a227d5fSAlan Cox .dpms = cdv_intel_crt_dpms,
222c9d49590SPatrik Jakobsson .prepare = gma_encoder_prepare,
223c9d49590SPatrik Jakobsson .commit = gma_encoder_commit,
2246a227d5fSAlan Cox .mode_set = cdv_intel_crt_mode_set,
2256a227d5fSAlan Cox };
2266a227d5fSAlan Cox
2276a227d5fSAlan Cox static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
2286a227d5fSAlan Cox .dpms = drm_helper_connector_dpms,
2296a227d5fSAlan Cox .detect = cdv_intel_crt_detect,
2306a227d5fSAlan Cox .fill_modes = drm_helper_probe_single_connector_modes,
2316a227d5fSAlan Cox .destroy = cdv_intel_crt_destroy,
2326a227d5fSAlan Cox .set_property = cdv_intel_crt_set_property,
2336a227d5fSAlan Cox };
2346a227d5fSAlan Cox
2356a227d5fSAlan Cox static const struct drm_connector_helper_funcs
2366a227d5fSAlan Cox cdv_intel_crt_connector_helper_funcs = {
2376a227d5fSAlan Cox .mode_valid = cdv_intel_crt_mode_valid,
2386a227d5fSAlan Cox .get_modes = cdv_intel_crt_get_modes,
239c9d49590SPatrik Jakobsson .best_encoder = gma_best_encoder,
2406a227d5fSAlan Cox };
2416a227d5fSAlan Cox
cdv_intel_crt_init(struct drm_device * dev,struct psb_intel_mode_device * mode_dev)2426a227d5fSAlan Cox void cdv_intel_crt_init(struct drm_device *dev,
2436a227d5fSAlan Cox struct psb_intel_mode_device *mode_dev)
2446a227d5fSAlan Cox {
2456a227d5fSAlan Cox
246a3d5d75fSPatrik Jakobsson struct gma_connector *gma_connector;
247367e4408SPatrik Jakobsson struct gma_encoder *gma_encoder;
2480cc3ae93SPatrik Jakobsson struct gma_i2c_chan *ddc_bus;
2496a227d5fSAlan Cox struct drm_connector *connector;
2506a227d5fSAlan Cox struct drm_encoder *encoder;
2510cc3ae93SPatrik Jakobsson int ret;
2526a227d5fSAlan Cox
253367e4408SPatrik Jakobsson gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
254367e4408SPatrik Jakobsson if (!gma_encoder)
2556a227d5fSAlan Cox return;
2566a227d5fSAlan Cox
257a3d5d75fSPatrik Jakobsson gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
258a3d5d75fSPatrik Jakobsson if (!gma_connector)
2590cc3ae93SPatrik Jakobsson goto err_free_encoder;
2600cc3ae93SPatrik Jakobsson
2610cc3ae93SPatrik Jakobsson /* Set up the DDC bus. */
2620cc3ae93SPatrik Jakobsson ddc_bus = gma_i2c_create(dev, GPIOA, "CRTDDC_A");
2630cc3ae93SPatrik Jakobsson if (!ddc_bus) {
2640cc3ae93SPatrik Jakobsson dev_printk(KERN_ERR, dev->dev, "DDC bus registration failed.\n");
2650cc3ae93SPatrik Jakobsson goto err_free_connector;
2660cc3ae93SPatrik Jakobsson }
267a12d6a07SPatrik Jakobsson
268a3d5d75fSPatrik Jakobsson connector = &gma_connector->base;
269bda50031SKero van Gelder connector->polled = DRM_CONNECTOR_POLL_HPD;
2700cc3ae93SPatrik Jakobsson ret = drm_connector_init_with_ddc(dev, connector,
2710cc3ae93SPatrik Jakobsson &cdv_intel_crt_connector_funcs,
2720cc3ae93SPatrik Jakobsson DRM_MODE_CONNECTOR_VGA,
2730cc3ae93SPatrik Jakobsson &ddc_bus->base);
2740cc3ae93SPatrik Jakobsson if (ret)
2750cc3ae93SPatrik Jakobsson goto err_ddc_destroy;
2766a227d5fSAlan Cox
277367e4408SPatrik Jakobsson encoder = &gma_encoder->base;
2780cc3ae93SPatrik Jakobsson ret = drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC);
2790cc3ae93SPatrik Jakobsson if (ret)
2800cc3ae93SPatrik Jakobsson goto err_connector_cleanup;
2816a227d5fSAlan Cox
282367e4408SPatrik Jakobsson gma_connector_attach_encoder(gma_connector, gma_encoder);
2836a227d5fSAlan Cox
284367e4408SPatrik Jakobsson gma_encoder->type = INTEL_OUTPUT_ANALOG;
2856a227d5fSAlan Cox connector->interlace_allowed = 0;
2866a227d5fSAlan Cox connector->doublescan_allowed = 0;
2876a227d5fSAlan Cox
2886a227d5fSAlan Cox drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
2896a227d5fSAlan Cox drm_connector_helper_add(connector,
2906a227d5fSAlan Cox &cdv_intel_crt_connector_helper_funcs);
2916a227d5fSAlan Cox
2926a227d5fSAlan Cox return;
2930cc3ae93SPatrik Jakobsson
2940cc3ae93SPatrik Jakobsson err_connector_cleanup:
295a3d5d75fSPatrik Jakobsson drm_connector_cleanup(&gma_connector->base);
2960cc3ae93SPatrik Jakobsson err_ddc_destroy:
2970cc3ae93SPatrik Jakobsson gma_i2c_destroy(ddc_bus);
2980cc3ae93SPatrik Jakobsson err_free_connector:
299a3d5d75fSPatrik Jakobsson kfree(gma_connector);
3000cc3ae93SPatrik Jakobsson err_free_encoder:
301367e4408SPatrik Jakobsson kfree(gma_encoder);
3026a227d5fSAlan Cox return;
3036a227d5fSAlan Cox }
304