1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright 2015 Freescale Semiconductor, Inc. 4 * 5 * Freescale DCU drm device driver 6 */ 7 8 #include <linux/regmap.h> 9 10 #include <drm/drm_atomic.h> 11 #include <drm/drm_atomic_helper.h> 12 #include <drm/drm_crtc.h> 13 #include <drm/drm_fb_dma_helper.h> 14 #include <drm/drm_fourcc.h> 15 #include <drm/drm_framebuffer.h> 16 #include <drm/drm_gem_dma_helper.h> 17 #include <drm/drm_plane_helper.h> 18 #include <drm/drm_print.h> 19 #include <drm/drm_probe_helper.h> 20 21 #include "fsl_dcu_drm_drv.h" 22 #include "fsl_dcu_drm_plane.h" 23 24 static int fsl_dcu_drm_plane_index(struct drm_plane *plane) 25 { 26 struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; 27 unsigned int total_layer = fsl_dev->soc->total_layer; 28 unsigned int index; 29 30 index = drm_plane_index(plane); 31 if (index < total_layer) 32 return total_layer - index - 1; 33 34 dev_err(fsl_dev->dev, "No more layer left\n"); 35 return -EINVAL; 36 } 37 38 static int fsl_dcu_drm_plane_atomic_check(struct drm_plane *plane, 39 struct drm_atomic_state *state) 40 { 41 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 42 plane); 43 struct drm_framebuffer *fb = new_plane_state->fb; 44 45 if (!new_plane_state->fb || !new_plane_state->crtc) 46 return 0; 47 48 switch (fb->format->format) { 49 case DRM_FORMAT_RGB565: 50 case DRM_FORMAT_RGB888: 51 case DRM_FORMAT_XRGB8888: 52 case DRM_FORMAT_ARGB8888: 53 case DRM_FORMAT_XRGB4444: 54 case DRM_FORMAT_ARGB4444: 55 case DRM_FORMAT_XRGB1555: 56 case DRM_FORMAT_ARGB1555: 57 case DRM_FORMAT_YUV422: 58 return 0; 59 default: 60 return -EINVAL; 61 } 62 } 63 64 static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane, 65 struct drm_atomic_state *state) 66 { 67 struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; 68 unsigned int value; 69 int index; 70 71 index = fsl_dcu_drm_plane_index(plane); 72 if (index < 0) 73 return; 74 75 regmap_read(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), &value); 76 value &= ~DCU_LAYER_EN; 77 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), value); 78 } 79 80 static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane, 81 struct drm_atomic_state *state) 82 83 { 84 struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private; 85 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 86 plane); 87 struct drm_framebuffer *fb = plane->state->fb; 88 struct drm_gem_dma_object *gem; 89 unsigned int alpha = DCU_LAYER_AB_NONE, bpp; 90 int index; 91 92 if (!fb) 93 return; 94 95 index = fsl_dcu_drm_plane_index(plane); 96 if (index < 0) 97 return; 98 99 gem = drm_fb_dma_get_gem_obj(fb, 0); 100 101 switch (fb->format->format) { 102 case DRM_FORMAT_RGB565: 103 bpp = FSL_DCU_RGB565; 104 break; 105 case DRM_FORMAT_RGB888: 106 bpp = FSL_DCU_RGB888; 107 break; 108 case DRM_FORMAT_ARGB8888: 109 alpha = DCU_LAYER_AB_WHOLE_FRAME; 110 fallthrough; 111 case DRM_FORMAT_XRGB8888: 112 bpp = FSL_DCU_ARGB8888; 113 break; 114 case DRM_FORMAT_ARGB4444: 115 alpha = DCU_LAYER_AB_WHOLE_FRAME; 116 fallthrough; 117 case DRM_FORMAT_XRGB4444: 118 bpp = FSL_DCU_ARGB4444; 119 break; 120 case DRM_FORMAT_ARGB1555: 121 alpha = DCU_LAYER_AB_WHOLE_FRAME; 122 fallthrough; 123 case DRM_FORMAT_XRGB1555: 124 bpp = FSL_DCU_ARGB1555; 125 break; 126 case DRM_FORMAT_YUV422: 127 bpp = FSL_DCU_YUV422; 128 break; 129 default: 130 return; 131 } 132 133 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 1), 134 DCU_LAYER_HEIGHT(new_state->crtc_h) | 135 DCU_LAYER_WIDTH(new_state->crtc_w)); 136 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 2), 137 DCU_LAYER_POSY(new_state->crtc_y) | 138 DCU_LAYER_POSX(new_state->crtc_x)); 139 regmap_write(fsl_dev->regmap, 140 DCU_CTRLDESCLN(index, 3), gem->dma_addr); 141 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), 142 DCU_LAYER_EN | 143 DCU_LAYER_TRANS(0xff) | 144 DCU_LAYER_BPP(bpp) | 145 alpha); 146 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 5), 147 DCU_LAYER_CKMAX_R(0xFF) | 148 DCU_LAYER_CKMAX_G(0xFF) | 149 DCU_LAYER_CKMAX_B(0xFF)); 150 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 6), 151 DCU_LAYER_CKMIN_R(0) | 152 DCU_LAYER_CKMIN_G(0) | 153 DCU_LAYER_CKMIN_B(0)); 154 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 7), 0); 155 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 8), 156 DCU_LAYER_FG_FCOLOR(0)); 157 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 9), 158 DCU_LAYER_BG_BCOLOR(0)); 159 160 if (!strcmp(fsl_dev->soc->name, "ls1021a")) { 161 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 10), 162 DCU_LAYER_POST_SKIP(0) | 163 DCU_LAYER_PRE_SKIP(0)); 164 } 165 166 return; 167 } 168 169 static const struct drm_plane_helper_funcs fsl_dcu_drm_plane_helper_funcs = { 170 .atomic_check = fsl_dcu_drm_plane_atomic_check, 171 .atomic_disable = fsl_dcu_drm_plane_atomic_disable, 172 .atomic_update = fsl_dcu_drm_plane_atomic_update, 173 }; 174 175 static const struct drm_plane_funcs fsl_dcu_drm_plane_funcs = { 176 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 177 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 178 .destroy = drm_plane_helper_destroy, 179 .disable_plane = drm_atomic_helper_disable_plane, 180 .reset = drm_atomic_helper_plane_reset, 181 .update_plane = drm_atomic_helper_update_plane, 182 }; 183 184 static const u32 fsl_dcu_drm_plane_formats[] = { 185 DRM_FORMAT_RGB565, 186 DRM_FORMAT_RGB888, 187 DRM_FORMAT_XRGB8888, 188 DRM_FORMAT_ARGB8888, 189 DRM_FORMAT_XRGB4444, 190 DRM_FORMAT_ARGB4444, 191 DRM_FORMAT_XRGB1555, 192 DRM_FORMAT_ARGB1555, 193 DRM_FORMAT_YUV422, 194 }; 195 196 void fsl_dcu_drm_init_planes(struct drm_device *dev) 197 { 198 struct fsl_dcu_drm_device *fsl_dev = dev->dev_private; 199 int i, j; 200 201 for (i = 0; i < fsl_dev->soc->total_layer; i++) { 202 for (j = 1; j <= fsl_dev->soc->layer_regs; j++) 203 regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0); 204 } 205 } 206 207 struct drm_plane *fsl_dcu_drm_primary_create_plane(struct drm_device *dev) 208 { 209 struct drm_plane *primary; 210 int ret; 211 212 primary = kzalloc(sizeof(*primary), GFP_KERNEL); 213 if (!primary) { 214 DRM_DEBUG_KMS("Failed to allocate primary plane\n"); 215 return NULL; 216 } 217 218 /* possible_crtc's will be filled in later by crtc_init */ 219 ret = drm_universal_plane_init(dev, primary, 0, 220 &fsl_dcu_drm_plane_funcs, 221 fsl_dcu_drm_plane_formats, 222 ARRAY_SIZE(fsl_dcu_drm_plane_formats), 223 NULL, DRM_PLANE_TYPE_PRIMARY, NULL); 224 if (ret) { 225 kfree(primary); 226 primary = NULL; 227 } 228 drm_plane_helper_add(primary, &fsl_dcu_drm_plane_helper_funcs); 229 230 return primary; 231 } 232