xref: /linux/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c (revision 9dbbc3b9d09d6deba9f3b9e1d5b355032ed46a75)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2015 Freescale Semiconductor, Inc.
4  *
5  * Freescale DCU drm device driver
6  */
7 
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
10 #include <linux/console.h>
11 #include <linux/io.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/mm.h>
14 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/platform_device.h>
17 #include <linux/pm.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regmap.h>
20 
21 #include <drm/drm_atomic_helper.h>
22 #include <drm/drm_drv.h>
23 #include <drm/drm_fb_cma_helper.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_gem_cma_helper.h>
26 #include <drm/drm_irq.h>
27 #include <drm/drm_modeset_helper.h>
28 #include <drm/drm_probe_helper.h>
29 #include <drm/drm_vblank.h>
30 
31 #include "fsl_dcu_drm_crtc.h"
32 #include "fsl_dcu_drm_drv.h"
33 #include "fsl_tcon.h"
34 
35 static int legacyfb_depth = 24;
36 module_param(legacyfb_depth, int, 0444);
37 
38 static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
39 {
40 	if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
41 		return true;
42 
43 	return false;
44 }
45 
46 static const struct regmap_config fsl_dcu_regmap_config = {
47 	.reg_bits = 32,
48 	.reg_stride = 4,
49 	.val_bits = 32,
50 
51 	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
52 };
53 
54 static void fsl_dcu_irq_uninstall(struct drm_device *dev)
55 {
56 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
57 
58 	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
59 	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
60 }
61 
62 static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
63 {
64 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
65 	int ret;
66 
67 	ret = fsl_dcu_drm_modeset_init(fsl_dev);
68 	if (ret < 0) {
69 		dev_err(dev->dev, "failed to initialize mode setting\n");
70 		return ret;
71 	}
72 
73 	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
74 	if (ret < 0) {
75 		dev_err(dev->dev, "failed to initialize vblank\n");
76 		goto done;
77 	}
78 
79 	ret = drm_irq_install(dev, fsl_dev->irq);
80 	if (ret < 0) {
81 		dev_err(dev->dev, "failed to install IRQ handler\n");
82 		goto done;
83 	}
84 
85 	if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
86 	    legacyfb_depth != 32) {
87 		dev_warn(dev->dev,
88 			"Invalid legacyfb_depth.  Defaulting to 24bpp\n");
89 		legacyfb_depth = 24;
90 	}
91 
92 	return 0;
93 done:
94 	drm_kms_helper_poll_fini(dev);
95 
96 	drm_mode_config_cleanup(dev);
97 	drm_irq_uninstall(dev);
98 	dev->dev_private = NULL;
99 
100 	return ret;
101 }
102 
103 static void fsl_dcu_unload(struct drm_device *dev)
104 {
105 	drm_atomic_helper_shutdown(dev);
106 	drm_kms_helper_poll_fini(dev);
107 
108 	drm_mode_config_cleanup(dev);
109 	drm_irq_uninstall(dev);
110 
111 	dev->dev_private = NULL;
112 }
113 
114 static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
115 {
116 	struct drm_device *dev = arg;
117 	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
118 	unsigned int int_status;
119 	int ret;
120 
121 	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
122 	if (ret) {
123 		dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
124 		return IRQ_NONE;
125 	}
126 
127 	if (int_status & DCU_INT_STATUS_VBLANK)
128 		drm_handle_vblank(dev, 0);
129 
130 	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
131 
132 	return IRQ_HANDLED;
133 }
134 
135 DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);
136 
137 static const struct drm_driver fsl_dcu_drm_driver = {
138 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
139 	.load			= fsl_dcu_load,
140 	.unload			= fsl_dcu_unload,
141 	.irq_handler		= fsl_dcu_drm_irq,
142 	.irq_preinstall		= fsl_dcu_irq_uninstall,
143 	.irq_uninstall		= fsl_dcu_irq_uninstall,
144 	DRM_GEM_CMA_DRIVER_OPS,
145 	.fops			= &fsl_dcu_drm_fops,
146 	.name			= "fsl-dcu-drm",
147 	.desc			= "Freescale DCU DRM",
148 	.date			= "20160425",
149 	.major			= 1,
150 	.minor			= 1,
151 };
152 
153 #ifdef CONFIG_PM_SLEEP
154 static int fsl_dcu_drm_pm_suspend(struct device *dev)
155 {
156 	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
157 	int ret;
158 
159 	if (!fsl_dev)
160 		return 0;
161 
162 	disable_irq(fsl_dev->irq);
163 
164 	ret = drm_mode_config_helper_suspend(fsl_dev->drm);
165 	if (ret) {
166 		enable_irq(fsl_dev->irq);
167 		return ret;
168 	}
169 
170 	clk_disable_unprepare(fsl_dev->clk);
171 
172 	return 0;
173 }
174 
175 static int fsl_dcu_drm_pm_resume(struct device *dev)
176 {
177 	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
178 	int ret;
179 
180 	if (!fsl_dev)
181 		return 0;
182 
183 	ret = clk_prepare_enable(fsl_dev->clk);
184 	if (ret < 0) {
185 		dev_err(dev, "failed to enable dcu clk\n");
186 		return ret;
187 	}
188 
189 	if (fsl_dev->tcon)
190 		fsl_tcon_bypass_enable(fsl_dev->tcon);
191 	fsl_dcu_drm_init_planes(fsl_dev->drm);
192 	enable_irq(fsl_dev->irq);
193 
194 	drm_mode_config_helper_resume(fsl_dev->drm);
195 
196 	return 0;
197 }
198 #endif
199 
200 static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
201 	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
202 };
203 
204 static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
205 	.name = "ls1021a",
206 	.total_layer = 16,
207 	.max_layer = 4,
208 	.layer_regs = LS1021A_LAYER_REG_NUM,
209 };
210 
211 static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
212 	.name = "vf610",
213 	.total_layer = 64,
214 	.max_layer = 6,
215 	.layer_regs = VF610_LAYER_REG_NUM,
216 };
217 
218 static const struct of_device_id fsl_dcu_of_match[] = {
219 	{
220 		.compatible = "fsl,ls1021a-dcu",
221 		.data = &fsl_dcu_ls1021a_data,
222 	}, {
223 		.compatible = "fsl,vf610-dcu",
224 		.data = &fsl_dcu_vf610_data,
225 	}, {
226 	},
227 };
228 MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
229 
230 static int fsl_dcu_drm_probe(struct platform_device *pdev)
231 {
232 	struct fsl_dcu_drm_device *fsl_dev;
233 	struct drm_device *drm;
234 	struct device *dev = &pdev->dev;
235 	struct resource *res;
236 	void __iomem *base;
237 	struct clk *pix_clk_in;
238 	char pix_clk_name[32];
239 	const char *pix_clk_in_name;
240 	const struct of_device_id *id;
241 	int ret;
242 	u8 div_ratio_shift = 0;
243 
244 	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
245 	if (!fsl_dev)
246 		return -ENOMEM;
247 
248 	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
249 	if (!id)
250 		return -ENODEV;
251 	fsl_dev->soc = id->data;
252 
253 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
254 	base = devm_ioremap_resource(dev, res);
255 	if (IS_ERR(base)) {
256 		ret = PTR_ERR(base);
257 		return ret;
258 	}
259 
260 	fsl_dev->irq = platform_get_irq(pdev, 0);
261 	if (fsl_dev->irq < 0) {
262 		dev_err(dev, "failed to get irq\n");
263 		return fsl_dev->irq;
264 	}
265 
266 	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
267 			&fsl_dcu_regmap_config);
268 	if (IS_ERR(fsl_dev->regmap)) {
269 		dev_err(dev, "regmap init failed\n");
270 		return PTR_ERR(fsl_dev->regmap);
271 	}
272 
273 	fsl_dev->clk = devm_clk_get(dev, "dcu");
274 	if (IS_ERR(fsl_dev->clk)) {
275 		dev_err(dev, "failed to get dcu clock\n");
276 		return PTR_ERR(fsl_dev->clk);
277 	}
278 	ret = clk_prepare_enable(fsl_dev->clk);
279 	if (ret < 0) {
280 		dev_err(dev, "failed to enable dcu clk\n");
281 		return ret;
282 	}
283 
284 	pix_clk_in = devm_clk_get(dev, "pix");
285 	if (IS_ERR(pix_clk_in)) {
286 		/* legancy binding, use dcu clock as pixel clock input */
287 		pix_clk_in = fsl_dev->clk;
288 	}
289 
290 	if (of_property_read_bool(dev->of_node, "big-endian"))
291 		div_ratio_shift = 24;
292 
293 	pix_clk_in_name = __clk_get_name(pix_clk_in);
294 	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
295 	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
296 			pix_clk_in_name, 0, base + DCU_DIV_RATIO,
297 			div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
298 	if (IS_ERR(fsl_dev->pix_clk)) {
299 		dev_err(dev, "failed to register pix clk\n");
300 		ret = PTR_ERR(fsl_dev->pix_clk);
301 		goto disable_clk;
302 	}
303 
304 	fsl_dev->tcon = fsl_tcon_init(dev);
305 
306 	drm = drm_dev_alloc(&fsl_dcu_drm_driver, dev);
307 	if (IS_ERR(drm)) {
308 		ret = PTR_ERR(drm);
309 		goto unregister_pix_clk;
310 	}
311 
312 	fsl_dev->dev = dev;
313 	fsl_dev->drm = drm;
314 	fsl_dev->np = dev->of_node;
315 	drm->dev_private = fsl_dev;
316 	dev_set_drvdata(dev, fsl_dev);
317 
318 	ret = drm_dev_register(drm, 0);
319 	if (ret < 0)
320 		goto put;
321 
322 	drm_fbdev_generic_setup(drm, legacyfb_depth);
323 
324 	return 0;
325 
326 put:
327 	drm_dev_put(drm);
328 unregister_pix_clk:
329 	clk_unregister(fsl_dev->pix_clk);
330 disable_clk:
331 	clk_disable_unprepare(fsl_dev->clk);
332 	return ret;
333 }
334 
335 static int fsl_dcu_drm_remove(struct platform_device *pdev)
336 {
337 	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
338 
339 	drm_dev_unregister(fsl_dev->drm);
340 	drm_dev_put(fsl_dev->drm);
341 	clk_disable_unprepare(fsl_dev->clk);
342 	clk_unregister(fsl_dev->pix_clk);
343 
344 	return 0;
345 }
346 
347 static struct platform_driver fsl_dcu_drm_platform_driver = {
348 	.probe		= fsl_dcu_drm_probe,
349 	.remove		= fsl_dcu_drm_remove,
350 	.driver		= {
351 		.name	= "fsl-dcu",
352 		.pm	= &fsl_dcu_drm_pm_ops,
353 		.of_match_table = fsl_dcu_of_match,
354 	},
355 };
356 
357 module_platform_driver(fsl_dcu_drm_platform_driver);
358 
359 MODULE_DESCRIPTION("Freescale DCU DRM Driver");
360 MODULE_LICENSE("GPL");
361