xref: /linux/drivers/gpu/drm/exynos/exynos_drm_ipp.h (revision b889fcf63cb62e7fdb7816565e28f44dbe4a76a5)
1 /*
2  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
3  *
4  * Authors:
5  *	Eunchul Kim <chulspro.kim@samsung.com>
6  *	Jinyoung Jeon <jy0.jeon@samsung.com>
7  *	Sangmin Lee <lsmin.lee@samsung.com>
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
11  * to deal in the Software without restriction, including without limitation
12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice (including the next
17  * paragraph) shall be included in all copies or substantial portions of the
18  * Software.
19  *
20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
23  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26  * OTHER DEALINGS IN THE SOFTWARE.
27  */
28 
29 #ifndef _EXYNOS_DRM_IPP_H_
30 #define _EXYNOS_DRM_IPP_H_
31 
32 #define for_each_ipp_ops(pos)	\
33 	for (pos = 0; pos < EXYNOS_DRM_OPS_MAX; pos++)
34 #define for_each_ipp_planar(pos)	\
35 	for (pos = 0; pos < EXYNOS_DRM_PLANAR_MAX; pos++)
36 
37 #define IPP_GET_LCD_WIDTH	_IOR('F', 302, int)
38 #define IPP_GET_LCD_HEIGHT	_IOR('F', 303, int)
39 #define IPP_SET_WRITEBACK	_IOW('F', 304, u32)
40 
41 /* definition of state */
42 enum drm_exynos_ipp_state {
43 	IPP_STATE_IDLE,
44 	IPP_STATE_START,
45 	IPP_STATE_STOP,
46 };
47 
48 /*
49  * A structure of command work information.
50  * @work: work structure.
51  * @ippdrv: current work ippdrv.
52  * @c_node: command node information.
53  * @ctrl: command control.
54  */
55 struct drm_exynos_ipp_cmd_work {
56 	struct work_struct	work;
57 	struct exynos_drm_ippdrv	*ippdrv;
58 	struct drm_exynos_ipp_cmd_node *c_node;
59 	enum drm_exynos_ipp_ctrl	ctrl;
60 };
61 
62 /*
63  * A structure of command node.
64  *
65  * @priv: IPP private infomation.
66  * @list: list head to command queue information.
67  * @event_list: list head of event.
68  * @mem_list: list head to source,destination memory queue information.
69  * @cmd_lock: lock for synchronization of access to ioctl.
70  * @mem_lock: lock for synchronization of access to memory nodes.
71  * @event_lock: lock for synchronization of access to scheduled event.
72  * @start_complete: completion of start of command.
73  * @stop_complete: completion of stop of command.
74  * @property: property information.
75  * @start_work: start command work structure.
76  * @stop_work: stop command work structure.
77  * @event_work: event work structure.
78  * @state: state of command node.
79  */
80 struct drm_exynos_ipp_cmd_node {
81 	struct exynos_drm_ipp_private *priv;
82 	struct list_head	list;
83 	struct list_head	event_list;
84 	struct list_head	mem_list[EXYNOS_DRM_OPS_MAX];
85 	struct mutex	cmd_lock;
86 	struct mutex	mem_lock;
87 	struct mutex	event_lock;
88 	struct completion	start_complete;
89 	struct completion	stop_complete;
90 	struct drm_exynos_ipp_property	property;
91 	struct drm_exynos_ipp_cmd_work *start_work;
92 	struct drm_exynos_ipp_cmd_work *stop_work;
93 	struct drm_exynos_ipp_event_work *event_work;
94 	enum drm_exynos_ipp_state	state;
95 };
96 
97 /*
98  * A structure of buffer information.
99  *
100  * @gem_objs: Y, Cb, Cr each gem object.
101  * @base: Y, Cb, Cr each planar address.
102  */
103 struct drm_exynos_ipp_buf_info {
104 	unsigned long	handles[EXYNOS_DRM_PLANAR_MAX];
105 	dma_addr_t	base[EXYNOS_DRM_PLANAR_MAX];
106 };
107 
108 /*
109  * A structure of wb setting infomation.
110  *
111  * @enable: enable flag for wb.
112  * @refresh: HZ of the refresh rate.
113  */
114 struct drm_exynos_ipp_set_wb {
115 	__u32	enable;
116 	__u32	refresh;
117 };
118 
119 /*
120  * A structure of event work information.
121  *
122  * @work: work structure.
123  * @ippdrv: current work ippdrv.
124  * @buf_id: id of src, dst buffer.
125  */
126 struct drm_exynos_ipp_event_work {
127 	struct work_struct	work;
128 	struct exynos_drm_ippdrv *ippdrv;
129 	u32	buf_id[EXYNOS_DRM_OPS_MAX];
130 };
131 
132 /*
133  * A structure of source,destination operations.
134  *
135  * @set_fmt: set format of image.
136  * @set_transf: set transform(rotations, flip).
137  * @set_size: set size of region.
138  * @set_addr: set address for dma.
139  */
140 struct exynos_drm_ipp_ops {
141 	int (*set_fmt)(struct device *dev, u32 fmt);
142 	int (*set_transf)(struct device *dev,
143 		enum drm_exynos_degree degree,
144 		enum drm_exynos_flip flip, bool *swap);
145 	int (*set_size)(struct device *dev, int swap,
146 		struct drm_exynos_pos *pos, struct drm_exynos_sz *sz);
147 	int (*set_addr)(struct device *dev,
148 		 struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,
149 		enum drm_exynos_ipp_buf_type buf_type);
150 };
151 
152 /*
153  * A structure of ipp driver.
154  *
155  * @drv_list: list head for registed sub driver information.
156  * @parent_dev: parent device information.
157  * @dev: platform device.
158  * @drm_dev: drm device.
159  * @ipp_id: id of ipp driver.
160  * @dedicated: dedicated ipp device.
161  * @ops: source, destination operations.
162  * @event_workq: event work queue.
163  * @cmd: current command information.
164  * @cmd_list: list head for command information.
165  * @prop_list: property informations of current ipp driver.
166  * @check_property: check property about format, size, buffer.
167  * @reset: reset ipp block.
168  * @start: ipp each device start.
169  * @stop: ipp each device stop.
170  * @sched_event: work schedule handler.
171  */
172 struct exynos_drm_ippdrv {
173 	struct list_head	drv_list;
174 	struct device	*parent_dev;
175 	struct device	*dev;
176 	struct drm_device	*drm_dev;
177 	u32	ipp_id;
178 	bool	dedicated;
179 	struct exynos_drm_ipp_ops	*ops[EXYNOS_DRM_OPS_MAX];
180 	struct workqueue_struct	*event_workq;
181 	struct drm_exynos_ipp_cmd_node *cmd;
182 	struct list_head	cmd_list;
183 	struct drm_exynos_ipp_prop_list *prop_list;
184 
185 	int (*check_property)(struct device *dev,
186 		struct drm_exynos_ipp_property *property);
187 	int (*reset)(struct device *dev);
188 	int (*start)(struct device *dev, enum drm_exynos_ipp_cmd cmd);
189 	void (*stop)(struct device *dev, enum drm_exynos_ipp_cmd cmd);
190 	void (*sched_event)(struct work_struct *work);
191 };
192 
193 #ifdef CONFIG_DRM_EXYNOS_IPP
194 extern int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv);
195 extern int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv);
196 extern int exynos_drm_ipp_get_property(struct drm_device *drm_dev, void *data,
197 					 struct drm_file *file);
198 extern int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data,
199 					 struct drm_file *file);
200 extern int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, void *data,
201 					 struct drm_file *file);
202 extern int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev, void *data,
203 					 struct drm_file *file);
204 extern int exynos_drm_ippnb_register(struct notifier_block *nb);
205 extern int exynos_drm_ippnb_unregister(struct notifier_block *nb);
206 extern int exynos_drm_ippnb_send_event(unsigned long val, void *v);
207 extern void ipp_sched_cmd(struct work_struct *work);
208 extern void ipp_sched_event(struct work_struct *work);
209 
210 #else
211 static inline int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv)
212 {
213 	return -ENODEV;
214 }
215 
216 static inline int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv)
217 {
218 	return -ENODEV;
219 }
220 
221 static inline int exynos_drm_ipp_get_property(struct drm_device *drm_dev,
222 						void *data,
223 						struct drm_file *file_priv)
224 {
225 	return -ENOTTY;
226 }
227 
228 static inline int exynos_drm_ipp_set_property(struct drm_device *drm_dev,
229 						void *data,
230 						struct drm_file *file_priv)
231 {
232 	return -ENOTTY;
233 }
234 
235 static inline int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev,
236 						void *data,
237 						struct drm_file *file)
238 {
239 	return -ENOTTY;
240 }
241 
242 static inline int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev,
243 						void *data,
244 						struct drm_file *file)
245 {
246 	return -ENOTTY;
247 }
248 
249 static inline int exynos_drm_ippnb_register(struct notifier_block *nb)
250 {
251 	return -ENODEV;
252 }
253 
254 static inline int exynos_drm_ippnb_unregister(struct notifier_block *nb)
255 {
256 	return -ENODEV;
257 }
258 
259 static inline int exynos_drm_ippnb_send_event(unsigned long val, void *v)
260 {
261 	return -ENOTTY;
262 }
263 #endif
264 
265 #endif /* _EXYNOS_DRM_IPP_H_ */
266 
267