xref: /linux/drivers/gpu/drm/exynos/exynos_drm_g2d.c (revision a8fe58cec351c25e09c393bf46117c0c47b5a17c)
1 /*
2  * Copyright (C) 2012 Samsung Electronics Co.Ltd
3  * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundationr
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-attrs.h>
21 #include <linux/of.h>
22 
23 #include <drm/drmP.h>
24 #include <drm/exynos_drm.h>
25 #include "exynos_drm_drv.h"
26 #include "exynos_drm_g2d.h"
27 #include "exynos_drm_gem.h"
28 #include "exynos_drm_iommu.h"
29 
30 #define G2D_HW_MAJOR_VER		4
31 #define G2D_HW_MINOR_VER		1
32 
33 /* vaild register range set from user: 0x0104 ~ 0x0880 */
34 #define G2D_VALID_START			0x0104
35 #define G2D_VALID_END			0x0880
36 
37 /* general registers */
38 #define G2D_SOFT_RESET			0x0000
39 #define G2D_INTEN			0x0004
40 #define G2D_INTC_PEND			0x000C
41 #define G2D_DMA_SFR_BASE_ADDR		0x0080
42 #define G2D_DMA_COMMAND			0x0084
43 #define G2D_DMA_STATUS			0x008C
44 #define G2D_DMA_HOLD_CMD		0x0090
45 
46 /* command registers */
47 #define G2D_BITBLT_START		0x0100
48 
49 /* registers for base address */
50 #define G2D_SRC_BASE_ADDR		0x0304
51 #define G2D_SRC_STRIDE_REG		0x0308
52 #define G2D_SRC_COLOR_MODE		0x030C
53 #define G2D_SRC_LEFT_TOP		0x0310
54 #define G2D_SRC_RIGHT_BOTTOM		0x0314
55 #define G2D_SRC_PLANE2_BASE_ADDR	0x0318
56 #define G2D_DST_BASE_ADDR		0x0404
57 #define G2D_DST_STRIDE_REG		0x0408
58 #define G2D_DST_COLOR_MODE		0x040C
59 #define G2D_DST_LEFT_TOP		0x0410
60 #define G2D_DST_RIGHT_BOTTOM		0x0414
61 #define G2D_DST_PLANE2_BASE_ADDR	0x0418
62 #define G2D_PAT_BASE_ADDR		0x0500
63 #define G2D_MSK_BASE_ADDR		0x0520
64 
65 /* G2D_SOFT_RESET */
66 #define G2D_SFRCLEAR			(1 << 1)
67 #define G2D_R				(1 << 0)
68 
69 /* G2D_INTEN */
70 #define G2D_INTEN_ACF			(1 << 3)
71 #define G2D_INTEN_UCF			(1 << 2)
72 #define G2D_INTEN_GCF			(1 << 1)
73 #define G2D_INTEN_SCF			(1 << 0)
74 
75 /* G2D_INTC_PEND */
76 #define G2D_INTP_ACMD_FIN		(1 << 3)
77 #define G2D_INTP_UCMD_FIN		(1 << 2)
78 #define G2D_INTP_GCMD_FIN		(1 << 1)
79 #define G2D_INTP_SCMD_FIN		(1 << 0)
80 
81 /* G2D_DMA_COMMAND */
82 #define G2D_DMA_HALT			(1 << 2)
83 #define G2D_DMA_CONTINUE		(1 << 1)
84 #define G2D_DMA_START			(1 << 0)
85 
86 /* G2D_DMA_STATUS */
87 #define G2D_DMA_LIST_DONE_COUNT		(0xFF << 17)
88 #define G2D_DMA_BITBLT_DONE_COUNT	(0xFFFF << 1)
89 #define G2D_DMA_DONE			(1 << 0)
90 #define G2D_DMA_LIST_DONE_COUNT_OFFSET	17
91 
92 /* G2D_DMA_HOLD_CMD */
93 #define G2D_USER_HOLD			(1 << 2)
94 #define G2D_LIST_HOLD			(1 << 1)
95 #define G2D_BITBLT_HOLD			(1 << 0)
96 
97 /* G2D_BITBLT_START */
98 #define G2D_START_CASESEL		(1 << 2)
99 #define G2D_START_NHOLT			(1 << 1)
100 #define G2D_START_BITBLT		(1 << 0)
101 
102 /* buffer color format */
103 #define G2D_FMT_XRGB8888		0
104 #define G2D_FMT_ARGB8888		1
105 #define G2D_FMT_RGB565			2
106 #define G2D_FMT_XRGB1555		3
107 #define G2D_FMT_ARGB1555		4
108 #define G2D_FMT_XRGB4444		5
109 #define G2D_FMT_ARGB4444		6
110 #define G2D_FMT_PACKED_RGB888		7
111 #define G2D_FMT_A8			11
112 #define G2D_FMT_L8			12
113 
114 /* buffer valid length */
115 #define G2D_LEN_MIN			1
116 #define G2D_LEN_MAX			8000
117 
118 #define G2D_CMDLIST_SIZE		(PAGE_SIZE / 4)
119 #define G2D_CMDLIST_NUM			64
120 #define G2D_CMDLIST_POOL_SIZE		(G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
121 #define G2D_CMDLIST_DATA_NUM		(G2D_CMDLIST_SIZE / sizeof(u32) - 2)
122 
123 /* maximum buffer pool size of userptr is 64MB as default */
124 #define MAX_POOL		(64 * 1024 * 1024)
125 
126 enum {
127 	BUF_TYPE_GEM = 1,
128 	BUF_TYPE_USERPTR,
129 };
130 
131 enum g2d_reg_type {
132 	REG_TYPE_NONE = -1,
133 	REG_TYPE_SRC,
134 	REG_TYPE_SRC_PLANE2,
135 	REG_TYPE_DST,
136 	REG_TYPE_DST_PLANE2,
137 	REG_TYPE_PAT,
138 	REG_TYPE_MSK,
139 	MAX_REG_TYPE_NR
140 };
141 
142 /* cmdlist data structure */
143 struct g2d_cmdlist {
144 	u32		head;
145 	unsigned long	data[G2D_CMDLIST_DATA_NUM];
146 	u32		last;	/* last data offset */
147 };
148 
149 /*
150  * A structure of buffer description
151  *
152  * @format: color format
153  * @stride: buffer stride/pitch in bytes
154  * @left_x: the x coordinates of left top corner
155  * @top_y: the y coordinates of left top corner
156  * @right_x: the x coordinates of right bottom corner
157  * @bottom_y: the y coordinates of right bottom corner
158  *
159  */
160 struct g2d_buf_desc {
161 	unsigned int	format;
162 	unsigned int	stride;
163 	unsigned int	left_x;
164 	unsigned int	top_y;
165 	unsigned int	right_x;
166 	unsigned int	bottom_y;
167 };
168 
169 /*
170  * A structure of buffer information
171  *
172  * @map_nr: manages the number of mapped buffers
173  * @reg_types: stores regitster type in the order of requested command
174  * @handles: stores buffer handle in its reg_type position
175  * @types: stores buffer type in its reg_type position
176  * @descs: stores buffer description in its reg_type position
177  *
178  */
179 struct g2d_buf_info {
180 	unsigned int		map_nr;
181 	enum g2d_reg_type	reg_types[MAX_REG_TYPE_NR];
182 	unsigned long		handles[MAX_REG_TYPE_NR];
183 	unsigned int		types[MAX_REG_TYPE_NR];
184 	struct g2d_buf_desc	descs[MAX_REG_TYPE_NR];
185 };
186 
187 struct drm_exynos_pending_g2d_event {
188 	struct drm_pending_event	base;
189 	struct drm_exynos_g2d_event	event;
190 };
191 
192 struct g2d_cmdlist_userptr {
193 	struct list_head	list;
194 	dma_addr_t		dma_addr;
195 	unsigned long		userptr;
196 	unsigned long		size;
197 	struct frame_vector	*vec;
198 	struct sg_table		*sgt;
199 	atomic_t		refcount;
200 	bool			in_pool;
201 	bool			out_of_list;
202 };
203 struct g2d_cmdlist_node {
204 	struct list_head	list;
205 	struct g2d_cmdlist	*cmdlist;
206 	dma_addr_t		dma_addr;
207 	struct g2d_buf_info	buf_info;
208 
209 	struct drm_exynos_pending_g2d_event	*event;
210 };
211 
212 struct g2d_runqueue_node {
213 	struct list_head	list;
214 	struct list_head	run_cmdlist;
215 	struct list_head	event_list;
216 	struct drm_file		*filp;
217 	pid_t			pid;
218 	struct completion	complete;
219 	int			async;
220 };
221 
222 struct g2d_data {
223 	struct device			*dev;
224 	struct clk			*gate_clk;
225 	void __iomem			*regs;
226 	int				irq;
227 	struct workqueue_struct		*g2d_workq;
228 	struct work_struct		runqueue_work;
229 	struct exynos_drm_subdrv	subdrv;
230 	bool				suspended;
231 
232 	/* cmdlist */
233 	struct g2d_cmdlist_node		*cmdlist_node;
234 	struct list_head		free_cmdlist;
235 	struct mutex			cmdlist_mutex;
236 	dma_addr_t			cmdlist_pool;
237 	void				*cmdlist_pool_virt;
238 	struct dma_attrs		cmdlist_dma_attrs;
239 
240 	/* runqueue*/
241 	struct g2d_runqueue_node	*runqueue_node;
242 	struct list_head		runqueue;
243 	struct mutex			runqueue_mutex;
244 	struct kmem_cache		*runqueue_slab;
245 
246 	unsigned long			current_pool;
247 	unsigned long			max_pool;
248 };
249 
250 static int g2d_init_cmdlist(struct g2d_data *g2d)
251 {
252 	struct device *dev = g2d->dev;
253 	struct g2d_cmdlist_node *node = g2d->cmdlist_node;
254 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
255 	int nr;
256 	int ret;
257 	struct g2d_buf_info *buf_info;
258 
259 	init_dma_attrs(&g2d->cmdlist_dma_attrs);
260 	dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
261 
262 	g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
263 						G2D_CMDLIST_POOL_SIZE,
264 						&g2d->cmdlist_pool, GFP_KERNEL,
265 						&g2d->cmdlist_dma_attrs);
266 	if (!g2d->cmdlist_pool_virt) {
267 		dev_err(dev, "failed to allocate dma memory\n");
268 		return -ENOMEM;
269 	}
270 
271 	node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
272 	if (!node) {
273 		dev_err(dev, "failed to allocate memory\n");
274 		ret = -ENOMEM;
275 		goto err;
276 	}
277 
278 	for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
279 		unsigned int i;
280 
281 		node[nr].cmdlist =
282 			g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
283 		node[nr].dma_addr =
284 			g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
285 
286 		buf_info = &node[nr].buf_info;
287 		for (i = 0; i < MAX_REG_TYPE_NR; i++)
288 			buf_info->reg_types[i] = REG_TYPE_NONE;
289 
290 		list_add_tail(&node[nr].list, &g2d->free_cmdlist);
291 	}
292 
293 	return 0;
294 
295 err:
296 	dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
297 			g2d->cmdlist_pool_virt,
298 			g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
299 	return ret;
300 }
301 
302 static void g2d_fini_cmdlist(struct g2d_data *g2d)
303 {
304 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
305 
306 	kfree(g2d->cmdlist_node);
307 
308 	if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) {
309 		dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
310 				g2d->cmdlist_pool_virt,
311 				g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
312 	}
313 }
314 
315 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
316 {
317 	struct device *dev = g2d->dev;
318 	struct g2d_cmdlist_node *node;
319 
320 	mutex_lock(&g2d->cmdlist_mutex);
321 	if (list_empty(&g2d->free_cmdlist)) {
322 		dev_err(dev, "there is no free cmdlist\n");
323 		mutex_unlock(&g2d->cmdlist_mutex);
324 		return NULL;
325 	}
326 
327 	node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
328 				list);
329 	list_del_init(&node->list);
330 	mutex_unlock(&g2d->cmdlist_mutex);
331 
332 	return node;
333 }
334 
335 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
336 {
337 	mutex_lock(&g2d->cmdlist_mutex);
338 	list_move_tail(&node->list, &g2d->free_cmdlist);
339 	mutex_unlock(&g2d->cmdlist_mutex);
340 }
341 
342 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
343 				     struct g2d_cmdlist_node *node)
344 {
345 	struct g2d_cmdlist_node *lnode;
346 
347 	if (list_empty(&g2d_priv->inuse_cmdlist))
348 		goto add_to_list;
349 
350 	/* this links to base address of new cmdlist */
351 	lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
352 				struct g2d_cmdlist_node, list);
353 	lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
354 
355 add_to_list:
356 	list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
357 
358 	if (node->event)
359 		list_add_tail(&node->event->base.link, &g2d_priv->event_list);
360 }
361 
362 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
363 					unsigned long obj,
364 					bool force)
365 {
366 	struct g2d_cmdlist_userptr *g2d_userptr =
367 					(struct g2d_cmdlist_userptr *)obj;
368 	struct page **pages;
369 
370 	if (!obj)
371 		return;
372 
373 	if (force)
374 		goto out;
375 
376 	atomic_dec(&g2d_userptr->refcount);
377 
378 	if (atomic_read(&g2d_userptr->refcount) > 0)
379 		return;
380 
381 	if (g2d_userptr->in_pool)
382 		return;
383 
384 out:
385 	exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
386 					DMA_BIDIRECTIONAL);
387 
388 	pages = frame_vector_pages(g2d_userptr->vec);
389 	if (!IS_ERR(pages)) {
390 		int i;
391 
392 		for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++)
393 			set_page_dirty_lock(pages[i]);
394 	}
395 	put_vaddr_frames(g2d_userptr->vec);
396 	frame_vector_destroy(g2d_userptr->vec);
397 
398 	if (!g2d_userptr->out_of_list)
399 		list_del_init(&g2d_userptr->list);
400 
401 	sg_free_table(g2d_userptr->sgt);
402 	kfree(g2d_userptr->sgt);
403 	kfree(g2d_userptr);
404 }
405 
406 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
407 					unsigned long userptr,
408 					unsigned long size,
409 					struct drm_file *filp,
410 					unsigned long *obj)
411 {
412 	struct drm_exynos_file_private *file_priv = filp->driver_priv;
413 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
414 	struct g2d_cmdlist_userptr *g2d_userptr;
415 	struct g2d_data *g2d;
416 	struct sg_table	*sgt;
417 	unsigned long start, end;
418 	unsigned int npages, offset;
419 	int ret;
420 
421 	if (!size) {
422 		DRM_ERROR("invalid userptr size.\n");
423 		return ERR_PTR(-EINVAL);
424 	}
425 
426 	g2d = dev_get_drvdata(g2d_priv->dev);
427 
428 	/* check if userptr already exists in userptr_list. */
429 	list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
430 		if (g2d_userptr->userptr == userptr) {
431 			/*
432 			 * also check size because there could be same address
433 			 * and different size.
434 			 */
435 			if (g2d_userptr->size == size) {
436 				atomic_inc(&g2d_userptr->refcount);
437 				*obj = (unsigned long)g2d_userptr;
438 
439 				return &g2d_userptr->dma_addr;
440 			}
441 
442 			/*
443 			 * at this moment, maybe g2d dma is accessing this
444 			 * g2d_userptr memory region so just remove this
445 			 * g2d_userptr object from userptr_list not to be
446 			 * referred again and also except it the userptr
447 			 * pool to be released after the dma access completion.
448 			 */
449 			g2d_userptr->out_of_list = true;
450 			g2d_userptr->in_pool = false;
451 			list_del_init(&g2d_userptr->list);
452 
453 			break;
454 		}
455 	}
456 
457 	g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
458 	if (!g2d_userptr)
459 		return ERR_PTR(-ENOMEM);
460 
461 	atomic_set(&g2d_userptr->refcount, 1);
462 	g2d_userptr->size = size;
463 
464 	start = userptr & PAGE_MASK;
465 	offset = userptr & ~PAGE_MASK;
466 	end = PAGE_ALIGN(userptr + size);
467 	npages = (end - start) >> PAGE_SHIFT;
468 	g2d_userptr->vec = frame_vector_create(npages);
469 	if (!g2d_userptr->vec) {
470 		ret = -ENOMEM;
471 		goto err_free;
472 	}
473 
474 	ret = get_vaddr_frames(start, npages, true, true, g2d_userptr->vec);
475 	if (ret != npages) {
476 		DRM_ERROR("failed to get user pages from userptr.\n");
477 		if (ret < 0)
478 			goto err_destroy_framevec;
479 		ret = -EFAULT;
480 		goto err_put_framevec;
481 	}
482 	if (frame_vector_to_pages(g2d_userptr->vec) < 0) {
483 		ret = -EFAULT;
484 		goto err_put_framevec;
485 	}
486 
487 	sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
488 	if (!sgt) {
489 		ret = -ENOMEM;
490 		goto err_put_framevec;
491 	}
492 
493 	ret = sg_alloc_table_from_pages(sgt,
494 					frame_vector_pages(g2d_userptr->vec),
495 					npages, offset, size, GFP_KERNEL);
496 	if (ret < 0) {
497 		DRM_ERROR("failed to get sgt from pages.\n");
498 		goto err_free_sgt;
499 	}
500 
501 	g2d_userptr->sgt = sgt;
502 
503 	ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
504 						DMA_BIDIRECTIONAL);
505 	if (ret < 0) {
506 		DRM_ERROR("failed to map sgt with dma region.\n");
507 		goto err_sg_free_table;
508 	}
509 
510 	g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
511 	g2d_userptr->userptr = userptr;
512 
513 	list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
514 
515 	if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
516 		g2d->current_pool += npages << PAGE_SHIFT;
517 		g2d_userptr->in_pool = true;
518 	}
519 
520 	*obj = (unsigned long)g2d_userptr;
521 
522 	return &g2d_userptr->dma_addr;
523 
524 err_sg_free_table:
525 	sg_free_table(sgt);
526 
527 err_free_sgt:
528 	kfree(sgt);
529 
530 err_put_framevec:
531 	put_vaddr_frames(g2d_userptr->vec);
532 
533 err_destroy_framevec:
534 	frame_vector_destroy(g2d_userptr->vec);
535 
536 err_free:
537 	kfree(g2d_userptr);
538 
539 	return ERR_PTR(ret);
540 }
541 
542 static void g2d_userptr_free_all(struct drm_device *drm_dev,
543 					struct g2d_data *g2d,
544 					struct drm_file *filp)
545 {
546 	struct drm_exynos_file_private *file_priv = filp->driver_priv;
547 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
548 	struct g2d_cmdlist_userptr *g2d_userptr, *n;
549 
550 	list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
551 		if (g2d_userptr->in_pool)
552 			g2d_userptr_put_dma_addr(drm_dev,
553 						(unsigned long)g2d_userptr,
554 						true);
555 
556 	g2d->current_pool = 0;
557 }
558 
559 static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
560 {
561 	enum g2d_reg_type reg_type;
562 
563 	switch (reg_offset) {
564 	case G2D_SRC_BASE_ADDR:
565 	case G2D_SRC_STRIDE_REG:
566 	case G2D_SRC_COLOR_MODE:
567 	case G2D_SRC_LEFT_TOP:
568 	case G2D_SRC_RIGHT_BOTTOM:
569 		reg_type = REG_TYPE_SRC;
570 		break;
571 	case G2D_SRC_PLANE2_BASE_ADDR:
572 		reg_type = REG_TYPE_SRC_PLANE2;
573 		break;
574 	case G2D_DST_BASE_ADDR:
575 	case G2D_DST_STRIDE_REG:
576 	case G2D_DST_COLOR_MODE:
577 	case G2D_DST_LEFT_TOP:
578 	case G2D_DST_RIGHT_BOTTOM:
579 		reg_type = REG_TYPE_DST;
580 		break;
581 	case G2D_DST_PLANE2_BASE_ADDR:
582 		reg_type = REG_TYPE_DST_PLANE2;
583 		break;
584 	case G2D_PAT_BASE_ADDR:
585 		reg_type = REG_TYPE_PAT;
586 		break;
587 	case G2D_MSK_BASE_ADDR:
588 		reg_type = REG_TYPE_MSK;
589 		break;
590 	default:
591 		reg_type = REG_TYPE_NONE;
592 		DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
593 		break;
594 	}
595 
596 	return reg_type;
597 }
598 
599 static unsigned long g2d_get_buf_bpp(unsigned int format)
600 {
601 	unsigned long bpp;
602 
603 	switch (format) {
604 	case G2D_FMT_XRGB8888:
605 	case G2D_FMT_ARGB8888:
606 		bpp = 4;
607 		break;
608 	case G2D_FMT_RGB565:
609 	case G2D_FMT_XRGB1555:
610 	case G2D_FMT_ARGB1555:
611 	case G2D_FMT_XRGB4444:
612 	case G2D_FMT_ARGB4444:
613 		bpp = 2;
614 		break;
615 	case G2D_FMT_PACKED_RGB888:
616 		bpp = 3;
617 		break;
618 	default:
619 		bpp = 1;
620 		break;
621 	}
622 
623 	return bpp;
624 }
625 
626 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
627 						enum g2d_reg_type reg_type,
628 						unsigned long size)
629 {
630 	int width, height;
631 	unsigned long bpp, last_pos;
632 
633 	/*
634 	 * check source and destination buffers only.
635 	 * so the others are always valid.
636 	 */
637 	if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
638 		return true;
639 
640 	/* This check also makes sure that right_x > left_x. */
641 	width = (int)buf_desc->right_x - (int)buf_desc->left_x;
642 	if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
643 		DRM_ERROR("width[%d] is out of range!\n", width);
644 		return false;
645 	}
646 
647 	/* This check also makes sure that bottom_y > top_y. */
648 	height = (int)buf_desc->bottom_y - (int)buf_desc->top_y;
649 	if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
650 		DRM_ERROR("height[%d] is out of range!\n", height);
651 		return false;
652 	}
653 
654 	bpp = g2d_get_buf_bpp(buf_desc->format);
655 
656 	/* Compute the position of the last byte that the engine accesses. */
657 	last_pos = ((unsigned long)buf_desc->bottom_y - 1) *
658 		(unsigned long)buf_desc->stride +
659 		(unsigned long)buf_desc->right_x * bpp - 1;
660 
661 	/*
662 	 * Since right_x > left_x and bottom_y > top_y we already know
663 	 * that the first_pos < last_pos (first_pos being the position
664 	 * of the first byte the engine accesses), it just remains to
665 	 * check if last_pos is smaller then the buffer size.
666 	 */
667 
668 	if (last_pos >= size) {
669 		DRM_ERROR("last engine access position [%lu] "
670 			"is out of range [%lu]!\n", last_pos, size);
671 		return false;
672 	}
673 
674 	return true;
675 }
676 
677 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
678 				struct g2d_cmdlist_node *node,
679 				struct drm_device *drm_dev,
680 				struct drm_file *file)
681 {
682 	struct g2d_cmdlist *cmdlist = node->cmdlist;
683 	struct g2d_buf_info *buf_info = &node->buf_info;
684 	int offset;
685 	int ret;
686 	int i;
687 
688 	for (i = 0; i < buf_info->map_nr; i++) {
689 		struct g2d_buf_desc *buf_desc;
690 		enum g2d_reg_type reg_type;
691 		int reg_pos;
692 		unsigned long handle;
693 		dma_addr_t *addr;
694 
695 		reg_pos = cmdlist->last - 2 * (i + 1);
696 
697 		offset = cmdlist->data[reg_pos];
698 		handle = cmdlist->data[reg_pos + 1];
699 
700 		reg_type = g2d_get_reg_type(offset);
701 		if (reg_type == REG_TYPE_NONE) {
702 			ret = -EFAULT;
703 			goto err;
704 		}
705 
706 		buf_desc = &buf_info->descs[reg_type];
707 
708 		if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
709 			unsigned long size;
710 
711 			size = exynos_drm_gem_get_size(drm_dev, handle, file);
712 			if (!size) {
713 				ret = -EFAULT;
714 				goto err;
715 			}
716 
717 			if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
718 									size)) {
719 				ret = -EFAULT;
720 				goto err;
721 			}
722 
723 			addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
724 								file);
725 			if (IS_ERR(addr)) {
726 				ret = -EFAULT;
727 				goto err;
728 			}
729 		} else {
730 			struct drm_exynos_g2d_userptr g2d_userptr;
731 
732 			if (copy_from_user(&g2d_userptr, (void __user *)handle,
733 				sizeof(struct drm_exynos_g2d_userptr))) {
734 				ret = -EFAULT;
735 				goto err;
736 			}
737 
738 			if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
739 							g2d_userptr.size)) {
740 				ret = -EFAULT;
741 				goto err;
742 			}
743 
744 			addr = g2d_userptr_get_dma_addr(drm_dev,
745 							g2d_userptr.userptr,
746 							g2d_userptr.size,
747 							file,
748 							&handle);
749 			if (IS_ERR(addr)) {
750 				ret = -EFAULT;
751 				goto err;
752 			}
753 		}
754 
755 		cmdlist->data[reg_pos + 1] = *addr;
756 		buf_info->reg_types[i] = reg_type;
757 		buf_info->handles[reg_type] = handle;
758 	}
759 
760 	return 0;
761 
762 err:
763 	buf_info->map_nr = i;
764 	return ret;
765 }
766 
767 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
768 				  struct g2d_cmdlist_node *node,
769 				  struct drm_file *filp)
770 {
771 	struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
772 	struct g2d_buf_info *buf_info = &node->buf_info;
773 	int i;
774 
775 	for (i = 0; i < buf_info->map_nr; i++) {
776 		struct g2d_buf_desc *buf_desc;
777 		enum g2d_reg_type reg_type;
778 		unsigned long handle;
779 
780 		reg_type = buf_info->reg_types[i];
781 
782 		buf_desc = &buf_info->descs[reg_type];
783 		handle = buf_info->handles[reg_type];
784 
785 		if (buf_info->types[reg_type] == BUF_TYPE_GEM)
786 			exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
787 							filp);
788 		else
789 			g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
790 							false);
791 
792 		buf_info->reg_types[i] = REG_TYPE_NONE;
793 		buf_info->handles[reg_type] = 0;
794 		buf_info->types[reg_type] = 0;
795 		memset(buf_desc, 0x00, sizeof(*buf_desc));
796 	}
797 
798 	buf_info->map_nr = 0;
799 }
800 
801 static void g2d_dma_start(struct g2d_data *g2d,
802 			  struct g2d_runqueue_node *runqueue_node)
803 {
804 	struct g2d_cmdlist_node *node =
805 				list_first_entry(&runqueue_node->run_cmdlist,
806 						struct g2d_cmdlist_node, list);
807 	int ret;
808 
809 	ret = pm_runtime_get_sync(g2d->dev);
810 	if (ret < 0)
811 		return;
812 
813 	writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
814 	writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
815 }
816 
817 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
818 {
819 	struct g2d_runqueue_node *runqueue_node;
820 
821 	if (list_empty(&g2d->runqueue))
822 		return NULL;
823 
824 	runqueue_node = list_first_entry(&g2d->runqueue,
825 					 struct g2d_runqueue_node, list);
826 	list_del_init(&runqueue_node->list);
827 	return runqueue_node;
828 }
829 
830 static void g2d_free_runqueue_node(struct g2d_data *g2d,
831 				   struct g2d_runqueue_node *runqueue_node)
832 {
833 	struct g2d_cmdlist_node *node;
834 
835 	if (!runqueue_node)
836 		return;
837 
838 	mutex_lock(&g2d->cmdlist_mutex);
839 	/*
840 	 * commands in run_cmdlist have been completed so unmap all gem
841 	 * objects in each command node so that they are unreferenced.
842 	 */
843 	list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
844 		g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
845 	list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
846 	mutex_unlock(&g2d->cmdlist_mutex);
847 
848 	kmem_cache_free(g2d->runqueue_slab, runqueue_node);
849 }
850 
851 static void g2d_exec_runqueue(struct g2d_data *g2d)
852 {
853 	g2d->runqueue_node = g2d_get_runqueue_node(g2d);
854 	if (g2d->runqueue_node)
855 		g2d_dma_start(g2d, g2d->runqueue_node);
856 }
857 
858 static void g2d_runqueue_worker(struct work_struct *work)
859 {
860 	struct g2d_data *g2d = container_of(work, struct g2d_data,
861 					    runqueue_work);
862 
863 	mutex_lock(&g2d->runqueue_mutex);
864 	pm_runtime_put_sync(g2d->dev);
865 
866 	complete(&g2d->runqueue_node->complete);
867 	if (g2d->runqueue_node->async)
868 		g2d_free_runqueue_node(g2d, g2d->runqueue_node);
869 
870 	if (g2d->suspended)
871 		g2d->runqueue_node = NULL;
872 	else
873 		g2d_exec_runqueue(g2d);
874 	mutex_unlock(&g2d->runqueue_mutex);
875 }
876 
877 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
878 {
879 	struct drm_device *drm_dev = g2d->subdrv.drm_dev;
880 	struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
881 	struct drm_exynos_pending_g2d_event *e;
882 	struct timeval now;
883 
884 	if (list_empty(&runqueue_node->event_list))
885 		return;
886 
887 	e = list_first_entry(&runqueue_node->event_list,
888 			     struct drm_exynos_pending_g2d_event, base.link);
889 
890 	do_gettimeofday(&now);
891 	e->event.tv_sec = now.tv_sec;
892 	e->event.tv_usec = now.tv_usec;
893 	e->event.cmdlist_no = cmdlist_no;
894 
895 	drm_send_event(drm_dev, &e->base);
896 }
897 
898 static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
899 {
900 	struct g2d_data *g2d = dev_id;
901 	u32 pending;
902 
903 	pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
904 	if (pending)
905 		writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
906 
907 	if (pending & G2D_INTP_GCMD_FIN) {
908 		u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
909 
910 		cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
911 						G2D_DMA_LIST_DONE_COUNT_OFFSET;
912 
913 		g2d_finish_event(g2d, cmdlist_no);
914 
915 		writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
916 		if (!(pending & G2D_INTP_ACMD_FIN)) {
917 			writel_relaxed(G2D_DMA_CONTINUE,
918 					g2d->regs + G2D_DMA_COMMAND);
919 		}
920 	}
921 
922 	if (pending & G2D_INTP_ACMD_FIN)
923 		queue_work(g2d->g2d_workq, &g2d->runqueue_work);
924 
925 	return IRQ_HANDLED;
926 }
927 
928 static int g2d_check_reg_offset(struct device *dev,
929 				struct g2d_cmdlist_node *node,
930 				int nr, bool for_addr)
931 {
932 	struct g2d_cmdlist *cmdlist = node->cmdlist;
933 	int reg_offset;
934 	int index;
935 	int i;
936 
937 	for (i = 0; i < nr; i++) {
938 		struct g2d_buf_info *buf_info = &node->buf_info;
939 		struct g2d_buf_desc *buf_desc;
940 		enum g2d_reg_type reg_type;
941 		unsigned long value;
942 
943 		index = cmdlist->last - 2 * (i + 1);
944 
945 		reg_offset = cmdlist->data[index] & ~0xfffff000;
946 		if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
947 			goto err;
948 		if (reg_offset % 4)
949 			goto err;
950 
951 		switch (reg_offset) {
952 		case G2D_SRC_BASE_ADDR:
953 		case G2D_SRC_PLANE2_BASE_ADDR:
954 		case G2D_DST_BASE_ADDR:
955 		case G2D_DST_PLANE2_BASE_ADDR:
956 		case G2D_PAT_BASE_ADDR:
957 		case G2D_MSK_BASE_ADDR:
958 			if (!for_addr)
959 				goto err;
960 
961 			reg_type = g2d_get_reg_type(reg_offset);
962 
963 			/* check userptr buffer type. */
964 			if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
965 				buf_info->types[reg_type] = BUF_TYPE_USERPTR;
966 				cmdlist->data[index] &= ~G2D_BUF_USERPTR;
967 			} else
968 				buf_info->types[reg_type] = BUF_TYPE_GEM;
969 			break;
970 		case G2D_SRC_STRIDE_REG:
971 		case G2D_DST_STRIDE_REG:
972 			if (for_addr)
973 				goto err;
974 
975 			reg_type = g2d_get_reg_type(reg_offset);
976 
977 			buf_desc = &buf_info->descs[reg_type];
978 			buf_desc->stride = cmdlist->data[index + 1];
979 			break;
980 		case G2D_SRC_COLOR_MODE:
981 		case G2D_DST_COLOR_MODE:
982 			if (for_addr)
983 				goto err;
984 
985 			reg_type = g2d_get_reg_type(reg_offset);
986 
987 			buf_desc = &buf_info->descs[reg_type];
988 			value = cmdlist->data[index + 1];
989 
990 			buf_desc->format = value & 0xf;
991 			break;
992 		case G2D_SRC_LEFT_TOP:
993 		case G2D_DST_LEFT_TOP:
994 			if (for_addr)
995 				goto err;
996 
997 			reg_type = g2d_get_reg_type(reg_offset);
998 
999 			buf_desc = &buf_info->descs[reg_type];
1000 			value = cmdlist->data[index + 1];
1001 
1002 			buf_desc->left_x = value & 0x1fff;
1003 			buf_desc->top_y = (value & 0x1fff0000) >> 16;
1004 			break;
1005 		case G2D_SRC_RIGHT_BOTTOM:
1006 		case G2D_DST_RIGHT_BOTTOM:
1007 			if (for_addr)
1008 				goto err;
1009 
1010 			reg_type = g2d_get_reg_type(reg_offset);
1011 
1012 			buf_desc = &buf_info->descs[reg_type];
1013 			value = cmdlist->data[index + 1];
1014 
1015 			buf_desc->right_x = value & 0x1fff;
1016 			buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1017 			break;
1018 		default:
1019 			if (for_addr)
1020 				goto err;
1021 			break;
1022 		}
1023 	}
1024 
1025 	return 0;
1026 
1027 err:
1028 	dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1029 	return -EINVAL;
1030 }
1031 
1032 /* ioctl functions */
1033 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1034 			     struct drm_file *file)
1035 {
1036 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1037 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1038 	struct device *dev;
1039 	struct g2d_data *g2d;
1040 	struct drm_exynos_g2d_get_ver *ver = data;
1041 
1042 	if (!g2d_priv)
1043 		return -ENODEV;
1044 
1045 	dev = g2d_priv->dev;
1046 	if (!dev)
1047 		return -ENODEV;
1048 
1049 	g2d = dev_get_drvdata(dev);
1050 	if (!g2d)
1051 		return -EFAULT;
1052 
1053 	ver->major = G2D_HW_MAJOR_VER;
1054 	ver->minor = G2D_HW_MINOR_VER;
1055 
1056 	return 0;
1057 }
1058 
1059 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1060 				 struct drm_file *file)
1061 {
1062 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1063 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1064 	struct device *dev;
1065 	struct g2d_data *g2d;
1066 	struct drm_exynos_g2d_set_cmdlist *req = data;
1067 	struct drm_exynos_g2d_cmd *cmd;
1068 	struct drm_exynos_pending_g2d_event *e;
1069 	struct g2d_cmdlist_node *node;
1070 	struct g2d_cmdlist *cmdlist;
1071 	int size;
1072 	int ret;
1073 
1074 	if (!g2d_priv)
1075 		return -ENODEV;
1076 
1077 	dev = g2d_priv->dev;
1078 	if (!dev)
1079 		return -ENODEV;
1080 
1081 	g2d = dev_get_drvdata(dev);
1082 	if (!g2d)
1083 		return -EFAULT;
1084 
1085 	node = g2d_get_cmdlist(g2d);
1086 	if (!node)
1087 		return -ENOMEM;
1088 
1089 	node->event = NULL;
1090 
1091 	if (req->event_type != G2D_EVENT_NOT) {
1092 		e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1093 		if (!e) {
1094 			ret = -ENOMEM;
1095 			goto err;
1096 		}
1097 
1098 		e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1099 		e->event.base.length = sizeof(e->event);
1100 		e->event.user_data = req->user_data;
1101 
1102 		ret = drm_event_reserve_init(drm_dev, file, &e->base, &e->event.base);
1103 		if (ret) {
1104 			kfree(e);
1105 			goto err;
1106 		}
1107 
1108 		node->event = e;
1109 	}
1110 
1111 	cmdlist = node->cmdlist;
1112 
1113 	cmdlist->last = 0;
1114 
1115 	/*
1116 	 * If don't clear SFR registers, the cmdlist is affected by register
1117 	 * values of previous cmdlist. G2D hw executes SFR clear command and
1118 	 * a next command at the same time then the next command is ignored and
1119 	 * is executed rightly from next next command, so needs a dummy command
1120 	 * to next command of SFR clear command.
1121 	 */
1122 	cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1123 	cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1124 	cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1125 	cmdlist->data[cmdlist->last++] = 0;
1126 
1127 	/*
1128 	 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1129 	 * and GCF bit should be set to INTEN register if user wants
1130 	 * G2D interrupt event once current command list execution is
1131 	 * finished.
1132 	 * Otherwise only ACF bit should be set to INTEN register so
1133 	 * that one interrupt is occurred after all command lists
1134 	 * have been completed.
1135 	 */
1136 	if (node->event) {
1137 		cmdlist->data[cmdlist->last++] = G2D_INTEN;
1138 		cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1139 		cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1140 		cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1141 	} else {
1142 		cmdlist->data[cmdlist->last++] = G2D_INTEN;
1143 		cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1144 	}
1145 
1146 	/* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1147 	size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1148 	if (size > G2D_CMDLIST_DATA_NUM) {
1149 		dev_err(dev, "cmdlist size is too big\n");
1150 		ret = -EINVAL;
1151 		goto err_free_event;
1152 	}
1153 
1154 	cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
1155 
1156 	if (copy_from_user(cmdlist->data + cmdlist->last,
1157 				(void __user *)cmd,
1158 				sizeof(*cmd) * req->cmd_nr)) {
1159 		ret = -EFAULT;
1160 		goto err_free_event;
1161 	}
1162 	cmdlist->last += req->cmd_nr * 2;
1163 
1164 	ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1165 	if (ret < 0)
1166 		goto err_free_event;
1167 
1168 	node->buf_info.map_nr = req->cmd_buf_nr;
1169 	if (req->cmd_buf_nr) {
1170 		struct drm_exynos_g2d_cmd *cmd_buf;
1171 
1172 		cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
1173 
1174 		if (copy_from_user(cmdlist->data + cmdlist->last,
1175 					(void __user *)cmd_buf,
1176 					sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1177 			ret = -EFAULT;
1178 			goto err_free_event;
1179 		}
1180 		cmdlist->last += req->cmd_buf_nr * 2;
1181 
1182 		ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1183 		if (ret < 0)
1184 			goto err_free_event;
1185 
1186 		ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1187 		if (ret < 0)
1188 			goto err_unmap;
1189 	}
1190 
1191 	cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1192 	cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1193 
1194 	/* head */
1195 	cmdlist->head = cmdlist->last / 2;
1196 
1197 	/* tail */
1198 	cmdlist->data[cmdlist->last] = 0;
1199 
1200 	g2d_add_cmdlist_to_inuse(g2d_priv, node);
1201 
1202 	return 0;
1203 
1204 err_unmap:
1205 	g2d_unmap_cmdlist_gem(g2d, node, file);
1206 err_free_event:
1207 	if (node->event)
1208 		drm_event_cancel_free(drm_dev, &node->event->base);
1209 err:
1210 	g2d_put_cmdlist(g2d, node);
1211 	return ret;
1212 }
1213 
1214 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1215 			  struct drm_file *file)
1216 {
1217 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1218 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1219 	struct device *dev;
1220 	struct g2d_data *g2d;
1221 	struct drm_exynos_g2d_exec *req = data;
1222 	struct g2d_runqueue_node *runqueue_node;
1223 	struct list_head *run_cmdlist;
1224 	struct list_head *event_list;
1225 
1226 	if (!g2d_priv)
1227 		return -ENODEV;
1228 
1229 	dev = g2d_priv->dev;
1230 	if (!dev)
1231 		return -ENODEV;
1232 
1233 	g2d = dev_get_drvdata(dev);
1234 	if (!g2d)
1235 		return -EFAULT;
1236 
1237 	runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1238 	if (!runqueue_node) {
1239 		dev_err(dev, "failed to allocate memory\n");
1240 		return -ENOMEM;
1241 	}
1242 	run_cmdlist = &runqueue_node->run_cmdlist;
1243 	event_list = &runqueue_node->event_list;
1244 	INIT_LIST_HEAD(run_cmdlist);
1245 	INIT_LIST_HEAD(event_list);
1246 	init_completion(&runqueue_node->complete);
1247 	runqueue_node->async = req->async;
1248 
1249 	list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1250 	list_splice_init(&g2d_priv->event_list, event_list);
1251 
1252 	if (list_empty(run_cmdlist)) {
1253 		dev_err(dev, "there is no inuse cmdlist\n");
1254 		kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1255 		return -EPERM;
1256 	}
1257 
1258 	mutex_lock(&g2d->runqueue_mutex);
1259 	runqueue_node->pid = current->pid;
1260 	runqueue_node->filp = file;
1261 	list_add_tail(&runqueue_node->list, &g2d->runqueue);
1262 	if (!g2d->runqueue_node)
1263 		g2d_exec_runqueue(g2d);
1264 	mutex_unlock(&g2d->runqueue_mutex);
1265 
1266 	if (runqueue_node->async)
1267 		goto out;
1268 
1269 	wait_for_completion(&runqueue_node->complete);
1270 	g2d_free_runqueue_node(g2d, runqueue_node);
1271 
1272 out:
1273 	return 0;
1274 }
1275 
1276 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1277 {
1278 	struct g2d_data *g2d;
1279 	int ret;
1280 
1281 	g2d = dev_get_drvdata(dev);
1282 	if (!g2d)
1283 		return -EFAULT;
1284 
1285 	/* allocate dma-aware cmdlist buffer. */
1286 	ret = g2d_init_cmdlist(g2d);
1287 	if (ret < 0) {
1288 		dev_err(dev, "cmdlist init failed\n");
1289 		return ret;
1290 	}
1291 
1292 	ret = drm_iommu_attach_device(drm_dev, dev);
1293 	if (ret < 0) {
1294 		dev_err(dev, "failed to enable iommu.\n");
1295 		g2d_fini_cmdlist(g2d);
1296 	}
1297 
1298 	return ret;
1299 
1300 }
1301 
1302 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1303 {
1304 	drm_iommu_detach_device(drm_dev, dev);
1305 }
1306 
1307 static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1308 			struct drm_file *file)
1309 {
1310 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1311 	struct exynos_drm_g2d_private *g2d_priv;
1312 
1313 	g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1314 	if (!g2d_priv)
1315 		return -ENOMEM;
1316 
1317 	g2d_priv->dev = dev;
1318 	file_priv->g2d_priv = g2d_priv;
1319 
1320 	INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1321 	INIT_LIST_HEAD(&g2d_priv->event_list);
1322 	INIT_LIST_HEAD(&g2d_priv->userptr_list);
1323 
1324 	return 0;
1325 }
1326 
1327 static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1328 			struct drm_file *file)
1329 {
1330 	struct drm_exynos_file_private *file_priv = file->driver_priv;
1331 	struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1332 	struct g2d_data *g2d;
1333 	struct g2d_cmdlist_node *node, *n;
1334 
1335 	if (!dev)
1336 		return;
1337 
1338 	g2d = dev_get_drvdata(dev);
1339 	if (!g2d)
1340 		return;
1341 
1342 	mutex_lock(&g2d->cmdlist_mutex);
1343 	list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1344 		/*
1345 		 * unmap all gem objects not completed.
1346 		 *
1347 		 * P.S. if current process was terminated forcely then
1348 		 * there may be some commands in inuse_cmdlist so unmap
1349 		 * them.
1350 		 */
1351 		g2d_unmap_cmdlist_gem(g2d, node, file);
1352 		list_move_tail(&node->list, &g2d->free_cmdlist);
1353 	}
1354 	mutex_unlock(&g2d->cmdlist_mutex);
1355 
1356 	/* release all g2d_userptr in pool. */
1357 	g2d_userptr_free_all(drm_dev, g2d, file);
1358 
1359 	kfree(file_priv->g2d_priv);
1360 }
1361 
1362 static int g2d_probe(struct platform_device *pdev)
1363 {
1364 	struct device *dev = &pdev->dev;
1365 	struct resource *res;
1366 	struct g2d_data *g2d;
1367 	struct exynos_drm_subdrv *subdrv;
1368 	int ret;
1369 
1370 	g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1371 	if (!g2d)
1372 		return -ENOMEM;
1373 
1374 	g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1375 			sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1376 	if (!g2d->runqueue_slab)
1377 		return -ENOMEM;
1378 
1379 	g2d->dev = dev;
1380 
1381 	g2d->g2d_workq = create_singlethread_workqueue("g2d");
1382 	if (!g2d->g2d_workq) {
1383 		dev_err(dev, "failed to create workqueue\n");
1384 		ret = -EINVAL;
1385 		goto err_destroy_slab;
1386 	}
1387 
1388 	INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1389 	INIT_LIST_HEAD(&g2d->free_cmdlist);
1390 	INIT_LIST_HEAD(&g2d->runqueue);
1391 
1392 	mutex_init(&g2d->cmdlist_mutex);
1393 	mutex_init(&g2d->runqueue_mutex);
1394 
1395 	g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1396 	if (IS_ERR(g2d->gate_clk)) {
1397 		dev_err(dev, "failed to get gate clock\n");
1398 		ret = PTR_ERR(g2d->gate_clk);
1399 		goto err_destroy_workqueue;
1400 	}
1401 
1402 	pm_runtime_enable(dev);
1403 
1404 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1405 
1406 	g2d->regs = devm_ioremap_resource(dev, res);
1407 	if (IS_ERR(g2d->regs)) {
1408 		ret = PTR_ERR(g2d->regs);
1409 		goto err_put_clk;
1410 	}
1411 
1412 	g2d->irq = platform_get_irq(pdev, 0);
1413 	if (g2d->irq < 0) {
1414 		dev_err(dev, "failed to get irq\n");
1415 		ret = g2d->irq;
1416 		goto err_put_clk;
1417 	}
1418 
1419 	ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1420 								"drm_g2d", g2d);
1421 	if (ret < 0) {
1422 		dev_err(dev, "irq request failed\n");
1423 		goto err_put_clk;
1424 	}
1425 
1426 	g2d->max_pool = MAX_POOL;
1427 
1428 	platform_set_drvdata(pdev, g2d);
1429 
1430 	subdrv = &g2d->subdrv;
1431 	subdrv->dev = dev;
1432 	subdrv->probe = g2d_subdrv_probe;
1433 	subdrv->remove = g2d_subdrv_remove;
1434 	subdrv->open = g2d_open;
1435 	subdrv->close = g2d_close;
1436 
1437 	ret = exynos_drm_subdrv_register(subdrv);
1438 	if (ret < 0) {
1439 		dev_err(dev, "failed to register drm g2d device\n");
1440 		goto err_put_clk;
1441 	}
1442 
1443 	dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1444 			G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1445 
1446 	return 0;
1447 
1448 err_put_clk:
1449 	pm_runtime_disable(dev);
1450 err_destroy_workqueue:
1451 	destroy_workqueue(g2d->g2d_workq);
1452 err_destroy_slab:
1453 	kmem_cache_destroy(g2d->runqueue_slab);
1454 	return ret;
1455 }
1456 
1457 static int g2d_remove(struct platform_device *pdev)
1458 {
1459 	struct g2d_data *g2d = platform_get_drvdata(pdev);
1460 
1461 	cancel_work_sync(&g2d->runqueue_work);
1462 	exynos_drm_subdrv_unregister(&g2d->subdrv);
1463 
1464 	while (g2d->runqueue_node) {
1465 		g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1466 		g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1467 	}
1468 
1469 	pm_runtime_disable(&pdev->dev);
1470 
1471 	g2d_fini_cmdlist(g2d);
1472 	destroy_workqueue(g2d->g2d_workq);
1473 	kmem_cache_destroy(g2d->runqueue_slab);
1474 
1475 	return 0;
1476 }
1477 
1478 #ifdef CONFIG_PM_SLEEP
1479 static int g2d_suspend(struct device *dev)
1480 {
1481 	struct g2d_data *g2d = dev_get_drvdata(dev);
1482 
1483 	mutex_lock(&g2d->runqueue_mutex);
1484 	g2d->suspended = true;
1485 	mutex_unlock(&g2d->runqueue_mutex);
1486 
1487 	while (g2d->runqueue_node)
1488 		/* FIXME: good range? */
1489 		usleep_range(500, 1000);
1490 
1491 	flush_work(&g2d->runqueue_work);
1492 
1493 	return 0;
1494 }
1495 
1496 static int g2d_resume(struct device *dev)
1497 {
1498 	struct g2d_data *g2d = dev_get_drvdata(dev);
1499 
1500 	g2d->suspended = false;
1501 	g2d_exec_runqueue(g2d);
1502 
1503 	return 0;
1504 }
1505 #endif
1506 
1507 #ifdef CONFIG_PM
1508 static int g2d_runtime_suspend(struct device *dev)
1509 {
1510 	struct g2d_data *g2d = dev_get_drvdata(dev);
1511 
1512 	clk_disable_unprepare(g2d->gate_clk);
1513 
1514 	return 0;
1515 }
1516 
1517 static int g2d_runtime_resume(struct device *dev)
1518 {
1519 	struct g2d_data *g2d = dev_get_drvdata(dev);
1520 	int ret;
1521 
1522 	ret = clk_prepare_enable(g2d->gate_clk);
1523 	if (ret < 0)
1524 		dev_warn(dev, "failed to enable clock.\n");
1525 
1526 	return ret;
1527 }
1528 #endif
1529 
1530 static const struct dev_pm_ops g2d_pm_ops = {
1531 	SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1532 	SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1533 };
1534 
1535 static const struct of_device_id exynos_g2d_match[] = {
1536 	{ .compatible = "samsung,exynos5250-g2d" },
1537 	{ .compatible = "samsung,exynos4212-g2d" },
1538 	{},
1539 };
1540 MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1541 
1542 struct platform_driver g2d_driver = {
1543 	.probe		= g2d_probe,
1544 	.remove		= g2d_remove,
1545 	.driver		= {
1546 		.name	= "s5p-g2d",
1547 		.owner	= THIS_MODULE,
1548 		.pm	= &g2d_pm_ops,
1549 		.of_match_table = exynos_g2d_match,
1550 	},
1551 };
1552