1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef STATE_3D_XML 3 #define STATE_3D_XML 4 5 /* This is a cut-down version of the state_3d.xml.h file */ 6 7 #define VIVS_CL_CONFIG 0x00000900 8 #define VIVS_CL_CONFIG_DIMENSIONS__MASK 0x00000003 9 #define VIVS_CL_CONFIG_DIMENSIONS__SHIFT 0 10 #define VIVS_CL_CONFIG_DIMENSIONS(x) (((x) << VIVS_CL_CONFIG_DIMENSIONS__SHIFT) & VIVS_CL_CONFIG_DIMENSIONS__MASK) 11 #define VIVS_CL_CONFIG_TRAVERSE_ORDER__MASK 0x00000070 12 #define VIVS_CL_CONFIG_TRAVERSE_ORDER__SHIFT 4 13 #define VIVS_CL_CONFIG_TRAVERSE_ORDER(x) (((x) << VIVS_CL_CONFIG_TRAVERSE_ORDER__SHIFT) & VIVS_CL_CONFIG_TRAVERSE_ORDER__MASK) 14 #define VIVS_CL_CONFIG_ENABLE_SWATH_X 0x00000100 15 #define VIVS_CL_CONFIG_ENABLE_SWATH_Y 0x00000200 16 #define VIVS_CL_CONFIG_ENABLE_SWATH_Z 0x00000400 17 #define VIVS_CL_CONFIG_SWATH_SIZE_X__MASK 0x0000f000 18 #define VIVS_CL_CONFIG_SWATH_SIZE_X__SHIFT 12 19 #define VIVS_CL_CONFIG_SWATH_SIZE_X(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_X__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_X__MASK) 20 #define VIVS_CL_CONFIG_SWATH_SIZE_Y__MASK 0x000f0000 21 #define VIVS_CL_CONFIG_SWATH_SIZE_Y__SHIFT 16 22 #define VIVS_CL_CONFIG_SWATH_SIZE_Y(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_Y__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_Y__MASK) 23 #define VIVS_CL_CONFIG_SWATH_SIZE_Z__MASK 0x00f00000 24 #define VIVS_CL_CONFIG_SWATH_SIZE_Z__SHIFT 20 25 #define VIVS_CL_CONFIG_SWATH_SIZE_Z(x) (((x) << VIVS_CL_CONFIG_SWATH_SIZE_Z__SHIFT) & VIVS_CL_CONFIG_SWATH_SIZE_Z__MASK) 26 27 #define VIVS_CL_CONFIG_DIMENSIONS__MASK 0x00000003 28 #define VIVS_CL_CONFIG_DIMENSIONS__SHIFT 0 29 #define VIVS_CL_CONFIG_DIMENSIONS(x) (((x) << VIVS_CL_CONFIG_DIMENSIONS__SHIFT) & VIVS_CL_CONFIG_DIMENSIONS__MASK) 30 31 #define VIVS_CL_CONFIG_VALUE_ORDER__MASK 0x07000000 32 #define VIVS_CL_CONFIG_VALUE_ORDER__SHIFT 24 33 #define VIVS_CL_CONFIG_VALUE_ORDER(x) (((x) << VIVS_CL_CONFIG_VALUE_ORDER__SHIFT) & VIVS_CL_CONFIG_VALUE_ORDER__MASK) 34 35 #define VIVS_CL_GLOBAL_WORK_OFFSET_X 0x0000092c 36 #define VIVS_CL_GLOBAL_WORK_OFFSET_Y 0x00000934 37 #define VIVS_CL_GLOBAL_WORK_OFFSET_Z 0x0000093c 38 39 #define VIVS_CL_KICKER 0x00000920 40 #define VIVS_CL_THREAD_ALLOCATION 0x0000091c 41 #define VIVS_CL_UNK00924 0x00000924 42 43 #define VIVS_CL_WORKGROUP_COUNT_X 0x00000940 44 #define VIVS_CL_WORKGROUP_COUNT_Y 0x00000944 45 #define VIVS_CL_WORKGROUP_COUNT_Z 0x00000948 46 #define VIVS_CL_WORKGROUP_SIZE_X 0x0000094c 47 #define VIVS_CL_WORKGROUP_SIZE_Y 0x00000950 48 #define VIVS_CL_WORKGROUP_SIZE_Z 0x00000954 49 50 #define VIVS_CL_GLOBAL_SCALE_X 0x00000958 51 #define VIVS_CL_GLOBAL_SCALE_Y 0x0000095c 52 #define VIVS_CL_GLOBAL_SCALE_Z 0x00000960 53 54 #define VIVS_PA_VS_OUTPUT_COUNT 0x00000aa8 55 #define VIVS_PS_CONTROL_EXT 0x00001030 56 #define VIVS_PS_ICACHE_COUNT 0x00001094 57 #define VIVS_PS_ICACHE_PREFETCH 0x00001048 58 59 #define VIVS_PS_INPUT_COUNT 0x00001008 60 #define VIVS_PS_INPUT_COUNT_COUNT__MASK 0x0000001f 61 #define VIVS_PS_INPUT_COUNT_COUNT__SHIFT 0 62 #define VIVS_PS_INPUT_COUNT_COUNT(x) (((x) << VIVS_PS_INPUT_COUNT_COUNT__SHIFT) & VIVS_PS_INPUT_COUNT_COUNT__MASK) 63 64 #define VIVS_PS_NEWRANGE_LOW 0x0000087c 65 #define VIVS_PS_NEWRANGE_HIGH 0x00001090 66 #define VIVS_PS_SAMPLER_BASE 0x00001058 67 68 #define VIVS_PS_UNIFORM_BASE 0x00001024 69 #define VIVS_PS_INST_ADDR 0x00001028 70 71 #define VIVS_PS_TEMP_REGISTER_CONTROL 0x0000100c 72 #define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK 0x0000003f 73 #define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT 0 74 #define VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS(x) (((x) << VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__SHIFT) & VIVS_PS_TEMP_REGISTER_CONTROL_NUM_TEMPS__MASK) 75 76 #define VIVS_PS_VARYING_NUM_COMPONENTS(i0) (0x00001080 + 0x4*(i0)) 77 #define VIVS_PS_VARYING_NUM_COMPONENTS__ESIZE 0x00000004 78 #define VIVS_PS_VARYING_NUM_COMPONENTS__LEN 0x00000004 79 80 #define VIVS_SH_CONFIG 0x00015600 81 #define VIVS_SH_CONFIG_RTNE_ROUNDING 0x00000002 82 83 #define VIVS_SH_HALTI5_UNIFORMS(i0) (0x00036000 + 0x4*(i0)) 84 #define VIVS_SH_HALTI5_UNIFORMS__ESIZE 0x00000004 85 #define VIVS_SH_HALTI5_UNIFORMS__LEN 0x00000800 86 87 #define VIVS_VS_HALTI5_UNK008A0 0x000008a0 88 #define VIVS_VS_HALTI5_UNK008A0_A__MASK 0x0000003f 89 #define VIVS_VS_HALTI5_UNK008A0_A__SHIFT 0 90 #define VIVS_VS_HALTI5_UNK008A0_A(x) (((x) << VIVS_VS_HALTI5_UNK008A0_A__SHIFT) & VIVS_VS_HALTI5_UNK008A0_A__MASK) 91 92 #define VIVS_VS_ICACHE_CONTROL 0x00000868 93 #define VIVS_VS_ICACHE_CONTROL_ENABLE 0x00000001 94 95 #define VIVS_VS_ICACHE_INVALIDATE 0x000008b0 96 97 #define VIVS_VS_OUTPUT_COUNT 0x00000804 98 #define VIVS_VS_OUTPUT_COUNT_COUNT__MASK 0x000000ff 99 #define VIVS_VS_OUTPUT_COUNT_COUNT__SHIFT 0 100 #define VIVS_VS_OUTPUT_COUNT_COUNT(x) (((x) << VIVS_VS_OUTPUT_COUNT_COUNT__SHIFT) & VIVS_VS_OUTPUT_COUNT_COUNT__MASK) 101 102 #define VIVS_TS_FLUSH_CACHE 0x00001650 103 #define VIVS_TS_FLUSH_CACHE_FLUSH 0x00000001 104 105 #define VIVS_NTE_DESCRIPTOR_FLUSH 0x00014c44 106 #define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK 0xf0000000 107 #define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT 28 108 #define VIVS_NTE_DESCRIPTOR_FLUSH_UNK28(x) (((x) << VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__SHIFT) & VIVS_NTE_DESCRIPTOR_FLUSH_UNK28__MASK) 109 110 #endif /* STATE_3D_XML */ 111