xref: /linux/drivers/gpu/drm/etnaviv/common.xml.h (revision 984065055e6e39f8dd812529e11922374bd39352)
1 #ifndef COMMON_XML
2 #define COMMON_XML
3 
4 /* Autogenerated file, DO NOT EDIT manually!
5 
6 This file was generated by the rules-ng-ng headergen tool in this git repository:
7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
9 
10 The rules-ng-ng source files this header was generated from are:
11 - state_vg.xml (   5973 bytes, from 2015-03-25 11:26:01)
12 - common.xml   (  18437 bytes, from 2015-03-25 11:27:41)
13 
14 Copyright (C) 2015
15 */
16 
17 
18 #define PIPE_ID_PIPE_3D						0x00000000
19 #define PIPE_ID_PIPE_2D						0x00000001
20 #define SYNC_RECIPIENT_FE					0x00000001
21 #define SYNC_RECIPIENT_RA					0x00000005
22 #define SYNC_RECIPIENT_PE					0x00000007
23 #define SYNC_RECIPIENT_DE					0x0000000b
24 #define SYNC_RECIPIENT_VG					0x0000000f
25 #define SYNC_RECIPIENT_TESSELATOR				0x00000010
26 #define SYNC_RECIPIENT_VG2					0x00000011
27 #define SYNC_RECIPIENT_TESSELATOR2				0x00000012
28 #define SYNC_RECIPIENT_VG3					0x00000013
29 #define SYNC_RECIPIENT_TESSELATOR3				0x00000014
30 #define ENDIAN_MODE_NO_SWAP					0x00000000
31 #define ENDIAN_MODE_SWAP_16					0x00000001
32 #define ENDIAN_MODE_SWAP_32					0x00000002
33 #define chipModel_GC300						0x00000300
34 #define chipModel_GC320						0x00000320
35 #define chipModel_GC350						0x00000350
36 #define chipModel_GC355						0x00000355
37 #define chipModel_GC400						0x00000400
38 #define chipModel_GC410						0x00000410
39 #define chipModel_GC420						0x00000420
40 #define chipModel_GC450						0x00000450
41 #define chipModel_GC500						0x00000500
42 #define chipModel_GC530						0x00000530
43 #define chipModel_GC600						0x00000600
44 #define chipModel_GC700						0x00000700
45 #define chipModel_GC800						0x00000800
46 #define chipModel_GC860						0x00000860
47 #define chipModel_GC880						0x00000880
48 #define chipModel_GC1000					0x00001000
49 #define chipModel_GC2000					0x00002000
50 #define chipModel_GC2100					0x00002100
51 #define chipModel_GC4000					0x00004000
52 #define RGBA_BITS_R						0x00000001
53 #define RGBA_BITS_G						0x00000002
54 #define RGBA_BITS_B						0x00000004
55 #define RGBA_BITS_A						0x00000008
56 #define chipFeatures_FAST_CLEAR					0x00000001
57 #define chipFeatures_SPECIAL_ANTI_ALIASING			0x00000002
58 #define chipFeatures_PIPE_3D					0x00000004
59 #define chipFeatures_DXT_TEXTURE_COMPRESSION			0x00000008
60 #define chipFeatures_DEBUG_MODE					0x00000010
61 #define chipFeatures_Z_COMPRESSION				0x00000020
62 #define chipFeatures_YUV420_SCALER				0x00000040
63 #define chipFeatures_MSAA					0x00000080
64 #define chipFeatures_DC						0x00000100
65 #define chipFeatures_PIPE_2D					0x00000200
66 #define chipFeatures_ETC1_TEXTURE_COMPRESSION			0x00000400
67 #define chipFeatures_FAST_SCALER				0x00000800
68 #define chipFeatures_HIGH_DYNAMIC_RANGE				0x00001000
69 #define chipFeatures_YUV420_TILER				0x00002000
70 #define chipFeatures_MODULE_CG					0x00004000
71 #define chipFeatures_MIN_AREA					0x00008000
72 #define chipFeatures_NO_EARLY_Z					0x00010000
73 #define chipFeatures_NO_422_TEXTURE				0x00020000
74 #define chipFeatures_BUFFER_INTERLEAVING			0x00040000
75 #define chipFeatures_BYTE_WRITE_2D				0x00080000
76 #define chipFeatures_NO_SCALER					0x00100000
77 #define chipFeatures_YUY2_AVERAGING				0x00200000
78 #define chipFeatures_HALF_PE_CACHE				0x00400000
79 #define chipFeatures_HALF_TX_CACHE				0x00800000
80 #define chipFeatures_YUY2_RENDER_TARGET				0x01000000
81 #define chipFeatures_MEM32					0x02000000
82 #define chipFeatures_PIPE_VG					0x04000000
83 #define chipFeatures_VGTS					0x08000000
84 #define chipFeatures_FE20					0x10000000
85 #define chipFeatures_BYTE_WRITE_3D				0x20000000
86 #define chipFeatures_RS_YUV_TARGET				0x40000000
87 #define chipFeatures_32_BIT_INDICES				0x80000000
88 #define chipMinorFeatures0_FLIP_Y				0x00000001
89 #define chipMinorFeatures0_DUAL_RETURN_BUS			0x00000002
90 #define chipMinorFeatures0_ENDIANNESS_CONFIG			0x00000004
91 #define chipMinorFeatures0_TEXTURE_8K				0x00000008
92 #define chipMinorFeatures0_CORRECT_TEXTURE_CONVERTER		0x00000010
93 #define chipMinorFeatures0_SPECIAL_MSAA_LOD			0x00000020
94 #define chipMinorFeatures0_FAST_CLEAR_FLUSH			0x00000040
95 #define chipMinorFeatures0_2DPE20				0x00000080
96 #define chipMinorFeatures0_CORRECT_AUTO_DISABLE			0x00000100
97 #define chipMinorFeatures0_RENDERTARGET_8K			0x00000200
98 #define chipMinorFeatures0_2BITPERTILE				0x00000400
99 #define chipMinorFeatures0_SEPARATE_TILE_STATUS_WHEN_INTERLEAVED	0x00000800
100 #define chipMinorFeatures0_SUPER_TILED				0x00001000
101 #define chipMinorFeatures0_VG_20				0x00002000
102 #define chipMinorFeatures0_TS_EXTENDED_COMMANDS			0x00004000
103 #define chipMinorFeatures0_COMPRESSION_FIFO_FIXED		0x00008000
104 #define chipMinorFeatures0_HAS_SIGN_FLOOR_CEIL			0x00010000
105 #define chipMinorFeatures0_VG_FILTER				0x00020000
106 #define chipMinorFeatures0_VG_21				0x00040000
107 #define chipMinorFeatures0_SHADER_HAS_W				0x00080000
108 #define chipMinorFeatures0_HAS_SQRT_TRIG			0x00100000
109 #define chipMinorFeatures0_MORE_MINOR_FEATURES			0x00200000
110 #define chipMinorFeatures0_MC20					0x00400000
111 #define chipMinorFeatures0_MSAA_SIDEBAND			0x00800000
112 #define chipMinorFeatures0_BUG_FIXES0				0x01000000
113 #define chipMinorFeatures0_VAA					0x02000000
114 #define chipMinorFeatures0_BYPASS_IN_MSAA			0x04000000
115 #define chipMinorFeatures0_HZ					0x08000000
116 #define chipMinorFeatures0_NEW_TEXTURE				0x10000000
117 #define chipMinorFeatures0_2D_A8_TARGET				0x20000000
118 #define chipMinorFeatures0_CORRECT_STENCIL			0x40000000
119 #define chipMinorFeatures0_ENHANCE_VR				0x80000000
120 #define chipMinorFeatures1_RSUV_SWIZZLE				0x00000001
121 #define chipMinorFeatures1_V2_COMPRESSION			0x00000002
122 #define chipMinorFeatures1_VG_DOUBLE_BUFFER			0x00000004
123 #define chipMinorFeatures1_EXTRA_EVENT_STATES			0x00000008
124 #define chipMinorFeatures1_NO_STRIPING_NEEDED			0x00000010
125 #define chipMinorFeatures1_TEXTURE_STRIDE			0x00000020
126 #define chipMinorFeatures1_BUG_FIXES3				0x00000040
127 #define chipMinorFeatures1_AUTO_DISABLE				0x00000080
128 #define chipMinorFeatures1_AUTO_RESTART_TS			0x00000100
129 #define chipMinorFeatures1_DISABLE_PE_GATING			0x00000200
130 #define chipMinorFeatures1_L2_WINDOWING				0x00000400
131 #define chipMinorFeatures1_HALF_FLOAT				0x00000800
132 #define chipMinorFeatures1_PIXEL_DITHER				0x00001000
133 #define chipMinorFeatures1_TWO_STENCIL_REFERENCE		0x00002000
134 #define chipMinorFeatures1_EXTENDED_PIXEL_FORMAT		0x00004000
135 #define chipMinorFeatures1_CORRECT_MIN_MAX_DEPTH		0x00008000
136 #define chipMinorFeatures1_2D_DITHER				0x00010000
137 #define chipMinorFeatures1_BUG_FIXES5				0x00020000
138 #define chipMinorFeatures1_NEW_2D				0x00040000
139 #define chipMinorFeatures1_NEW_FP				0x00080000
140 #define chipMinorFeatures1_TEXTURE_HALIGN			0x00100000
141 #define chipMinorFeatures1_NON_POWER_OF_TWO			0x00200000
142 #define chipMinorFeatures1_LINEAR_TEXTURE_SUPPORT		0x00400000
143 #define chipMinorFeatures1_HALTI0				0x00800000
144 #define chipMinorFeatures1_CORRECT_OVERFLOW_VG			0x01000000
145 #define chipMinorFeatures1_NEGATIVE_LOG_FIX			0x02000000
146 #define chipMinorFeatures1_RESOLVE_OFFSET			0x04000000
147 #define chipMinorFeatures1_OK_TO_GATE_AXI_CLOCK			0x08000000
148 #define chipMinorFeatures1_MMU_VERSION				0x10000000
149 #define chipMinorFeatures1_WIDE_LINE				0x20000000
150 #define chipMinorFeatures1_BUG_FIXES6				0x40000000
151 #define chipMinorFeatures1_FC_FLUSH_STALL			0x80000000
152 #define chipMinorFeatures2_LINE_LOOP				0x00000001
153 #define chipMinorFeatures2_LOGIC_OP				0x00000002
154 #define chipMinorFeatures2_UNK2					0x00000004
155 #define chipMinorFeatures2_SUPERTILED_TEXTURE			0x00000008
156 #define chipMinorFeatures2_UNK4					0x00000010
157 #define chipMinorFeatures2_RECT_PRIMITIVE			0x00000020
158 #define chipMinorFeatures2_COMPOSITION				0x00000040
159 #define chipMinorFeatures2_CORRECT_AUTO_DISABLE_COUNT		0x00000080
160 #define chipMinorFeatures2_UNK8					0x00000100
161 #define chipMinorFeatures2_UNK9					0x00000200
162 #define chipMinorFeatures2_UNK10				0x00000400
163 #define chipMinorFeatures2_SAMPLERBASE_16			0x00000800
164 #define chipMinorFeatures2_UNK12				0x00001000
165 #define chipMinorFeatures2_UNK13				0x00002000
166 #define chipMinorFeatures2_UNK14				0x00004000
167 #define chipMinorFeatures2_EXTRA_TEXTURE_STATE			0x00008000
168 #define chipMinorFeatures2_FULL_DIRECTFB			0x00010000
169 #define chipMinorFeatures2_2D_TILING				0x00020000
170 #define chipMinorFeatures2_THREAD_WALKER_IN_PS			0x00040000
171 #define chipMinorFeatures2_TILE_FILLER				0x00080000
172 #define chipMinorFeatures2_UNK20				0x00100000
173 #define chipMinorFeatures2_2D_MULTI_SOURCE_BLIT			0x00200000
174 #define chipMinorFeatures2_UNK22				0x00400000
175 #define chipMinorFeatures2_UNK23				0x00800000
176 #define chipMinorFeatures2_UNK24				0x01000000
177 #define chipMinorFeatures2_MIXED_STREAMS			0x02000000
178 #define chipMinorFeatures2_2D_420_L2CACHE			0x04000000
179 #define chipMinorFeatures2_UNK27				0x08000000
180 #define chipMinorFeatures2_2D_NO_INDEX8_BRUSH			0x10000000
181 #define chipMinorFeatures2_TEXTURE_TILED_READ			0x20000000
182 #define chipMinorFeatures2_UNK30				0x40000000
183 #define chipMinorFeatures2_UNK31				0x80000000
184 #define chipMinorFeatures3_ROTATION_STALL_FIX			0x00000001
185 #define chipMinorFeatures3_UNK1					0x00000002
186 #define chipMinorFeatures3_2D_MULTI_SOURCE_BLT_EX		0x00000004
187 #define chipMinorFeatures3_UNK3					0x00000008
188 #define chipMinorFeatures3_UNK4					0x00000010
189 #define chipMinorFeatures3_UNK5					0x00000020
190 #define chipMinorFeatures3_UNK6					0x00000040
191 #define chipMinorFeatures3_UNK7					0x00000080
192 #define chipMinorFeatures3_UNK8					0x00000100
193 #define chipMinorFeatures3_UNK9					0x00000200
194 #define chipMinorFeatures3_BUG_FIXES10				0x00000400
195 #define chipMinorFeatures3_UNK11				0x00000800
196 #define chipMinorFeatures3_BUG_FIXES11				0x00001000
197 #define chipMinorFeatures3_UNK13				0x00002000
198 #define chipMinorFeatures3_UNK14				0x00004000
199 #define chipMinorFeatures3_UNK15				0x00008000
200 #define chipMinorFeatures3_UNK16				0x00010000
201 #define chipMinorFeatures3_UNK17				0x00020000
202 #define chipMinorFeatures3_UNK18				0x00040000
203 #define chipMinorFeatures3_UNK19				0x00080000
204 #define chipMinorFeatures3_UNK20				0x00100000
205 #define chipMinorFeatures3_UNK21				0x00200000
206 #define chipMinorFeatures3_UNK22				0x00400000
207 #define chipMinorFeatures3_UNK23				0x00800000
208 #define chipMinorFeatures3_UNK24				0x01000000
209 #define chipMinorFeatures3_UNK25				0x02000000
210 #define chipMinorFeatures3_UNK26				0x04000000
211 #define chipMinorFeatures3_UNK27				0x08000000
212 #define chipMinorFeatures3_UNK28				0x10000000
213 #define chipMinorFeatures3_UNK29				0x20000000
214 #define chipMinorFeatures3_UNK30				0x40000000
215 #define chipMinorFeatures3_UNK31				0x80000000
216 #define chipMinorFeatures4_UNK0					0x00000001
217 #define chipMinorFeatures4_UNK1					0x00000002
218 #define chipMinorFeatures4_UNK2					0x00000004
219 #define chipMinorFeatures4_UNK3					0x00000008
220 #define chipMinorFeatures4_UNK4					0x00000010
221 #define chipMinorFeatures4_UNK5					0x00000020
222 #define chipMinorFeatures4_UNK6					0x00000040
223 #define chipMinorFeatures4_UNK7					0x00000080
224 #define chipMinorFeatures4_UNK8					0x00000100
225 #define chipMinorFeatures4_UNK9					0x00000200
226 #define chipMinorFeatures4_UNK10				0x00000400
227 #define chipMinorFeatures4_UNK11				0x00000800
228 #define chipMinorFeatures4_UNK12				0x00001000
229 #define chipMinorFeatures4_UNK13				0x00002000
230 #define chipMinorFeatures4_UNK14				0x00004000
231 #define chipMinorFeatures4_UNK15				0x00008000
232 #define chipMinorFeatures4_UNK16				0x00010000
233 #define chipMinorFeatures4_UNK17				0x00020000
234 #define chipMinorFeatures4_UNK18				0x00040000
235 #define chipMinorFeatures4_UNK19				0x00080000
236 #define chipMinorFeatures4_UNK20				0x00100000
237 #define chipMinorFeatures4_UNK21				0x00200000
238 #define chipMinorFeatures4_UNK22				0x00400000
239 #define chipMinorFeatures4_UNK23				0x00800000
240 #define chipMinorFeatures4_UNK24				0x01000000
241 #define chipMinorFeatures4_UNK25				0x02000000
242 #define chipMinorFeatures4_UNK26				0x04000000
243 #define chipMinorFeatures4_UNK27				0x08000000
244 #define chipMinorFeatures4_UNK28				0x10000000
245 #define chipMinorFeatures4_UNK29				0x20000000
246 #define chipMinorFeatures4_UNK30				0x40000000
247 #define chipMinorFeatures4_UNK31				0x80000000
248 
249 #endif /* COMMON_XML */
250