1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 7 * FB layer. 8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a 11 * copy of this software and associated documentation files (the "Software"), 12 * to deal in the Software without restriction, including without limitation 13 * the rights to use, copy, modify, merge, publish, distribute, sub license, 14 * and/or sell copies of the Software, and to permit persons to whom the 15 * Software is furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the 18 * next paragraph) shall be included in all copies or substantial portions 19 * of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 27 * DEALINGS IN THE SOFTWARE. 28 */ 29 #include <linux/kernel.h> 30 #include <linux/i2c.h> 31 #include <linux/i2c-algo-bit.h> 32 #include "drmP.h" 33 #include "drm_edid.h" 34 35 /* 36 * TODO: 37 * - support EDID 1.4 (incl. CE blocks) 38 */ 39 40 /* 41 * EDID blocks out in the wild have a variety of bugs, try to collect 42 * them here (note that userspace may work around broken monitors first, 43 * but fixes should make their way here so that the kernel "just works" 44 * on as many displays as possible). 45 */ 46 47 /* First detailed mode wrong, use largest 60Hz mode */ 48 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 49 /* Reported 135MHz pixel clock is too high, needs adjustment */ 50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 51 /* Prefer the largest mode at 75 Hz */ 52 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 53 /* Detail timing is in cm not mm */ 54 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 55 /* Detailed timing descriptors have bogus size values, so just take the 56 * maximum size and use that. 57 */ 58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 59 /* Monitor forgot to set the first detailed is preferred bit. */ 60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 61 /* use +hsync +vsync for detailed mode */ 62 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 63 /* define the number of Extension EDID block */ 64 #define MAX_EDID_EXT_NUM 4 65 66 #define LEVEL_DMT 0 67 #define LEVEL_GTF 1 68 #define LEVEL_CVT 2 69 70 static struct edid_quirk { 71 char *vendor; 72 int product_id; 73 u32 quirks; 74 } edid_quirk_list[] = { 75 /* Acer AL1706 */ 76 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 77 /* Acer F51 */ 78 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 79 /* Unknown Acer */ 80 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 81 82 /* Belinea 10 15 55 */ 83 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 84 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 85 86 /* Envision Peripherals, Inc. EN-7100e */ 87 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 88 89 /* Funai Electronics PM36B */ 90 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 91 EDID_QUIRK_DETAILED_IN_CM }, 92 93 /* LG Philips LCD LP154W01-A5 */ 94 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 95 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 96 97 /* Philips 107p5 CRT */ 98 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 99 100 /* Proview AY765C */ 101 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 102 103 /* Samsung SyncMaster 205BW. Note: irony */ 104 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 105 /* Samsung SyncMaster 22[5-6]BW */ 106 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 107 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 108 }; 109 110 111 /* Valid EDID header has these bytes */ 112 static const u8 edid_header[] = { 113 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 114 }; 115 116 /** 117 * edid_is_valid - sanity check EDID data 118 * @edid: EDID data 119 * 120 * Sanity check the EDID block by looking at the header, the version number 121 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's 122 * valid. 123 */ 124 static bool edid_is_valid(struct edid *edid) 125 { 126 int i; 127 u8 csum = 0; 128 u8 *raw_edid = (u8 *)edid; 129 130 if (memcmp(edid->header, edid_header, sizeof(edid_header))) 131 goto bad; 132 if (edid->version != 1) { 133 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 134 goto bad; 135 } 136 if (edid->revision > 4) 137 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 138 139 for (i = 0; i < EDID_LENGTH; i++) 140 csum += raw_edid[i]; 141 if (csum) { 142 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 143 goto bad; 144 } 145 146 return 1; 147 148 bad: 149 if (raw_edid) { 150 DRM_ERROR("Raw EDID:\n"); 151 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); 152 printk("\n"); 153 } 154 return 0; 155 } 156 157 /** 158 * edid_vendor - match a string against EDID's obfuscated vendor field 159 * @edid: EDID to match 160 * @vendor: vendor string 161 * 162 * Returns true if @vendor is in @edid, false otherwise 163 */ 164 static bool edid_vendor(struct edid *edid, char *vendor) 165 { 166 char edid_vendor[3]; 167 168 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 169 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 170 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 171 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 172 173 return !strncmp(edid_vendor, vendor, 3); 174 } 175 176 /** 177 * edid_get_quirks - return quirk flags for a given EDID 178 * @edid: EDID to process 179 * 180 * This tells subsequent routines what fixes they need to apply. 181 */ 182 static u32 edid_get_quirks(struct edid *edid) 183 { 184 struct edid_quirk *quirk; 185 int i; 186 187 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 188 quirk = &edid_quirk_list[i]; 189 190 if (edid_vendor(edid, quirk->vendor) && 191 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 192 return quirk->quirks; 193 } 194 195 return 0; 196 } 197 198 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 199 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 200 201 202 /** 203 * edid_fixup_preferred - set preferred modes based on quirk list 204 * @connector: has mode list to fix up 205 * @quirks: quirks list 206 * 207 * Walk the mode list for @connector, clearing the preferred status 208 * on existing modes and setting it anew for the right mode ala @quirks. 209 */ 210 static void edid_fixup_preferred(struct drm_connector *connector, 211 u32 quirks) 212 { 213 struct drm_display_mode *t, *cur_mode, *preferred_mode; 214 int target_refresh = 0; 215 216 if (list_empty(&connector->probed_modes)) 217 return; 218 219 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 220 target_refresh = 60; 221 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 222 target_refresh = 75; 223 224 preferred_mode = list_first_entry(&connector->probed_modes, 225 struct drm_display_mode, head); 226 227 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 228 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 229 230 if (cur_mode == preferred_mode) 231 continue; 232 233 /* Largest mode is preferred */ 234 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 235 preferred_mode = cur_mode; 236 237 /* At a given size, try to get closest to target refresh */ 238 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 239 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 240 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 241 preferred_mode = cur_mode; 242 } 243 } 244 245 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 246 } 247 248 /* 249 * Add the Autogenerated from the DMT spec. 250 * This table is copied from xfree86/modes/xf86EdidModes.c. 251 * But the mode with Reduced blank feature is deleted. 252 */ 253 static struct drm_display_mode drm_dmt_modes[] = { 254 /* 640x350@85Hz */ 255 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 256 736, 832, 0, 350, 382, 385, 445, 0, 257 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 258 /* 640x400@85Hz */ 259 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 260 736, 832, 0, 400, 401, 404, 445, 0, 261 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 262 /* 720x400@85Hz */ 263 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 264 828, 936, 0, 400, 401, 404, 446, 0, 265 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 266 /* 640x480@60Hz */ 267 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 268 752, 800, 0, 480, 489, 492, 525, 0, 269 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 270 /* 640x480@72Hz */ 271 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 272 704, 832, 0, 480, 489, 492, 520, 0, 273 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 274 /* 640x480@75Hz */ 275 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 276 720, 840, 0, 480, 481, 484, 500, 0, 277 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 278 /* 640x480@85Hz */ 279 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 280 752, 832, 0, 480, 481, 484, 509, 0, 281 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 282 /* 800x600@56Hz */ 283 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 284 896, 1024, 0, 600, 601, 603, 625, 0, 285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 286 /* 800x600@60Hz */ 287 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 288 968, 1056, 0, 600, 601, 605, 628, 0, 289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 290 /* 800x600@72Hz */ 291 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 292 976, 1040, 0, 600, 637, 643, 666, 0, 293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 294 /* 800x600@75Hz */ 295 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 296 896, 1056, 0, 600, 601, 604, 625, 0, 297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 298 /* 800x600@85Hz */ 299 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 300 896, 1048, 0, 600, 601, 604, 631, 0, 301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 302 /* 848x480@60Hz */ 303 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 304 976, 1088, 0, 480, 486, 494, 517, 0, 305 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 306 /* 1024x768@43Hz, interlace */ 307 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 308 1208, 1264, 0, 768, 768, 772, 817, 0, 309 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 310 DRM_MODE_FLAG_INTERLACE) }, 311 /* 1024x768@60Hz */ 312 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 313 1184, 1344, 0, 768, 771, 777, 806, 0, 314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 315 /* 1024x768@70Hz */ 316 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 317 1184, 1328, 0, 768, 771, 777, 806, 0, 318 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 319 /* 1024x768@75Hz */ 320 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 321 1136, 1312, 0, 768, 769, 772, 800, 0, 322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 323 /* 1024x768@85Hz */ 324 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 325 1072, 1376, 0, 768, 769, 772, 808, 0, 326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 327 /* 1152x864@75Hz */ 328 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 329 1344, 1600, 0, 864, 865, 868, 900, 0, 330 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 331 /* 1280x768@60Hz */ 332 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 333 1472, 1664, 0, 768, 771, 778, 798, 0, 334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 335 /* 1280x768@75Hz */ 336 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 337 1488, 1696, 0, 768, 771, 778, 805, 0, 338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 339 /* 1280x768@85Hz */ 340 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 341 1496, 1712, 0, 768, 771, 778, 809, 0, 342 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 343 /* 1280x800@60Hz */ 344 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 345 1480, 1680, 0, 800, 803, 809, 831, 0, 346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 347 /* 1280x800@75Hz */ 348 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 349 1488, 1696, 0, 800, 803, 809, 838, 0, 350 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 351 /* 1280x800@85Hz */ 352 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 353 1496, 1712, 0, 800, 803, 809, 843, 0, 354 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 355 /* 1280x960@60Hz */ 356 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 357 1488, 1800, 0, 960, 961, 964, 1000, 0, 358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 359 /* 1280x960@85Hz */ 360 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 361 1504, 1728, 0, 960, 961, 964, 1011, 0, 362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 363 /* 1280x1024@60Hz */ 364 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 365 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 367 /* 1280x1024@75Hz */ 368 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 369 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 371 /* 1280x1024@85Hz */ 372 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 373 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 375 /* 1360x768@60Hz */ 376 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 377 1536, 1792, 0, 768, 771, 777, 795, 0, 378 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 379 /* 1440x1050@60Hz */ 380 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 381 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 382 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 383 /* 1440x1050@75Hz */ 384 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 385 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 387 /* 1440x1050@85Hz */ 388 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 389 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 391 /* 1440x900@60Hz */ 392 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 393 1672, 1904, 0, 900, 903, 909, 934, 0, 394 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 395 /* 1440x900@75Hz */ 396 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 397 1688, 1936, 0, 900, 903, 909, 942, 0, 398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 399 /* 1440x900@85Hz */ 400 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 401 1696, 1952, 0, 900, 903, 909, 948, 0, 402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 403 /* 1600x1200@60Hz */ 404 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 405 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 407 /* 1600x1200@65Hz */ 408 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 409 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 411 /* 1600x1200@70Hz */ 412 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 413 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 414 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 415 /* 1600x1200@75Hz */ 416 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664, 417 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 418 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 419 /* 1600x1200@85Hz */ 420 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 421 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 423 /* 1680x1050@60Hz */ 424 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 425 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 427 /* 1680x1050@75Hz */ 428 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 429 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 431 /* 1680x1050@85Hz */ 432 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 433 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 435 /* 1792x1344@60Hz */ 436 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 437 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 439 /* 1729x1344@75Hz */ 440 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 441 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 443 /* 1853x1392@60Hz */ 444 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 445 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 447 /* 1856x1392@75Hz */ 448 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 449 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 451 /* 1920x1200@60Hz */ 452 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 453 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 455 /* 1920x1200@75Hz */ 456 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 457 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 459 /* 1920x1200@85Hz */ 460 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 461 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 462 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 463 /* 1920x1440@60Hz */ 464 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 465 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 467 /* 1920x1440@75Hz */ 468 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 469 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 471 /* 2560x1600@60Hz */ 472 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 473 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 474 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 475 /* 2560x1600@75HZ */ 476 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 477 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 479 /* 2560x1600@85HZ */ 480 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 481 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 483 }; 484 485 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev, 486 int hsize, int vsize, int fresh) 487 { 488 int i, count; 489 struct drm_display_mode *ptr, *mode; 490 491 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 492 mode = NULL; 493 for (i = 0; i < count; i++) { 494 ptr = &drm_dmt_modes[i]; 495 if (hsize == ptr->hdisplay && 496 vsize == ptr->vdisplay && 497 fresh == drm_mode_vrefresh(ptr)) { 498 /* get the expected default mode */ 499 mode = drm_mode_duplicate(dev, ptr); 500 break; 501 } 502 } 503 return mode; 504 } 505 506 /* 507 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 508 * monitors fill with ascii space (0x20) instead. 509 */ 510 static int 511 bad_std_timing(u8 a, u8 b) 512 { 513 return (a == 0x00 && b == 0x00) || 514 (a == 0x01 && b == 0x01) || 515 (a == 0x20 && b == 0x20); 516 } 517 518 /** 519 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 520 * @t: standard timing params 521 * @timing_level: standard timing level 522 * 523 * Take the standard timing params (in this case width, aspect, and refresh) 524 * and convert them into a real mode using CVT/GTF/DMT. 525 * 526 * Punts for now, but should eventually use the FB layer's CVT based mode 527 * generation code. 528 */ 529 struct drm_display_mode *drm_mode_std(struct drm_device *dev, 530 struct std_timing *t, 531 int revision, 532 int timing_level) 533 { 534 struct drm_display_mode *mode; 535 int hsize, vsize; 536 int vrefresh_rate; 537 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 538 >> EDID_TIMING_ASPECT_SHIFT; 539 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 540 >> EDID_TIMING_VFREQ_SHIFT; 541 542 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 543 return NULL; 544 545 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 546 hsize = t->hsize * 8 + 248; 547 /* vrefresh_rate = vfreq + 60 */ 548 vrefresh_rate = vfreq + 60; 549 /* the vdisplay is calculated based on the aspect ratio */ 550 if (aspect_ratio == 0) { 551 if (revision < 3) 552 vsize = hsize; 553 else 554 vsize = (hsize * 10) / 16; 555 } else if (aspect_ratio == 1) 556 vsize = (hsize * 3) / 4; 557 else if (aspect_ratio == 2) 558 vsize = (hsize * 4) / 5; 559 else 560 vsize = (hsize * 9) / 16; 561 /* HDTV hack */ 562 if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) { 563 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 564 false); 565 mode->hdisplay = 1366; 566 mode->vsync_start = mode->vsync_start - 1; 567 mode->vsync_end = mode->vsync_end - 1; 568 return mode; 569 } 570 mode = NULL; 571 /* check whether it can be found in default mode table */ 572 mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate); 573 if (mode) 574 return mode; 575 576 switch (timing_level) { 577 case LEVEL_DMT: 578 break; 579 case LEVEL_GTF: 580 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 581 break; 582 case LEVEL_CVT: 583 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 584 false); 585 break; 586 } 587 return mode; 588 } 589 590 /** 591 * drm_mode_detailed - create a new mode from an EDID detailed timing section 592 * @dev: DRM device (needed to create new mode) 593 * @edid: EDID block 594 * @timing: EDID detailed timing info 595 * @quirks: quirks to apply 596 * 597 * An EDID detailed timing block contains enough info for us to create and 598 * return a new struct drm_display_mode. 599 */ 600 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 601 struct edid *edid, 602 struct detailed_timing *timing, 603 u32 quirks) 604 { 605 struct drm_display_mode *mode; 606 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 607 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 608 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 609 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 610 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 611 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 612 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 613 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 614 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 615 616 /* ignore tiny modes */ 617 if (hactive < 64 || vactive < 64) 618 return NULL; 619 620 if (pt->misc & DRM_EDID_PT_STEREO) { 621 printk(KERN_WARNING "stereo mode not supported\n"); 622 return NULL; 623 } 624 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 625 printk(KERN_WARNING "integrated sync not supported\n"); 626 return NULL; 627 } 628 629 /* it is incorrect if hsync/vsync width is zero */ 630 if (!hsync_pulse_width || !vsync_pulse_width) { 631 DRM_DEBUG_KMS("Incorrect Detailed timing. " 632 "Wrong Hsync/Vsync pulse width\n"); 633 return NULL; 634 } 635 mode = drm_mode_create(dev); 636 if (!mode) 637 return NULL; 638 639 mode->type = DRM_MODE_TYPE_DRIVER; 640 641 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 642 timing->pixel_clock = cpu_to_le16(1088); 643 644 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 645 646 mode->hdisplay = hactive; 647 mode->hsync_start = mode->hdisplay + hsync_offset; 648 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 649 mode->htotal = mode->hdisplay + hblank; 650 651 mode->vdisplay = vactive; 652 mode->vsync_start = mode->vdisplay + vsync_offset; 653 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 654 mode->vtotal = mode->vdisplay + vblank; 655 656 /* perform the basic check for the detailed timing */ 657 if (mode->hsync_end > mode->htotal || 658 mode->vsync_end > mode->vtotal) { 659 drm_mode_destroy(dev, mode); 660 DRM_DEBUG_KMS("Incorrect detailed timing. " 661 "Sync is beyond the blank.\n"); 662 return NULL; 663 } 664 665 drm_mode_set_name(mode); 666 667 if (pt->misc & DRM_EDID_PT_INTERLACED) 668 mode->flags |= DRM_MODE_FLAG_INTERLACE; 669 670 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 671 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 672 } 673 674 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 675 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 676 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 677 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 678 679 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 680 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 681 682 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 683 mode->width_mm *= 10; 684 mode->height_mm *= 10; 685 } 686 687 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 688 mode->width_mm = edid->width_cm * 10; 689 mode->height_mm = edid->height_cm * 10; 690 } 691 692 return mode; 693 } 694 695 /* 696 * Detailed mode info for the EDID "established modes" data to use. 697 */ 698 static struct drm_display_mode edid_est_modes[] = { 699 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 700 968, 1056, 0, 600, 601, 605, 628, 0, 701 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 702 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 703 896, 1024, 0, 600, 601, 603, 625, 0, 704 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 705 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 706 720, 840, 0, 480, 481, 484, 500, 0, 707 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 708 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 709 704, 832, 0, 480, 489, 491, 520, 0, 710 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 711 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 712 768, 864, 0, 480, 483, 486, 525, 0, 713 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 714 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 715 752, 800, 0, 480, 490, 492, 525, 0, 716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 717 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 718 846, 900, 0, 400, 421, 423, 449, 0, 719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 720 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 721 846, 900, 0, 400, 412, 414, 449, 0, 722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 723 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 724 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 725 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 726 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 727 1136, 1312, 0, 768, 769, 772, 800, 0, 728 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 729 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 730 1184, 1328, 0, 768, 771, 777, 806, 0, 731 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 732 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 733 1184, 1344, 0, 768, 771, 777, 806, 0, 734 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 735 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 736 1208, 1264, 0, 768, 768, 776, 817, 0, 737 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 738 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 739 928, 1152, 0, 624, 625, 628, 667, 0, 740 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 741 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 742 896, 1056, 0, 600, 601, 604, 625, 0, 743 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 744 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 745 976, 1040, 0, 600, 637, 643, 666, 0, 746 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 747 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 748 1344, 1600, 0, 864, 865, 868, 900, 0, 749 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 750 }; 751 752 #define EDID_EST_TIMINGS 16 753 #define EDID_STD_TIMINGS 8 754 #define EDID_DETAILED_TIMINGS 4 755 756 /** 757 * add_established_modes - get est. modes from EDID and add them 758 * @edid: EDID block to scan 759 * 760 * Each EDID block contains a bitmap of the supported "established modes" list 761 * (defined above). Tease them out and add them to the global modes list. 762 */ 763 static int add_established_modes(struct drm_connector *connector, struct edid *edid) 764 { 765 struct drm_device *dev = connector->dev; 766 unsigned long est_bits = edid->established_timings.t1 | 767 (edid->established_timings.t2 << 8) | 768 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 769 int i, modes = 0; 770 771 for (i = 0; i <= EDID_EST_TIMINGS; i++) 772 if (est_bits & (1<<i)) { 773 struct drm_display_mode *newmode; 774 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 775 if (newmode) { 776 drm_mode_probed_add(connector, newmode); 777 modes++; 778 } 779 } 780 781 return modes; 782 } 783 /** 784 * stanard_timing_level - get std. timing level(CVT/GTF/DMT) 785 * @edid: EDID block to scan 786 */ 787 static int standard_timing_level(struct edid *edid) 788 { 789 if (edid->revision >= 2) { 790 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 791 return LEVEL_CVT; 792 return LEVEL_GTF; 793 } 794 return LEVEL_DMT; 795 } 796 797 /** 798 * add_standard_modes - get std. modes from EDID and add them 799 * @edid: EDID block to scan 800 * 801 * Standard modes can be calculated using the CVT standard. Grab them from 802 * @edid, calculate them, and add them to the list. 803 */ 804 static int add_standard_modes(struct drm_connector *connector, struct edid *edid) 805 { 806 struct drm_device *dev = connector->dev; 807 int i, modes = 0; 808 int timing_level; 809 810 timing_level = standard_timing_level(edid); 811 812 for (i = 0; i < EDID_STD_TIMINGS; i++) { 813 struct std_timing *t = &edid->standard_timings[i]; 814 struct drm_display_mode *newmode; 815 816 /* If std timings bytes are 1, 1 it's empty */ 817 if (t->hsize == 1 && t->vfreq_aspect == 1) 818 continue; 819 820 newmode = drm_mode_std(dev, &edid->standard_timings[i], 821 edid->revision, timing_level); 822 if (newmode) { 823 drm_mode_probed_add(connector, newmode); 824 modes++; 825 } 826 } 827 828 return modes; 829 } 830 831 /** 832 * add_detailed_modes - get detailed mode info from EDID data 833 * @connector: attached connector 834 * @edid: EDID block to scan 835 * @quirks: quirks to apply 836 * 837 * Some of the detailed timing sections may contain mode information. Grab 838 * it and add it to the list. 839 */ 840 static int add_detailed_info(struct drm_connector *connector, 841 struct edid *edid, u32 quirks) 842 { 843 struct drm_device *dev = connector->dev; 844 int i, j, modes = 0; 845 int timing_level; 846 847 timing_level = standard_timing_level(edid); 848 849 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { 850 struct detailed_timing *timing = &edid->detailed_timings[i]; 851 struct detailed_non_pixel *data = &timing->data.other_data; 852 struct drm_display_mode *newmode; 853 854 /* X server check is version 1.1 or higher */ 855 if (edid->version == 1 && edid->revision >= 1 && 856 !timing->pixel_clock) { 857 /* Other timing or info */ 858 switch (data->type) { 859 case EDID_DETAIL_MONITOR_SERIAL: 860 break; 861 case EDID_DETAIL_MONITOR_STRING: 862 break; 863 case EDID_DETAIL_MONITOR_RANGE: 864 /* Get monitor range data */ 865 break; 866 case EDID_DETAIL_MONITOR_NAME: 867 break; 868 case EDID_DETAIL_MONITOR_CPDATA: 869 break; 870 case EDID_DETAIL_STD_MODES: 871 for (j = 0; j < 6; i++) { 872 struct std_timing *std; 873 struct drm_display_mode *newmode; 874 875 std = &data->data.timings[j]; 876 newmode = drm_mode_std(dev, std, 877 edid->revision, 878 timing_level); 879 if (newmode) { 880 drm_mode_probed_add(connector, newmode); 881 modes++; 882 } 883 } 884 break; 885 default: 886 break; 887 } 888 } else { 889 newmode = drm_mode_detailed(dev, edid, timing, quirks); 890 if (!newmode) 891 continue; 892 893 /* First detailed mode is preferred */ 894 if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING)) 895 newmode->type |= DRM_MODE_TYPE_PREFERRED; 896 drm_mode_probed_add(connector, newmode); 897 898 modes++; 899 } 900 } 901 902 return modes; 903 } 904 /** 905 * add_detailed_mode_eedid - get detailed mode info from addtional timing 906 * EDID block 907 * @connector: attached connector 908 * @edid: EDID block to scan(It is only to get addtional timing EDID block) 909 * @quirks: quirks to apply 910 * 911 * Some of the detailed timing sections may contain mode information. Grab 912 * it and add it to the list. 913 */ 914 static int add_detailed_info_eedid(struct drm_connector *connector, 915 struct edid *edid, u32 quirks) 916 { 917 struct drm_device *dev = connector->dev; 918 int i, j, modes = 0; 919 char *edid_ext = NULL; 920 struct detailed_timing *timing; 921 struct detailed_non_pixel *data; 922 struct drm_display_mode *newmode; 923 int edid_ext_num; 924 int start_offset, end_offset; 925 int timing_level; 926 927 if (edid->version == 1 && edid->revision < 3) { 928 /* If the EDID version is less than 1.3, there is no 929 * extension EDID. 930 */ 931 return 0; 932 } 933 if (!edid->extensions) { 934 /* if there is no extension EDID, it is unnecessary to 935 * parse the E-EDID to get detailed info 936 */ 937 return 0; 938 } 939 940 /* Chose real EDID extension number */ 941 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ? 942 MAX_EDID_EXT_NUM : edid->extensions; 943 944 /* Find CEA extension */ 945 for (i = 0; i < edid_ext_num; i++) { 946 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 947 /* This block is CEA extension */ 948 if (edid_ext[0] == 0x02) 949 break; 950 } 951 952 if (i == edid_ext_num) { 953 /* if there is no additional timing EDID block, return */ 954 return 0; 955 } 956 957 /* Get the start offset of detailed timing block */ 958 start_offset = edid_ext[2]; 959 if (start_offset == 0) { 960 /* If the start_offset is zero, it means that neither detailed 961 * info nor data block exist. In such case it is also 962 * unnecessary to parse the detailed timing info. 963 */ 964 return 0; 965 } 966 967 timing_level = standard_timing_level(edid); 968 end_offset = EDID_LENGTH; 969 end_offset -= sizeof(struct detailed_timing); 970 for (i = start_offset; i < end_offset; 971 i += sizeof(struct detailed_timing)) { 972 timing = (struct detailed_timing *)(edid_ext + i); 973 data = &timing->data.other_data; 974 /* Detailed mode timing */ 975 if (timing->pixel_clock) { 976 newmode = drm_mode_detailed(dev, edid, timing, quirks); 977 if (!newmode) 978 continue; 979 980 drm_mode_probed_add(connector, newmode); 981 982 modes++; 983 continue; 984 } 985 986 /* Other timing or info */ 987 switch (data->type) { 988 case EDID_DETAIL_MONITOR_SERIAL: 989 break; 990 case EDID_DETAIL_MONITOR_STRING: 991 break; 992 case EDID_DETAIL_MONITOR_RANGE: 993 /* Get monitor range data */ 994 break; 995 case EDID_DETAIL_MONITOR_NAME: 996 break; 997 case EDID_DETAIL_MONITOR_CPDATA: 998 break; 999 case EDID_DETAIL_STD_MODES: 1000 /* Five modes per detailed section */ 1001 for (j = 0; j < 5; i++) { 1002 struct std_timing *std; 1003 struct drm_display_mode *newmode; 1004 1005 std = &data->data.timings[j]; 1006 newmode = drm_mode_std(dev, std, 1007 edid->revision, 1008 timing_level); 1009 if (newmode) { 1010 drm_mode_probed_add(connector, newmode); 1011 modes++; 1012 } 1013 } 1014 break; 1015 default: 1016 break; 1017 } 1018 } 1019 1020 return modes; 1021 } 1022 1023 #define DDC_ADDR 0x50 1024 /** 1025 * Get EDID information via I2C. 1026 * 1027 * \param adapter : i2c device adaptor 1028 * \param buf : EDID data buffer to be filled 1029 * \param len : EDID data buffer length 1030 * \return 0 on success or -1 on failure. 1031 * 1032 * Try to fetch EDID information by calling i2c driver function. 1033 */ 1034 int drm_do_probe_ddc_edid(struct i2c_adapter *adapter, 1035 unsigned char *buf, int len) 1036 { 1037 unsigned char start = 0x0; 1038 struct i2c_msg msgs[] = { 1039 { 1040 .addr = DDC_ADDR, 1041 .flags = 0, 1042 .len = 1, 1043 .buf = &start, 1044 }, { 1045 .addr = DDC_ADDR, 1046 .flags = I2C_M_RD, 1047 .len = len, 1048 .buf = buf, 1049 } 1050 }; 1051 1052 if (i2c_transfer(adapter, msgs, 2) == 2) 1053 return 0; 1054 1055 return -1; 1056 } 1057 EXPORT_SYMBOL(drm_do_probe_ddc_edid); 1058 1059 static int drm_ddc_read_edid(struct drm_connector *connector, 1060 struct i2c_adapter *adapter, 1061 char *buf, int len) 1062 { 1063 int ret; 1064 1065 ret = drm_do_probe_ddc_edid(adapter, buf, len); 1066 if (ret != 0) { 1067 goto end; 1068 } 1069 if (!edid_is_valid((struct edid *)buf)) { 1070 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1071 drm_get_connector_name(connector)); 1072 ret = -1; 1073 } 1074 end: 1075 return ret; 1076 } 1077 1078 /** 1079 * drm_get_edid - get EDID data, if available 1080 * @connector: connector we're probing 1081 * @adapter: i2c adapter to use for DDC 1082 * 1083 * Poke the given connector's i2c channel to grab EDID data if possible. 1084 * 1085 * Return edid data or NULL if we couldn't find any. 1086 */ 1087 struct edid *drm_get_edid(struct drm_connector *connector, 1088 struct i2c_adapter *adapter) 1089 { 1090 int ret; 1091 struct edid *edid; 1092 1093 edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1), 1094 GFP_KERNEL); 1095 if (edid == NULL) { 1096 dev_warn(&connector->dev->pdev->dev, 1097 "Failed to allocate EDID\n"); 1098 goto end; 1099 } 1100 1101 /* Read first EDID block */ 1102 ret = drm_ddc_read_edid(connector, adapter, 1103 (unsigned char *)edid, EDID_LENGTH); 1104 if (ret != 0) 1105 goto clean_up; 1106 1107 /* There are EDID extensions to be read */ 1108 if (edid->extensions != 0) { 1109 int edid_ext_num = edid->extensions; 1110 1111 if (edid_ext_num > MAX_EDID_EXT_NUM) { 1112 dev_warn(&connector->dev->pdev->dev, 1113 "The number of extension(%d) is " 1114 "over max (%d), actually read number (%d)\n", 1115 edid_ext_num, MAX_EDID_EXT_NUM, 1116 MAX_EDID_EXT_NUM); 1117 /* Reset EDID extension number to be read */ 1118 edid_ext_num = MAX_EDID_EXT_NUM; 1119 } 1120 /* Read EDID including extensions too */ 1121 ret = drm_ddc_read_edid(connector, adapter, (char *)edid, 1122 EDID_LENGTH * (edid_ext_num + 1)); 1123 if (ret != 0) 1124 goto clean_up; 1125 1126 } 1127 1128 connector->display_info.raw_edid = (char *)edid; 1129 goto end; 1130 1131 clean_up: 1132 kfree(edid); 1133 edid = NULL; 1134 end: 1135 return edid; 1136 1137 } 1138 EXPORT_SYMBOL(drm_get_edid); 1139 1140 #define HDMI_IDENTIFIER 0x000C03 1141 #define VENDOR_BLOCK 0x03 1142 /** 1143 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1144 * @edid: monitor EDID information 1145 * 1146 * Parse the CEA extension according to CEA-861-B. 1147 * Return true if HDMI, false if not or unknown. 1148 */ 1149 bool drm_detect_hdmi_monitor(struct edid *edid) 1150 { 1151 char *edid_ext = NULL; 1152 int i, hdmi_id, edid_ext_num; 1153 int start_offset, end_offset; 1154 bool is_hdmi = false; 1155 1156 /* No EDID or EDID extensions */ 1157 if (edid == NULL || edid->extensions == 0) 1158 goto end; 1159 1160 /* Chose real EDID extension number */ 1161 edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ? 1162 MAX_EDID_EXT_NUM : edid->extensions; 1163 1164 /* Find CEA extension */ 1165 for (i = 0; i < edid_ext_num; i++) { 1166 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1167 /* This block is CEA extension */ 1168 if (edid_ext[0] == 0x02) 1169 break; 1170 } 1171 1172 if (i == edid_ext_num) 1173 goto end; 1174 1175 /* Data block offset in CEA extension block */ 1176 start_offset = 4; 1177 end_offset = edid_ext[2]; 1178 1179 /* 1180 * Because HDMI identifier is in Vendor Specific Block, 1181 * search it from all data blocks of CEA extension. 1182 */ 1183 for (i = start_offset; i < end_offset; 1184 /* Increased by data block len */ 1185 i += ((edid_ext[i] & 0x1f) + 1)) { 1186 /* Find vendor specific block */ 1187 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1188 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1189 edid_ext[i + 3] << 16; 1190 /* Find HDMI identifier */ 1191 if (hdmi_id == HDMI_IDENTIFIER) 1192 is_hdmi = true; 1193 break; 1194 } 1195 } 1196 1197 end: 1198 return is_hdmi; 1199 } 1200 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 1201 1202 /** 1203 * drm_add_edid_modes - add modes from EDID data, if available 1204 * @connector: connector we're probing 1205 * @edid: edid data 1206 * 1207 * Add the specified modes to the connector's mode list. 1208 * 1209 * Return number of modes added or 0 if we couldn't find any. 1210 */ 1211 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1212 { 1213 int num_modes = 0; 1214 u32 quirks; 1215 1216 if (edid == NULL) { 1217 return 0; 1218 } 1219 if (!edid_is_valid(edid)) { 1220 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 1221 drm_get_connector_name(connector)); 1222 return 0; 1223 } 1224 1225 quirks = edid_get_quirks(edid); 1226 1227 num_modes += add_established_modes(connector, edid); 1228 num_modes += add_standard_modes(connector, edid); 1229 num_modes += add_detailed_info(connector, edid, quirks); 1230 num_modes += add_detailed_info_eedid(connector, edid, quirks); 1231 1232 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1233 edid_fixup_preferred(connector, quirks); 1234 1235 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; 1236 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; 1237 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; 1238 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; 1239 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; 1240 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; 1241 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; 1242 connector->display_info.width_mm = edid->width_cm * 10; 1243 connector->display_info.height_mm = edid->height_cm * 10; 1244 connector->display_info.gamma = edid->gamma; 1245 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; 1246 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; 1247 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; 1248 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; 1249 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; 1250 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; 1251 connector->display_info.gamma = edid->gamma; 1252 1253 return num_modes; 1254 } 1255 EXPORT_SYMBOL(drm_add_edid_modes); 1256 1257 /** 1258 * drm_add_modes_noedid - add modes for the connectors without EDID 1259 * @connector: connector we're probing 1260 * @hdisplay: the horizontal display limit 1261 * @vdisplay: the vertical display limit 1262 * 1263 * Add the specified modes to the connector's mode list. Only when the 1264 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1265 * 1266 * Return number of modes added or 0 if we couldn't find any. 1267 */ 1268 int drm_add_modes_noedid(struct drm_connector *connector, 1269 int hdisplay, int vdisplay) 1270 { 1271 int i, count, num_modes = 0; 1272 struct drm_display_mode *mode, *ptr; 1273 struct drm_device *dev = connector->dev; 1274 1275 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1276 if (hdisplay < 0) 1277 hdisplay = 0; 1278 if (vdisplay < 0) 1279 vdisplay = 0; 1280 1281 for (i = 0; i < count; i++) { 1282 ptr = &drm_dmt_modes[i]; 1283 if (hdisplay && vdisplay) { 1284 /* 1285 * Only when two are valid, they will be used to check 1286 * whether the mode should be added to the mode list of 1287 * the connector. 1288 */ 1289 if (ptr->hdisplay > hdisplay || 1290 ptr->vdisplay > vdisplay) 1291 continue; 1292 } 1293 mode = drm_mode_duplicate(dev, ptr); 1294 if (mode) { 1295 drm_mode_probed_add(connector, mode); 1296 num_modes++; 1297 } 1298 } 1299 return num_modes; 1300 } 1301 EXPORT_SYMBOL(drm_add_modes_noedid); 1302