1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/slab.h> 32 #include <linux/i2c.h> 33 #include <linux/i2c-algo-bit.h> 34 #include "drmP.h" 35 #include "drm_edid.h" 36 37 #define EDID_EST_TIMINGS 16 38 #define EDID_STD_TIMINGS 8 39 #define EDID_DETAILED_TIMINGS 4 40 41 /* 42 * EDID blocks out in the wild have a variety of bugs, try to collect 43 * them here (note that userspace may work around broken monitors first, 44 * but fixes should make their way here so that the kernel "just works" 45 * on as many displays as possible). 46 */ 47 48 /* First detailed mode wrong, use largest 60Hz mode */ 49 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 50 /* Reported 135MHz pixel clock is too high, needs adjustment */ 51 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 52 /* Prefer the largest mode at 75 Hz */ 53 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 54 /* Detail timing is in cm not mm */ 55 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 56 /* Detailed timing descriptors have bogus size values, so just take the 57 * maximum size and use that. 58 */ 59 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 60 /* Monitor forgot to set the first detailed is preferred bit. */ 61 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 62 /* use +hsync +vsync for detailed mode */ 63 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 64 65 66 #define LEVEL_DMT 0 67 #define LEVEL_GTF 1 68 #define LEVEL_GTF2 2 69 #define LEVEL_CVT 3 70 71 static struct edid_quirk { 72 char *vendor; 73 int product_id; 74 u32 quirks; 75 } edid_quirk_list[] = { 76 /* Acer AL1706 */ 77 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 78 /* Acer F51 */ 79 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 80 /* Unknown Acer */ 81 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 82 83 /* Belinea 10 15 55 */ 84 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 85 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 86 87 /* Envision Peripherals, Inc. EN-7100e */ 88 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 89 /* Envision EN2028 */ 90 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 91 92 /* Funai Electronics PM36B */ 93 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 94 EDID_QUIRK_DETAILED_IN_CM }, 95 96 /* LG Philips LCD LP154W01-A5 */ 97 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 98 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 99 100 /* Philips 107p5 CRT */ 101 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 102 103 /* Proview AY765C */ 104 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 105 106 /* Samsung SyncMaster 205BW. Note: irony */ 107 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 108 /* Samsung SyncMaster 22[5-6]BW */ 109 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 110 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 111 }; 112 113 /*** DDC fetch and block validation ***/ 114 115 static const u8 edid_header[] = { 116 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 117 }; 118 119 /* 120 * Sanity check the EDID block (base or extension). Return 0 if the block 121 * doesn't check out, or 1 if it's valid. 122 */ 123 static bool 124 drm_edid_block_valid(u8 *raw_edid) 125 { 126 int i; 127 u8 csum = 0; 128 struct edid *edid = (struct edid *)raw_edid; 129 130 if (raw_edid[0] == 0x00) { 131 int score = 0; 132 133 for (i = 0; i < sizeof(edid_header); i++) 134 if (raw_edid[i] == edid_header[i]) 135 score++; 136 137 if (score == 8) ; 138 else if (score >= 6) { 139 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 140 memcpy(raw_edid, edid_header, sizeof(edid_header)); 141 } else { 142 goto bad; 143 } 144 } 145 146 for (i = 0; i < EDID_LENGTH; i++) 147 csum += raw_edid[i]; 148 if (csum) { 149 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 150 151 /* allow CEA to slide through, switches mangle this */ 152 if (raw_edid[0] != 0x02) 153 goto bad; 154 } 155 156 /* per-block-type checks */ 157 switch (raw_edid[0]) { 158 case 0: /* base */ 159 if (edid->version != 1) { 160 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 161 goto bad; 162 } 163 164 if (edid->revision > 4) 165 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 166 break; 167 168 default: 169 break; 170 } 171 172 return 1; 173 174 bad: 175 if (raw_edid) { 176 DRM_ERROR("Raw EDID:\n"); 177 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); 178 printk("\n"); 179 } 180 return 0; 181 } 182 183 /** 184 * drm_edid_is_valid - sanity check EDID data 185 * @edid: EDID data 186 * 187 * Sanity-check an entire EDID record (including extensions) 188 */ 189 bool drm_edid_is_valid(struct edid *edid) 190 { 191 int i; 192 u8 *raw = (u8 *)edid; 193 194 if (!edid) 195 return false; 196 197 for (i = 0; i <= edid->extensions; i++) 198 if (!drm_edid_block_valid(raw + i * EDID_LENGTH)) 199 return false; 200 201 return true; 202 } 203 EXPORT_SYMBOL(drm_edid_is_valid); 204 205 #define DDC_ADDR 0x50 206 #define DDC_SEGMENT_ADDR 0x30 207 /** 208 * Get EDID information via I2C. 209 * 210 * \param adapter : i2c device adaptor 211 * \param buf : EDID data buffer to be filled 212 * \param len : EDID data buffer length 213 * \return 0 on success or -1 on failure. 214 * 215 * Try to fetch EDID information by calling i2c driver function. 216 */ 217 static int 218 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, 219 int block, int len) 220 { 221 unsigned char start = block * EDID_LENGTH; 222 struct i2c_msg msgs[] = { 223 { 224 .addr = DDC_ADDR, 225 .flags = 0, 226 .len = 1, 227 .buf = &start, 228 }, { 229 .addr = DDC_ADDR, 230 .flags = I2C_M_RD, 231 .len = len, 232 .buf = buf + start, 233 } 234 }; 235 236 if (i2c_transfer(adapter, msgs, 2) == 2) 237 return 0; 238 239 return -1; 240 } 241 242 static u8 * 243 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) 244 { 245 int i, j = 0; 246 u8 *block, *new; 247 248 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 249 return NULL; 250 251 /* base block fetch */ 252 for (i = 0; i < 4; i++) { 253 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 254 goto out; 255 if (drm_edid_block_valid(block)) 256 break; 257 } 258 if (i == 4) 259 goto carp; 260 261 /* if there's no extensions, we're done */ 262 if (block[0x7e] == 0) 263 return block; 264 265 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 266 if (!new) 267 goto out; 268 block = new; 269 270 for (j = 1; j <= block[0x7e]; j++) { 271 for (i = 0; i < 4; i++) { 272 if (drm_do_probe_ddc_edid(adapter, block, j, 273 EDID_LENGTH)) 274 goto out; 275 if (drm_edid_block_valid(block + j * EDID_LENGTH)) 276 break; 277 } 278 if (i == 4) 279 goto carp; 280 } 281 282 return block; 283 284 carp: 285 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 286 drm_get_connector_name(connector), j); 287 288 out: 289 kfree(block); 290 return NULL; 291 } 292 293 /** 294 * Probe DDC presence. 295 * 296 * \param adapter : i2c device adaptor 297 * \return 1 on success 298 */ 299 static bool 300 drm_probe_ddc(struct i2c_adapter *adapter) 301 { 302 unsigned char out; 303 304 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 305 } 306 307 /** 308 * drm_get_edid - get EDID data, if available 309 * @connector: connector we're probing 310 * @adapter: i2c adapter to use for DDC 311 * 312 * Poke the given i2c channel to grab EDID data if possible. If found, 313 * attach it to the connector. 314 * 315 * Return edid data or NULL if we couldn't find any. 316 */ 317 struct edid *drm_get_edid(struct drm_connector *connector, 318 struct i2c_adapter *adapter) 319 { 320 struct edid *edid = NULL; 321 322 if (drm_probe_ddc(adapter)) 323 edid = (struct edid *)drm_do_get_edid(connector, adapter); 324 325 connector->display_info.raw_edid = (char *)edid; 326 327 return edid; 328 329 } 330 EXPORT_SYMBOL(drm_get_edid); 331 332 /*** EDID parsing ***/ 333 334 /** 335 * edid_vendor - match a string against EDID's obfuscated vendor field 336 * @edid: EDID to match 337 * @vendor: vendor string 338 * 339 * Returns true if @vendor is in @edid, false otherwise 340 */ 341 static bool edid_vendor(struct edid *edid, char *vendor) 342 { 343 char edid_vendor[3]; 344 345 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 346 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 347 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 348 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 349 350 return !strncmp(edid_vendor, vendor, 3); 351 } 352 353 /** 354 * edid_get_quirks - return quirk flags for a given EDID 355 * @edid: EDID to process 356 * 357 * This tells subsequent routines what fixes they need to apply. 358 */ 359 static u32 edid_get_quirks(struct edid *edid) 360 { 361 struct edid_quirk *quirk; 362 int i; 363 364 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 365 quirk = &edid_quirk_list[i]; 366 367 if (edid_vendor(edid, quirk->vendor) && 368 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 369 return quirk->quirks; 370 } 371 372 return 0; 373 } 374 375 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 376 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 377 378 379 /** 380 * edid_fixup_preferred - set preferred modes based on quirk list 381 * @connector: has mode list to fix up 382 * @quirks: quirks list 383 * 384 * Walk the mode list for @connector, clearing the preferred status 385 * on existing modes and setting it anew for the right mode ala @quirks. 386 */ 387 static void edid_fixup_preferred(struct drm_connector *connector, 388 u32 quirks) 389 { 390 struct drm_display_mode *t, *cur_mode, *preferred_mode; 391 int target_refresh = 0; 392 393 if (list_empty(&connector->probed_modes)) 394 return; 395 396 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 397 target_refresh = 60; 398 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 399 target_refresh = 75; 400 401 preferred_mode = list_first_entry(&connector->probed_modes, 402 struct drm_display_mode, head); 403 404 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 405 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 406 407 if (cur_mode == preferred_mode) 408 continue; 409 410 /* Largest mode is preferred */ 411 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 412 preferred_mode = cur_mode; 413 414 /* At a given size, try to get closest to target refresh */ 415 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 416 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 417 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 418 preferred_mode = cur_mode; 419 } 420 } 421 422 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 423 } 424 425 /* 426 * Add the Autogenerated from the DMT spec. 427 * This table is copied from xfree86/modes/xf86EdidModes.c. 428 * But the mode with Reduced blank feature is deleted. 429 */ 430 static struct drm_display_mode drm_dmt_modes[] = { 431 /* 640x350@85Hz */ 432 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 433 736, 832, 0, 350, 382, 385, 445, 0, 434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 435 /* 640x400@85Hz */ 436 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 437 736, 832, 0, 400, 401, 404, 445, 0, 438 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 439 /* 720x400@85Hz */ 440 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 441 828, 936, 0, 400, 401, 404, 446, 0, 442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 443 /* 640x480@60Hz */ 444 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 445 752, 800, 0, 480, 489, 492, 525, 0, 446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 447 /* 640x480@72Hz */ 448 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 449 704, 832, 0, 480, 489, 492, 520, 0, 450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 451 /* 640x480@75Hz */ 452 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 453 720, 840, 0, 480, 481, 484, 500, 0, 454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 455 /* 640x480@85Hz */ 456 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 457 752, 832, 0, 480, 481, 484, 509, 0, 458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 459 /* 800x600@56Hz */ 460 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 461 896, 1024, 0, 600, 601, 603, 625, 0, 462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 463 /* 800x600@60Hz */ 464 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 465 968, 1056, 0, 600, 601, 605, 628, 0, 466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 467 /* 800x600@72Hz */ 468 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 469 976, 1040, 0, 600, 637, 643, 666, 0, 470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 471 /* 800x600@75Hz */ 472 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 473 896, 1056, 0, 600, 601, 604, 625, 0, 474 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 475 /* 800x600@85Hz */ 476 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 477 896, 1048, 0, 600, 601, 604, 631, 0, 478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 479 /* 848x480@60Hz */ 480 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 481 976, 1088, 0, 480, 486, 494, 517, 0, 482 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 483 /* 1024x768@43Hz, interlace */ 484 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 485 1208, 1264, 0, 768, 768, 772, 817, 0, 486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 487 DRM_MODE_FLAG_INTERLACE) }, 488 /* 1024x768@60Hz */ 489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 490 1184, 1344, 0, 768, 771, 777, 806, 0, 491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 492 /* 1024x768@70Hz */ 493 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 494 1184, 1328, 0, 768, 771, 777, 806, 0, 495 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 496 /* 1024x768@75Hz */ 497 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 498 1136, 1312, 0, 768, 769, 772, 800, 0, 499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 500 /* 1024x768@85Hz */ 501 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 502 1168, 1376, 0, 768, 769, 772, 808, 0, 503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 504 /* 1152x864@75Hz */ 505 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 506 1344, 1600, 0, 864, 865, 868, 900, 0, 507 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 508 /* 1280x768@60Hz */ 509 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 510 1472, 1664, 0, 768, 771, 778, 798, 0, 511 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 512 /* 1280x768@75Hz */ 513 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 514 1488, 1696, 0, 768, 771, 778, 805, 0, 515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 516 /* 1280x768@85Hz */ 517 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 518 1496, 1712, 0, 768, 771, 778, 809, 0, 519 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 520 /* 1280x800@60Hz */ 521 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 522 1480, 1680, 0, 800, 803, 809, 831, 0, 523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 524 /* 1280x800@75Hz */ 525 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 526 1488, 1696, 0, 800, 803, 809, 838, 0, 527 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 528 /* 1280x800@85Hz */ 529 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 530 1496, 1712, 0, 800, 803, 809, 843, 0, 531 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 532 /* 1280x960@60Hz */ 533 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 534 1488, 1800, 0, 960, 961, 964, 1000, 0, 535 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 536 /* 1280x960@85Hz */ 537 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 538 1504, 1728, 0, 960, 961, 964, 1011, 0, 539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 540 /* 1280x1024@60Hz */ 541 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 542 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 543 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 544 /* 1280x1024@75Hz */ 545 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 546 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 547 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 548 /* 1280x1024@85Hz */ 549 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 550 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 551 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 552 /* 1360x768@60Hz */ 553 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 554 1536, 1792, 0, 768, 771, 777, 795, 0, 555 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 556 /* 1440x1050@60Hz */ 557 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 558 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 559 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 560 /* 1440x1050@75Hz */ 561 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 562 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 563 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 564 /* 1440x1050@85Hz */ 565 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 566 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 567 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 568 /* 1440x900@60Hz */ 569 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 570 1672, 1904, 0, 900, 903, 909, 934, 0, 571 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 572 /* 1440x900@75Hz */ 573 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 574 1688, 1936, 0, 900, 903, 909, 942, 0, 575 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 576 /* 1440x900@85Hz */ 577 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 578 1696, 1952, 0, 900, 903, 909, 948, 0, 579 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 580 /* 1600x1200@60Hz */ 581 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 582 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 583 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 584 /* 1600x1200@65Hz */ 585 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 586 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 587 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 588 /* 1600x1200@70Hz */ 589 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 590 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 591 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 592 /* 1600x1200@75Hz */ 593 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 594 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 595 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 596 /* 1600x1200@85Hz */ 597 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 598 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 599 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 600 /* 1680x1050@60Hz */ 601 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 602 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 603 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 604 /* 1680x1050@75Hz */ 605 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 606 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 607 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 608 /* 1680x1050@85Hz */ 609 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 610 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 611 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 612 /* 1792x1344@60Hz */ 613 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 614 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 615 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 616 /* 1729x1344@75Hz */ 617 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 618 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 619 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 620 /* 1853x1392@60Hz */ 621 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 622 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 623 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 624 /* 1856x1392@75Hz */ 625 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 626 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 627 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 628 /* 1920x1200@60Hz */ 629 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 630 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 632 /* 1920x1200@75Hz */ 633 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 634 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 635 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 636 /* 1920x1200@85Hz */ 637 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 638 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 639 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 640 /* 1920x1440@60Hz */ 641 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 642 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 644 /* 1920x1440@75Hz */ 645 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 646 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 647 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 648 /* 2560x1600@60Hz */ 649 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 650 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 651 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 652 /* 2560x1600@75HZ */ 653 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 654 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 656 /* 2560x1600@85HZ */ 657 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 658 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 659 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 660 }; 661 static const int drm_num_dmt_modes = 662 sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 663 664 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 665 int hsize, int vsize, int fresh) 666 { 667 int i; 668 struct drm_display_mode *ptr, *mode; 669 670 mode = NULL; 671 for (i = 0; i < drm_num_dmt_modes; i++) { 672 ptr = &drm_dmt_modes[i]; 673 if (hsize == ptr->hdisplay && 674 vsize == ptr->vdisplay && 675 fresh == drm_mode_vrefresh(ptr)) { 676 /* get the expected default mode */ 677 mode = drm_mode_duplicate(dev, ptr); 678 break; 679 } 680 } 681 return mode; 682 } 683 EXPORT_SYMBOL(drm_mode_find_dmt); 684 685 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 686 687 static void 688 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 689 { 690 int i; 691 struct edid *edid = (struct edid *)raw_edid; 692 693 if (edid == NULL) 694 return; 695 696 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 697 cb(&(edid->detailed_timings[i]), closure); 698 699 /* XXX extension block walk */ 700 } 701 702 static void 703 is_rb(struct detailed_timing *t, void *data) 704 { 705 u8 *r = (u8 *)t; 706 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 707 if (r[15] & 0x10) 708 *(bool *)data = true; 709 } 710 711 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 712 static bool 713 drm_monitor_supports_rb(struct edid *edid) 714 { 715 if (edid->revision >= 4) { 716 bool ret; 717 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 718 return ret; 719 } 720 721 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 722 } 723 724 static void 725 find_gtf2(struct detailed_timing *t, void *data) 726 { 727 u8 *r = (u8 *)t; 728 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 729 *(u8 **)data = r; 730 } 731 732 /* Secondary GTF curve kicks in above some break frequency */ 733 static int 734 drm_gtf2_hbreak(struct edid *edid) 735 { 736 u8 *r = NULL; 737 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 738 return r ? (r[12] * 2) : 0; 739 } 740 741 static int 742 drm_gtf2_2c(struct edid *edid) 743 { 744 u8 *r = NULL; 745 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 746 return r ? r[13] : 0; 747 } 748 749 static int 750 drm_gtf2_m(struct edid *edid) 751 { 752 u8 *r = NULL; 753 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 754 return r ? (r[15] << 8) + r[14] : 0; 755 } 756 757 static int 758 drm_gtf2_k(struct edid *edid) 759 { 760 u8 *r = NULL; 761 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 762 return r ? r[16] : 0; 763 } 764 765 static int 766 drm_gtf2_2j(struct edid *edid) 767 { 768 u8 *r = NULL; 769 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 770 return r ? r[17] : 0; 771 } 772 773 /** 774 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 775 * @edid: EDID block to scan 776 */ 777 static int standard_timing_level(struct edid *edid) 778 { 779 if (edid->revision >= 2) { 780 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 781 return LEVEL_CVT; 782 if (drm_gtf2_hbreak(edid)) 783 return LEVEL_GTF2; 784 return LEVEL_GTF; 785 } 786 return LEVEL_DMT; 787 } 788 789 /* 790 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 791 * monitors fill with ascii space (0x20) instead. 792 */ 793 static int 794 bad_std_timing(u8 a, u8 b) 795 { 796 return (a == 0x00 && b == 0x00) || 797 (a == 0x01 && b == 0x01) || 798 (a == 0x20 && b == 0x20); 799 } 800 801 /** 802 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 803 * @t: standard timing params 804 * @timing_level: standard timing level 805 * 806 * Take the standard timing params (in this case width, aspect, and refresh) 807 * and convert them into a real mode using CVT/GTF/DMT. 808 */ 809 static struct drm_display_mode * 810 drm_mode_std(struct drm_connector *connector, struct edid *edid, 811 struct std_timing *t, int revision) 812 { 813 struct drm_device *dev = connector->dev; 814 struct drm_display_mode *m, *mode = NULL; 815 int hsize, vsize; 816 int vrefresh_rate; 817 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 818 >> EDID_TIMING_ASPECT_SHIFT; 819 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 820 >> EDID_TIMING_VFREQ_SHIFT; 821 int timing_level = standard_timing_level(edid); 822 823 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 824 return NULL; 825 826 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 827 hsize = t->hsize * 8 + 248; 828 /* vrefresh_rate = vfreq + 60 */ 829 vrefresh_rate = vfreq + 60; 830 /* the vdisplay is calculated based on the aspect ratio */ 831 if (aspect_ratio == 0) { 832 if (revision < 3) 833 vsize = hsize; 834 else 835 vsize = (hsize * 10) / 16; 836 } else if (aspect_ratio == 1) 837 vsize = (hsize * 3) / 4; 838 else if (aspect_ratio == 2) 839 vsize = (hsize * 4) / 5; 840 else 841 vsize = (hsize * 9) / 16; 842 843 /* HDTV hack, part 1 */ 844 if (vrefresh_rate == 60 && 845 ((hsize == 1360 && vsize == 765) || 846 (hsize == 1368 && vsize == 769))) { 847 hsize = 1366; 848 vsize = 768; 849 } 850 851 /* 852 * If this connector already has a mode for this size and refresh 853 * rate (because it came from detailed or CVT info), use that 854 * instead. This way we don't have to guess at interlace or 855 * reduced blanking. 856 */ 857 list_for_each_entry(m, &connector->probed_modes, head) 858 if (m->hdisplay == hsize && m->vdisplay == vsize && 859 drm_mode_vrefresh(m) == vrefresh_rate) 860 return NULL; 861 862 /* HDTV hack, part 2 */ 863 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 864 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 865 false); 866 mode->hdisplay = 1366; 867 mode->hsync_start = mode->hsync_start - 1; 868 mode->hsync_end = mode->hsync_end - 1; 869 return mode; 870 } 871 872 /* check whether it can be found in default mode table */ 873 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate); 874 if (mode) 875 return mode; 876 877 switch (timing_level) { 878 case LEVEL_DMT: 879 break; 880 case LEVEL_GTF: 881 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 882 break; 883 case LEVEL_GTF2: 884 /* 885 * This is potentially wrong if there's ever a monitor with 886 * more than one ranges section, each claiming a different 887 * secondary GTF curve. Please don't do that. 888 */ 889 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 890 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 891 kfree(mode); 892 mode = drm_gtf_mode_complex(dev, hsize, vsize, 893 vrefresh_rate, 0, 0, 894 drm_gtf2_m(edid), 895 drm_gtf2_2c(edid), 896 drm_gtf2_k(edid), 897 drm_gtf2_2j(edid)); 898 } 899 break; 900 case LEVEL_CVT: 901 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 902 false); 903 break; 904 } 905 return mode; 906 } 907 908 /* 909 * EDID is delightfully ambiguous about how interlaced modes are to be 910 * encoded. Our internal representation is of frame height, but some 911 * HDTV detailed timings are encoded as field height. 912 * 913 * The format list here is from CEA, in frame size. Technically we 914 * should be checking refresh rate too. Whatever. 915 */ 916 static void 917 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 918 struct detailed_pixel_timing *pt) 919 { 920 int i; 921 static const struct { 922 int w, h; 923 } cea_interlaced[] = { 924 { 1920, 1080 }, 925 { 720, 480 }, 926 { 1440, 480 }, 927 { 2880, 480 }, 928 { 720, 576 }, 929 { 1440, 576 }, 930 { 2880, 576 }, 931 }; 932 933 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 934 return; 935 936 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 937 if ((mode->hdisplay == cea_interlaced[i].w) && 938 (mode->vdisplay == cea_interlaced[i].h / 2)) { 939 mode->vdisplay *= 2; 940 mode->vsync_start *= 2; 941 mode->vsync_end *= 2; 942 mode->vtotal *= 2; 943 mode->vtotal |= 1; 944 } 945 } 946 947 mode->flags |= DRM_MODE_FLAG_INTERLACE; 948 } 949 950 /** 951 * drm_mode_detailed - create a new mode from an EDID detailed timing section 952 * @dev: DRM device (needed to create new mode) 953 * @edid: EDID block 954 * @timing: EDID detailed timing info 955 * @quirks: quirks to apply 956 * 957 * An EDID detailed timing block contains enough info for us to create and 958 * return a new struct drm_display_mode. 959 */ 960 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 961 struct edid *edid, 962 struct detailed_timing *timing, 963 u32 quirks) 964 { 965 struct drm_display_mode *mode; 966 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 967 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 968 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 969 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 970 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 971 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 972 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 973 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 974 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 975 976 /* ignore tiny modes */ 977 if (hactive < 64 || vactive < 64) 978 return NULL; 979 980 if (pt->misc & DRM_EDID_PT_STEREO) { 981 printk(KERN_WARNING "stereo mode not supported\n"); 982 return NULL; 983 } 984 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 985 printk(KERN_WARNING "composite sync not supported\n"); 986 } 987 988 /* it is incorrect if hsync/vsync width is zero */ 989 if (!hsync_pulse_width || !vsync_pulse_width) { 990 DRM_DEBUG_KMS("Incorrect Detailed timing. " 991 "Wrong Hsync/Vsync pulse width\n"); 992 return NULL; 993 } 994 mode = drm_mode_create(dev); 995 if (!mode) 996 return NULL; 997 998 mode->type = DRM_MODE_TYPE_DRIVER; 999 1000 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1001 timing->pixel_clock = cpu_to_le16(1088); 1002 1003 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1004 1005 mode->hdisplay = hactive; 1006 mode->hsync_start = mode->hdisplay + hsync_offset; 1007 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1008 mode->htotal = mode->hdisplay + hblank; 1009 1010 mode->vdisplay = vactive; 1011 mode->vsync_start = mode->vdisplay + vsync_offset; 1012 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1013 mode->vtotal = mode->vdisplay + vblank; 1014 1015 /* Some EDIDs have bogus h/vtotal values */ 1016 if (mode->hsync_end > mode->htotal) 1017 mode->htotal = mode->hsync_end + 1; 1018 if (mode->vsync_end > mode->vtotal) 1019 mode->vtotal = mode->vsync_end + 1; 1020 1021 drm_mode_do_interlace_quirk(mode, pt); 1022 1023 drm_mode_set_name(mode); 1024 1025 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1026 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1027 } 1028 1029 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1030 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1031 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1032 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1033 1034 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1035 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1036 1037 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1038 mode->width_mm *= 10; 1039 mode->height_mm *= 10; 1040 } 1041 1042 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1043 mode->width_mm = edid->width_cm * 10; 1044 mode->height_mm = edid->height_cm * 10; 1045 } 1046 1047 return mode; 1048 } 1049 1050 /* 1051 * Detailed mode info for the EDID "established modes" data to use. 1052 */ 1053 static struct drm_display_mode edid_est_modes[] = { 1054 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 1055 968, 1056, 0, 600, 601, 605, 628, 0, 1056 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 1057 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 1058 896, 1024, 0, 600, 601, 603, 625, 0, 1059 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 1060 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 1061 720, 840, 0, 480, 481, 484, 500, 0, 1062 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 1063 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 1064 704, 832, 0, 480, 489, 491, 520, 0, 1065 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 1066 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 1067 768, 864, 0, 480, 483, 486, 525, 0, 1068 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 1069 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 1070 752, 800, 0, 480, 490, 492, 525, 0, 1071 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 1072 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 1073 846, 900, 0, 400, 421, 423, 449, 0, 1074 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 1075 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 1076 846, 900, 0, 400, 412, 414, 449, 0, 1077 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 1078 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 1079 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 1080 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 1081 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 1082 1136, 1312, 0, 768, 769, 772, 800, 0, 1083 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 1084 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 1085 1184, 1328, 0, 768, 771, 777, 806, 0, 1086 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 1087 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 1088 1184, 1344, 0, 768, 771, 777, 806, 0, 1089 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 1090 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 1091 1208, 1264, 0, 768, 768, 776, 817, 0, 1092 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 1093 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 1094 928, 1152, 0, 624, 625, 628, 667, 0, 1095 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 1096 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 1097 896, 1056, 0, 600, 601, 604, 625, 0, 1098 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 1099 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 1100 976, 1040, 0, 600, 637, 643, 666, 0, 1101 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 1102 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 1103 1344, 1600, 0, 864, 865, 868, 900, 0, 1104 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 1105 }; 1106 1107 /** 1108 * add_established_modes - get est. modes from EDID and add them 1109 * @edid: EDID block to scan 1110 * 1111 * Each EDID block contains a bitmap of the supported "established modes" list 1112 * (defined above). Tease them out and add them to the global modes list. 1113 */ 1114 static int add_established_modes(struct drm_connector *connector, struct edid *edid) 1115 { 1116 struct drm_device *dev = connector->dev; 1117 unsigned long est_bits = edid->established_timings.t1 | 1118 (edid->established_timings.t2 << 8) | 1119 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 1120 int i, modes = 0; 1121 1122 for (i = 0; i <= EDID_EST_TIMINGS; i++) 1123 if (est_bits & (1<<i)) { 1124 struct drm_display_mode *newmode; 1125 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 1126 if (newmode) { 1127 drm_mode_probed_add(connector, newmode); 1128 modes++; 1129 } 1130 } 1131 1132 return modes; 1133 } 1134 1135 /** 1136 * add_standard_modes - get std. modes from EDID and add them 1137 * @edid: EDID block to scan 1138 * 1139 * Standard modes can be calculated using the CVT standard. Grab them from 1140 * @edid, calculate them, and add them to the list. 1141 */ 1142 static int add_standard_modes(struct drm_connector *connector, struct edid *edid) 1143 { 1144 int i, modes = 0; 1145 1146 for (i = 0; i < EDID_STD_TIMINGS; i++) { 1147 struct drm_display_mode *newmode; 1148 1149 newmode = drm_mode_std(connector, edid, 1150 &edid->standard_timings[i], 1151 edid->revision); 1152 if (newmode) { 1153 drm_mode_probed_add(connector, newmode); 1154 modes++; 1155 } 1156 } 1157 1158 return modes; 1159 } 1160 1161 static bool 1162 mode_is_rb(struct drm_display_mode *mode) 1163 { 1164 return (mode->htotal - mode->hdisplay == 160) && 1165 (mode->hsync_end - mode->hdisplay == 80) && 1166 (mode->hsync_end - mode->hsync_start == 32) && 1167 (mode->vsync_start - mode->vdisplay == 3); 1168 } 1169 1170 static bool 1171 mode_in_hsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t) 1172 { 1173 int hsync, hmin, hmax; 1174 1175 hmin = t[7]; 1176 if (edid->revision >= 4) 1177 hmin += ((t[4] & 0x04) ? 255 : 0); 1178 hmax = t[8]; 1179 if (edid->revision >= 4) 1180 hmax += ((t[4] & 0x08) ? 255 : 0); 1181 hsync = drm_mode_hsync(mode); 1182 1183 return (hsync <= hmax && hsync >= hmin); 1184 } 1185 1186 static bool 1187 mode_in_vsync_range(struct drm_display_mode *mode, struct edid *edid, u8 *t) 1188 { 1189 int vsync, vmin, vmax; 1190 1191 vmin = t[5]; 1192 if (edid->revision >= 4) 1193 vmin += ((t[4] & 0x01) ? 255 : 0); 1194 vmax = t[6]; 1195 if (edid->revision >= 4) 1196 vmax += ((t[4] & 0x02) ? 255 : 0); 1197 vsync = drm_mode_vrefresh(mode); 1198 1199 return (vsync <= vmax && vsync >= vmin); 1200 } 1201 1202 static u32 1203 range_pixel_clock(struct edid *edid, u8 *t) 1204 { 1205 /* unspecified */ 1206 if (t[9] == 0 || t[9] == 255) 1207 return 0; 1208 1209 /* 1.4 with CVT support gives us real precision, yay */ 1210 if (edid->revision >= 4 && t[10] == 0x04) 1211 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1212 1213 /* 1.3 is pathetic, so fuzz up a bit */ 1214 return t[9] * 10000 + 5001; 1215 } 1216 1217 static bool 1218 mode_in_range(struct drm_display_mode *mode, struct edid *edid, 1219 struct detailed_timing *timing) 1220 { 1221 u32 max_clock; 1222 u8 *t = (u8 *)timing; 1223 1224 if (!mode_in_hsync_range(mode, edid, t)) 1225 return false; 1226 1227 if (!mode_in_vsync_range(mode, edid, t)) 1228 return false; 1229 1230 if ((max_clock = range_pixel_clock(edid, t))) 1231 if (mode->clock > max_clock) 1232 return false; 1233 1234 /* 1.4 max horizontal check */ 1235 if (edid->revision >= 4 && t[10] == 0x04) 1236 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1237 return false; 1238 1239 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1240 return false; 1241 1242 return true; 1243 } 1244 1245 /* 1246 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will 1247 * need to account for them. 1248 */ 1249 static int 1250 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1251 struct detailed_timing *timing) 1252 { 1253 int i, modes = 0; 1254 struct drm_display_mode *newmode; 1255 struct drm_device *dev = connector->dev; 1256 1257 for (i = 0; i < drm_num_dmt_modes; i++) { 1258 if (mode_in_range(drm_dmt_modes + i, edid, timing)) { 1259 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1260 if (newmode) { 1261 drm_mode_probed_add(connector, newmode); 1262 modes++; 1263 } 1264 } 1265 } 1266 1267 return modes; 1268 } 1269 1270 static int drm_cvt_modes(struct drm_connector *connector, 1271 struct detailed_timing *timing) 1272 { 1273 int i, j, modes = 0; 1274 struct drm_display_mode *newmode; 1275 struct drm_device *dev = connector->dev; 1276 struct cvt_timing *cvt; 1277 const int rates[] = { 60, 85, 75, 60, 50 }; 1278 const u8 empty[3] = { 0, 0, 0 }; 1279 1280 for (i = 0; i < 4; i++) { 1281 int uninitialized_var(width), height; 1282 cvt = &(timing->data.other_data.data.cvt[i]); 1283 1284 if (!memcmp(cvt->code, empty, 3)) 1285 continue; 1286 1287 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 1288 switch (cvt->code[1] & 0x0c) { 1289 case 0x00: 1290 width = height * 4 / 3; 1291 break; 1292 case 0x04: 1293 width = height * 16 / 9; 1294 break; 1295 case 0x08: 1296 width = height * 16 / 10; 1297 break; 1298 case 0x0c: 1299 width = height * 15 / 9; 1300 break; 1301 } 1302 1303 for (j = 1; j < 5; j++) { 1304 if (cvt->code[2] & (1 << j)) { 1305 newmode = drm_cvt_mode(dev, width, height, 1306 rates[j], j == 0, 1307 false, false); 1308 if (newmode) { 1309 drm_mode_probed_add(connector, newmode); 1310 modes++; 1311 } 1312 } 1313 } 1314 } 1315 1316 return modes; 1317 } 1318 1319 static const struct { 1320 short w; 1321 short h; 1322 short r; 1323 short rb; 1324 } est3_modes[] = { 1325 /* byte 6 */ 1326 { 640, 350, 85, 0 }, 1327 { 640, 400, 85, 0 }, 1328 { 720, 400, 85, 0 }, 1329 { 640, 480, 85, 0 }, 1330 { 848, 480, 60, 0 }, 1331 { 800, 600, 85, 0 }, 1332 { 1024, 768, 85, 0 }, 1333 { 1152, 864, 75, 0 }, 1334 /* byte 7 */ 1335 { 1280, 768, 60, 1 }, 1336 { 1280, 768, 60, 0 }, 1337 { 1280, 768, 75, 0 }, 1338 { 1280, 768, 85, 0 }, 1339 { 1280, 960, 60, 0 }, 1340 { 1280, 960, 85, 0 }, 1341 { 1280, 1024, 60, 0 }, 1342 { 1280, 1024, 85, 0 }, 1343 /* byte 8 */ 1344 { 1360, 768, 60, 0 }, 1345 { 1440, 900, 60, 1 }, 1346 { 1440, 900, 60, 0 }, 1347 { 1440, 900, 75, 0 }, 1348 { 1440, 900, 85, 0 }, 1349 { 1400, 1050, 60, 1 }, 1350 { 1400, 1050, 60, 0 }, 1351 { 1400, 1050, 75, 0 }, 1352 /* byte 9 */ 1353 { 1400, 1050, 85, 0 }, 1354 { 1680, 1050, 60, 1 }, 1355 { 1680, 1050, 60, 0 }, 1356 { 1680, 1050, 75, 0 }, 1357 { 1680, 1050, 85, 0 }, 1358 { 1600, 1200, 60, 0 }, 1359 { 1600, 1200, 65, 0 }, 1360 { 1600, 1200, 70, 0 }, 1361 /* byte 10 */ 1362 { 1600, 1200, 75, 0 }, 1363 { 1600, 1200, 85, 0 }, 1364 { 1792, 1344, 60, 0 }, 1365 { 1792, 1344, 85, 0 }, 1366 { 1856, 1392, 60, 0 }, 1367 { 1856, 1392, 75, 0 }, 1368 { 1920, 1200, 60, 1 }, 1369 { 1920, 1200, 60, 0 }, 1370 /* byte 11 */ 1371 { 1920, 1200, 75, 0 }, 1372 { 1920, 1200, 85, 0 }, 1373 { 1920, 1440, 60, 0 }, 1374 { 1920, 1440, 75, 0 }, 1375 }; 1376 1377 static int 1378 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1379 { 1380 int i, j, m, modes = 0; 1381 struct drm_display_mode *mode; 1382 u8 *est = ((u8 *)timing) + 5; 1383 1384 for (i = 0; i < 6; i++) { 1385 for (j = 7; j > 0; j--) { 1386 m = (i * 8) + (7 - j); 1387 if (m >= ARRAY_SIZE(est3_modes)) 1388 break; 1389 if (est[i] & (1 << j)) { 1390 mode = drm_mode_find_dmt(connector->dev, 1391 est3_modes[m].w, 1392 est3_modes[m].h, 1393 est3_modes[m].r 1394 /*, est3_modes[m].rb */); 1395 if (mode) { 1396 drm_mode_probed_add(connector, mode); 1397 modes++; 1398 } 1399 } 1400 } 1401 } 1402 1403 return modes; 1404 } 1405 1406 static int add_detailed_modes(struct drm_connector *connector, 1407 struct detailed_timing *timing, 1408 struct edid *edid, u32 quirks, int preferred) 1409 { 1410 int i, modes = 0; 1411 struct detailed_non_pixel *data = &timing->data.other_data; 1412 int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); 1413 struct drm_display_mode *newmode; 1414 struct drm_device *dev = connector->dev; 1415 1416 if (timing->pixel_clock) { 1417 newmode = drm_mode_detailed(dev, edid, timing, quirks); 1418 if (!newmode) 1419 return 0; 1420 1421 if (preferred) 1422 newmode->type |= DRM_MODE_TYPE_PREFERRED; 1423 1424 drm_mode_probed_add(connector, newmode); 1425 return 1; 1426 } 1427 1428 /* other timing types */ 1429 switch (data->type) { 1430 case EDID_DETAIL_MONITOR_RANGE: 1431 if (gtf) 1432 modes += drm_gtf_modes_for_range(connector, edid, 1433 timing); 1434 break; 1435 case EDID_DETAIL_STD_MODES: 1436 /* Six modes per detailed section */ 1437 for (i = 0; i < 6; i++) { 1438 struct std_timing *std; 1439 struct drm_display_mode *newmode; 1440 1441 std = &data->data.timings[i]; 1442 newmode = drm_mode_std(connector, edid, std, 1443 edid->revision); 1444 if (newmode) { 1445 drm_mode_probed_add(connector, newmode); 1446 modes++; 1447 } 1448 } 1449 break; 1450 case EDID_DETAIL_CVT_3BYTE: 1451 modes += drm_cvt_modes(connector, timing); 1452 break; 1453 case EDID_DETAIL_EST_TIMINGS: 1454 modes += drm_est3_modes(connector, timing); 1455 break; 1456 default: 1457 break; 1458 } 1459 1460 return modes; 1461 } 1462 1463 /** 1464 * add_detailed_info - get detailed mode info from EDID data 1465 * @connector: attached connector 1466 * @edid: EDID block to scan 1467 * @quirks: quirks to apply 1468 * 1469 * Some of the detailed timing sections may contain mode information. Grab 1470 * it and add it to the list. 1471 */ 1472 static int add_detailed_info(struct drm_connector *connector, 1473 struct edid *edid, u32 quirks) 1474 { 1475 int i, modes = 0; 1476 1477 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { 1478 struct detailed_timing *timing = &edid->detailed_timings[i]; 1479 int preferred = (i == 0); 1480 1481 if (preferred && edid->version == 1 && edid->revision < 4) 1482 preferred = (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 1483 1484 /* In 1.0, only timings are allowed */ 1485 if (!timing->pixel_clock && edid->version == 1 && 1486 edid->revision == 0) 1487 continue; 1488 1489 modes += add_detailed_modes(connector, timing, edid, quirks, 1490 preferred); 1491 } 1492 1493 return modes; 1494 } 1495 1496 /** 1497 * add_detailed_mode_eedid - get detailed mode info from addtional timing 1498 * EDID block 1499 * @connector: attached connector 1500 * @edid: EDID block to scan(It is only to get addtional timing EDID block) 1501 * @quirks: quirks to apply 1502 * 1503 * Some of the detailed timing sections may contain mode information. Grab 1504 * it and add it to the list. 1505 */ 1506 static int add_detailed_info_eedid(struct drm_connector *connector, 1507 struct edid *edid, u32 quirks) 1508 { 1509 int i, modes = 0; 1510 char *edid_ext = NULL; 1511 struct detailed_timing *timing; 1512 int start_offset, end_offset; 1513 1514 if (edid->version == 1 && edid->revision < 3) 1515 return 0; 1516 if (!edid->extensions) 1517 return 0; 1518 1519 /* Find CEA extension */ 1520 for (i = 0; i < edid->extensions; i++) { 1521 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1522 if (edid_ext[0] == 0x02) 1523 break; 1524 } 1525 1526 if (i == edid->extensions) 1527 return 0; 1528 1529 /* Get the start offset of detailed timing block */ 1530 start_offset = edid_ext[2]; 1531 if (start_offset == 0) { 1532 /* If the start_offset is zero, it means that neither detailed 1533 * info nor data block exist. In such case it is also 1534 * unnecessary to parse the detailed timing info. 1535 */ 1536 return 0; 1537 } 1538 1539 end_offset = EDID_LENGTH; 1540 end_offset -= sizeof(struct detailed_timing); 1541 for (i = start_offset; i < end_offset; 1542 i += sizeof(struct detailed_timing)) { 1543 timing = (struct detailed_timing *)(edid_ext + i); 1544 modes += add_detailed_modes(connector, timing, edid, quirks, 0); 1545 } 1546 1547 return modes; 1548 } 1549 1550 #define HDMI_IDENTIFIER 0x000C03 1551 #define VENDOR_BLOCK 0x03 1552 /** 1553 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1554 * @edid: monitor EDID information 1555 * 1556 * Parse the CEA extension according to CEA-861-B. 1557 * Return true if HDMI, false if not or unknown. 1558 */ 1559 bool drm_detect_hdmi_monitor(struct edid *edid) 1560 { 1561 char *edid_ext = NULL; 1562 int i, hdmi_id; 1563 int start_offset, end_offset; 1564 bool is_hdmi = false; 1565 1566 /* No EDID or EDID extensions */ 1567 if (edid == NULL || edid->extensions == 0) 1568 goto end; 1569 1570 /* Find CEA extension */ 1571 for (i = 0; i < edid->extensions; i++) { 1572 edid_ext = (char *)edid + EDID_LENGTH * (i + 1); 1573 /* This block is CEA extension */ 1574 if (edid_ext[0] == 0x02) 1575 break; 1576 } 1577 1578 if (i == edid->extensions) 1579 goto end; 1580 1581 /* Data block offset in CEA extension block */ 1582 start_offset = 4; 1583 end_offset = edid_ext[2]; 1584 1585 /* 1586 * Because HDMI identifier is in Vendor Specific Block, 1587 * search it from all data blocks of CEA extension. 1588 */ 1589 for (i = start_offset; i < end_offset; 1590 /* Increased by data block len */ 1591 i += ((edid_ext[i] & 0x1f) + 1)) { 1592 /* Find vendor specific block */ 1593 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1594 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1595 edid_ext[i + 3] << 16; 1596 /* Find HDMI identifier */ 1597 if (hdmi_id == HDMI_IDENTIFIER) 1598 is_hdmi = true; 1599 break; 1600 } 1601 } 1602 1603 end: 1604 return is_hdmi; 1605 } 1606 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 1607 1608 /** 1609 * drm_add_edid_modes - add modes from EDID data, if available 1610 * @connector: connector we're probing 1611 * @edid: edid data 1612 * 1613 * Add the specified modes to the connector's mode list. 1614 * 1615 * Return number of modes added or 0 if we couldn't find any. 1616 */ 1617 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1618 { 1619 int num_modes = 0; 1620 u32 quirks; 1621 1622 if (edid == NULL) { 1623 return 0; 1624 } 1625 if (!drm_edid_is_valid(edid)) { 1626 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 1627 drm_get_connector_name(connector)); 1628 return 0; 1629 } 1630 1631 quirks = edid_get_quirks(edid); 1632 1633 /* 1634 * EDID spec says modes should be preferred in this order: 1635 * - preferred detailed mode 1636 * - other detailed modes from base block 1637 * - detailed modes from extension blocks 1638 * - CVT 3-byte code modes 1639 * - standard timing codes 1640 * - established timing codes 1641 * - modes inferred from GTF or CVT range information 1642 * 1643 * We don't quite implement this yet, but we're close. 1644 * 1645 * XXX order for additional mode types in extension blocks? 1646 */ 1647 num_modes += add_detailed_info(connector, edid, quirks); 1648 num_modes += add_detailed_info_eedid(connector, edid, quirks); 1649 num_modes += add_standard_modes(connector, edid); 1650 num_modes += add_established_modes(connector, edid); 1651 1652 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1653 edid_fixup_preferred(connector, quirks); 1654 1655 connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; 1656 connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; 1657 connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; 1658 connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; 1659 connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; 1660 connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; 1661 connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; 1662 connector->display_info.width_mm = edid->width_cm * 10; 1663 connector->display_info.height_mm = edid->height_cm * 10; 1664 connector->display_info.gamma = edid->gamma; 1665 connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; 1666 connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; 1667 connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; 1668 connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; 1669 connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; 1670 connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; 1671 connector->display_info.gamma = edid->gamma; 1672 1673 return num_modes; 1674 } 1675 EXPORT_SYMBOL(drm_add_edid_modes); 1676 1677 /** 1678 * drm_add_modes_noedid - add modes for the connectors without EDID 1679 * @connector: connector we're probing 1680 * @hdisplay: the horizontal display limit 1681 * @vdisplay: the vertical display limit 1682 * 1683 * Add the specified modes to the connector's mode list. Only when the 1684 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1685 * 1686 * Return number of modes added or 0 if we couldn't find any. 1687 */ 1688 int drm_add_modes_noedid(struct drm_connector *connector, 1689 int hdisplay, int vdisplay) 1690 { 1691 int i, count, num_modes = 0; 1692 struct drm_display_mode *mode, *ptr; 1693 struct drm_device *dev = connector->dev; 1694 1695 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1696 if (hdisplay < 0) 1697 hdisplay = 0; 1698 if (vdisplay < 0) 1699 vdisplay = 0; 1700 1701 for (i = 0; i < count; i++) { 1702 ptr = &drm_dmt_modes[i]; 1703 if (hdisplay && vdisplay) { 1704 /* 1705 * Only when two are valid, they will be used to check 1706 * whether the mode should be added to the mode list of 1707 * the connector. 1708 */ 1709 if (ptr->hdisplay > hdisplay || 1710 ptr->vdisplay > vdisplay) 1711 continue; 1712 } 1713 if (drm_mode_vrefresh(ptr) > 61) 1714 continue; 1715 mode = drm_mode_duplicate(dev, ptr); 1716 if (mode) { 1717 drm_mode_probed_add(connector, mode); 1718 num_modes++; 1719 } 1720 } 1721 return num_modes; 1722 } 1723 EXPORT_SYMBOL(drm_add_modes_noedid); 1724