1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/slab.h> 32 #include <linux/hdmi.h> 33 #include <linux/i2c.h> 34 #include <linux/module.h> 35 #include <drm/drmP.h> 36 #include <drm/drm_edid.h> 37 38 #define version_greater(edid, maj, min) \ 39 (((edid)->version > (maj)) || \ 40 ((edid)->version == (maj) && (edid)->revision > (min))) 41 42 #define EDID_EST_TIMINGS 16 43 #define EDID_STD_TIMINGS 8 44 #define EDID_DETAILED_TIMINGS 4 45 46 /* 47 * EDID blocks out in the wild have a variety of bugs, try to collect 48 * them here (note that userspace may work around broken monitors first, 49 * but fixes should make their way here so that the kernel "just works" 50 * on as many displays as possible). 51 */ 52 53 /* First detailed mode wrong, use largest 60Hz mode */ 54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 55 /* Reported 135MHz pixel clock is too high, needs adjustment */ 56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 57 /* Prefer the largest mode at 75 Hz */ 58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 59 /* Detail timing is in cm not mm */ 60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 61 /* Detailed timing descriptors have bogus size values, so just take the 62 * maximum size and use that. 63 */ 64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 65 /* Monitor forgot to set the first detailed is preferred bit. */ 66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 67 /* use +hsync +vsync for detailed mode */ 68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 69 /* Force reduced-blanking timings for detailed modes */ 70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) 71 72 struct detailed_mode_closure { 73 struct drm_connector *connector; 74 struct edid *edid; 75 bool preferred; 76 u32 quirks; 77 int modes; 78 }; 79 80 #define LEVEL_DMT 0 81 #define LEVEL_GTF 1 82 #define LEVEL_GTF2 2 83 #define LEVEL_CVT 3 84 85 static struct edid_quirk { 86 char vendor[4]; 87 int product_id; 88 u32 quirks; 89 } edid_quirk_list[] = { 90 /* Acer AL1706 */ 91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 92 /* Acer F51 */ 93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 94 /* Unknown Acer */ 95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 96 97 /* Belinea 10 15 55 */ 98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 100 101 /* Envision Peripherals, Inc. EN-7100e */ 102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 103 /* Envision EN2028 */ 104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 105 106 /* Funai Electronics PM36B */ 107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 108 EDID_QUIRK_DETAILED_IN_CM }, 109 110 /* LG Philips LCD LP154W01-A5 */ 111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 113 114 /* Philips 107p5 CRT */ 115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 116 117 /* Proview AY765C */ 118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 119 120 /* Samsung SyncMaster 205BW. Note: irony */ 121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 122 /* Samsung SyncMaster 22[5-6]BW */ 123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 125 126 /* ViewSonic VA2026w */ 127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, 128 }; 129 130 /* 131 * Autogenerated from the DMT spec. 132 * This table is copied from xfree86/modes/xf86EdidModes.c. 133 */ 134 static const struct drm_display_mode drm_dmt_modes[] = { 135 /* 640x350@85Hz */ 136 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 137 736, 832, 0, 350, 382, 385, 445, 0, 138 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 139 /* 640x400@85Hz */ 140 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 141 736, 832, 0, 400, 401, 404, 445, 0, 142 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 143 /* 720x400@85Hz */ 144 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 145 828, 936, 0, 400, 401, 404, 446, 0, 146 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 147 /* 640x480@60Hz */ 148 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 149 752, 800, 0, 480, 489, 492, 525, 0, 150 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 151 /* 640x480@72Hz */ 152 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 153 704, 832, 0, 480, 489, 492, 520, 0, 154 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 155 /* 640x480@75Hz */ 156 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 157 720, 840, 0, 480, 481, 484, 500, 0, 158 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 159 /* 640x480@85Hz */ 160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 161 752, 832, 0, 480, 481, 484, 509, 0, 162 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 163 /* 800x600@56Hz */ 164 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 165 896, 1024, 0, 600, 601, 603, 625, 0, 166 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 167 /* 800x600@60Hz */ 168 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 169 968, 1056, 0, 600, 601, 605, 628, 0, 170 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 171 /* 800x600@72Hz */ 172 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 173 976, 1040, 0, 600, 637, 643, 666, 0, 174 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 175 /* 800x600@75Hz */ 176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 177 896, 1056, 0, 600, 601, 604, 625, 0, 178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 179 /* 800x600@85Hz */ 180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 181 896, 1048, 0, 600, 601, 604, 631, 0, 182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 183 /* 800x600@120Hz RB */ 184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, 185 880, 960, 0, 600, 603, 607, 636, 0, 186 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 187 /* 848x480@60Hz */ 188 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 189 976, 1088, 0, 480, 486, 494, 517, 0, 190 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 191 /* 1024x768@43Hz, interlace */ 192 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 193 1208, 1264, 0, 768, 768, 772, 817, 0, 194 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 195 DRM_MODE_FLAG_INTERLACE) }, 196 /* 1024x768@60Hz */ 197 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 198 1184, 1344, 0, 768, 771, 777, 806, 0, 199 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 200 /* 1024x768@70Hz */ 201 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 202 1184, 1328, 0, 768, 771, 777, 806, 0, 203 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 204 /* 1024x768@75Hz */ 205 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 206 1136, 1312, 0, 768, 769, 772, 800, 0, 207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 208 /* 1024x768@85Hz */ 209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 210 1168, 1376, 0, 768, 769, 772, 808, 0, 211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 212 /* 1024x768@120Hz RB */ 213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, 214 1104, 1184, 0, 768, 771, 775, 813, 0, 215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 216 /* 1152x864@75Hz */ 217 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 218 1344, 1600, 0, 864, 865, 868, 900, 0, 219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 220 /* 1280x768@60Hz RB */ 221 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, 222 1360, 1440, 0, 768, 771, 778, 790, 0, 223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 224 /* 1280x768@60Hz */ 225 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 226 1472, 1664, 0, 768, 771, 778, 798, 0, 227 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 228 /* 1280x768@75Hz */ 229 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 230 1488, 1696, 0, 768, 771, 778, 805, 0, 231 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 232 /* 1280x768@85Hz */ 233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 234 1496, 1712, 0, 768, 771, 778, 809, 0, 235 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 236 /* 1280x768@120Hz RB */ 237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, 238 1360, 1440, 0, 768, 771, 778, 813, 0, 239 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 240 /* 1280x800@60Hz RB */ 241 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, 242 1360, 1440, 0, 800, 803, 809, 823, 0, 243 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 244 /* 1280x800@60Hz */ 245 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 246 1480, 1680, 0, 800, 803, 809, 831, 0, 247 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 248 /* 1280x800@75Hz */ 249 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 250 1488, 1696, 0, 800, 803, 809, 838, 0, 251 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 252 /* 1280x800@85Hz */ 253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 254 1496, 1712, 0, 800, 803, 809, 843, 0, 255 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 256 /* 1280x800@120Hz RB */ 257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, 258 1360, 1440, 0, 800, 803, 809, 847, 0, 259 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 260 /* 1280x960@60Hz */ 261 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 262 1488, 1800, 0, 960, 961, 964, 1000, 0, 263 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 264 /* 1280x960@85Hz */ 265 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 266 1504, 1728, 0, 960, 961, 964, 1011, 0, 267 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 268 /* 1280x960@120Hz RB */ 269 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, 270 1360, 1440, 0, 960, 963, 967, 1017, 0, 271 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 272 /* 1280x1024@60Hz */ 273 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 274 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 275 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 276 /* 1280x1024@75Hz */ 277 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 278 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 279 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 280 /* 1280x1024@85Hz */ 281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 282 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 283 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 284 /* 1280x1024@120Hz RB */ 285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, 286 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, 287 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 288 /* 1360x768@60Hz */ 289 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 290 1536, 1792, 0, 768, 771, 777, 795, 0, 291 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 292 /* 1360x768@120Hz RB */ 293 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, 294 1440, 1520, 0, 768, 771, 776, 813, 0, 295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 296 /* 1400x1050@60Hz RB */ 297 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, 298 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, 299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 300 /* 1400x1050@60Hz */ 301 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 302 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 303 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 304 /* 1400x1050@75Hz */ 305 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 306 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 307 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 308 /* 1400x1050@85Hz */ 309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 310 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 311 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 312 /* 1400x1050@120Hz RB */ 313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, 314 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, 315 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 316 /* 1440x900@60Hz RB */ 317 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, 318 1520, 1600, 0, 900, 903, 909, 926, 0, 319 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 320 /* 1440x900@60Hz */ 321 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 322 1672, 1904, 0, 900, 903, 909, 934, 0, 323 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 324 /* 1440x900@75Hz */ 325 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 326 1688, 1936, 0, 900, 903, 909, 942, 0, 327 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 328 /* 1440x900@85Hz */ 329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 330 1696, 1952, 0, 900, 903, 909, 948, 0, 331 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 332 /* 1440x900@120Hz RB */ 333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, 334 1520, 1600, 0, 900, 903, 909, 953, 0, 335 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 336 /* 1600x1200@60Hz */ 337 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 338 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 339 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 340 /* 1600x1200@65Hz */ 341 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 342 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 344 /* 1600x1200@70Hz */ 345 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 346 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 347 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 348 /* 1600x1200@75Hz */ 349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 352 /* 1600x1200@85Hz */ 353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 355 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 356 /* 1600x1200@120Hz RB */ 357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, 358 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, 359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 360 /* 1680x1050@60Hz RB */ 361 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, 362 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, 363 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 364 /* 1680x1050@60Hz */ 365 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 366 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 367 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 368 /* 1680x1050@75Hz */ 369 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 370 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 371 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 372 /* 1680x1050@85Hz */ 373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 374 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 375 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 376 /* 1680x1050@120Hz RB */ 377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, 378 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, 379 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 380 /* 1792x1344@60Hz */ 381 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 382 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 384 /* 1792x1344@75Hz */ 385 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 386 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 387 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 388 /* 1792x1344@120Hz RB */ 389 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, 390 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, 391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 392 /* 1856x1392@60Hz */ 393 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 394 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 396 /* 1856x1392@75Hz */ 397 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 398 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 400 /* 1856x1392@120Hz RB */ 401 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, 402 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, 403 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 404 /* 1920x1200@60Hz RB */ 405 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, 406 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, 407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 408 /* 1920x1200@60Hz */ 409 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 410 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 411 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 412 /* 1920x1200@75Hz */ 413 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 414 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 415 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 416 /* 1920x1200@85Hz */ 417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 418 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 419 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 420 /* 1920x1200@120Hz RB */ 421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, 422 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, 423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 424 /* 1920x1440@60Hz */ 425 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 426 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 428 /* 1920x1440@75Hz */ 429 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 430 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 432 /* 1920x1440@120Hz RB */ 433 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, 434 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, 435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 436 /* 2560x1600@60Hz RB */ 437 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, 438 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, 439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 440 /* 2560x1600@60Hz */ 441 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 442 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 444 /* 2560x1600@75HZ */ 445 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 446 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 448 /* 2560x1600@85HZ */ 449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 450 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 452 /* 2560x1600@120Hz RB */ 453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, 454 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, 455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 456 }; 457 458 static const struct drm_display_mode edid_est_modes[] = { 459 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 460 968, 1056, 0, 600, 601, 605, 628, 0, 461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 463 896, 1024, 0, 600, 601, 603, 625, 0, 464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 465 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 466 720, 840, 0, 480, 481, 484, 500, 0, 467 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 469 704, 832, 0, 480, 489, 491, 520, 0, 470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 472 768, 864, 0, 480, 483, 486, 525, 0, 473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 475 752, 800, 0, 480, 490, 492, 525, 0, 476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 477 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 478 846, 900, 0, 400, 421, 423, 449, 0, 479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 481 846, 900, 0, 400, 412, 414, 449, 0, 482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 483 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 484 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 487 1136, 1312, 0, 768, 769, 772, 800, 0, 488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 490 1184, 1328, 0, 768, 771, 777, 806, 0, 491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 493 1184, 1344, 0, 768, 771, 777, 806, 0, 494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 495 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 496 1208, 1264, 0, 768, 768, 776, 817, 0, 497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 498 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 499 928, 1152, 0, 624, 625, 628, 667, 0, 500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 501 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 502 896, 1056, 0, 600, 601, 604, 625, 0, 503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 505 976, 1040, 0, 600, 637, 643, 666, 0, 506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 507 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 508 1344, 1600, 0, 864, 865, 868, 900, 0, 509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 510 }; 511 512 struct minimode { 513 short w; 514 short h; 515 short r; 516 short rb; 517 }; 518 519 static const struct minimode est3_modes[] = { 520 /* byte 6 */ 521 { 640, 350, 85, 0 }, 522 { 640, 400, 85, 0 }, 523 { 720, 400, 85, 0 }, 524 { 640, 480, 85, 0 }, 525 { 848, 480, 60, 0 }, 526 { 800, 600, 85, 0 }, 527 { 1024, 768, 85, 0 }, 528 { 1152, 864, 75, 0 }, 529 /* byte 7 */ 530 { 1280, 768, 60, 1 }, 531 { 1280, 768, 60, 0 }, 532 { 1280, 768, 75, 0 }, 533 { 1280, 768, 85, 0 }, 534 { 1280, 960, 60, 0 }, 535 { 1280, 960, 85, 0 }, 536 { 1280, 1024, 60, 0 }, 537 { 1280, 1024, 85, 0 }, 538 /* byte 8 */ 539 { 1360, 768, 60, 0 }, 540 { 1440, 900, 60, 1 }, 541 { 1440, 900, 60, 0 }, 542 { 1440, 900, 75, 0 }, 543 { 1440, 900, 85, 0 }, 544 { 1400, 1050, 60, 1 }, 545 { 1400, 1050, 60, 0 }, 546 { 1400, 1050, 75, 0 }, 547 /* byte 9 */ 548 { 1400, 1050, 85, 0 }, 549 { 1680, 1050, 60, 1 }, 550 { 1680, 1050, 60, 0 }, 551 { 1680, 1050, 75, 0 }, 552 { 1680, 1050, 85, 0 }, 553 { 1600, 1200, 60, 0 }, 554 { 1600, 1200, 65, 0 }, 555 { 1600, 1200, 70, 0 }, 556 /* byte 10 */ 557 { 1600, 1200, 75, 0 }, 558 { 1600, 1200, 85, 0 }, 559 { 1792, 1344, 60, 0 }, 560 { 1792, 1344, 85, 0 }, 561 { 1856, 1392, 60, 0 }, 562 { 1856, 1392, 75, 0 }, 563 { 1920, 1200, 60, 1 }, 564 { 1920, 1200, 60, 0 }, 565 /* byte 11 */ 566 { 1920, 1200, 75, 0 }, 567 { 1920, 1200, 85, 0 }, 568 { 1920, 1440, 60, 0 }, 569 { 1920, 1440, 75, 0 }, 570 }; 571 572 static const struct minimode extra_modes[] = { 573 { 1024, 576, 60, 0 }, 574 { 1366, 768, 60, 0 }, 575 { 1600, 900, 60, 0 }, 576 { 1680, 945, 60, 0 }, 577 { 1920, 1080, 60, 0 }, 578 { 2048, 1152, 60, 0 }, 579 { 2048, 1536, 60, 0 }, 580 }; 581 582 /* 583 * Probably taken from CEA-861 spec. 584 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. 585 */ 586 static const struct drm_display_mode edid_cea_modes[] = { 587 /* 1 - 640x480@60Hz */ 588 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 589 752, 800, 0, 480, 490, 492, 525, 0, 590 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 591 /* 2 - 720x480@60Hz */ 592 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 593 798, 858, 0, 480, 489, 495, 525, 0, 594 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 595 /* 3 - 720x480@60Hz */ 596 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 597 798, 858, 0, 480, 489, 495, 525, 0, 598 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 599 /* 4 - 1280x720@60Hz */ 600 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 601 1430, 1650, 0, 720, 725, 730, 750, 0, 602 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 603 /* 5 - 1920x1080i@60Hz */ 604 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 605 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 607 DRM_MODE_FLAG_INTERLACE) }, 608 /* 6 - 1440x480i@60Hz */ 609 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 610 1602, 1716, 0, 480, 488, 494, 525, 0, 611 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 612 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 613 /* 7 - 1440x480i@60Hz */ 614 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 615 1602, 1716, 0, 480, 488, 494, 525, 0, 616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 617 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 618 /* 8 - 1440x240@60Hz */ 619 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 620 1602, 1716, 0, 240, 244, 247, 262, 0, 621 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 622 DRM_MODE_FLAG_DBLCLK) }, 623 /* 9 - 1440x240@60Hz */ 624 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 625 1602, 1716, 0, 240, 244, 247, 262, 0, 626 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 627 DRM_MODE_FLAG_DBLCLK) }, 628 /* 10 - 2880x480i@60Hz */ 629 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 630 3204, 3432, 0, 480, 488, 494, 525, 0, 631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 632 DRM_MODE_FLAG_INTERLACE) }, 633 /* 11 - 2880x480i@60Hz */ 634 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 635 3204, 3432, 0, 480, 488, 494, 525, 0, 636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 637 DRM_MODE_FLAG_INTERLACE) }, 638 /* 12 - 2880x240@60Hz */ 639 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 640 3204, 3432, 0, 240, 244, 247, 262, 0, 641 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 642 /* 13 - 2880x240@60Hz */ 643 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 644 3204, 3432, 0, 240, 244, 247, 262, 0, 645 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 646 /* 14 - 1440x480@60Hz */ 647 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 648 1596, 1716, 0, 480, 489, 495, 525, 0, 649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 650 /* 15 - 1440x480@60Hz */ 651 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 652 1596, 1716, 0, 480, 489, 495, 525, 0, 653 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 654 /* 16 - 1920x1080@60Hz */ 655 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 656 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 657 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 658 /* 17 - 720x576@50Hz */ 659 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 660 796, 864, 0, 576, 581, 586, 625, 0, 661 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 662 /* 18 - 720x576@50Hz */ 663 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 664 796, 864, 0, 576, 581, 586, 625, 0, 665 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 666 /* 19 - 1280x720@50Hz */ 667 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 668 1760, 1980, 0, 720, 725, 730, 750, 0, 669 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 670 /* 20 - 1920x1080i@50Hz */ 671 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 672 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 673 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 674 DRM_MODE_FLAG_INTERLACE) }, 675 /* 21 - 1440x576i@50Hz */ 676 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 677 1590, 1728, 0, 576, 580, 586, 625, 0, 678 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 679 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 680 /* 22 - 1440x576i@50Hz */ 681 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 682 1590, 1728, 0, 576, 580, 586, 625, 0, 683 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 684 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 685 /* 23 - 1440x288@50Hz */ 686 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 687 1590, 1728, 0, 288, 290, 293, 312, 0, 688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 689 DRM_MODE_FLAG_DBLCLK) }, 690 /* 24 - 1440x288@50Hz */ 691 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 692 1590, 1728, 0, 288, 290, 293, 312, 0, 693 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 694 DRM_MODE_FLAG_DBLCLK) }, 695 /* 25 - 2880x576i@50Hz */ 696 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 697 3180, 3456, 0, 576, 580, 586, 625, 0, 698 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 699 DRM_MODE_FLAG_INTERLACE) }, 700 /* 26 - 2880x576i@50Hz */ 701 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 702 3180, 3456, 0, 576, 580, 586, 625, 0, 703 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 704 DRM_MODE_FLAG_INTERLACE) }, 705 /* 27 - 2880x288@50Hz */ 706 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 707 3180, 3456, 0, 288, 290, 293, 312, 0, 708 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 709 /* 28 - 2880x288@50Hz */ 710 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 711 3180, 3456, 0, 288, 290, 293, 312, 0, 712 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 713 /* 29 - 1440x576@50Hz */ 714 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 715 1592, 1728, 0, 576, 581, 586, 625, 0, 716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 717 /* 30 - 1440x576@50Hz */ 718 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 719 1592, 1728, 0, 576, 581, 586, 625, 0, 720 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 721 /* 31 - 1920x1080@50Hz */ 722 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 723 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 724 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 725 /* 32 - 1920x1080@24Hz */ 726 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 727 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, 728 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 729 /* 33 - 1920x1080@25Hz */ 730 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 731 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 732 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 733 /* 34 - 1920x1080@30Hz */ 734 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 735 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 736 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 737 /* 35 - 2880x480@60Hz */ 738 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 739 3192, 3432, 0, 480, 489, 495, 525, 0, 740 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 741 /* 36 - 2880x480@60Hz */ 742 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 743 3192, 3432, 0, 480, 489, 495, 525, 0, 744 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 745 /* 37 - 2880x576@50Hz */ 746 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 747 3184, 3456, 0, 576, 581, 586, 625, 0, 748 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 749 /* 38 - 2880x576@50Hz */ 750 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 751 3184, 3456, 0, 576, 581, 586, 625, 0, 752 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 753 /* 39 - 1920x1080i@50Hz */ 754 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 755 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, 756 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | 757 DRM_MODE_FLAG_INTERLACE) }, 758 /* 40 - 1920x1080i@100Hz */ 759 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 760 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 761 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 762 DRM_MODE_FLAG_INTERLACE) }, 763 /* 41 - 1280x720@100Hz */ 764 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 765 1760, 1980, 0, 720, 725, 730, 750, 0, 766 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 767 /* 42 - 720x576@100Hz */ 768 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 769 796, 864, 0, 576, 581, 586, 625, 0, 770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 771 /* 43 - 720x576@100Hz */ 772 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 773 796, 864, 0, 576, 581, 586, 625, 0, 774 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 775 /* 44 - 1440x576i@100Hz */ 776 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 777 1590, 1728, 0, 576, 580, 586, 625, 0, 778 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 779 DRM_MODE_FLAG_DBLCLK) }, 780 /* 45 - 1440x576i@100Hz */ 781 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 782 1590, 1728, 0, 576, 580, 586, 625, 0, 783 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 784 DRM_MODE_FLAG_DBLCLK) }, 785 /* 46 - 1920x1080i@120Hz */ 786 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 787 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 788 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 789 DRM_MODE_FLAG_INTERLACE) }, 790 /* 47 - 1280x720@120Hz */ 791 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 792 1430, 1650, 0, 720, 725, 730, 750, 0, 793 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 794 /* 48 - 720x480@120Hz */ 795 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 796 798, 858, 0, 480, 489, 495, 525, 0, 797 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 798 /* 49 - 720x480@120Hz */ 799 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 800 798, 858, 0, 480, 489, 495, 525, 0, 801 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 802 /* 50 - 1440x480i@120Hz */ 803 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 804 1602, 1716, 0, 480, 488, 494, 525, 0, 805 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 806 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 807 /* 51 - 1440x480i@120Hz */ 808 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 809 1602, 1716, 0, 480, 488, 494, 525, 0, 810 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 811 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 812 /* 52 - 720x576@200Hz */ 813 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 814 796, 864, 0, 576, 581, 586, 625, 0, 815 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 816 /* 53 - 720x576@200Hz */ 817 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 818 796, 864, 0, 576, 581, 586, 625, 0, 819 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 820 /* 54 - 1440x576i@200Hz */ 821 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 822 1590, 1728, 0, 576, 580, 586, 625, 0, 823 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 824 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 825 /* 55 - 1440x576i@200Hz */ 826 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 827 1590, 1728, 0, 576, 580, 586, 625, 0, 828 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 829 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 830 /* 56 - 720x480@240Hz */ 831 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 832 798, 858, 0, 480, 489, 495, 525, 0, 833 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 834 /* 57 - 720x480@240Hz */ 835 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 836 798, 858, 0, 480, 489, 495, 525, 0, 837 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 838 /* 58 - 1440x480i@240 */ 839 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 840 1602, 1716, 0, 480, 488, 494, 525, 0, 841 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 842 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 843 /* 59 - 1440x480i@240 */ 844 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 845 1602, 1716, 0, 480, 488, 494, 525, 0, 846 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 847 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 848 /* 60 - 1280x720@24Hz */ 849 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 850 3080, 3300, 0, 720, 725, 730, 750, 0, 851 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 852 /* 61 - 1280x720@25Hz */ 853 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 854 3740, 3960, 0, 720, 725, 730, 750, 0, 855 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 856 /* 62 - 1280x720@30Hz */ 857 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 858 3080, 3300, 0, 720, 725, 730, 750, 0, 859 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 860 /* 63 - 1920x1080@120Hz */ 861 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 862 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 863 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 864 /* 64 - 1920x1080@100Hz */ 865 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 866 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 867 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 868 }; 869 870 /*** DDC fetch and block validation ***/ 871 872 static const u8 edid_header[] = { 873 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 874 }; 875 876 /* 877 * Sanity check the header of the base EDID block. Return 8 if the header 878 * is perfect, down to 0 if it's totally wrong. 879 */ 880 int drm_edid_header_is_valid(const u8 *raw_edid) 881 { 882 int i, score = 0; 883 884 for (i = 0; i < sizeof(edid_header); i++) 885 if (raw_edid[i] == edid_header[i]) 886 score++; 887 888 return score; 889 } 890 EXPORT_SYMBOL(drm_edid_header_is_valid); 891 892 static int edid_fixup __read_mostly = 6; 893 module_param_named(edid_fixup, edid_fixup, int, 0400); 894 MODULE_PARM_DESC(edid_fixup, 895 "Minimum number of valid EDID header bytes (0-8, default 6)"); 896 897 /* 898 * Sanity check the EDID block (base or extension). Return 0 if the block 899 * doesn't check out, or 1 if it's valid. 900 */ 901 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) 902 { 903 int i; 904 u8 csum = 0; 905 struct edid *edid = (struct edid *)raw_edid; 906 907 if (edid_fixup > 8 || edid_fixup < 0) 908 edid_fixup = 6; 909 910 if (block == 0) { 911 int score = drm_edid_header_is_valid(raw_edid); 912 if (score == 8) ; 913 else if (score >= edid_fixup) { 914 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 915 memcpy(raw_edid, edid_header, sizeof(edid_header)); 916 } else { 917 goto bad; 918 } 919 } 920 921 for (i = 0; i < EDID_LENGTH; i++) 922 csum += raw_edid[i]; 923 if (csum) { 924 if (print_bad_edid) { 925 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 926 } 927 928 /* allow CEA to slide through, switches mangle this */ 929 if (raw_edid[0] != 0x02) 930 goto bad; 931 } 932 933 /* per-block-type checks */ 934 switch (raw_edid[0]) { 935 case 0: /* base */ 936 if (edid->version != 1) { 937 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 938 goto bad; 939 } 940 941 if (edid->revision > 4) 942 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 943 break; 944 945 default: 946 break; 947 } 948 949 return 1; 950 951 bad: 952 if (raw_edid && print_bad_edid) { 953 printk(KERN_ERR "Raw EDID:\n"); 954 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, 955 raw_edid, EDID_LENGTH, false); 956 } 957 return 0; 958 } 959 EXPORT_SYMBOL(drm_edid_block_valid); 960 961 /** 962 * drm_edid_is_valid - sanity check EDID data 963 * @edid: EDID data 964 * 965 * Sanity-check an entire EDID record (including extensions) 966 */ 967 bool drm_edid_is_valid(struct edid *edid) 968 { 969 int i; 970 u8 *raw = (u8 *)edid; 971 972 if (!edid) 973 return false; 974 975 for (i = 0; i <= edid->extensions; i++) 976 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) 977 return false; 978 979 return true; 980 } 981 EXPORT_SYMBOL(drm_edid_is_valid); 982 983 #define DDC_SEGMENT_ADDR 0x30 984 /** 985 * Get EDID information via I2C. 986 * 987 * \param adapter : i2c device adaptor 988 * \param buf : EDID data buffer to be filled 989 * \param len : EDID data buffer length 990 * \return 0 on success or -1 on failure. 991 * 992 * Try to fetch EDID information by calling i2c driver function. 993 */ 994 static int 995 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, 996 int block, int len) 997 { 998 unsigned char start = block * EDID_LENGTH; 999 unsigned char segment = block >> 1; 1000 unsigned char xfers = segment ? 3 : 2; 1001 int ret, retries = 5; 1002 1003 /* The core i2c driver will automatically retry the transfer if the 1004 * adapter reports EAGAIN. However, we find that bit-banging transfers 1005 * are susceptible to errors under a heavily loaded machine and 1006 * generate spurious NAKs and timeouts. Retrying the transfer 1007 * of the individual block a few times seems to overcome this. 1008 */ 1009 do { 1010 struct i2c_msg msgs[] = { 1011 { 1012 .addr = DDC_SEGMENT_ADDR, 1013 .flags = 0, 1014 .len = 1, 1015 .buf = &segment, 1016 }, { 1017 .addr = DDC_ADDR, 1018 .flags = 0, 1019 .len = 1, 1020 .buf = &start, 1021 }, { 1022 .addr = DDC_ADDR, 1023 .flags = I2C_M_RD, 1024 .len = len, 1025 .buf = buf, 1026 } 1027 }; 1028 1029 /* 1030 * Avoid sending the segment addr to not upset non-compliant ddc 1031 * monitors. 1032 */ 1033 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); 1034 1035 if (ret == -ENXIO) { 1036 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", 1037 adapter->name); 1038 break; 1039 } 1040 } while (ret != xfers && --retries); 1041 1042 return ret == xfers ? 0 : -1; 1043 } 1044 1045 static bool drm_edid_is_zero(u8 *in_edid, int length) 1046 { 1047 if (memchr_inv(in_edid, 0, length)) 1048 return false; 1049 1050 return true; 1051 } 1052 1053 static u8 * 1054 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) 1055 { 1056 int i, j = 0, valid_extensions = 0; 1057 u8 *block, *new; 1058 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); 1059 1060 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) 1061 return NULL; 1062 1063 /* base block fetch */ 1064 for (i = 0; i < 4; i++) { 1065 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 1066 goto out; 1067 if (drm_edid_block_valid(block, 0, print_bad_edid)) 1068 break; 1069 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 1070 connector->null_edid_counter++; 1071 goto carp; 1072 } 1073 } 1074 if (i == 4) 1075 goto carp; 1076 1077 /* if there's no extensions, we're done */ 1078 if (block[0x7e] == 0) 1079 return block; 1080 1081 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); 1082 if (!new) 1083 goto out; 1084 block = new; 1085 1086 for (j = 1; j <= block[0x7e]; j++) { 1087 for (i = 0; i < 4; i++) { 1088 if (drm_do_probe_ddc_edid(adapter, 1089 block + (valid_extensions + 1) * EDID_LENGTH, 1090 j, EDID_LENGTH)) 1091 goto out; 1092 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { 1093 valid_extensions++; 1094 break; 1095 } 1096 } 1097 1098 if (i == 4 && print_bad_edid) { 1099 dev_warn(connector->dev->dev, 1100 "%s: Ignoring invalid EDID block %d.\n", 1101 drm_get_connector_name(connector), j); 1102 1103 connector->bad_edid_counter++; 1104 } 1105 } 1106 1107 if (valid_extensions != block[0x7e]) { 1108 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1109 block[0x7e] = valid_extensions; 1110 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); 1111 if (!new) 1112 goto out; 1113 block = new; 1114 } 1115 1116 return block; 1117 1118 carp: 1119 if (print_bad_edid) { 1120 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 1121 drm_get_connector_name(connector), j); 1122 } 1123 connector->bad_edid_counter++; 1124 1125 out: 1126 kfree(block); 1127 return NULL; 1128 } 1129 1130 /** 1131 * Probe DDC presence. 1132 * 1133 * \param adapter : i2c device adaptor 1134 * \return 1 on success 1135 */ 1136 bool 1137 drm_probe_ddc(struct i2c_adapter *adapter) 1138 { 1139 unsigned char out; 1140 1141 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 1142 } 1143 EXPORT_SYMBOL(drm_probe_ddc); 1144 1145 /** 1146 * drm_get_edid - get EDID data, if available 1147 * @connector: connector we're probing 1148 * @adapter: i2c adapter to use for DDC 1149 * 1150 * Poke the given i2c channel to grab EDID data if possible. If found, 1151 * attach it to the connector. 1152 * 1153 * Return edid data or NULL if we couldn't find any. 1154 */ 1155 struct edid *drm_get_edid(struct drm_connector *connector, 1156 struct i2c_adapter *adapter) 1157 { 1158 struct edid *edid = NULL; 1159 1160 if (drm_probe_ddc(adapter)) 1161 edid = (struct edid *)drm_do_get_edid(connector, adapter); 1162 1163 return edid; 1164 } 1165 EXPORT_SYMBOL(drm_get_edid); 1166 1167 /*** EDID parsing ***/ 1168 1169 /** 1170 * edid_vendor - match a string against EDID's obfuscated vendor field 1171 * @edid: EDID to match 1172 * @vendor: vendor string 1173 * 1174 * Returns true if @vendor is in @edid, false otherwise 1175 */ 1176 static bool edid_vendor(struct edid *edid, char *vendor) 1177 { 1178 char edid_vendor[3]; 1179 1180 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 1181 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 1182 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 1183 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 1184 1185 return !strncmp(edid_vendor, vendor, 3); 1186 } 1187 1188 /** 1189 * edid_get_quirks - return quirk flags for a given EDID 1190 * @edid: EDID to process 1191 * 1192 * This tells subsequent routines what fixes they need to apply. 1193 */ 1194 static u32 edid_get_quirks(struct edid *edid) 1195 { 1196 struct edid_quirk *quirk; 1197 int i; 1198 1199 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 1200 quirk = &edid_quirk_list[i]; 1201 1202 if (edid_vendor(edid, quirk->vendor) && 1203 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 1204 return quirk->quirks; 1205 } 1206 1207 return 0; 1208 } 1209 1210 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1211 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 1212 1213 /** 1214 * edid_fixup_preferred - set preferred modes based on quirk list 1215 * @connector: has mode list to fix up 1216 * @quirks: quirks list 1217 * 1218 * Walk the mode list for @connector, clearing the preferred status 1219 * on existing modes and setting it anew for the right mode ala @quirks. 1220 */ 1221 static void edid_fixup_preferred(struct drm_connector *connector, 1222 u32 quirks) 1223 { 1224 struct drm_display_mode *t, *cur_mode, *preferred_mode; 1225 int target_refresh = 0; 1226 1227 if (list_empty(&connector->probed_modes)) 1228 return; 1229 1230 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 1231 target_refresh = 60; 1232 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 1233 target_refresh = 75; 1234 1235 preferred_mode = list_first_entry(&connector->probed_modes, 1236 struct drm_display_mode, head); 1237 1238 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 1239 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 1240 1241 if (cur_mode == preferred_mode) 1242 continue; 1243 1244 /* Largest mode is preferred */ 1245 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 1246 preferred_mode = cur_mode; 1247 1248 /* At a given size, try to get closest to target refresh */ 1249 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 1250 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 1251 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 1252 preferred_mode = cur_mode; 1253 } 1254 } 1255 1256 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 1257 } 1258 1259 static bool 1260 mode_is_rb(const struct drm_display_mode *mode) 1261 { 1262 return (mode->htotal - mode->hdisplay == 160) && 1263 (mode->hsync_end - mode->hdisplay == 80) && 1264 (mode->hsync_end - mode->hsync_start == 32) && 1265 (mode->vsync_start - mode->vdisplay == 3); 1266 } 1267 1268 /* 1269 * drm_mode_find_dmt - Create a copy of a mode if present in DMT 1270 * @dev: Device to duplicate against 1271 * @hsize: Mode width 1272 * @vsize: Mode height 1273 * @fresh: Mode refresh rate 1274 * @rb: Mode reduced-blanking-ness 1275 * 1276 * Walk the DMT mode list looking for a match for the given parameters. 1277 * Return a newly allocated copy of the mode, or NULL if not found. 1278 */ 1279 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 1280 int hsize, int vsize, int fresh, 1281 bool rb) 1282 { 1283 int i; 1284 1285 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1286 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1287 if (hsize != ptr->hdisplay) 1288 continue; 1289 if (vsize != ptr->vdisplay) 1290 continue; 1291 if (fresh != drm_mode_vrefresh(ptr)) 1292 continue; 1293 if (rb != mode_is_rb(ptr)) 1294 continue; 1295 1296 return drm_mode_duplicate(dev, ptr); 1297 } 1298 1299 return NULL; 1300 } 1301 EXPORT_SYMBOL(drm_mode_find_dmt); 1302 1303 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 1304 1305 static void 1306 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1307 { 1308 int i, n = 0; 1309 u8 d = ext[0x02]; 1310 u8 *det_base = ext + d; 1311 1312 n = (127 - d) / 18; 1313 for (i = 0; i < n; i++) 1314 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1315 } 1316 1317 static void 1318 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1319 { 1320 unsigned int i, n = min((int)ext[0x02], 6); 1321 u8 *det_base = ext + 5; 1322 1323 if (ext[0x01] != 1) 1324 return; /* unknown version */ 1325 1326 for (i = 0; i < n; i++) 1327 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1328 } 1329 1330 static void 1331 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 1332 { 1333 int i; 1334 struct edid *edid = (struct edid *)raw_edid; 1335 1336 if (edid == NULL) 1337 return; 1338 1339 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 1340 cb(&(edid->detailed_timings[i]), closure); 1341 1342 for (i = 1; i <= raw_edid[0x7e]; i++) { 1343 u8 *ext = raw_edid + (i * EDID_LENGTH); 1344 switch (*ext) { 1345 case CEA_EXT: 1346 cea_for_each_detailed_block(ext, cb, closure); 1347 break; 1348 case VTB_EXT: 1349 vtb_for_each_detailed_block(ext, cb, closure); 1350 break; 1351 default: 1352 break; 1353 } 1354 } 1355 } 1356 1357 static void 1358 is_rb(struct detailed_timing *t, void *data) 1359 { 1360 u8 *r = (u8 *)t; 1361 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 1362 if (r[15] & 0x10) 1363 *(bool *)data = true; 1364 } 1365 1366 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 1367 static bool 1368 drm_monitor_supports_rb(struct edid *edid) 1369 { 1370 if (edid->revision >= 4) { 1371 bool ret = false; 1372 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 1373 return ret; 1374 } 1375 1376 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 1377 } 1378 1379 static void 1380 find_gtf2(struct detailed_timing *t, void *data) 1381 { 1382 u8 *r = (u8 *)t; 1383 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 1384 *(u8 **)data = r; 1385 } 1386 1387 /* Secondary GTF curve kicks in above some break frequency */ 1388 static int 1389 drm_gtf2_hbreak(struct edid *edid) 1390 { 1391 u8 *r = NULL; 1392 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1393 return r ? (r[12] * 2) : 0; 1394 } 1395 1396 static int 1397 drm_gtf2_2c(struct edid *edid) 1398 { 1399 u8 *r = NULL; 1400 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1401 return r ? r[13] : 0; 1402 } 1403 1404 static int 1405 drm_gtf2_m(struct edid *edid) 1406 { 1407 u8 *r = NULL; 1408 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1409 return r ? (r[15] << 8) + r[14] : 0; 1410 } 1411 1412 static int 1413 drm_gtf2_k(struct edid *edid) 1414 { 1415 u8 *r = NULL; 1416 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1417 return r ? r[16] : 0; 1418 } 1419 1420 static int 1421 drm_gtf2_2j(struct edid *edid) 1422 { 1423 u8 *r = NULL; 1424 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1425 return r ? r[17] : 0; 1426 } 1427 1428 /** 1429 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 1430 * @edid: EDID block to scan 1431 */ 1432 static int standard_timing_level(struct edid *edid) 1433 { 1434 if (edid->revision >= 2) { 1435 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 1436 return LEVEL_CVT; 1437 if (drm_gtf2_hbreak(edid)) 1438 return LEVEL_GTF2; 1439 return LEVEL_GTF; 1440 } 1441 return LEVEL_DMT; 1442 } 1443 1444 /* 1445 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 1446 * monitors fill with ascii space (0x20) instead. 1447 */ 1448 static int 1449 bad_std_timing(u8 a, u8 b) 1450 { 1451 return (a == 0x00 && b == 0x00) || 1452 (a == 0x01 && b == 0x01) || 1453 (a == 0x20 && b == 0x20); 1454 } 1455 1456 /** 1457 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 1458 * @t: standard timing params 1459 * @timing_level: standard timing level 1460 * 1461 * Take the standard timing params (in this case width, aspect, and refresh) 1462 * and convert them into a real mode using CVT/GTF/DMT. 1463 */ 1464 static struct drm_display_mode * 1465 drm_mode_std(struct drm_connector *connector, struct edid *edid, 1466 struct std_timing *t, int revision) 1467 { 1468 struct drm_device *dev = connector->dev; 1469 struct drm_display_mode *m, *mode = NULL; 1470 int hsize, vsize; 1471 int vrefresh_rate; 1472 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 1473 >> EDID_TIMING_ASPECT_SHIFT; 1474 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 1475 >> EDID_TIMING_VFREQ_SHIFT; 1476 int timing_level = standard_timing_level(edid); 1477 1478 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 1479 return NULL; 1480 1481 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 1482 hsize = t->hsize * 8 + 248; 1483 /* vrefresh_rate = vfreq + 60 */ 1484 vrefresh_rate = vfreq + 60; 1485 /* the vdisplay is calculated based on the aspect ratio */ 1486 if (aspect_ratio == 0) { 1487 if (revision < 3) 1488 vsize = hsize; 1489 else 1490 vsize = (hsize * 10) / 16; 1491 } else if (aspect_ratio == 1) 1492 vsize = (hsize * 3) / 4; 1493 else if (aspect_ratio == 2) 1494 vsize = (hsize * 4) / 5; 1495 else 1496 vsize = (hsize * 9) / 16; 1497 1498 /* HDTV hack, part 1 */ 1499 if (vrefresh_rate == 60 && 1500 ((hsize == 1360 && vsize == 765) || 1501 (hsize == 1368 && vsize == 769))) { 1502 hsize = 1366; 1503 vsize = 768; 1504 } 1505 1506 /* 1507 * If this connector already has a mode for this size and refresh 1508 * rate (because it came from detailed or CVT info), use that 1509 * instead. This way we don't have to guess at interlace or 1510 * reduced blanking. 1511 */ 1512 list_for_each_entry(m, &connector->probed_modes, head) 1513 if (m->hdisplay == hsize && m->vdisplay == vsize && 1514 drm_mode_vrefresh(m) == vrefresh_rate) 1515 return NULL; 1516 1517 /* HDTV hack, part 2 */ 1518 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 1519 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 1520 false); 1521 mode->hdisplay = 1366; 1522 mode->hsync_start = mode->hsync_start - 1; 1523 mode->hsync_end = mode->hsync_end - 1; 1524 return mode; 1525 } 1526 1527 /* check whether it can be found in default mode table */ 1528 if (drm_monitor_supports_rb(edid)) { 1529 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, 1530 true); 1531 if (mode) 1532 return mode; 1533 } 1534 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); 1535 if (mode) 1536 return mode; 1537 1538 /* okay, generate it */ 1539 switch (timing_level) { 1540 case LEVEL_DMT: 1541 break; 1542 case LEVEL_GTF: 1543 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1544 break; 1545 case LEVEL_GTF2: 1546 /* 1547 * This is potentially wrong if there's ever a monitor with 1548 * more than one ranges section, each claiming a different 1549 * secondary GTF curve. Please don't do that. 1550 */ 1551 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1552 if (!mode) 1553 return NULL; 1554 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 1555 drm_mode_destroy(dev, mode); 1556 mode = drm_gtf_mode_complex(dev, hsize, vsize, 1557 vrefresh_rate, 0, 0, 1558 drm_gtf2_m(edid), 1559 drm_gtf2_2c(edid), 1560 drm_gtf2_k(edid), 1561 drm_gtf2_2j(edid)); 1562 } 1563 break; 1564 case LEVEL_CVT: 1565 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 1566 false); 1567 break; 1568 } 1569 return mode; 1570 } 1571 1572 /* 1573 * EDID is delightfully ambiguous about how interlaced modes are to be 1574 * encoded. Our internal representation is of frame height, but some 1575 * HDTV detailed timings are encoded as field height. 1576 * 1577 * The format list here is from CEA, in frame size. Technically we 1578 * should be checking refresh rate too. Whatever. 1579 */ 1580 static void 1581 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 1582 struct detailed_pixel_timing *pt) 1583 { 1584 int i; 1585 static const struct { 1586 int w, h; 1587 } cea_interlaced[] = { 1588 { 1920, 1080 }, 1589 { 720, 480 }, 1590 { 1440, 480 }, 1591 { 2880, 480 }, 1592 { 720, 576 }, 1593 { 1440, 576 }, 1594 { 2880, 576 }, 1595 }; 1596 1597 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 1598 return; 1599 1600 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 1601 if ((mode->hdisplay == cea_interlaced[i].w) && 1602 (mode->vdisplay == cea_interlaced[i].h / 2)) { 1603 mode->vdisplay *= 2; 1604 mode->vsync_start *= 2; 1605 mode->vsync_end *= 2; 1606 mode->vtotal *= 2; 1607 mode->vtotal |= 1; 1608 } 1609 } 1610 1611 mode->flags |= DRM_MODE_FLAG_INTERLACE; 1612 } 1613 1614 /** 1615 * drm_mode_detailed - create a new mode from an EDID detailed timing section 1616 * @dev: DRM device (needed to create new mode) 1617 * @edid: EDID block 1618 * @timing: EDID detailed timing info 1619 * @quirks: quirks to apply 1620 * 1621 * An EDID detailed timing block contains enough info for us to create and 1622 * return a new struct drm_display_mode. 1623 */ 1624 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 1625 struct edid *edid, 1626 struct detailed_timing *timing, 1627 u32 quirks) 1628 { 1629 struct drm_display_mode *mode; 1630 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 1631 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 1632 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 1633 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 1634 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 1635 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 1636 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 1637 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; 1638 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 1639 1640 /* ignore tiny modes */ 1641 if (hactive < 64 || vactive < 64) 1642 return NULL; 1643 1644 if (pt->misc & DRM_EDID_PT_STEREO) { 1645 printk(KERN_WARNING "stereo mode not supported\n"); 1646 return NULL; 1647 } 1648 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 1649 printk(KERN_WARNING "composite sync not supported\n"); 1650 } 1651 1652 /* it is incorrect if hsync/vsync width is zero */ 1653 if (!hsync_pulse_width || !vsync_pulse_width) { 1654 DRM_DEBUG_KMS("Incorrect Detailed timing. " 1655 "Wrong Hsync/Vsync pulse width\n"); 1656 return NULL; 1657 } 1658 1659 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { 1660 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); 1661 if (!mode) 1662 return NULL; 1663 1664 goto set_size; 1665 } 1666 1667 mode = drm_mode_create(dev); 1668 if (!mode) 1669 return NULL; 1670 1671 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1672 timing->pixel_clock = cpu_to_le16(1088); 1673 1674 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1675 1676 mode->hdisplay = hactive; 1677 mode->hsync_start = mode->hdisplay + hsync_offset; 1678 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1679 mode->htotal = mode->hdisplay + hblank; 1680 1681 mode->vdisplay = vactive; 1682 mode->vsync_start = mode->vdisplay + vsync_offset; 1683 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1684 mode->vtotal = mode->vdisplay + vblank; 1685 1686 /* Some EDIDs have bogus h/vtotal values */ 1687 if (mode->hsync_end > mode->htotal) 1688 mode->htotal = mode->hsync_end + 1; 1689 if (mode->vsync_end > mode->vtotal) 1690 mode->vtotal = mode->vsync_end + 1; 1691 1692 drm_mode_do_interlace_quirk(mode, pt); 1693 1694 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1695 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1696 } 1697 1698 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1699 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1700 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1701 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1702 1703 set_size: 1704 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1705 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1706 1707 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1708 mode->width_mm *= 10; 1709 mode->height_mm *= 10; 1710 } 1711 1712 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1713 mode->width_mm = edid->width_cm * 10; 1714 mode->height_mm = edid->height_cm * 10; 1715 } 1716 1717 mode->type = DRM_MODE_TYPE_DRIVER; 1718 mode->vrefresh = drm_mode_vrefresh(mode); 1719 drm_mode_set_name(mode); 1720 1721 return mode; 1722 } 1723 1724 static bool 1725 mode_in_hsync_range(const struct drm_display_mode *mode, 1726 struct edid *edid, u8 *t) 1727 { 1728 int hsync, hmin, hmax; 1729 1730 hmin = t[7]; 1731 if (edid->revision >= 4) 1732 hmin += ((t[4] & 0x04) ? 255 : 0); 1733 hmax = t[8]; 1734 if (edid->revision >= 4) 1735 hmax += ((t[4] & 0x08) ? 255 : 0); 1736 hsync = drm_mode_hsync(mode); 1737 1738 return (hsync <= hmax && hsync >= hmin); 1739 } 1740 1741 static bool 1742 mode_in_vsync_range(const struct drm_display_mode *mode, 1743 struct edid *edid, u8 *t) 1744 { 1745 int vsync, vmin, vmax; 1746 1747 vmin = t[5]; 1748 if (edid->revision >= 4) 1749 vmin += ((t[4] & 0x01) ? 255 : 0); 1750 vmax = t[6]; 1751 if (edid->revision >= 4) 1752 vmax += ((t[4] & 0x02) ? 255 : 0); 1753 vsync = drm_mode_vrefresh(mode); 1754 1755 return (vsync <= vmax && vsync >= vmin); 1756 } 1757 1758 static u32 1759 range_pixel_clock(struct edid *edid, u8 *t) 1760 { 1761 /* unspecified */ 1762 if (t[9] == 0 || t[9] == 255) 1763 return 0; 1764 1765 /* 1.4 with CVT support gives us real precision, yay */ 1766 if (edid->revision >= 4 && t[10] == 0x04) 1767 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1768 1769 /* 1.3 is pathetic, so fuzz up a bit */ 1770 return t[9] * 10000 + 5001; 1771 } 1772 1773 static bool 1774 mode_in_range(const struct drm_display_mode *mode, struct edid *edid, 1775 struct detailed_timing *timing) 1776 { 1777 u32 max_clock; 1778 u8 *t = (u8 *)timing; 1779 1780 if (!mode_in_hsync_range(mode, edid, t)) 1781 return false; 1782 1783 if (!mode_in_vsync_range(mode, edid, t)) 1784 return false; 1785 1786 if ((max_clock = range_pixel_clock(edid, t))) 1787 if (mode->clock > max_clock) 1788 return false; 1789 1790 /* 1.4 max horizontal check */ 1791 if (edid->revision >= 4 && t[10] == 0x04) 1792 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1793 return false; 1794 1795 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1796 return false; 1797 1798 return true; 1799 } 1800 1801 static bool valid_inferred_mode(const struct drm_connector *connector, 1802 const struct drm_display_mode *mode) 1803 { 1804 struct drm_display_mode *m; 1805 bool ok = false; 1806 1807 list_for_each_entry(m, &connector->probed_modes, head) { 1808 if (mode->hdisplay == m->hdisplay && 1809 mode->vdisplay == m->vdisplay && 1810 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) 1811 return false; /* duplicated */ 1812 if (mode->hdisplay <= m->hdisplay && 1813 mode->vdisplay <= m->vdisplay) 1814 ok = true; 1815 } 1816 return ok; 1817 } 1818 1819 static int 1820 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1821 struct detailed_timing *timing) 1822 { 1823 int i, modes = 0; 1824 struct drm_display_mode *newmode; 1825 struct drm_device *dev = connector->dev; 1826 1827 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1828 if (mode_in_range(drm_dmt_modes + i, edid, timing) && 1829 valid_inferred_mode(connector, drm_dmt_modes + i)) { 1830 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1831 if (newmode) { 1832 drm_mode_probed_add(connector, newmode); 1833 modes++; 1834 } 1835 } 1836 } 1837 1838 return modes; 1839 } 1840 1841 /* fix up 1366x768 mode from 1368x768; 1842 * GFT/CVT can't express 1366 width which isn't dividable by 8 1843 */ 1844 static void fixup_mode_1366x768(struct drm_display_mode *mode) 1845 { 1846 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { 1847 mode->hdisplay = 1366; 1848 mode->hsync_start--; 1849 mode->hsync_end--; 1850 drm_mode_set_name(mode); 1851 } 1852 } 1853 1854 static int 1855 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1856 struct detailed_timing *timing) 1857 { 1858 int i, modes = 0; 1859 struct drm_display_mode *newmode; 1860 struct drm_device *dev = connector->dev; 1861 1862 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1863 const struct minimode *m = &extra_modes[i]; 1864 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); 1865 if (!newmode) 1866 return modes; 1867 1868 fixup_mode_1366x768(newmode); 1869 if (!mode_in_range(newmode, edid, timing) || 1870 !valid_inferred_mode(connector, newmode)) { 1871 drm_mode_destroy(dev, newmode); 1872 continue; 1873 } 1874 1875 drm_mode_probed_add(connector, newmode); 1876 modes++; 1877 } 1878 1879 return modes; 1880 } 1881 1882 static int 1883 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1884 struct detailed_timing *timing) 1885 { 1886 int i, modes = 0; 1887 struct drm_display_mode *newmode; 1888 struct drm_device *dev = connector->dev; 1889 bool rb = drm_monitor_supports_rb(edid); 1890 1891 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1892 const struct minimode *m = &extra_modes[i]; 1893 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); 1894 if (!newmode) 1895 return modes; 1896 1897 fixup_mode_1366x768(newmode); 1898 if (!mode_in_range(newmode, edid, timing) || 1899 !valid_inferred_mode(connector, newmode)) { 1900 drm_mode_destroy(dev, newmode); 1901 continue; 1902 } 1903 1904 drm_mode_probed_add(connector, newmode); 1905 modes++; 1906 } 1907 1908 return modes; 1909 } 1910 1911 static void 1912 do_inferred_modes(struct detailed_timing *timing, void *c) 1913 { 1914 struct detailed_mode_closure *closure = c; 1915 struct detailed_non_pixel *data = &timing->data.other_data; 1916 struct detailed_data_monitor_range *range = &data->data.range; 1917 1918 if (data->type != EDID_DETAIL_MONITOR_RANGE) 1919 return; 1920 1921 closure->modes += drm_dmt_modes_for_range(closure->connector, 1922 closure->edid, 1923 timing); 1924 1925 if (!version_greater(closure->edid, 1, 1)) 1926 return; /* GTF not defined yet */ 1927 1928 switch (range->flags) { 1929 case 0x02: /* secondary gtf, XXX could do more */ 1930 case 0x00: /* default gtf */ 1931 closure->modes += drm_gtf_modes_for_range(closure->connector, 1932 closure->edid, 1933 timing); 1934 break; 1935 case 0x04: /* cvt, only in 1.4+ */ 1936 if (!version_greater(closure->edid, 1, 3)) 1937 break; 1938 1939 closure->modes += drm_cvt_modes_for_range(closure->connector, 1940 closure->edid, 1941 timing); 1942 break; 1943 case 0x01: /* just the ranges, no formula */ 1944 default: 1945 break; 1946 } 1947 } 1948 1949 static int 1950 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 1951 { 1952 struct detailed_mode_closure closure = { 1953 connector, edid, 0, 0, 0 1954 }; 1955 1956 if (version_greater(edid, 1, 0)) 1957 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 1958 &closure); 1959 1960 return closure.modes; 1961 } 1962 1963 static int 1964 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1965 { 1966 int i, j, m, modes = 0; 1967 struct drm_display_mode *mode; 1968 u8 *est = ((u8 *)timing) + 5; 1969 1970 for (i = 0; i < 6; i++) { 1971 for (j = 7; j > 0; j--) { 1972 m = (i * 8) + (7 - j); 1973 if (m >= ARRAY_SIZE(est3_modes)) 1974 break; 1975 if (est[i] & (1 << j)) { 1976 mode = drm_mode_find_dmt(connector->dev, 1977 est3_modes[m].w, 1978 est3_modes[m].h, 1979 est3_modes[m].r, 1980 est3_modes[m].rb); 1981 if (mode) { 1982 drm_mode_probed_add(connector, mode); 1983 modes++; 1984 } 1985 } 1986 } 1987 } 1988 1989 return modes; 1990 } 1991 1992 static void 1993 do_established_modes(struct detailed_timing *timing, void *c) 1994 { 1995 struct detailed_mode_closure *closure = c; 1996 struct detailed_non_pixel *data = &timing->data.other_data; 1997 1998 if (data->type == EDID_DETAIL_EST_TIMINGS) 1999 closure->modes += drm_est3_modes(closure->connector, timing); 2000 } 2001 2002 /** 2003 * add_established_modes - get est. modes from EDID and add them 2004 * @edid: EDID block to scan 2005 * 2006 * Each EDID block contains a bitmap of the supported "established modes" list 2007 * (defined above). Tease them out and add them to the global modes list. 2008 */ 2009 static int 2010 add_established_modes(struct drm_connector *connector, struct edid *edid) 2011 { 2012 struct drm_device *dev = connector->dev; 2013 unsigned long est_bits = edid->established_timings.t1 | 2014 (edid->established_timings.t2 << 8) | 2015 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 2016 int i, modes = 0; 2017 struct detailed_mode_closure closure = { 2018 connector, edid, 0, 0, 0 2019 }; 2020 2021 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 2022 if (est_bits & (1<<i)) { 2023 struct drm_display_mode *newmode; 2024 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 2025 if (newmode) { 2026 drm_mode_probed_add(connector, newmode); 2027 modes++; 2028 } 2029 } 2030 } 2031 2032 if (version_greater(edid, 1, 0)) 2033 drm_for_each_detailed_block((u8 *)edid, 2034 do_established_modes, &closure); 2035 2036 return modes + closure.modes; 2037 } 2038 2039 static void 2040 do_standard_modes(struct detailed_timing *timing, void *c) 2041 { 2042 struct detailed_mode_closure *closure = c; 2043 struct detailed_non_pixel *data = &timing->data.other_data; 2044 struct drm_connector *connector = closure->connector; 2045 struct edid *edid = closure->edid; 2046 2047 if (data->type == EDID_DETAIL_STD_MODES) { 2048 int i; 2049 for (i = 0; i < 6; i++) { 2050 struct std_timing *std; 2051 struct drm_display_mode *newmode; 2052 2053 std = &data->data.timings[i]; 2054 newmode = drm_mode_std(connector, edid, std, 2055 edid->revision); 2056 if (newmode) { 2057 drm_mode_probed_add(connector, newmode); 2058 closure->modes++; 2059 } 2060 } 2061 } 2062 } 2063 2064 /** 2065 * add_standard_modes - get std. modes from EDID and add them 2066 * @edid: EDID block to scan 2067 * 2068 * Standard modes can be calculated using the appropriate standard (DMT, 2069 * GTF or CVT. Grab them from @edid and add them to the list. 2070 */ 2071 static int 2072 add_standard_modes(struct drm_connector *connector, struct edid *edid) 2073 { 2074 int i, modes = 0; 2075 struct detailed_mode_closure closure = { 2076 connector, edid, 0, 0, 0 2077 }; 2078 2079 for (i = 0; i < EDID_STD_TIMINGS; i++) { 2080 struct drm_display_mode *newmode; 2081 2082 newmode = drm_mode_std(connector, edid, 2083 &edid->standard_timings[i], 2084 edid->revision); 2085 if (newmode) { 2086 drm_mode_probed_add(connector, newmode); 2087 modes++; 2088 } 2089 } 2090 2091 if (version_greater(edid, 1, 0)) 2092 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 2093 &closure); 2094 2095 /* XXX should also look for standard codes in VTB blocks */ 2096 2097 return modes + closure.modes; 2098 } 2099 2100 static int drm_cvt_modes(struct drm_connector *connector, 2101 struct detailed_timing *timing) 2102 { 2103 int i, j, modes = 0; 2104 struct drm_display_mode *newmode; 2105 struct drm_device *dev = connector->dev; 2106 struct cvt_timing *cvt; 2107 const int rates[] = { 60, 85, 75, 60, 50 }; 2108 const u8 empty[3] = { 0, 0, 0 }; 2109 2110 for (i = 0; i < 4; i++) { 2111 int uninitialized_var(width), height; 2112 cvt = &(timing->data.other_data.data.cvt[i]); 2113 2114 if (!memcmp(cvt->code, empty, 3)) 2115 continue; 2116 2117 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 2118 switch (cvt->code[1] & 0x0c) { 2119 case 0x00: 2120 width = height * 4 / 3; 2121 break; 2122 case 0x04: 2123 width = height * 16 / 9; 2124 break; 2125 case 0x08: 2126 width = height * 16 / 10; 2127 break; 2128 case 0x0c: 2129 width = height * 15 / 9; 2130 break; 2131 } 2132 2133 for (j = 1; j < 5; j++) { 2134 if (cvt->code[2] & (1 << j)) { 2135 newmode = drm_cvt_mode(dev, width, height, 2136 rates[j], j == 0, 2137 false, false); 2138 if (newmode) { 2139 drm_mode_probed_add(connector, newmode); 2140 modes++; 2141 } 2142 } 2143 } 2144 } 2145 2146 return modes; 2147 } 2148 2149 static void 2150 do_cvt_mode(struct detailed_timing *timing, void *c) 2151 { 2152 struct detailed_mode_closure *closure = c; 2153 struct detailed_non_pixel *data = &timing->data.other_data; 2154 2155 if (data->type == EDID_DETAIL_CVT_3BYTE) 2156 closure->modes += drm_cvt_modes(closure->connector, timing); 2157 } 2158 2159 static int 2160 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 2161 { 2162 struct detailed_mode_closure closure = { 2163 connector, edid, 0, 0, 0 2164 }; 2165 2166 if (version_greater(edid, 1, 2)) 2167 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 2168 2169 /* XXX should also look for CVT codes in VTB blocks */ 2170 2171 return closure.modes; 2172 } 2173 2174 static void 2175 do_detailed_mode(struct detailed_timing *timing, void *c) 2176 { 2177 struct detailed_mode_closure *closure = c; 2178 struct drm_display_mode *newmode; 2179 2180 if (timing->pixel_clock) { 2181 newmode = drm_mode_detailed(closure->connector->dev, 2182 closure->edid, timing, 2183 closure->quirks); 2184 if (!newmode) 2185 return; 2186 2187 if (closure->preferred) 2188 newmode->type |= DRM_MODE_TYPE_PREFERRED; 2189 2190 drm_mode_probed_add(closure->connector, newmode); 2191 closure->modes++; 2192 closure->preferred = 0; 2193 } 2194 } 2195 2196 /* 2197 * add_detailed_modes - Add modes from detailed timings 2198 * @connector: attached connector 2199 * @edid: EDID block to scan 2200 * @quirks: quirks to apply 2201 */ 2202 static int 2203 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 2204 u32 quirks) 2205 { 2206 struct detailed_mode_closure closure = { 2207 connector, 2208 edid, 2209 1, 2210 quirks, 2211 0 2212 }; 2213 2214 if (closure.preferred && !version_greater(edid, 1, 3)) 2215 closure.preferred = 2216 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 2217 2218 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 2219 2220 return closure.modes; 2221 } 2222 2223 #define HDMI_IDENTIFIER 0x000C03 2224 #define AUDIO_BLOCK 0x01 2225 #define VIDEO_BLOCK 0x02 2226 #define VENDOR_BLOCK 0x03 2227 #define SPEAKER_BLOCK 0x04 2228 #define VIDEO_CAPABILITY_BLOCK 0x07 2229 #define EDID_BASIC_AUDIO (1 << 6) 2230 #define EDID_CEA_YCRCB444 (1 << 5) 2231 #define EDID_CEA_YCRCB422 (1 << 4) 2232 #define EDID_CEA_VCDB_QS (1 << 6) 2233 2234 /** 2235 * Search EDID for CEA extension block. 2236 */ 2237 u8 *drm_find_cea_extension(struct edid *edid) 2238 { 2239 u8 *edid_ext = NULL; 2240 int i; 2241 2242 /* No EDID or EDID extensions */ 2243 if (edid == NULL || edid->extensions == 0) 2244 return NULL; 2245 2246 /* Find CEA extension */ 2247 for (i = 0; i < edid->extensions; i++) { 2248 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 2249 if (edid_ext[0] == CEA_EXT) 2250 break; 2251 } 2252 2253 if (i == edid->extensions) 2254 return NULL; 2255 2256 return edid_ext; 2257 } 2258 EXPORT_SYMBOL(drm_find_cea_extension); 2259 2260 /** 2261 * drm_match_cea_mode - look for a CEA mode matching given mode 2262 * @to_match: display mode 2263 * 2264 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 2265 * mode. 2266 */ 2267 u8 drm_match_cea_mode(const struct drm_display_mode *to_match) 2268 { 2269 struct drm_display_mode *cea_mode; 2270 u8 mode; 2271 2272 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { 2273 cea_mode = (struct drm_display_mode *)&edid_cea_modes[mode]; 2274 2275 if (drm_mode_equal(to_match, cea_mode)) 2276 return mode + 1; 2277 } 2278 return 0; 2279 } 2280 EXPORT_SYMBOL(drm_match_cea_mode); 2281 2282 2283 static int 2284 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) 2285 { 2286 struct drm_device *dev = connector->dev; 2287 u8 * mode, cea_mode; 2288 int modes = 0; 2289 2290 for (mode = db; mode < db + len; mode++) { 2291 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ 2292 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { 2293 struct drm_display_mode *newmode; 2294 newmode = drm_mode_duplicate(dev, 2295 &edid_cea_modes[cea_mode]); 2296 if (newmode) { 2297 drm_mode_probed_add(connector, newmode); 2298 modes++; 2299 } 2300 } 2301 } 2302 2303 return modes; 2304 } 2305 2306 static int 2307 cea_db_payload_len(const u8 *db) 2308 { 2309 return db[0] & 0x1f; 2310 } 2311 2312 static int 2313 cea_db_tag(const u8 *db) 2314 { 2315 return db[0] >> 5; 2316 } 2317 2318 static int 2319 cea_revision(const u8 *cea) 2320 { 2321 return cea[1]; 2322 } 2323 2324 static int 2325 cea_db_offsets(const u8 *cea, int *start, int *end) 2326 { 2327 /* Data block offset in CEA extension block */ 2328 *start = 4; 2329 *end = cea[2]; 2330 if (*end == 0) 2331 *end = 127; 2332 if (*end < 4 || *end > 127) 2333 return -ERANGE; 2334 return 0; 2335 } 2336 2337 #define for_each_cea_db(cea, i, start, end) \ 2338 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) 2339 2340 static int 2341 add_cea_modes(struct drm_connector *connector, struct edid *edid) 2342 { 2343 u8 * cea = drm_find_cea_extension(edid); 2344 u8 * db, dbl; 2345 int modes = 0; 2346 2347 if (cea && cea_revision(cea) >= 3) { 2348 int i, start, end; 2349 2350 if (cea_db_offsets(cea, &start, &end)) 2351 return 0; 2352 2353 for_each_cea_db(cea, i, start, end) { 2354 db = &cea[i]; 2355 dbl = cea_db_payload_len(db); 2356 2357 if (cea_db_tag(db) == VIDEO_BLOCK) 2358 modes += do_cea_modes (connector, db+1, dbl); 2359 } 2360 } 2361 2362 return modes; 2363 } 2364 2365 static void 2366 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) 2367 { 2368 u8 len = cea_db_payload_len(db); 2369 2370 if (len >= 6) { 2371 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 2372 connector->dvi_dual = db[6] & 1; 2373 } 2374 if (len >= 7) 2375 connector->max_tmds_clock = db[7] * 5; 2376 if (len >= 8) { 2377 connector->latency_present[0] = db[8] >> 7; 2378 connector->latency_present[1] = (db[8] >> 6) & 1; 2379 } 2380 if (len >= 9) 2381 connector->video_latency[0] = db[9]; 2382 if (len >= 10) 2383 connector->audio_latency[0] = db[10]; 2384 if (len >= 11) 2385 connector->video_latency[1] = db[11]; 2386 if (len >= 12) 2387 connector->audio_latency[1] = db[12]; 2388 2389 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 2390 "max TMDS clock %d, " 2391 "latency present %d %d, " 2392 "video latency %d %d, " 2393 "audio latency %d %d\n", 2394 connector->dvi_dual, 2395 connector->max_tmds_clock, 2396 (int) connector->latency_present[0], 2397 (int) connector->latency_present[1], 2398 connector->video_latency[0], 2399 connector->video_latency[1], 2400 connector->audio_latency[0], 2401 connector->audio_latency[1]); 2402 } 2403 2404 static void 2405 monitor_name(struct detailed_timing *t, void *data) 2406 { 2407 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 2408 *(u8 **)data = t->data.other_data.data.str.str; 2409 } 2410 2411 static bool cea_db_is_hdmi_vsdb(const u8 *db) 2412 { 2413 int hdmi_id; 2414 2415 if (cea_db_tag(db) != VENDOR_BLOCK) 2416 return false; 2417 2418 if (cea_db_payload_len(db) < 5) 2419 return false; 2420 2421 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); 2422 2423 return hdmi_id == HDMI_IDENTIFIER; 2424 } 2425 2426 /** 2427 * drm_edid_to_eld - build ELD from EDID 2428 * @connector: connector corresponding to the HDMI/DP sink 2429 * @edid: EDID to parse 2430 * 2431 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 2432 * Some ELD fields are left to the graphics driver caller: 2433 * - Conn_Type 2434 * - HDCP 2435 * - Port_ID 2436 */ 2437 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 2438 { 2439 uint8_t *eld = connector->eld; 2440 u8 *cea; 2441 u8 *name; 2442 u8 *db; 2443 int sad_count = 0; 2444 int mnl; 2445 int dbl; 2446 2447 memset(eld, 0, sizeof(connector->eld)); 2448 2449 cea = drm_find_cea_extension(edid); 2450 if (!cea) { 2451 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 2452 return; 2453 } 2454 2455 name = NULL; 2456 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 2457 for (mnl = 0; name && mnl < 13; mnl++) { 2458 if (name[mnl] == 0x0a) 2459 break; 2460 eld[20 + mnl] = name[mnl]; 2461 } 2462 eld[4] = (cea[1] << 5) | mnl; 2463 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 2464 2465 eld[0] = 2 << 3; /* ELD version: 2 */ 2466 2467 eld[16] = edid->mfg_id[0]; 2468 eld[17] = edid->mfg_id[1]; 2469 eld[18] = edid->prod_code[0]; 2470 eld[19] = edid->prod_code[1]; 2471 2472 if (cea_revision(cea) >= 3) { 2473 int i, start, end; 2474 2475 if (cea_db_offsets(cea, &start, &end)) { 2476 start = 0; 2477 end = 0; 2478 } 2479 2480 for_each_cea_db(cea, i, start, end) { 2481 db = &cea[i]; 2482 dbl = cea_db_payload_len(db); 2483 2484 switch (cea_db_tag(db)) { 2485 case AUDIO_BLOCK: 2486 /* Audio Data Block, contains SADs */ 2487 sad_count = dbl / 3; 2488 if (dbl >= 1) 2489 memcpy(eld + 20 + mnl, &db[1], dbl); 2490 break; 2491 case SPEAKER_BLOCK: 2492 /* Speaker Allocation Data Block */ 2493 if (dbl >= 1) 2494 eld[7] = db[1]; 2495 break; 2496 case VENDOR_BLOCK: 2497 /* HDMI Vendor-Specific Data Block */ 2498 if (cea_db_is_hdmi_vsdb(db)) 2499 parse_hdmi_vsdb(connector, db); 2500 break; 2501 default: 2502 break; 2503 } 2504 } 2505 } 2506 eld[5] |= sad_count << 4; 2507 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 2508 2509 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 2510 } 2511 EXPORT_SYMBOL(drm_edid_to_eld); 2512 2513 /** 2514 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 2515 * @connector: connector associated with the HDMI/DP sink 2516 * @mode: the display mode 2517 */ 2518 int drm_av_sync_delay(struct drm_connector *connector, 2519 struct drm_display_mode *mode) 2520 { 2521 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 2522 int a, v; 2523 2524 if (!connector->latency_present[0]) 2525 return 0; 2526 if (!connector->latency_present[1]) 2527 i = 0; 2528 2529 a = connector->audio_latency[i]; 2530 v = connector->video_latency[i]; 2531 2532 /* 2533 * HDMI/DP sink doesn't support audio or video? 2534 */ 2535 if (a == 255 || v == 255) 2536 return 0; 2537 2538 /* 2539 * Convert raw EDID values to millisecond. 2540 * Treat unknown latency as 0ms. 2541 */ 2542 if (a) 2543 a = min(2 * (a - 1), 500); 2544 if (v) 2545 v = min(2 * (v - 1), 500); 2546 2547 return max(v - a, 0); 2548 } 2549 EXPORT_SYMBOL(drm_av_sync_delay); 2550 2551 /** 2552 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 2553 * @encoder: the encoder just changed display mode 2554 * @mode: the adjusted display mode 2555 * 2556 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 2557 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 2558 */ 2559 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 2560 struct drm_display_mode *mode) 2561 { 2562 struct drm_connector *connector; 2563 struct drm_device *dev = encoder->dev; 2564 2565 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 2566 if (connector->encoder == encoder && connector->eld[0]) 2567 return connector; 2568 2569 return NULL; 2570 } 2571 EXPORT_SYMBOL(drm_select_eld); 2572 2573 /** 2574 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 2575 * @edid: monitor EDID information 2576 * 2577 * Parse the CEA extension according to CEA-861-B. 2578 * Return true if HDMI, false if not or unknown. 2579 */ 2580 bool drm_detect_hdmi_monitor(struct edid *edid) 2581 { 2582 u8 *edid_ext; 2583 int i; 2584 int start_offset, end_offset; 2585 2586 edid_ext = drm_find_cea_extension(edid); 2587 if (!edid_ext) 2588 return false; 2589 2590 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2591 return false; 2592 2593 /* 2594 * Because HDMI identifier is in Vendor Specific Block, 2595 * search it from all data blocks of CEA extension. 2596 */ 2597 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2598 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) 2599 return true; 2600 } 2601 2602 return false; 2603 } 2604 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 2605 2606 /** 2607 * drm_detect_monitor_audio - check monitor audio capability 2608 * 2609 * Monitor should have CEA extension block. 2610 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 2611 * audio' only. If there is any audio extension block and supported 2612 * audio format, assume at least 'basic audio' support, even if 'basic 2613 * audio' is not defined in EDID. 2614 * 2615 */ 2616 bool drm_detect_monitor_audio(struct edid *edid) 2617 { 2618 u8 *edid_ext; 2619 int i, j; 2620 bool has_audio = false; 2621 int start_offset, end_offset; 2622 2623 edid_ext = drm_find_cea_extension(edid); 2624 if (!edid_ext) 2625 goto end; 2626 2627 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 2628 2629 if (has_audio) { 2630 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 2631 goto end; 2632 } 2633 2634 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2635 goto end; 2636 2637 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2638 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { 2639 has_audio = true; 2640 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) 2641 DRM_DEBUG_KMS("CEA audio format %d\n", 2642 (edid_ext[i + j] >> 3) & 0xf); 2643 goto end; 2644 } 2645 } 2646 end: 2647 return has_audio; 2648 } 2649 EXPORT_SYMBOL(drm_detect_monitor_audio); 2650 2651 /** 2652 * drm_rgb_quant_range_selectable - is RGB quantization range selectable? 2653 * 2654 * Check whether the monitor reports the RGB quantization range selection 2655 * as supported. The AVI infoframe can then be used to inform the monitor 2656 * which quantization range (full or limited) is used. 2657 */ 2658 bool drm_rgb_quant_range_selectable(struct edid *edid) 2659 { 2660 u8 *edid_ext; 2661 int i, start, end; 2662 2663 edid_ext = drm_find_cea_extension(edid); 2664 if (!edid_ext) 2665 return false; 2666 2667 if (cea_db_offsets(edid_ext, &start, &end)) 2668 return false; 2669 2670 for_each_cea_db(edid_ext, i, start, end) { 2671 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && 2672 cea_db_payload_len(&edid_ext[i]) == 2) { 2673 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); 2674 return edid_ext[i + 2] & EDID_CEA_VCDB_QS; 2675 } 2676 } 2677 2678 return false; 2679 } 2680 EXPORT_SYMBOL(drm_rgb_quant_range_selectable); 2681 2682 /** 2683 * drm_add_display_info - pull display info out if present 2684 * @edid: EDID data 2685 * @info: display info (attached to connector) 2686 * 2687 * Grab any available display info and stuff it into the drm_display_info 2688 * structure that's part of the connector. Useful for tracking bpp and 2689 * color spaces. 2690 */ 2691 static void drm_add_display_info(struct edid *edid, 2692 struct drm_display_info *info) 2693 { 2694 u8 *edid_ext; 2695 2696 info->width_mm = edid->width_cm * 10; 2697 info->height_mm = edid->height_cm * 10; 2698 2699 /* driver figures it out in this case */ 2700 info->bpc = 0; 2701 info->color_formats = 0; 2702 2703 if (edid->revision < 3) 2704 return; 2705 2706 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 2707 return; 2708 2709 /* Get data from CEA blocks if present */ 2710 edid_ext = drm_find_cea_extension(edid); 2711 if (edid_ext) { 2712 info->cea_rev = edid_ext[1]; 2713 2714 /* The existence of a CEA block should imply RGB support */ 2715 info->color_formats = DRM_COLOR_FORMAT_RGB444; 2716 if (edid_ext[3] & EDID_CEA_YCRCB444) 2717 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2718 if (edid_ext[3] & EDID_CEA_YCRCB422) 2719 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2720 } 2721 2722 /* Only defined for 1.4 with digital displays */ 2723 if (edid->revision < 4) 2724 return; 2725 2726 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 2727 case DRM_EDID_DIGITAL_DEPTH_6: 2728 info->bpc = 6; 2729 break; 2730 case DRM_EDID_DIGITAL_DEPTH_8: 2731 info->bpc = 8; 2732 break; 2733 case DRM_EDID_DIGITAL_DEPTH_10: 2734 info->bpc = 10; 2735 break; 2736 case DRM_EDID_DIGITAL_DEPTH_12: 2737 info->bpc = 12; 2738 break; 2739 case DRM_EDID_DIGITAL_DEPTH_14: 2740 info->bpc = 14; 2741 break; 2742 case DRM_EDID_DIGITAL_DEPTH_16: 2743 info->bpc = 16; 2744 break; 2745 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 2746 default: 2747 info->bpc = 0; 2748 break; 2749 } 2750 2751 info->color_formats |= DRM_COLOR_FORMAT_RGB444; 2752 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) 2753 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2754 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) 2755 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2756 } 2757 2758 /** 2759 * drm_add_edid_modes - add modes from EDID data, if available 2760 * @connector: connector we're probing 2761 * @edid: edid data 2762 * 2763 * Add the specified modes to the connector's mode list. 2764 * 2765 * Return number of modes added or 0 if we couldn't find any. 2766 */ 2767 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 2768 { 2769 int num_modes = 0; 2770 u32 quirks; 2771 2772 if (edid == NULL) { 2773 return 0; 2774 } 2775 if (!drm_edid_is_valid(edid)) { 2776 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 2777 drm_get_connector_name(connector)); 2778 return 0; 2779 } 2780 2781 quirks = edid_get_quirks(edid); 2782 2783 /* 2784 * EDID spec says modes should be preferred in this order: 2785 * - preferred detailed mode 2786 * - other detailed modes from base block 2787 * - detailed modes from extension blocks 2788 * - CVT 3-byte code modes 2789 * - standard timing codes 2790 * - established timing codes 2791 * - modes inferred from GTF or CVT range information 2792 * 2793 * We get this pretty much right. 2794 * 2795 * XXX order for additional mode types in extension blocks? 2796 */ 2797 num_modes += add_detailed_modes(connector, edid, quirks); 2798 num_modes += add_cvt_modes(connector, edid); 2799 num_modes += add_standard_modes(connector, edid); 2800 num_modes += add_established_modes(connector, edid); 2801 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) 2802 num_modes += add_inferred_modes(connector, edid); 2803 num_modes += add_cea_modes(connector, edid); 2804 2805 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 2806 edid_fixup_preferred(connector, quirks); 2807 2808 drm_add_display_info(edid, &connector->display_info); 2809 2810 return num_modes; 2811 } 2812 EXPORT_SYMBOL(drm_add_edid_modes); 2813 2814 /** 2815 * drm_add_modes_noedid - add modes for the connectors without EDID 2816 * @connector: connector we're probing 2817 * @hdisplay: the horizontal display limit 2818 * @vdisplay: the vertical display limit 2819 * 2820 * Add the specified modes to the connector's mode list. Only when the 2821 * hdisplay/vdisplay is not beyond the given limit, it will be added. 2822 * 2823 * Return number of modes added or 0 if we couldn't find any. 2824 */ 2825 int drm_add_modes_noedid(struct drm_connector *connector, 2826 int hdisplay, int vdisplay) 2827 { 2828 int i, count, num_modes = 0; 2829 struct drm_display_mode *mode; 2830 struct drm_device *dev = connector->dev; 2831 2832 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 2833 if (hdisplay < 0) 2834 hdisplay = 0; 2835 if (vdisplay < 0) 2836 vdisplay = 0; 2837 2838 for (i = 0; i < count; i++) { 2839 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 2840 if (hdisplay && vdisplay) { 2841 /* 2842 * Only when two are valid, they will be used to check 2843 * whether the mode should be added to the mode list of 2844 * the connector. 2845 */ 2846 if (ptr->hdisplay > hdisplay || 2847 ptr->vdisplay > vdisplay) 2848 continue; 2849 } 2850 if (drm_mode_vrefresh(ptr) > 61) 2851 continue; 2852 mode = drm_mode_duplicate(dev, ptr); 2853 if (mode) { 2854 drm_mode_probed_add(connector, mode); 2855 num_modes++; 2856 } 2857 } 2858 return num_modes; 2859 } 2860 EXPORT_SYMBOL(drm_add_modes_noedid); 2861 2862 /** 2863 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with 2864 * data from a DRM display mode 2865 * @frame: HDMI AVI infoframe 2866 * @mode: DRM display mode 2867 * 2868 * Returns 0 on success or a negative error code on failure. 2869 */ 2870 int 2871 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, 2872 const struct drm_display_mode *mode) 2873 { 2874 int err; 2875 2876 if (!frame || !mode) 2877 return -EINVAL; 2878 2879 err = hdmi_avi_infoframe_init(frame); 2880 if (err < 0) 2881 return err; 2882 2883 frame->video_code = drm_match_cea_mode(mode); 2884 if (!frame->video_code) 2885 return 0; 2886 2887 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; 2888 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; 2889 2890 return 0; 2891 } 2892 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); 2893