xref: /linux/drivers/gpu/drm/drm_edid.c (revision 27258e448eb301cf89e351df87aa8cb916653bf2)
1 /*
2  * Copyright (c) 2006 Luc Verhaegen (quirks list)
3  * Copyright (c) 2007-2008 Intel Corporation
4  *   Jesse Barnes <jesse.barnes@intel.com>
5  *
6  * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
7  * FB layer.
8  *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
9  *
10  * Permission is hereby granted, free of charge, to any person obtaining a
11  * copy of this software and associated documentation files (the "Software"),
12  * to deal in the Software without restriction, including without limitation
13  * the rights to use, copy, modify, merge, publish, distribute, sub license,
14  * and/or sell copies of the Software, and to permit persons to whom the
15  * Software is furnished to do so, subject to the following conditions:
16  *
17  * The above copyright notice and this permission notice (including the
18  * next paragraph) shall be included in all copies or substantial portions
19  * of the Software.
20  *
21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
24  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
26  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27  * DEALINGS IN THE SOFTWARE.
28  */
29 #include <linux/kernel.h>
30 #include <linux/i2c.h>
31 #include <linux/i2c-algo-bit.h>
32 #include "drmP.h"
33 #include "drm_edid.h"
34 
35 /*
36  * TODO:
37  *   - support EDID 1.4 (incl. CE blocks)
38  */
39 
40 /*
41  * EDID blocks out in the wild have a variety of bugs, try to collect
42  * them here (note that userspace may work around broken monitors first,
43  * but fixes should make their way here so that the kernel "just works"
44  * on as many displays as possible).
45  */
46 
47 /* First detailed mode wrong, use largest 60Hz mode */
48 #define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
49 /* Reported 135MHz pixel clock is too high, needs adjustment */
50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
51 /* Prefer the largest mode at 75 Hz */
52 #define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
53 /* Detail timing is in cm not mm */
54 #define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
55 /* Detailed timing descriptors have bogus size values, so just take the
56  * maximum size and use that.
57  */
58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
59 /* Monitor forgot to set the first detailed is preferred bit. */
60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
61 /* use +hsync +vsync for detailed mode */
62 #define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
63 /* define the number of Extension EDID block */
64 #define MAX_EDID_EXT_NUM 4
65 
66 #define LEVEL_DMT	0
67 #define LEVEL_GTF	1
68 #define LEVEL_CVT	2
69 
70 static struct edid_quirk {
71 	char *vendor;
72 	int product_id;
73 	u32 quirks;
74 } edid_quirk_list[] = {
75 	/* Acer AL1706 */
76 	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
77 	/* Acer F51 */
78 	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
79 	/* Unknown Acer */
80 	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
81 
82 	/* Belinea 10 15 55 */
83 	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
84 	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
85 
86 	/* Envision Peripherals, Inc. EN-7100e */
87 	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
88 
89 	/* Funai Electronics PM36B */
90 	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
91 	  EDID_QUIRK_DETAILED_IN_CM },
92 
93 	/* LG Philips LCD LP154W01-A5 */
94 	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
95 	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
96 
97 	/* Philips 107p5 CRT */
98 	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
99 
100 	/* Proview AY765C */
101 	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102 
103 	/* Samsung SyncMaster 205BW.  Note: irony */
104 	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
105 	/* Samsung SyncMaster 22[5-6]BW */
106 	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
107 	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
108 };
109 
110 
111 /* Valid EDID header has these bytes */
112 static u8 edid_header[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
113 
114 /**
115  * edid_is_valid - sanity check EDID data
116  * @edid: EDID data
117  *
118  * Sanity check the EDID block by looking at the header, the version number
119  * and the checksum.  Return 0 if the EDID doesn't check out, or 1 if it's
120  * valid.
121  */
122 static bool edid_is_valid(struct edid *edid)
123 {
124 	int i;
125 	u8 csum = 0;
126 	u8 *raw_edid = (u8 *)edid;
127 
128 	if (memcmp(edid->header, edid_header, sizeof(edid_header)))
129 		goto bad;
130 	if (edid->version != 1) {
131 		DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
132 		goto bad;
133 	}
134 	if (edid->revision > 4)
135 		DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
136 
137 	for (i = 0; i < EDID_LENGTH; i++)
138 		csum += raw_edid[i];
139 	if (csum) {
140 		DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
141 		goto bad;
142 	}
143 
144 	return 1;
145 
146 bad:
147 	if (raw_edid) {
148 		DRM_ERROR("Raw EDID:\n");
149 		print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
150 		printk("\n");
151 	}
152 	return 0;
153 }
154 
155 /**
156  * edid_vendor - match a string against EDID's obfuscated vendor field
157  * @edid: EDID to match
158  * @vendor: vendor string
159  *
160  * Returns true if @vendor is in @edid, false otherwise
161  */
162 static bool edid_vendor(struct edid *edid, char *vendor)
163 {
164 	char edid_vendor[3];
165 
166 	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
167 	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
168 			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
169 	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
170 
171 	return !strncmp(edid_vendor, vendor, 3);
172 }
173 
174 /**
175  * edid_get_quirks - return quirk flags for a given EDID
176  * @edid: EDID to process
177  *
178  * This tells subsequent routines what fixes they need to apply.
179  */
180 static u32 edid_get_quirks(struct edid *edid)
181 {
182 	struct edid_quirk *quirk;
183 	int i;
184 
185 	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
186 		quirk = &edid_quirk_list[i];
187 
188 		if (edid_vendor(edid, quirk->vendor) &&
189 		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
190 			return quirk->quirks;
191 	}
192 
193 	return 0;
194 }
195 
196 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
197 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
198 
199 
200 /**
201  * edid_fixup_preferred - set preferred modes based on quirk list
202  * @connector: has mode list to fix up
203  * @quirks: quirks list
204  *
205  * Walk the mode list for @connector, clearing the preferred status
206  * on existing modes and setting it anew for the right mode ala @quirks.
207  */
208 static void edid_fixup_preferred(struct drm_connector *connector,
209 				 u32 quirks)
210 {
211 	struct drm_display_mode *t, *cur_mode, *preferred_mode;
212 	int target_refresh = 0;
213 
214 	if (list_empty(&connector->probed_modes))
215 		return;
216 
217 	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
218 		target_refresh = 60;
219 	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
220 		target_refresh = 75;
221 
222 	preferred_mode = list_first_entry(&connector->probed_modes,
223 					  struct drm_display_mode, head);
224 
225 	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
226 		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
227 
228 		if (cur_mode == preferred_mode)
229 			continue;
230 
231 		/* Largest mode is preferred */
232 		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
233 			preferred_mode = cur_mode;
234 
235 		/* At a given size, try to get closest to target refresh */
236 		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
237 		    MODE_REFRESH_DIFF(cur_mode, target_refresh) <
238 		    MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
239 			preferred_mode = cur_mode;
240 		}
241 	}
242 
243 	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
244 }
245 
246 /*
247  * Add the Autogenerated from the DMT spec.
248  * This table is copied from xfree86/modes/xf86EdidModes.c.
249  * But the mode with Reduced blank feature is deleted.
250  */
251 static struct drm_display_mode drm_dmt_modes[] = {
252 	/* 640x350@85Hz */
253 	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
254 		   736, 832, 0, 350, 382, 385, 445, 0,
255 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
256 	/* 640x400@85Hz */
257 	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
258 		   736, 832, 0, 400, 401, 404, 445, 0,
259 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
260 	/* 720x400@85Hz */
261 	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
262 		   828, 936, 0, 400, 401, 404, 446, 0,
263 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
264 	/* 640x480@60Hz */
265 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
266 		   752, 800, 0, 480, 489, 492, 525, 0,
267 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
268 	/* 640x480@72Hz */
269 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
270 		   704, 832, 0, 480, 489, 492, 520, 0,
271 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
272 	/* 640x480@75Hz */
273 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
274 		   720, 840, 0, 480, 481, 484, 500, 0,
275 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
276 	/* 640x480@85Hz */
277 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
278 		   752, 832, 0, 480, 481, 484, 509, 0,
279 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
280 	/* 800x600@56Hz */
281 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
282 		   896, 1024, 0, 600, 601, 603, 625, 0,
283 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
284 	/* 800x600@60Hz */
285 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
286 		   968, 1056, 0, 600, 601, 605, 628, 0,
287 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
288 	/* 800x600@72Hz */
289 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
290 		   976, 1040, 0, 600, 637, 643, 666, 0,
291 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
292 	/* 800x600@75Hz */
293 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
294 		   896, 1056, 0, 600, 601, 604, 625, 0,
295 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
296 	/* 800x600@85Hz */
297 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
298 		   896, 1048, 0, 600, 601, 604, 631, 0,
299 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
300 	/* 848x480@60Hz */
301 	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
302 		   976, 1088, 0, 480, 486, 494, 517, 0,
303 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
304 	/* 1024x768@43Hz, interlace */
305 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
306 		   1208, 1264, 0, 768, 768, 772, 817, 0,
307 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
308 			DRM_MODE_FLAG_INTERLACE) },
309 	/* 1024x768@60Hz */
310 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
311 		   1184, 1344, 0, 768, 771, 777, 806, 0,
312 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
313 	/* 1024x768@70Hz */
314 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
315 		   1184, 1328, 0, 768, 771, 777, 806, 0,
316 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
317 	/* 1024x768@75Hz */
318 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
319 		   1136, 1312, 0, 768, 769, 772, 800, 0,
320 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
321 	/* 1024x768@85Hz */
322 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
323 		   1072, 1376, 0, 768, 769, 772, 808, 0,
324 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
325 	/* 1152x864@75Hz */
326 	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
327 		   1344, 1600, 0, 864, 865, 868, 900, 0,
328 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
329 	/* 1280x768@60Hz */
330 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
331 		   1472, 1664, 0, 768, 771, 778, 798, 0,
332 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
333 	/* 1280x768@75Hz */
334 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
335 		   1488, 1696, 0, 768, 771, 778, 805, 0,
336 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
337 	/* 1280x768@85Hz */
338 	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
339 		   1496, 1712, 0, 768, 771, 778, 809, 0,
340 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
341 	/* 1280x800@60Hz */
342 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
343 		   1480, 1680, 0, 800, 803, 809, 831, 0,
344 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
345 	/* 1280x800@75Hz */
346 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
347 		   1488, 1696, 0, 800, 803, 809, 838, 0,
348 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 	/* 1280x800@85Hz */
350 	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
351 		   1496, 1712, 0, 800, 803, 809, 843, 0,
352 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
353 	/* 1280x960@60Hz */
354 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
355 		   1488, 1800, 0, 960, 961, 964, 1000, 0,
356 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
357 	/* 1280x960@85Hz */
358 	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
359 		   1504, 1728, 0, 960, 961, 964, 1011, 0,
360 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
361 	/* 1280x1024@60Hz */
362 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
363 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
364 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
365 	/* 1280x1024@75Hz */
366 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
367 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
368 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
369 	/* 1280x1024@85Hz */
370 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
371 		   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
372 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
373 	/* 1360x768@60Hz */
374 	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
375 		   1536, 1792, 0, 768, 771, 777, 795, 0,
376 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
377 	/* 1440x1050@60Hz */
378 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
379 		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
380 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
381 	/* 1440x1050@75Hz */
382 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
383 		   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
384 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
385 	/* 1440x1050@85Hz */
386 	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
387 		   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
388 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
389 	/* 1440x900@60Hz */
390 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
391 		   1672, 1904, 0, 900, 903, 909, 934, 0,
392 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
393 	/* 1440x900@75Hz */
394 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
395 		   1688, 1936, 0, 900, 903, 909, 942, 0,
396 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
397 	/* 1440x900@85Hz */
398 	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
399 		   1696, 1952, 0, 900, 903, 909, 948, 0,
400 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
401 	/* 1600x1200@60Hz */
402 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
403 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
404 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
405 	/* 1600x1200@65Hz */
406 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
407 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
408 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
409 	/* 1600x1200@70Hz */
410 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
411 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
412 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
413 	/* 1600x1200@75Hz */
414 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
415 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
416 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
417 	/* 1600x1200@85Hz */
418 	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
419 		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
420 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
421 	/* 1680x1050@60Hz */
422 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
423 		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
424 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
425 	/* 1680x1050@75Hz */
426 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
427 		   1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
428 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
429 	/* 1680x1050@85Hz */
430 	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
431 		   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
432 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
433 	/* 1792x1344@60Hz */
434 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
435 		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
436 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
437 	/* 1729x1344@75Hz */
438 	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
439 		   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
440 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
441 	/* 1853x1392@60Hz */
442 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
443 		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
444 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
445 	/* 1856x1392@75Hz */
446 	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
447 		   2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
448 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449 	/* 1920x1200@60Hz */
450 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
451 		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
452 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
453 	/* 1920x1200@75Hz */
454 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
455 		   2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
456 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
457 	/* 1920x1200@85Hz */
458 	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
459 		   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
460 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
461 	/* 1920x1440@60Hz */
462 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
463 		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
464 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
465 	/* 1920x1440@75Hz */
466 	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
467 		   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
468 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
469 	/* 2560x1600@60Hz */
470 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
471 		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
472 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
473 	/* 2560x1600@75HZ */
474 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
475 		   3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
476 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
477 	/* 2560x1600@85HZ */
478 	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
479 		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
480 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
481 };
482 
483 static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
484 			int hsize, int vsize, int fresh)
485 {
486 	int i, count;
487 	struct drm_display_mode *ptr, *mode;
488 
489 	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
490 	mode = NULL;
491 	for (i = 0; i < count; i++) {
492 		ptr = &drm_dmt_modes[i];
493 		if (hsize == ptr->hdisplay &&
494 			vsize == ptr->vdisplay &&
495 			fresh == drm_mode_vrefresh(ptr)) {
496 			/* get the expected default mode */
497 			mode = drm_mode_duplicate(dev, ptr);
498 			break;
499 		}
500 	}
501 	return mode;
502 }
503 /**
504  * drm_mode_std - convert standard mode info (width, height, refresh) into mode
505  * @t: standard timing params
506  * @timing_level: standard timing level
507  *
508  * Take the standard timing params (in this case width, aspect, and refresh)
509  * and convert them into a real mode using CVT/GTF/DMT.
510  *
511  * Punts for now, but should eventually use the FB layer's CVT based mode
512  * generation code.
513  */
514 struct drm_display_mode *drm_mode_std(struct drm_device *dev,
515 				      struct std_timing *t,
516 				      int timing_level)
517 {
518 	struct drm_display_mode *mode;
519 	int hsize, vsize;
520 	int vrefresh_rate;
521 	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
522 		>> EDID_TIMING_ASPECT_SHIFT;
523 	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
524 		>> EDID_TIMING_VFREQ_SHIFT;
525 
526 	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
527 	hsize = t->hsize * 8 + 248;
528 	/* vrefresh_rate = vfreq + 60 */
529 	vrefresh_rate = vfreq + 60;
530 	/* the vdisplay is calculated based on the aspect ratio */
531 	if (aspect_ratio == 0)
532 		vsize = (hsize * 10) / 16;
533 	else if (aspect_ratio == 1)
534 		vsize = (hsize * 3) / 4;
535 	else if (aspect_ratio == 2)
536 		vsize = (hsize * 4) / 5;
537 	else
538 		vsize = (hsize * 9) / 16;
539 	/* HDTV hack */
540 	if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
541 		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
542 		mode->hdisplay = 1366;
543 		mode->vsync_start = mode->vsync_start - 1;
544 		mode->vsync_end = mode->vsync_end - 1;
545 		return mode;
546 	}
547 	mode = NULL;
548 	/* check whether it can be found in default mode table */
549 	mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
550 	if (mode)
551 		return mode;
552 
553 	switch (timing_level) {
554 	case LEVEL_DMT:
555 		break;
556 	case LEVEL_GTF:
557 		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
558 		break;
559 	case LEVEL_CVT:
560 		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
561 		break;
562 	}
563 	return mode;
564 }
565 
566 /**
567  * drm_mode_detailed - create a new mode from an EDID detailed timing section
568  * @dev: DRM device (needed to create new mode)
569  * @edid: EDID block
570  * @timing: EDID detailed timing info
571  * @quirks: quirks to apply
572  *
573  * An EDID detailed timing block contains enough info for us to create and
574  * return a new struct drm_display_mode.
575  */
576 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
577 						  struct edid *edid,
578 						  struct detailed_timing *timing,
579 						  u32 quirks)
580 {
581 	struct drm_display_mode *mode;
582 	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
583 	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
584 	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
585 	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
586 	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
587 	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
588 	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
589 	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
590 	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
591 
592 	/* ignore tiny modes */
593 	if (hactive < 64 || vactive < 64)
594 		return NULL;
595 
596 	if (pt->misc & DRM_EDID_PT_STEREO) {
597 		printk(KERN_WARNING "stereo mode not supported\n");
598 		return NULL;
599 	}
600 	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
601 		printk(KERN_WARNING "integrated sync not supported\n");
602 		return NULL;
603 	}
604 
605 	mode = drm_mode_create(dev);
606 	if (!mode)
607 		return NULL;
608 
609 	mode->type = DRM_MODE_TYPE_DRIVER;
610 
611 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
612 		timing->pixel_clock = cpu_to_le16(1088);
613 
614 	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
615 
616 	mode->hdisplay = hactive;
617 	mode->hsync_start = mode->hdisplay + hsync_offset;
618 	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
619 	mode->htotal = mode->hdisplay + hblank;
620 
621 	mode->vdisplay = vactive;
622 	mode->vsync_start = mode->vdisplay + vsync_offset;
623 	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
624 	mode->vtotal = mode->vdisplay + vblank;
625 
626 	drm_mode_set_name(mode);
627 
628 	if (pt->misc & DRM_EDID_PT_INTERLACED)
629 		mode->flags |= DRM_MODE_FLAG_INTERLACE;
630 
631 	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
632 		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
633 	}
634 
635 	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
636 		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
637 	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
638 		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
639 
640 	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
641 	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
642 
643 	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
644 		mode->width_mm *= 10;
645 		mode->height_mm *= 10;
646 	}
647 
648 	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
649 		mode->width_mm = edid->width_cm * 10;
650 		mode->height_mm = edid->height_cm * 10;
651 	}
652 
653 	return mode;
654 }
655 
656 /*
657  * Detailed mode info for the EDID "established modes" data to use.
658  */
659 static struct drm_display_mode edid_est_modes[] = {
660 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
661 		   968, 1056, 0, 600, 601, 605, 628, 0,
662 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
663 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
664 		   896, 1024, 0, 600, 601, 603,  625, 0,
665 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
666 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
667 		   720, 840, 0, 480, 481, 484, 500, 0,
668 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
669 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
670 		   704,  832, 0, 480, 489, 491, 520, 0,
671 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
672 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
673 		   768,  864, 0, 480, 483, 486, 525, 0,
674 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
675 	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
676 		   752, 800, 0, 480, 490, 492, 525, 0,
677 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
678 	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
679 		   846, 900, 0, 400, 421, 423,  449, 0,
680 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
681 	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
682 		   846,  900, 0, 400, 412, 414, 449, 0,
683 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
684 	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
685 		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
686 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
687 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
688 		   1136, 1312, 0,  768, 769, 772, 800, 0,
689 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
690 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
691 		   1184, 1328, 0,  768, 771, 777, 806, 0,
692 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
693 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
694 		   1184, 1344, 0,  768, 771, 777, 806, 0,
695 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
696 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
697 		   1208, 1264, 0, 768, 768, 776, 817, 0,
698 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
699 	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
700 		   928, 1152, 0, 624, 625, 628, 667, 0,
701 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
702 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
703 		   896, 1056, 0, 600, 601, 604,  625, 0,
704 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
705 	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
706 		   976, 1040, 0, 600, 637, 643, 666, 0,
707 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
708 	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
709 		   1344, 1600, 0,  864, 865, 868, 900, 0,
710 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
711 };
712 
713 #define EDID_EST_TIMINGS 16
714 #define EDID_STD_TIMINGS 8
715 #define EDID_DETAILED_TIMINGS 4
716 
717 /**
718  * add_established_modes - get est. modes from EDID and add them
719  * @edid: EDID block to scan
720  *
721  * Each EDID block contains a bitmap of the supported "established modes" list
722  * (defined above).  Tease them out and add them to the global modes list.
723  */
724 static int add_established_modes(struct drm_connector *connector, struct edid *edid)
725 {
726 	struct drm_device *dev = connector->dev;
727 	unsigned long est_bits = edid->established_timings.t1 |
728 		(edid->established_timings.t2 << 8) |
729 		((edid->established_timings.mfg_rsvd & 0x80) << 9);
730 	int i, modes = 0;
731 
732 	for (i = 0; i <= EDID_EST_TIMINGS; i++)
733 		if (est_bits & (1<<i)) {
734 			struct drm_display_mode *newmode;
735 			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
736 			if (newmode) {
737 				drm_mode_probed_add(connector, newmode);
738 				modes++;
739 			}
740 		}
741 
742 	return modes;
743 }
744 /**
745  * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
746  * @edid: EDID block to scan
747  */
748 static int standard_timing_level(struct edid *edid)
749 {
750 	if (edid->revision >= 2) {
751 		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
752 			return LEVEL_CVT;
753 		return LEVEL_GTF;
754 	}
755 	return LEVEL_DMT;
756 }
757 
758 /**
759  * add_standard_modes - get std. modes from EDID and add them
760  * @edid: EDID block to scan
761  *
762  * Standard modes can be calculated using the CVT standard.  Grab them from
763  * @edid, calculate them, and add them to the list.
764  */
765 static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
766 {
767 	struct drm_device *dev = connector->dev;
768 	int i, modes = 0;
769 	int timing_level;
770 
771 	timing_level = standard_timing_level(edid);
772 
773 	for (i = 0; i < EDID_STD_TIMINGS; i++) {
774 		struct std_timing *t = &edid->standard_timings[i];
775 		struct drm_display_mode *newmode;
776 
777 		/* If std timings bytes are 1, 1 it's empty */
778 		if (t->hsize == 1 && t->vfreq_aspect == 1)
779 			continue;
780 
781 		newmode = drm_mode_std(dev, &edid->standard_timings[i],
782 					timing_level);
783 		if (newmode) {
784 			drm_mode_probed_add(connector, newmode);
785 			modes++;
786 		}
787 	}
788 
789 	return modes;
790 }
791 
792 /**
793  * add_detailed_modes - get detailed mode info from EDID data
794  * @connector: attached connector
795  * @edid: EDID block to scan
796  * @quirks: quirks to apply
797  *
798  * Some of the detailed timing sections may contain mode information.  Grab
799  * it and add it to the list.
800  */
801 static int add_detailed_info(struct drm_connector *connector,
802 			     struct edid *edid, u32 quirks)
803 {
804 	struct drm_device *dev = connector->dev;
805 	int i, j, modes = 0;
806 	int timing_level;
807 
808 	timing_level = standard_timing_level(edid);
809 
810 	for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
811 		struct detailed_timing *timing = &edid->detailed_timings[i];
812 		struct detailed_non_pixel *data = &timing->data.other_data;
813 		struct drm_display_mode *newmode;
814 
815 		/* X server check is version 1.1 or higher */
816 		if (edid->version == 1 && edid->revision >= 1 &&
817 		    !timing->pixel_clock) {
818 			/* Other timing or info */
819 			switch (data->type) {
820 			case EDID_DETAIL_MONITOR_SERIAL:
821 				break;
822 			case EDID_DETAIL_MONITOR_STRING:
823 				break;
824 			case EDID_DETAIL_MONITOR_RANGE:
825 				/* Get monitor range data */
826 				break;
827 			case EDID_DETAIL_MONITOR_NAME:
828 				break;
829 			case EDID_DETAIL_MONITOR_CPDATA:
830 				break;
831 			case EDID_DETAIL_STD_MODES:
832 				/* Five modes per detailed section */
833 				for (j = 0; j < 5; i++) {
834 					struct std_timing *std;
835 					struct drm_display_mode *newmode;
836 
837 					std = &data->data.timings[j];
838 					newmode = drm_mode_std(dev, std,
839 							       timing_level);
840 					if (newmode) {
841 						drm_mode_probed_add(connector, newmode);
842 						modes++;
843 					}
844 				}
845 				break;
846 			default:
847 				break;
848 			}
849 		} else {
850 			newmode = drm_mode_detailed(dev, edid, timing, quirks);
851 			if (!newmode)
852 				continue;
853 
854 			/* First detailed mode is preferred */
855 			if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING))
856 				newmode->type |= DRM_MODE_TYPE_PREFERRED;
857 			drm_mode_probed_add(connector, newmode);
858 
859 			modes++;
860 		}
861 	}
862 
863 	return modes;
864 }
865 /**
866  * add_detailed_mode_eedid - get detailed mode info from addtional timing
867  * 			EDID block
868  * @connector: attached connector
869  * @edid: EDID block to scan(It is only to get addtional timing EDID block)
870  * @quirks: quirks to apply
871  *
872  * Some of the detailed timing sections may contain mode information.  Grab
873  * it and add it to the list.
874  */
875 static int add_detailed_info_eedid(struct drm_connector *connector,
876 			     struct edid *edid, u32 quirks)
877 {
878 	struct drm_device *dev = connector->dev;
879 	int i, j, modes = 0;
880 	char *edid_ext = NULL;
881 	struct detailed_timing *timing;
882 	struct detailed_non_pixel *data;
883 	struct drm_display_mode *newmode;
884 	int edid_ext_num;
885 	int start_offset, end_offset;
886 	int timing_level;
887 
888 	if (edid->version == 1 && edid->revision < 3) {
889 		/* If the EDID version is less than 1.3, there is no
890 		 * extension EDID.
891 		 */
892 		return 0;
893 	}
894 	if (!edid->extensions) {
895 		/* if there is no extension EDID, it is unnecessary to
896 		 * parse the E-EDID to get detailed info
897 		 */
898 		return 0;
899 	}
900 
901 	/* Chose real EDID extension number */
902 	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
903 		       MAX_EDID_EXT_NUM : edid->extensions;
904 
905 	/* Find CEA extension */
906 	for (i = 0; i < edid_ext_num; i++) {
907 		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
908 		/* This block is CEA extension */
909 		if (edid_ext[0] == 0x02)
910 			break;
911 	}
912 
913 	if (i == edid_ext_num) {
914 		/* if there is no additional timing EDID block, return */
915 		return 0;
916 	}
917 
918 	/* Get the start offset of detailed timing block */
919 	start_offset = edid_ext[2];
920 	if (start_offset == 0) {
921 		/* If the start_offset is zero, it means that neither detailed
922 		 * info nor data block exist. In such case it is also
923 		 * unnecessary to parse the detailed timing info.
924 		 */
925 		return 0;
926 	}
927 
928 	timing_level = standard_timing_level(edid);
929 	end_offset = EDID_LENGTH;
930 	end_offset -= sizeof(struct detailed_timing);
931 	for (i = start_offset; i < end_offset;
932 			i += sizeof(struct detailed_timing)) {
933 		timing = (struct detailed_timing *)(edid_ext + i);
934 		data = &timing->data.other_data;
935 		/* Detailed mode timing */
936 		if (timing->pixel_clock) {
937 			newmode = drm_mode_detailed(dev, edid, timing, quirks);
938 			if (!newmode)
939 				continue;
940 
941 			drm_mode_probed_add(connector, newmode);
942 
943 			modes++;
944 			continue;
945 		}
946 
947 		/* Other timing or info */
948 		switch (data->type) {
949 		case EDID_DETAIL_MONITOR_SERIAL:
950 			break;
951 		case EDID_DETAIL_MONITOR_STRING:
952 			break;
953 		case EDID_DETAIL_MONITOR_RANGE:
954 			/* Get monitor range data */
955 			break;
956 		case EDID_DETAIL_MONITOR_NAME:
957 			break;
958 		case EDID_DETAIL_MONITOR_CPDATA:
959 			break;
960 		case EDID_DETAIL_STD_MODES:
961 			/* Five modes per detailed section */
962 			for (j = 0; j < 5; i++) {
963 				struct std_timing *std;
964 				struct drm_display_mode *newmode;
965 
966 				std = &data->data.timings[j];
967 				newmode = drm_mode_std(dev, std, timing_level);
968 				if (newmode) {
969 					drm_mode_probed_add(connector, newmode);
970 					modes++;
971 				}
972 			}
973 			break;
974 		default:
975 			break;
976 		}
977 	}
978 
979 	return modes;
980 }
981 
982 #define DDC_ADDR 0x50
983 /**
984  * Get EDID information via I2C.
985  *
986  * \param adapter : i2c device adaptor
987  * \param buf     : EDID data buffer to be filled
988  * \param len     : EDID data buffer length
989  * \return 0 on success or -1 on failure.
990  *
991  * Try to fetch EDID information by calling i2c driver function.
992  */
993 int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
994 			  unsigned char *buf, int len)
995 {
996 	unsigned char start = 0x0;
997 	struct i2c_msg msgs[] = {
998 		{
999 			.addr	= DDC_ADDR,
1000 			.flags	= 0,
1001 			.len	= 1,
1002 			.buf	= &start,
1003 		}, {
1004 			.addr	= DDC_ADDR,
1005 			.flags	= I2C_M_RD,
1006 			.len	= len,
1007 			.buf	= buf,
1008 		}
1009 	};
1010 
1011 	if (i2c_transfer(adapter, msgs, 2) == 2)
1012 		return 0;
1013 
1014 	return -1;
1015 }
1016 EXPORT_SYMBOL(drm_do_probe_ddc_edid);
1017 
1018 static int drm_ddc_read_edid(struct drm_connector *connector,
1019 			     struct i2c_adapter *adapter,
1020 			     char *buf, int len)
1021 {
1022 	int ret;
1023 
1024 	ret = drm_do_probe_ddc_edid(adapter, buf, len);
1025 	if (ret != 0) {
1026 		goto end;
1027 	}
1028 	if (!edid_is_valid((struct edid *)buf)) {
1029 		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1030 			 drm_get_connector_name(connector));
1031 		ret = -1;
1032 	}
1033 end:
1034 	return ret;
1035 }
1036 
1037 /**
1038  * drm_get_edid - get EDID data, if available
1039  * @connector: connector we're probing
1040  * @adapter: i2c adapter to use for DDC
1041  *
1042  * Poke the given connector's i2c channel to grab EDID data if possible.
1043  *
1044  * Return edid data or NULL if we couldn't find any.
1045  */
1046 struct edid *drm_get_edid(struct drm_connector *connector,
1047 			  struct i2c_adapter *adapter)
1048 {
1049 	int ret;
1050 	struct edid *edid;
1051 
1052 	edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
1053 		       GFP_KERNEL);
1054 	if (edid == NULL) {
1055 		dev_warn(&connector->dev->pdev->dev,
1056 			 "Failed to allocate EDID\n");
1057 		goto end;
1058 	}
1059 
1060 	/* Read first EDID block */
1061 	ret = drm_ddc_read_edid(connector, adapter,
1062 				(unsigned char *)edid, EDID_LENGTH);
1063 	if (ret != 0)
1064 		goto clean_up;
1065 
1066 	/* There are EDID extensions to be read */
1067 	if (edid->extensions != 0) {
1068 		int edid_ext_num = edid->extensions;
1069 
1070 		if (edid_ext_num > MAX_EDID_EXT_NUM) {
1071 			dev_warn(&connector->dev->pdev->dev,
1072 				 "The number of extension(%d) is "
1073 				 "over max (%d), actually read number (%d)\n",
1074 				 edid_ext_num, MAX_EDID_EXT_NUM,
1075 				 MAX_EDID_EXT_NUM);
1076 			/* Reset EDID extension number to be read */
1077 			edid_ext_num = MAX_EDID_EXT_NUM;
1078 		}
1079 		/* Read EDID including extensions too */
1080 		ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
1081 					EDID_LENGTH * (edid_ext_num + 1));
1082 		if (ret != 0)
1083 			goto clean_up;
1084 
1085 	}
1086 
1087 	connector->display_info.raw_edid = (char *)edid;
1088 	goto end;
1089 
1090 clean_up:
1091 	kfree(edid);
1092 	edid = NULL;
1093 end:
1094 	return edid;
1095 
1096 }
1097 EXPORT_SYMBOL(drm_get_edid);
1098 
1099 #define HDMI_IDENTIFIER 0x000C03
1100 #define VENDOR_BLOCK    0x03
1101 /**
1102  * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1103  * @edid: monitor EDID information
1104  *
1105  * Parse the CEA extension according to CEA-861-B.
1106  * Return true if HDMI, false if not or unknown.
1107  */
1108 bool drm_detect_hdmi_monitor(struct edid *edid)
1109 {
1110 	char *edid_ext = NULL;
1111 	int i, hdmi_id, edid_ext_num;
1112 	int start_offset, end_offset;
1113 	bool is_hdmi = false;
1114 
1115 	/* No EDID or EDID extensions */
1116 	if (edid == NULL || edid->extensions == 0)
1117 		goto end;
1118 
1119 	/* Chose real EDID extension number */
1120 	edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
1121 		       MAX_EDID_EXT_NUM : edid->extensions;
1122 
1123 	/* Find CEA extension */
1124 	for (i = 0; i < edid_ext_num; i++) {
1125 		edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
1126 		/* This block is CEA extension */
1127 		if (edid_ext[0] == 0x02)
1128 			break;
1129 	}
1130 
1131 	if (i == edid_ext_num)
1132 		goto end;
1133 
1134 	/* Data block offset in CEA extension block */
1135 	start_offset = 4;
1136 	end_offset = edid_ext[2];
1137 
1138 	/*
1139 	 * Because HDMI identifier is in Vendor Specific Block,
1140 	 * search it from all data blocks of CEA extension.
1141 	 */
1142 	for (i = start_offset; i < end_offset;
1143 		/* Increased by data block len */
1144 		i += ((edid_ext[i] & 0x1f) + 1)) {
1145 		/* Find vendor specific block */
1146 		if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1147 			hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1148 				  edid_ext[i + 3] << 16;
1149 			/* Find HDMI identifier */
1150 			if (hdmi_id == HDMI_IDENTIFIER)
1151 				is_hdmi = true;
1152 			break;
1153 		}
1154 	}
1155 
1156 end:
1157 	return is_hdmi;
1158 }
1159 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1160 
1161 /**
1162  * drm_add_edid_modes - add modes from EDID data, if available
1163  * @connector: connector we're probing
1164  * @edid: edid data
1165  *
1166  * Add the specified modes to the connector's mode list.
1167  *
1168  * Return number of modes added or 0 if we couldn't find any.
1169  */
1170 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1171 {
1172 	int num_modes = 0;
1173 	u32 quirks;
1174 
1175 	if (edid == NULL) {
1176 		return 0;
1177 	}
1178 	if (!edid_is_valid(edid)) {
1179 		dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
1180 			 drm_get_connector_name(connector));
1181 		return 0;
1182 	}
1183 
1184 	quirks = edid_get_quirks(edid);
1185 
1186 	num_modes += add_established_modes(connector, edid);
1187 	num_modes += add_standard_modes(connector, edid);
1188 	num_modes += add_detailed_info(connector, edid, quirks);
1189 	num_modes += add_detailed_info_eedid(connector, edid, quirks);
1190 
1191 	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1192 		edid_fixup_preferred(connector, quirks);
1193 
1194 	connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
1195 	connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
1196 	connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
1197 	connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
1198 	connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
1199 	connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
1200 	connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
1201 	connector->display_info.width_mm = edid->width_cm * 10;
1202 	connector->display_info.height_mm = edid->height_cm * 10;
1203 	connector->display_info.gamma = edid->gamma;
1204 	connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
1205 	connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
1206 	connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
1207 	connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
1208 	connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
1209 	connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
1210 	connector->display_info.gamma = edid->gamma;
1211 
1212 	return num_modes;
1213 }
1214 EXPORT_SYMBOL(drm_add_edid_modes);
1215 
1216 /**
1217  * drm_add_modes_noedid - add modes for the connectors without EDID
1218  * @connector: connector we're probing
1219  * @hdisplay: the horizontal display limit
1220  * @vdisplay: the vertical display limit
1221  *
1222  * Add the specified modes to the connector's mode list. Only when the
1223  * hdisplay/vdisplay is not beyond the given limit, it will be added.
1224  *
1225  * Return number of modes added or 0 if we couldn't find any.
1226  */
1227 int drm_add_modes_noedid(struct drm_connector *connector,
1228 			int hdisplay, int vdisplay)
1229 {
1230 	int i, count, num_modes = 0;
1231 	struct drm_display_mode *mode, *ptr;
1232 	struct drm_device *dev = connector->dev;
1233 
1234 	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1235 	if (hdisplay < 0)
1236 		hdisplay = 0;
1237 	if (vdisplay < 0)
1238 		vdisplay = 0;
1239 
1240 	for (i = 0; i < count; i++) {
1241 		ptr = &drm_dmt_modes[i];
1242 		if (hdisplay && vdisplay) {
1243 			/*
1244 			 * Only when two are valid, they will be used to check
1245 			 * whether the mode should be added to the mode list of
1246 			 * the connector.
1247 			 */
1248 			if (ptr->hdisplay > hdisplay ||
1249 					ptr->vdisplay > vdisplay)
1250 				continue;
1251 		}
1252 		mode = drm_mode_duplicate(dev, ptr);
1253 		if (mode) {
1254 			drm_mode_probed_add(connector, mode);
1255 			num_modes++;
1256 		}
1257 	}
1258 	return num_modes;
1259 }
1260 EXPORT_SYMBOL(drm_add_modes_noedid);
1261