1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * 6 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 7 * FB layer. 8 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 9 * 10 * Permission is hereby granted, free of charge, to any person obtaining a 11 * copy of this software and associated documentation files (the "Software"), 12 * to deal in the Software without restriction, including without limitation 13 * the rights to use, copy, modify, merge, publish, distribute, sub license, 14 * and/or sell copies of the Software, and to permit persons to whom the 15 * Software is furnished to do so, subject to the following conditions: 16 * 17 * The above copyright notice and this permission notice (including the 18 * next paragraph) shall be included in all copies or substantial portions 19 * of the Software. 20 * 21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 23 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 24 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 26 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 27 * DEALINGS IN THE SOFTWARE. 28 */ 29 #include <linux/kernel.h> 30 #include <linux/i2c.h> 31 #include <linux/i2c-algo-bit.h> 32 #include "drmP.h" 33 #include "drm_edid.h" 34 35 /* 36 * TODO: 37 * - support EDID 1.4 (incl. CE blocks) 38 */ 39 40 /* 41 * EDID blocks out in the wild have a variety of bugs, try to collect 42 * them here (note that userspace may work around broken monitors first, 43 * but fixes should make their way here so that the kernel "just works" 44 * on as many displays as possible). 45 */ 46 47 /* First detailed mode wrong, use largest 60Hz mode */ 48 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 49 /* Reported 135MHz pixel clock is too high, needs adjustment */ 50 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 51 /* Prefer the largest mode at 75 Hz */ 52 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 53 /* Detail timing is in cm not mm */ 54 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 55 /* Detailed timing descriptors have bogus size values, so just take the 56 * maximum size and use that. 57 */ 58 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 59 /* Monitor forgot to set the first detailed is preferred bit. */ 60 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 61 /* use +hsync +vsync for detailed mode */ 62 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 63 64 static struct edid_quirk { 65 char *vendor; 66 int product_id; 67 u32 quirks; 68 } edid_quirk_list[] = { 69 /* Acer AL1706 */ 70 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 71 /* Acer F51 */ 72 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 73 /* Unknown Acer */ 74 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 75 76 /* Belinea 10 15 55 */ 77 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 78 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 79 80 /* Envision Peripherals, Inc. EN-7100e */ 81 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 82 83 /* Funai Electronics PM36B */ 84 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 85 EDID_QUIRK_DETAILED_IN_CM }, 86 87 /* LG Philips LCD LP154W01-A5 */ 88 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 89 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 90 91 /* Philips 107p5 CRT */ 92 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 93 94 /* Proview AY765C */ 95 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 96 97 /* Samsung SyncMaster 205BW. Note: irony */ 98 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 99 /* Samsung SyncMaster 22[5-6]BW */ 100 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 101 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 102 }; 103 104 105 /* Valid EDID header has these bytes */ 106 static u8 edid_header[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; 107 108 /** 109 * edid_is_valid - sanity check EDID data 110 * @edid: EDID data 111 * 112 * Sanity check the EDID block by looking at the header, the version number 113 * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's 114 * valid. 115 */ 116 static bool edid_is_valid(struct edid *edid) 117 { 118 int i; 119 u8 csum = 0; 120 u8 *raw_edid = (u8 *)edid; 121 122 if (memcmp(edid->header, edid_header, sizeof(edid_header))) 123 goto bad; 124 if (edid->version != 1) { 125 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 126 goto bad; 127 } 128 if (edid->revision > 3) { 129 DRM_ERROR("EDID has minor version %d, which is not between 0-3\n", edid->revision); 130 goto bad; 131 } 132 133 for (i = 0; i < EDID_LENGTH; i++) 134 csum += raw_edid[i]; 135 if (csum) { 136 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 137 goto bad; 138 } 139 140 return 1; 141 142 bad: 143 if (raw_edid) { 144 DRM_ERROR("Raw EDID:\n"); 145 print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); 146 printk("\n"); 147 } 148 return 0; 149 } 150 151 /** 152 * edid_vendor - match a string against EDID's obfuscated vendor field 153 * @edid: EDID to match 154 * @vendor: vendor string 155 * 156 * Returns true if @vendor is in @edid, false otherwise 157 */ 158 static bool edid_vendor(struct edid *edid, char *vendor) 159 { 160 char edid_vendor[3]; 161 162 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 163 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 164 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 165 edid_vendor[2] = (edid->mfg_id[2] & 0x1f) + '@'; 166 167 return !strncmp(edid_vendor, vendor, 3); 168 } 169 170 /** 171 * edid_get_quirks - return quirk flags for a given EDID 172 * @edid: EDID to process 173 * 174 * This tells subsequent routines what fixes they need to apply. 175 */ 176 static u32 edid_get_quirks(struct edid *edid) 177 { 178 struct edid_quirk *quirk; 179 int i; 180 181 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 182 quirk = &edid_quirk_list[i]; 183 184 if (edid_vendor(edid, quirk->vendor) && 185 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 186 return quirk->quirks; 187 } 188 189 return 0; 190 } 191 192 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 193 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 194 195 196 /** 197 * edid_fixup_preferred - set preferred modes based on quirk list 198 * @connector: has mode list to fix up 199 * @quirks: quirks list 200 * 201 * Walk the mode list for @connector, clearing the preferred status 202 * on existing modes and setting it anew for the right mode ala @quirks. 203 */ 204 static void edid_fixup_preferred(struct drm_connector *connector, 205 u32 quirks) 206 { 207 struct drm_display_mode *t, *cur_mode, *preferred_mode; 208 int target_refresh = 0; 209 210 if (list_empty(&connector->probed_modes)) 211 return; 212 213 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 214 target_refresh = 60; 215 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 216 target_refresh = 75; 217 218 preferred_mode = list_first_entry(&connector->probed_modes, 219 struct drm_display_mode, head); 220 221 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 222 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 223 224 if (cur_mode == preferred_mode) 225 continue; 226 227 /* Largest mode is preferred */ 228 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 229 preferred_mode = cur_mode; 230 231 /* At a given size, try to get closest to target refresh */ 232 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 233 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 234 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 235 preferred_mode = cur_mode; 236 } 237 } 238 239 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 240 } 241 242 /** 243 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 244 * @t: standard timing params 245 * 246 * Take the standard timing params (in this case width, aspect, and refresh) 247 * and convert them into a real mode using CVT. 248 * 249 * Punts for now, but should eventually use the FB layer's CVT based mode 250 * generation code. 251 */ 252 struct drm_display_mode *drm_mode_std(struct drm_device *dev, 253 struct std_timing *t) 254 { 255 struct drm_display_mode *mode; 256 int hsize = t->hsize * 8 + 248, vsize; 257 258 mode = drm_mode_create(dev); 259 if (!mode) 260 return NULL; 261 262 if (t->aspect_ratio == 0) 263 vsize = (hsize * 10) / 16; 264 else if (t->aspect_ratio == 1) 265 vsize = (hsize * 3) / 4; 266 else if (t->aspect_ratio == 2) 267 vsize = (hsize * 4) / 5; 268 else 269 vsize = (hsize * 9) / 16; 270 271 drm_mode_set_name(mode); 272 273 return mode; 274 } 275 276 /** 277 * drm_mode_detailed - create a new mode from an EDID detailed timing section 278 * @dev: DRM device (needed to create new mode) 279 * @edid: EDID block 280 * @timing: EDID detailed timing info 281 * @quirks: quirks to apply 282 * 283 * An EDID detailed timing block contains enough info for us to create and 284 * return a new struct drm_display_mode. 285 */ 286 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 287 struct edid *edid, 288 struct detailed_timing *timing, 289 u32 quirks) 290 { 291 struct drm_display_mode *mode; 292 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 293 294 if (pt->stereo) { 295 printk(KERN_WARNING "stereo mode not supported\n"); 296 return NULL; 297 } 298 if (!pt->separate_sync) { 299 printk(KERN_WARNING "integrated sync not supported\n"); 300 return NULL; 301 } 302 303 mode = drm_mode_create(dev); 304 if (!mode) 305 return NULL; 306 307 mode->type = DRM_MODE_TYPE_DRIVER; 308 309 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 310 timing->pixel_clock = 1088; 311 312 mode->clock = timing->pixel_clock * 10; 313 314 mode->hdisplay = (pt->hactive_hi << 8) | pt->hactive_lo; 315 mode->hsync_start = mode->hdisplay + ((pt->hsync_offset_hi << 8) | 316 pt->hsync_offset_lo); 317 mode->hsync_end = mode->hsync_start + 318 ((pt->hsync_pulse_width_hi << 8) | 319 pt->hsync_pulse_width_lo); 320 mode->htotal = mode->hdisplay + ((pt->hblank_hi << 8) | pt->hblank_lo); 321 322 mode->vdisplay = (pt->vactive_hi << 8) | pt->vactive_lo; 323 mode->vsync_start = mode->vdisplay + ((pt->vsync_offset_hi << 4) | 324 pt->vsync_offset_lo); 325 mode->vsync_end = mode->vsync_start + 326 ((pt->vsync_pulse_width_hi << 4) | 327 pt->vsync_pulse_width_lo); 328 mode->vtotal = mode->vdisplay + ((pt->vblank_hi << 8) | pt->vblank_lo); 329 330 drm_mode_set_name(mode); 331 332 if (pt->interlaced) 333 mode->flags |= DRM_MODE_FLAG_INTERLACE; 334 335 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 336 pt->hsync_positive = 1; 337 pt->vsync_positive = 1; 338 } 339 340 mode->flags |= pt->hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 341 mode->flags |= pt->vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 342 343 mode->width_mm = pt->width_mm_lo | (pt->width_mm_hi << 8); 344 mode->height_mm = pt->height_mm_lo | (pt->height_mm_hi << 8); 345 346 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 347 mode->width_mm *= 10; 348 mode->height_mm *= 10; 349 } 350 351 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 352 mode->width_mm = edid->width_cm * 10; 353 mode->height_mm = edid->height_cm * 10; 354 } 355 356 return mode; 357 } 358 359 /* 360 * Detailed mode info for the EDID "established modes" data to use. 361 */ 362 static struct drm_display_mode edid_est_modes[] = { 363 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 364 968, 1056, 0, 600, 601, 605, 628, 0, 365 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 366 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 367 896, 1024, 0, 600, 601, 603, 625, 0, 368 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 369 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 370 720, 840, 0, 480, 481, 484, 500, 0, 371 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 372 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 373 704, 832, 0, 480, 489, 491, 520, 0, 374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 375 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 376 768, 864, 0, 480, 483, 486, 525, 0, 377 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 378 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 379 752, 800, 0, 480, 490, 492, 525, 0, 380 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 381 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 382 846, 900, 0, 400, 421, 423, 449, 0, 383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 384 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 385 846, 900, 0, 400, 412, 414, 449, 0, 386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 387 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 388 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 389 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 390 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 391 1136, 1312, 0, 768, 769, 772, 800, 0, 392 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 393 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 394 1184, 1328, 0, 768, 771, 777, 806, 0, 395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 396 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 397 1184, 1344, 0, 768, 771, 777, 806, 0, 398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 399 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 400 1208, 1264, 0, 768, 768, 776, 817, 0, 401 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 402 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 403 928, 1152, 0, 624, 625, 628, 667, 0, 404 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 405 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 406 896, 1056, 0, 600, 601, 604, 625, 0, 407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 408 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 409 976, 1040, 0, 600, 637, 643, 666, 0, 410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 411 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 412 1344, 1600, 0, 864, 865, 868, 900, 0, 413 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 414 }; 415 416 #define EDID_EST_TIMINGS 16 417 #define EDID_STD_TIMINGS 8 418 #define EDID_DETAILED_TIMINGS 4 419 420 /** 421 * add_established_modes - get est. modes from EDID and add them 422 * @edid: EDID block to scan 423 * 424 * Each EDID block contains a bitmap of the supported "established modes" list 425 * (defined above). Tease them out and add them to the global modes list. 426 */ 427 static int add_established_modes(struct drm_connector *connector, struct edid *edid) 428 { 429 struct drm_device *dev = connector->dev; 430 unsigned long est_bits = edid->established_timings.t1 | 431 (edid->established_timings.t2 << 8) | 432 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 433 int i, modes = 0; 434 435 for (i = 0; i <= EDID_EST_TIMINGS; i++) 436 if (est_bits & (1<<i)) { 437 struct drm_display_mode *newmode; 438 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 439 if (newmode) { 440 drm_mode_probed_add(connector, newmode); 441 modes++; 442 } 443 } 444 445 return modes; 446 } 447 448 /** 449 * add_standard_modes - get std. modes from EDID and add them 450 * @edid: EDID block to scan 451 * 452 * Standard modes can be calculated using the CVT standard. Grab them from 453 * @edid, calculate them, and add them to the list. 454 */ 455 static int add_standard_modes(struct drm_connector *connector, struct edid *edid) 456 { 457 struct drm_device *dev = connector->dev; 458 int i, modes = 0; 459 460 for (i = 0; i < EDID_STD_TIMINGS; i++) { 461 struct std_timing *t = &edid->standard_timings[i]; 462 struct drm_display_mode *newmode; 463 464 /* If std timings bytes are 1, 1 it's empty */ 465 if (t->hsize == 1 && (t->aspect_ratio | t->vfreq) == 1) 466 continue; 467 468 newmode = drm_mode_std(dev, &edid->standard_timings[i]); 469 if (newmode) { 470 drm_mode_probed_add(connector, newmode); 471 modes++; 472 } 473 } 474 475 return modes; 476 } 477 478 /** 479 * add_detailed_modes - get detailed mode info from EDID data 480 * @connector: attached connector 481 * @edid: EDID block to scan 482 * @quirks: quirks to apply 483 * 484 * Some of the detailed timing sections may contain mode information. Grab 485 * it and add it to the list. 486 */ 487 static int add_detailed_info(struct drm_connector *connector, 488 struct edid *edid, u32 quirks) 489 { 490 struct drm_device *dev = connector->dev; 491 int i, j, modes = 0; 492 493 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { 494 struct detailed_timing *timing = &edid->detailed_timings[i]; 495 struct detailed_non_pixel *data = &timing->data.other_data; 496 struct drm_display_mode *newmode; 497 498 /* EDID up to and including 1.2 may put monitor info here */ 499 if (edid->version == 1 && edid->revision < 3) 500 continue; 501 502 /* Detailed mode timing */ 503 if (timing->pixel_clock) { 504 newmode = drm_mode_detailed(dev, edid, timing, quirks); 505 if (!newmode) 506 continue; 507 508 /* First detailed mode is preferred */ 509 if (i == 0 && edid->preferred_timing) 510 newmode->type |= DRM_MODE_TYPE_PREFERRED; 511 drm_mode_probed_add(connector, newmode); 512 513 modes++; 514 continue; 515 } 516 517 /* Other timing or info */ 518 switch (data->type) { 519 case EDID_DETAIL_MONITOR_SERIAL: 520 break; 521 case EDID_DETAIL_MONITOR_STRING: 522 break; 523 case EDID_DETAIL_MONITOR_RANGE: 524 /* Get monitor range data */ 525 break; 526 case EDID_DETAIL_MONITOR_NAME: 527 break; 528 case EDID_DETAIL_MONITOR_CPDATA: 529 break; 530 case EDID_DETAIL_STD_MODES: 531 /* Five modes per detailed section */ 532 for (j = 0; j < 5; i++) { 533 struct std_timing *std; 534 struct drm_display_mode *newmode; 535 536 std = &data->data.timings[j]; 537 newmode = drm_mode_std(dev, std); 538 if (newmode) { 539 drm_mode_probed_add(connector, newmode); 540 modes++; 541 } 542 } 543 break; 544 default: 545 break; 546 } 547 } 548 549 return modes; 550 } 551 552 #define DDC_ADDR 0x50 553 554 unsigned char *drm_do_probe_ddc_edid(struct i2c_adapter *adapter) 555 { 556 unsigned char start = 0x0; 557 unsigned char *buf = kmalloc(EDID_LENGTH, GFP_KERNEL); 558 struct i2c_msg msgs[] = { 559 { 560 .addr = DDC_ADDR, 561 .flags = 0, 562 .len = 1, 563 .buf = &start, 564 }, { 565 .addr = DDC_ADDR, 566 .flags = I2C_M_RD, 567 .len = EDID_LENGTH, 568 .buf = buf, 569 } 570 }; 571 572 if (!buf) { 573 dev_warn(&adapter->dev, "unable to allocate memory for EDID " 574 "block.\n"); 575 return NULL; 576 } 577 578 if (i2c_transfer(adapter, msgs, 2) == 2) 579 return buf; 580 581 dev_info(&adapter->dev, "unable to read EDID block.\n"); 582 kfree(buf); 583 return NULL; 584 } 585 EXPORT_SYMBOL(drm_do_probe_ddc_edid); 586 587 static unsigned char *drm_ddc_read(struct i2c_adapter *adapter) 588 { 589 struct i2c_algo_bit_data *algo_data = adapter->algo_data; 590 unsigned char *edid = NULL; 591 int i, j; 592 593 algo_data->setscl(algo_data->data, 1); 594 595 for (i = 0; i < 1; i++) { 596 /* For some old monitors we need the 597 * following process to initialize/stop DDC 598 */ 599 algo_data->setsda(algo_data->data, 1); 600 msleep(13); 601 602 algo_data->setscl(algo_data->data, 1); 603 for (j = 0; j < 5; j++) { 604 msleep(10); 605 if (algo_data->getscl(algo_data->data)) 606 break; 607 } 608 if (j == 5) 609 continue; 610 611 algo_data->setsda(algo_data->data, 0); 612 msleep(15); 613 algo_data->setscl(algo_data->data, 0); 614 msleep(15); 615 algo_data->setsda(algo_data->data, 1); 616 msleep(15); 617 618 /* Do the real work */ 619 edid = drm_do_probe_ddc_edid(adapter); 620 algo_data->setsda(algo_data->data, 0); 621 algo_data->setscl(algo_data->data, 0); 622 msleep(15); 623 624 algo_data->setscl(algo_data->data, 1); 625 for (j = 0; j < 10; j++) { 626 msleep(10); 627 if (algo_data->getscl(algo_data->data)) 628 break; 629 } 630 631 algo_data->setsda(algo_data->data, 1); 632 msleep(15); 633 algo_data->setscl(algo_data->data, 0); 634 algo_data->setsda(algo_data->data, 0); 635 if (edid) 636 break; 637 } 638 /* Release the DDC lines when done or the Apple Cinema HD display 639 * will switch off 640 */ 641 algo_data->setsda(algo_data->data, 1); 642 algo_data->setscl(algo_data->data, 1); 643 644 return edid; 645 } 646 647 /** 648 * drm_get_edid - get EDID data, if available 649 * @connector: connector we're probing 650 * @adapter: i2c adapter to use for DDC 651 * 652 * Poke the given connector's i2c channel to grab EDID data if possible. 653 * 654 * Return edid data or NULL if we couldn't find any. 655 */ 656 struct edid *drm_get_edid(struct drm_connector *connector, 657 struct i2c_adapter *adapter) 658 { 659 struct edid *edid; 660 661 edid = (struct edid *)drm_ddc_read(adapter); 662 if (!edid) { 663 dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n", 664 drm_get_connector_name(connector)); 665 return NULL; 666 } 667 if (!edid_is_valid(edid)) { 668 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 669 drm_get_connector_name(connector)); 670 kfree(edid); 671 return NULL; 672 } 673 674 connector->display_info.raw_edid = (char *)edid; 675 676 return edid; 677 } 678 EXPORT_SYMBOL(drm_get_edid); 679 680 /** 681 * drm_add_edid_modes - add modes from EDID data, if available 682 * @connector: connector we're probing 683 * @edid: edid data 684 * 685 * Add the specified modes to the connector's mode list. 686 * 687 * Return number of modes added or 0 if we couldn't find any. 688 */ 689 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 690 { 691 int num_modes = 0; 692 u32 quirks; 693 694 if (edid == NULL) { 695 return 0; 696 } 697 if (!edid_is_valid(edid)) { 698 dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", 699 drm_get_connector_name(connector)); 700 return 0; 701 } 702 703 quirks = edid_get_quirks(edid); 704 705 num_modes += add_established_modes(connector, edid); 706 num_modes += add_standard_modes(connector, edid); 707 num_modes += add_detailed_info(connector, edid, quirks); 708 709 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 710 edid_fixup_preferred(connector, quirks); 711 712 connector->display_info.serration_vsync = edid->serration_vsync; 713 connector->display_info.sync_on_green = edid->sync_on_green; 714 connector->display_info.composite_sync = edid->composite_sync; 715 connector->display_info.separate_syncs = edid->separate_syncs; 716 connector->display_info.blank_to_black = edid->blank_to_black; 717 connector->display_info.video_level = edid->video_level; 718 connector->display_info.digital = edid->digital; 719 connector->display_info.width_mm = edid->width_cm * 10; 720 connector->display_info.height_mm = edid->height_cm * 10; 721 connector->display_info.gamma = edid->gamma; 722 connector->display_info.gtf_supported = edid->default_gtf; 723 connector->display_info.standard_color = edid->standard_color; 724 connector->display_info.display_type = edid->display_type; 725 connector->display_info.active_off_supported = edid->pm_active_off; 726 connector->display_info.suspend_supported = edid->pm_suspend; 727 connector->display_info.standby_supported = edid->pm_standby; 728 connector->display_info.gamma = edid->gamma; 729 730 return num_modes; 731 } 732 EXPORT_SYMBOL(drm_add_edid_modes); 733