xref: /linux/drivers/gpu/drm/drm_displayid_internal.h (revision 40ccd6aa3e2e05be93394e3cd560c718dedfcc77)
1 /*
2  * Copyright © 2014 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  */
22 
23 #ifndef __DRM_DISPLAYID_INTERNAL_H__
24 #define __DRM_DISPLAYID_INTERNAL_H__
25 
26 #include <linux/types.h>
27 #include <linux/bits.h>
28 
29 struct drm_edid;
30 
31 #define VESA_IEEE_OUI				0x3a0292
32 
33 /* DisplayID Structure versions */
34 #define DISPLAY_ID_STRUCTURE_VER_20		0x20
35 
36 /* DisplayID Structure v1r2 Data Blocks */
37 #define DATA_BLOCK_PRODUCT_ID			0x00
38 #define DATA_BLOCK_DISPLAY_PARAMETERS		0x01
39 #define DATA_BLOCK_COLOR_CHARACTERISTICS	0x02
40 #define DATA_BLOCK_TYPE_1_DETAILED_TIMING	0x03
41 #define DATA_BLOCK_TYPE_2_DETAILED_TIMING	0x04
42 #define DATA_BLOCK_TYPE_3_SHORT_TIMING		0x05
43 #define DATA_BLOCK_TYPE_4_DMT_TIMING		0x06
44 #define DATA_BLOCK_VESA_TIMING			0x07
45 #define DATA_BLOCK_CEA_TIMING			0x08
46 #define DATA_BLOCK_VIDEO_TIMING_RANGE		0x09
47 #define DATA_BLOCK_PRODUCT_SERIAL_NUMBER	0x0a
48 #define DATA_BLOCK_GP_ASCII_STRING		0x0b
49 #define DATA_BLOCK_DISPLAY_DEVICE_DATA		0x0c
50 #define DATA_BLOCK_INTERFACE_POWER_SEQUENCING	0x0d
51 #define DATA_BLOCK_TRANSFER_CHARACTERISTICS	0x0e
52 #define DATA_BLOCK_DISPLAY_INTERFACE		0x0f
53 #define DATA_BLOCK_STEREO_DISPLAY_INTERFACE	0x10
54 #define DATA_BLOCK_TILED_DISPLAY		0x12
55 #define DATA_BLOCK_VENDOR_SPECIFIC		0x7f
56 #define DATA_BLOCK_CTA				0x81
57 
58 /* DisplayID Structure v2r0 Data Blocks */
59 #define DATA_BLOCK_2_PRODUCT_ID			0x20
60 #define DATA_BLOCK_2_DISPLAY_PARAMETERS		0x21
61 #define DATA_BLOCK_2_TYPE_7_DETAILED_TIMING	0x22
62 #define DATA_BLOCK_2_TYPE_8_ENUMERATED_TIMING	0x23
63 #define DATA_BLOCK_2_TYPE_9_FORMULA_TIMING	0x24
64 #define DATA_BLOCK_2_DYNAMIC_VIDEO_TIMING	0x25
65 #define DATA_BLOCK_2_DISPLAY_INTERFACE_FEATURES	0x26
66 #define DATA_BLOCK_2_STEREO_DISPLAY_INTERFACE	0x27
67 #define DATA_BLOCK_2_TILED_DISPLAY_TOPOLOGY	0x28
68 #define DATA_BLOCK_2_CONTAINER_ID		0x29
69 #define DATA_BLOCK_2_VENDOR_SPECIFIC		0x7e
70 #define DATA_BLOCK_2_CTA_DISPLAY_ID		0x81
71 
72 /* DisplayID Structure v1r2 Product Type */
73 #define PRODUCT_TYPE_EXTENSION			0
74 #define PRODUCT_TYPE_TEST			1
75 #define PRODUCT_TYPE_PANEL			2
76 #define PRODUCT_TYPE_MONITOR			3
77 #define PRODUCT_TYPE_TV				4
78 #define PRODUCT_TYPE_REPEATER			5
79 #define PRODUCT_TYPE_DIRECT_DRIVE		6
80 
81 /* DisplayID Structure v2r0 Display Product Primary Use Case (~Product Type) */
82 #define PRIMARY_USE_EXTENSION			0
83 #define PRIMARY_USE_TEST			1
84 #define PRIMARY_USE_GENERIC			2
85 #define PRIMARY_USE_TV				3
86 #define PRIMARY_USE_DESKTOP_PRODUCTIVITY	4
87 #define PRIMARY_USE_DESKTOP_GAMING		5
88 #define PRIMARY_USE_PRESENTATION		6
89 #define PRIMARY_USE_HEAD_MOUNTED_VR		7
90 #define PRIMARY_USE_HEAD_MOUNTED_AR		8
91 
92 struct displayid_header {
93 	u8 rev;
94 	u8 bytes;
95 	u8 prod_id;
96 	u8 ext_count;
97 } __packed;
98 
99 struct displayid_block {
100 	u8 tag;
101 	u8 rev;
102 	u8 num_bytes;
103 } __packed;
104 
105 struct displayid_tiled_block {
106 	struct displayid_block base;
107 	u8 tile_cap;
108 	u8 topo[3];
109 	u8 tile_size[4];
110 	u8 tile_pixel_bezel[5];
111 	u8 topology_id[8];
112 } __packed;
113 
114 struct displayid_detailed_timings_1 {
115 	u8 pixel_clock[3];
116 	u8 flags;
117 	u8 hactive[2];
118 	u8 hblank[2];
119 	u8 hsync[2];
120 	u8 hsw[2];
121 	u8 vactive[2];
122 	u8 vblank[2];
123 	u8 vsync[2];
124 	u8 vsw[2];
125 } __packed;
126 
127 struct displayid_detailed_timing_block {
128 	struct displayid_block base;
129 	struct displayid_detailed_timings_1 timings[];
130 };
131 
132 #define DISPLAYID_VESA_MSO_OVERLAP	GENMASK(3, 0)
133 #define DISPLAYID_VESA_MSO_MODE		GENMASK(6, 5)
134 
135 struct displayid_vesa_vendor_specific_block {
136 	struct displayid_block base;
137 	u8 oui[3];
138 	u8 data_structure_type;
139 	u8 mso;
140 } __packed;
141 
142 /*
143  * DisplayID iteration.
144  *
145  * Do not access directly, this is private.
146  */
147 struct displayid_iter {
148 	const struct drm_edid *drm_edid;
149 
150 	const u8 *section;
151 	int length;
152 	int idx;
153 	int ext_index;
154 
155 	u8 version;
156 	u8 primary_use;
157 };
158 
159 void displayid_iter_edid_begin(const struct drm_edid *drm_edid,
160 			       struct displayid_iter *iter);
161 const struct displayid_block *
162 __displayid_iter_next(struct displayid_iter *iter);
163 #define displayid_iter_for_each(__block, __iter) \
164 	while (((__block) = __displayid_iter_next(__iter)))
165 void displayid_iter_end(struct displayid_iter *iter);
166 
167 u8 displayid_version(const struct displayid_iter *iter);
168 u8 displayid_primary_use(const struct displayid_iter *iter);
169 
170 #endif
171